On Tue, Jul 24, 2018 at 03:08:45PM +0800, Ming Huang wrote:

This patch is to unify D0x. Add pGBL_INTERFACE struct define and remove useless interfece. Replace DMRC pGblData with pGblInterface;

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhou You zhouyou17@huawei.com Signed-off-by: Ming Huang ming.huang@linaro.org

---

Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c | 4 +- Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c | 22 +- Silicon/Hisilicon/Include/Library/HwMemInitLib.h | 351 ++++----------------

Please add an orderfile as described in https://github.com/tianocore/tianocore.github.io/wiki/Laszlo%27s-unkempt-git... in order to make api/stuct changes are visible before changes to their use.

You can set one permanently for your repository using $ git config diff.orderFile <full path to orderfile>

3 files changed, 74 insertions(+), 303 deletions(-)

diff --git a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c index 7d06fccc2b..f5869841dc 100644 --- a/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c +++ b/Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/UpdateAcpiTable.c @@ -56,7 +56,7 @@ UpdateSrat ( UINT8 Skt = 0; UINTN Index = 0; VOID *HobList;

• GBL_DATA *Gbl_Data;

• GBL_INTERFACE *Gbl_Data; UINTN Base; UINTN Size; UINT8 NodeId;

@@ -69,7 +69,7 @@ UpdateSrat ( if (HobList == NULL) { return EFI_UNSUPPORTED; }

• Gbl_Data = (GBL_DATA*)GetNextGuidHob(&gHisiEfiMemoryMapGuid, HobList);

• Gbl_Data = (GBL_INTERFACE*)GetNextGuidHob(&gHisiEfiMemoryMapGuid, HobList); if (Gbl_Data == NULL) { DEBUG((DEBUG_ERROR, "Get next Guid HOb fail.\n")); return EFI_NOT_FOUND;

diff --git a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c index da714c9e22..262b129419 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c +++ b/Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClass.c @@ -45,7 +45,7 @@ SmbiosGetManufacturer ( VOID SmbiosGetPartNumber (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm,

@@ -78,7 +78,7 @@ SmbiosGetPartNumber ( VOID SmbiosGetSerialNumber (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm,

@@ -96,7 +96,7 @@ SmbiosGetSerialNumber ( BOOLEAN IsDimmPresent (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm

@@ -115,7 +115,7 @@ IsDimmPresent ( UINT8 SmbiosGetMemoryType (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm

@@ -146,7 +146,7 @@ SmbiosGetMemoryType ( VOID SmbiosGetTypeDetail (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm,

@@ -186,7 +186,7 @@ SmbiosGetTypeDetail ( VOID SmbiosGetDimmVoltageInfo (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm,

@@ -281,7 +281,7 @@ SmbiosGetPartitionWidth ( EFI_STATUS SmbiosAddType16Table (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, OUT EFI_SMBIOS_HANDLE *MemArraySmbiosHandle )

{ @@ -345,7 +345,7 @@ SmbiosAddType16Table ( EFI_STATUS SmbiosAddType19Table (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN EFI_SMBIOS_HANDLE MemArraySmbiosHandle )

{ @@ -397,7 +397,7 @@ SmbiosAddType19Table ( EFI_STATUS SmbiosAddType17Table (

• IN pGBL_DATA pGblData,

• IN pGBL_INTERFACE pGblData, IN UINT8 Skt, IN UINT8 Ch, IN UINT8 Dimm,

@@ -692,7 +692,7 @@ MemorySubClassEntryPoint( EFI_STATUS Status; EFI_SMBIOS_PROTOCOL *Smbios; EFI_HOB_GUID_TYPE *GuidHob;

• pGBL_DATA pGblData;

• pGBL_INTERFACE pGblData; EFI_SMBIOS_HANDLE MemArraySmbiosHandle; UINT8 Skt, Ch, Dimm;

@@ -702,7 +702,7 @@ MemorySubClassEntryPoint( DEBUG((EFI_D_ERROR, "Could not get MemoryMap Guid hob. %r\n")); return EFI_NOT_FOUND; }

• pGblData = (pGBL_DATA) GET_GUID_HOB_DATA(GuidHob);

• pGblData = (pGBL_INTERFACE) GET_GUID_HOB_DATA(GuidHob);

// // Locate dependent protocols diff --git a/Silicon/Hisilicon/Include/Library/HwMemInitLib.h b/Silicon/Hisilicon/Include/Library/HwMemInitLib.h index 2663cad836..2be90d35c7 100644 --- a/Silicon/Hisilicon/Include/Library/HwMemInitLib.h +++ b/Silicon/Hisilicon/Include/Library/HwMemInitLib.h @@ -50,48 +50,6 @@ typedef enum { DDR_FREQ_MAX } DDR_FREQUENCY_INDEX; -typedef struct _DDR_FREQ_TCK -{

• UINT32 ddrFreq;
• UINT32 ddrCk;

-}DDR_FREQ_TCK;

-typedef struct _GBL_CFG{

-}GBL_CFG;

-typedef struct _GBL_VAR{

-}GBL_VAR;

-typedef struct _GBL_NVDATA{

-}GBL_NVDATA;

-typedef struct _GOBAL {

• const GBL_CFG Config; // constant input data
• GBL_VAR Variable; // variable, volatile data
• GBL_NVDATA NvData; // variable, non-volatile data for S3, warm boot path
• UINT32 PreBootFailed;

-}GOBAL, *PGOBAL;

-struct DDR_RANK {

• BOOLEAN Status;
• UINT16 RttNom;
• UINT16 RttPark;
• UINT16 RttWr;
• UINT16 MR0;
• UINT16 MR1;
• UINT16 MR2;
• UINT16 MR3;
• UINT16 MR4;
• UINT16 MR5;
• UINT16 MR6[9];

-};

struct baseMargin { INT16 n; INT16 p; @@ -101,171 +59,7 @@ struct rankMargin { struct baseMargin rank[MAX_CHANNEL][MAX_RANK_CH]; }; -typedef struct _DDR_DIMM{

• BOOLEAN Status;
• UINT8 mapout;
• UINT8 DramType; //Byte 2
• UINT8 ModuleType; //Byte 3
• UINT8 ExtendModuleType;
• UINT8 SDRAMCapacity; //Byte 4
• UINT8 BankNum;
• UINT8 BGNum; //Byte 4 For DDR4
• UINT8 RowBits; //Byte 5
• UINT8 ColBits; //Byte 5
• UINT8 SpdVdd; //Byte 6
• UINT8 DramWidth; //Byte 7
• UINT8 RankNum; //Byte 7
• UINT8 PrimaryBusWidth; //Byte 8
• UINT8 ExtensionBusWidth; //Byte 8
• UINT32 Mtb;
• UINT32 Ftb;
• UINT32 minTck;
• UINT8 MtbDividend;
• UINT8 MtbDivsor;
• UINT8 nCL;
• UINT32 nRCD;
• UINT32 nRP;
• UINT8 SPDftb;
• UINT8 SpdMinTCK;
• UINT8 SpdMinTCKFtb;
• UINT8 SpdMaxTCK;
• UINT8 SpdMinTCL;
• UINT8 SpdMinTCLFtb;
• UINT8 SpdMinTWR;
• UINT8 SpdMinTRCD;
• UINT8 SpdMinTRCDFtb;
• UINT8 SpdMinTRRD;
• UINT8 SpdMinTRRDL;
• UINT16 SpdMinTRAS;
• UINT16 SpdMinTRC;
• UINT16 SpdMinTRCFtb;
• UINT16 SpdMinTRFC;
• UINT8 SpdMinTWTR;
• UINT8 SpdMinTRTP;
• UINT8 SpdMinTAA;
• UINT8 SpdMinTAAFtb;
• UINT8 SpdMinTFAW;
• UINT8 SpdMinTRP;
• UINT8 SpdMinTRPFtb;
• UINT8 SpdMinTCCDL;
• UINT8 SpdMinTCCDLFtb;
• UINT8 SpdAddrMap;
• UINT8 SpdModuleAttr;
• UINT8 SpdModPart[SPD_MODULE_PART]; // Module Part Number
• UINT8 SpdModPartDDR4[SPD_MODULE_PART_DDR4]; // Module Part Number DDR4
• UINT16 SpdMMfgId; // Module Mfg Id from SPD
• UINT16 SpdRMId; // Register Manufacturer Id
• UINT16 SpdMMDate; // Module Manufacturing Date
• UINT32 SpdSerialNum;
• UINT16 DimmSize;
• UINT16 DimmSpeed;
• UINT32 RankSize;
• UINT8 SpdMirror; //Denote the dram address mapping is standard mode or mirrored mode
• struct DDR_RANK Rank[MAX_RANK_DIMM];

-}DDR_DIMM;

-typedef struct {

• UINT32 ddrcTiming0;
• UINT32 ddrcTiming1;
• UINT32 ddrcTiming2;
• UINT32 ddrcTiming3;
• UINT32 ddrcTiming4;
• UINT32 ddrcTiming5;
• UINT32 ddrcTiming6;
• UINT32 ddrcTiming7;
• UINT32 ddrcTiming8;

-}DDRC_TIMING;

-typedef struct _MARGIN_RESULT{

• UINT32 OptimalDramVref[12];
• UINT32 optimalPhyVref[18];

-}MARGIN_RESULT;

-typedef struct _DDR_Channel{

• BOOLEAN Status;
• UINT8 CurrentDimmNum;
• UINT8 CurrentRankNum;
• UINT16 RankPresent;
• UINT8 DramType;
• UINT8 DramWidth;
• UINT8 ModuleType;
• UINT32 MemSize;
• UINT32 tck;
• UINT32 ratio;
• UINT32 CLSupport;
• UINT32 minTck;
• UINT32 taref;
• UINT32 nAA;
• UINT32 nAOND;
• UINT32 nCKE;
• UINT32 nCL;
• UINT32 nCCDL;
• UINT32 nCKSRX;
• UINT32 nCKSRE;
• UINT32 nCCDNSW;
• UINT32 nCCDNSR;
• UINT32 nFAW;
• UINT32 nMRD;
• UINT32 nMOD;
• UINT32 nRCD;
• UINT32 nRRD;
• UINT32 nRRDL;
• UINT32 nRAS;
• UINT32 nRC;
• UINT32 nRFC;
• UINT32 nRFCAB;
• UINT32 nRTP;
• UINT32 nRTW;
• UINT32 nRP;
• UINT32 nSRE;
• UINT32 nWL;
• UINT32 nWR;
• UINT32 nWTR;
• UINT32 nWTRL;
• UINT32 nXARD;
• UINT32 nZQPRD;
• UINT32 nZQINIT;
• UINT32 nZQCS;
• UINT8 cwl; //tWL?
• UINT8 pl; //parity latency
• UINT8 wr_pre_2t_en;
• UINT8 rd_pre_2t_en;
• UINT8 cmd_2t_en;
• UINT8 parity_en;
• UINT8 wr_dbi_en;
• UINT8 wr_dm_en;
• UINT8 ddr4_crc_en;
• UINT16 emrs0;
• UINT16 emrs1;
• UINT16 emrs1Wr;
• UINT16 emrs2;
• UINT16 emrs3;
• UINT16 emrs4;
• UINT16 emrs5;
• UINT16 emrs5Wr;
• UINT16 emrs6;
• UINT16 emrs7;
• UINT8 phy_rddata_set;
• UINT8 phyif_tim_rdcs;
• UINT8 phyif_tim_rden;
• UINT8 phyif_tim_wden;
• UINT8 phyif_tim_wdda;
• UINT8 phyif_tim_wdcs;
• UINT8 per_cs_training_en;
• UINT32 phyRdDataEnIeDly;
• UINT32 phyPadCalConfig;
• UINT32 phyDqsFallRiseDelay;
• UINT32 ddrcCfgDfiLat0;
• UINT32 ddrcCfgDfiLat1;
• UINT32 parityLatency;
• UINT32 dimm_parity_en;
• DDRC_TIMING ddrcTiming;
• DDR_DIMM Dimm[MAX_DIMM];
• MARGIN_RESULT sMargin;

-}DDR_CHANNEL;

-typedef struct _NVRAM_RANK{ +typedef struct _NVRAM_RANK_DATA{

Space before { (Applies throughout, but please don't fix up structs otherwise untouched by this patch. Unless you do it as a separate patch preceding this one.)

 UINT16      MR0;
 UINT16      MR1;
 UINT16      MR2;

@@ -273,15 +67,15 @@ typedef struct _NVRAM_RANK{ UINT16 MR4; UINT16 MR5; UINT16 MR6[9]; -}NVRAM_RANK; +}NVRAM_RANK_DATA;

Similarly, space after {. Also applies throughout.

-typedef struct _NVRAM_DIMM{

• NVRAM_RANK Rank[MAX_RANK_DIMM];

-}NVRAM_DIMM; +typedef struct _NVRAM_DIMM_DATA{

• NVRAM_RANK_DATA Rank[MAX_RANK_DIMM];

+}NVRAM_DIMM_DATA; -typedef struct _NVRAM_CHANNEL{

• NVRAM_DIMM Dimm[MAX_DIMM];

+typedef struct _NVRAM_CHANNEL_DATA{

• NVRAM_DIMM_DATA Dimm[MAX_DIMM]; UINT32 DDRC_CFG_ECC; UINT32 DDRC_CFG_WORKMODE; UINT32 DDRC_CFG_WORKMODE1;

@@ -325,94 +119,71 @@ typedef struct _NVRAM_CHANNEL{ UINT32 DDRC_CFG_DDRPHY; UINT32 Config[24]; BOOLEAN Status; -}NVRAM_CHANNEL; +}NVRAM_CHANNEL_DATA;

+typedef struct _NVRAM_DATA{

• UINT32 NvramCrc;
• NVRAM_CHANNEL_DATA Channel[MAX_SOCKET][MAX_CHANNEL];
• UINT32 DdrFreqIdx;

-typedef struct _NVRAM{

• UINT32 NvramCrc;
• NVRAM_CHANNEL Channel[MAX_SOCKET][MAX_CHANNEL];
• UINT32 DdrFreqIdx;

+}NVRAM_DATA; -}NVRAM; +struct DDR_RANK_DATA {

• BOOLEAN Status;

Status is not a boolean thing. A boolean is for "active" or "enabled" or something suchlike, so you can write if (entry->enabled) { .

Whereas if (entry->status) { carries no meaning that can be discerned without fully reading through all code touching that variable.

+};

+typedef struct _DDR_DIMM_DATA {

• BOOLEAN Status;

Status is not a boolean thing.

• UINT8 DramType; //Byte 2
• UINT8 ModuleType; //Byte 3
• UINT8 BankNum; //Byte 4,??DDR4,?????BankGroup??Bank??

Some encoding issue in comment.

• UINT8 RowBits; //Byte 5
• UINT8 ColBits; //Byte 5
• UINT8 SpdVdd; //Byte 6
• UINT8 RankNum; //Byte 7
• UINT8 PrimaryBusWidth; //Byte 8
• UINT8 ExtensionBusWidth; //Byte 8
• UINT8 SpdModPart[SPD_MODULE_PART]; // Module Part Number
• UINT8 SpdModPartDDR4[SPD_MODULE_PART_DDR4]; // Module Part Number DDR4
• UINT16 SpdMMfgId; // Module Mfg Id from SPD
• UINT32 SpdSerialNum;
• UINT32 RankSize;
• UINT16 DimmSize;
• UINT16 DimmSpeed;
• UINT16 SpdMMDate;
• struct DDR_RANK_DATA Rank[MAX_RANK_DIMM];

+}DDR_DIMM_DATA;

+typedef struct _DDR_CHANNEL_DATA {

• BOOLEAN Status;
• DDR_DIMM_DATA Dimm[MAX_DIMM];
• UINT8 CurrentDimmNum;

+}DDR_CHANNEL_DATA; -typedef struct _MEMORY{

• UINT8 Config0;
• UINT8 marginTest;
• UINT8 Config1[5];
• UINT8 ErrorBypass; //register of spd mirror mode
• UINT32 Config2;

-}MEMORY; +typedef struct _MEMORY_DATA {

• UINT8 rascBypass;

RascBypass.

+}MEMORY_DATA; -typedef struct _NUMAINFO{ +typedef struct _NUMAINFO_DATA { UINT8 NodeId; UINT64 Base; UINT64 Length; UINT32 ScclInterleaveEn; -}NUMAINFO; +}NUMAINFO_DATA; -typedef struct _GBL_DATA +typedef struct _GBL_DATA_INTERFACE {

• DDR_CHANNEL Channel[MAX_SOCKET][MAX_CHANNEL];
• UINT8 DramType;
• UINT8 CurrentDimmNum;
• UINT8 CurrentRankNum;
• UINT8 MaxSPCNum;
• UINT32 Freq;
• UINT32 SpdTckMtb;
• UINT32 SpdTckFtb;
• UINT32 SpdTck;
• UINT32 Tck;
• UINT32 DdrFreqIdx;
• UINT32 DevParaFreqIdx; //Maximum frequency of DDR device
• UINT32 MemSize;
• UINT32 EccEn;
• BOOLEAN SetupExist;
• UINT8 warmReset;
• UINT8 needColdReset;
• UINT8 cl;
• UINT8 cwl;
• UINT8 pl;
• UINT8 wr_pre_2t_en;
• UINT8 rd_pre_2t_en;
• UINT8 cmd_2t_en;
• UINT8 ddr4_parity_en;
• UINT8 wr_dbi_en;
• UINT8 wr_dm_en;
• UINT8 ddr4_crc_en;
• UINT16 emrs0;
• UINT16 emrs1;
• UINT16 emrs2;
• UINT16 emrs3;
• UINT16 emrs4;
• UINT16 emrs5;
• UINT16 emrs6;
• UINT16 emrs7;
• UINT8 phy_rddata_set;
• UINT8 phyif_tim_rdcs;
• UINT8 phyif_tim_rden;
• UINT8 phyif_tim_wden;
• UINT8 phyif_tim_wdda;
• UINT8 phyif_tim_wdcs;
• UINT8 dimm_trtr;
• UINT8 dimm_twtw;
• UINT8 rnk_trtr;
• UINT8 rnk_twtw;
• UINT8 rnk_trtw;
• UINT8 rnk_twtr;
• UINT8 per_cs_training_en;
• UINT8 scale;
• UINT8 ddrFreq;
• UINT8 debugNeed;
• UINT8 ddr3OdtEnable;
• double fprd;
• BOOLEAN chipIsEc;
• NVRAM nvram;
• MEMORY mem;
• NUMAINFO NumaInfo[MAX_SOCKET][MAX_NUM_PER_TYPE];

-}GBL_DATA, *pGBL_DATA;

• DDR_CHANNEL_DATA Channel[MAX_SOCKET][MAX_CHANNEL];
• UINT32 DdrFreqIdx;
• UINT32 Freq;
• UINT32 EccEn;
• UINT32 MemSize;
• BOOLEAN SetupExist;
• NVRAM_DATA nvram;

A bit too short a name. (Yes, I know it the code being removed already had this, but I was too stressed when I reviewed that.)

I think this should be NvRamInfo or NvRamData.

• MEMORY_DATA mem;

As above, too short a name. Something descriptive please.

• NUMAINFO_DATA NumaInfo[MAX_SOCKET][MAX_NUM_PER_TYPE];

+}GBL_INTERFACE, *pGBL_INTERFACE;

Please drop the *pGBL_INTERFACE typedef, it removes standardised semantic information provided by C and reduces readability.

/ Leif

typedef union { struct { -- 2.17.0

在 8/2/2018 10:56 PM, Leif Lindholm 写道:

On Tue, Jul 24, 2018 at 03:08:46PM +0800, Ming Huang wrote:

...

As the mocro of PlatformArch.h is platform special, so Separate

mocro -> macro (typo) special -> specific (subtleties of English language :) Separate -> separate (case)

...

PlatformArch.h to Hi1610,Hi1616,Hi1620 for unifying D0x.

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Zhou You zhouyou17@huawei.com Signed-off-by: Ming Huang ming.huang@linaro.org

---

Silicon/Hisilicon/{ => Hi1610}/Include/PlatformArch.h | 0 Silicon/Hisilicon/Hi1616/Include/PlatformArch.h | 35 ++++++++++++++++++++ Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 34 +++++++++++++++++++

Could you move the Hi1620 file to the "add d06 base files" patch? There is nothing else for D06 in the tree at this point. (Don't forget to update comment to reflect.)

Yes, Hi1620 file will be move to the "add d06 base files" patch.

...

3 files changed, 69 insertions(+)

diff --git a/Silicon/Hisilicon/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h similarity index 100% rename from Silicon/Hisilicon/Include/PlatformArch.h rename to Silicon/Hisilicon/Hi1610/Include/PlatformArch.h diff --git a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h new file mode 100644 index 0000000000..45995c5893 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h @@ -0,0 +1,35 @@ +/** @file +* +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015, Linaro Limited. All rights reserved.

Update copyright year?

...

+* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _PLATFORM_ARCH_H_ +#define _PLATFORM_ARCH_H_

+#define MAX_SOCKET 2 +#define MAX_DIE 4 +#define MAX_DDRC 2 +#define MAX_NODE (MAX_SOCKET * MAX_DIE) +#define MAX_CHANNEL 4 +#define MAX_DIMM 3 +#define MAX_RANK_CH 12 +#define MAX_RANK_DIMM 4 +// Max NUMA node number for each node type +#define MAX_NUM_PER_TYPE 8

+#define S1_BASE 0x40000000000

+#endif

diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h new file mode 100644 index 0000000000..7243a9ec35 --- /dev/null +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h @@ -0,0 +1,34 @@ +/** @file +* +* Copyright (c) 2015, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015, Linaro Limited. All rights reserved.

Update copyright year? (in other patch)

/ Leif

Ok, I will check all patches.

Ming

...

+* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _PLATFORM_ARCH_H_ +#define _PLATFORM_ARCH_H_

+#define MAX_SOCKET 2 +#define MAX_DIE 4 +#define MAX_DDRC 4 +#define MAX_NODE (MAX_SOCKET * MAX_DIE) +#define MAX_CHANNEL 8 +#define MAX_DIMM 2 +#define MAX_RANK_CH 8 +#define MAX_RANK_DIMM 4 +// Max NUMA node number for each node type +#define MAX_NUM_PER_TYPE 8

+#endif

-- 2.17.0

On Tue, Jul 24, 2018 at 03:08:47PM +0800, Ming Huang wrote:

Add several basal head file and add several build configuration

basal -> base

for D06.

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang ming.huang@linaro.org Signed-off-by: Heyi Guo heyi.guo@linaro.org

Ah, yes - please drop the multiple Signed-off-bys as well. If Heyi wrote the patch, keep him as Author - but only your Signed-off-by on patches you send out.

---

Platform/Hisilicon/D06/D06.dec | 29 ++ Platform/Hisilicon/D06/D06.dsc | 459 ++++++++++++++++++++ Platform/Hisilicon/D06/D06.fdf | 351 +++++++++++++++ Platform/Hisilicon/D06/Include/Library/CpldD06.h | 37 ++ Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h | 85 ++++ Silicon/Hisilicon/Include/Library/OemAddressMapLib.h | 6 + Silicon/Hisilicon/Include/Library/OemNicLib.h | 58 +++ 7 files changed, 1025 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dec b/Platform/Hisilicon/D06/D06.dec new file mode 100644 index 0000000000..555f816e69 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.dec @@ -0,0 +1,29 @@ +#/** @file +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/

+# +# D06 Package +# +# +#

+[Defines]

• DEC_SPECIFICATION = 0x00010005

0x0001001a

• PACKAGE_NAME = D06Pkg
• PACKAGE_GUID = B46F75D7-3864-450D-86D9-A0346A882232
• PACKAGE_VERSION = 0.1

+[Includes]

• Include

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc new file mode 100644 index 0000000000..91470118b2 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.dsc @@ -0,0 +1,459 @@ +# +# Copyright (c) 2011-2012, ARM Limited. All rights reserved. +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#

+################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines]

• PLATFORM_NAME = D06
• PLATFORM_GUID = D0D445F1-B2CA-4101-9986-1B23525CBEA6
• PLATFORM_VERSION = 0.1
• DSC_SPECIFICATION = 0x00010005

0x0001001a

• OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
• SUPPORTED_ARCHITECTURES = AARCH64
• BUILD_TARGETS = DEBUG|RELEASE

Can you also add NOOPT please? Between DEBUG and RELEASE.

• SKUID_IDENTIFIER = DEFAULT
• FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
• DEFINE INCLUDE_TFTP_COMMAND=1

TFTP needs to be disabled by default. Also, if you set a default value here to edit, the test belows needs to be !if ... == 1 (but preferable to use TRUE/FALSE) rather than !ifdef ... (Currently it would be included regardless of what you set this variable to.)

• DEFINE NETWORK_IP6_ENABLE = FALSE
• DEFINE HTTP_BOOT_ENABLE = FALSE
• DEFINE SECURE_BOOT_ENABLE = FALSE

+!include Silicon/Hisilicon/Hisilicon.dsc.inc

+[LibraryClasses.common]

• ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
• ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
• I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
• TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
• NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
• DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
• HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
• UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
• UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
• IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
• OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
• ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
• BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
• SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf

+!endif

+!if $(HTTP_BOOT_ENABLE) == TRUE

• HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf

+!endif

• CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
• TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
• CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
• GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
• BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
• UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
• SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
• ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
• CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
• # USB Requirements
• UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
• SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf

+!endif

• PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf

+[LibraryClasses.common.SEC]

• ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

• I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
• SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf

+[BuildOptions]

• GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/Silicon/Hisilicon/Hi1620/Include -I$(WORKSPACE)/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/

I do not understand the need for the Hi1620AcpiTables/ addition at all. Can you explain why it is needed?

+################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################

+[PcdsFeatureFlag.common]

• ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
• # It could be set FALSE to save size.
• gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
• gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
• gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
• gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE

+[PcdsFixedAtBuild.common]

• gArmPlatformTokenSpaceGuid.PcdCoreCount|48
• gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|48
• gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
• # Stacks for MPCores in Normal World
• gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0xA0E88000
• gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000
• gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00000000
• gArmTokenSpaceGuid.PcdSystemMemorySize|0x3FC00000
• # Size of the region used by UEFI in permanent memory (Reserved 64MB)
• gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x10000000
• gHisiTokenSpaceGuid.PcdSerDesFlowCtrlFlag|1
• gHisiTokenSpaceGuid.PcdSlotPerChannelNum|0x2
• ## Serial Terminal
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x94080000
• gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x400094080000
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
• gArmPlatformTokenSpaceGuid.PL011UartClkInHz|200000000
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
• gHisiTokenSpaceGuid.PcdIsMPBoot|1
• gHisiTokenSpaceGuid.PcdSocketMask|0x3
• !ifdef $(FIRMWARE_VER)
• gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
• !else
• gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D06 UEFI RC0 - B308 (V0.38)"
• !endif
• gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
• gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.38"
• gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
• gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
• gHisiTokenSpaceGuid.PcdBaseBoardProductName|L"D06"
• gHisiTokenSpaceGuid.PcdBaseBoardVersion|L"Estuary"
• gHisiTokenSpaceGuid.PcdCPUInfo|L"Hisilicon 1620"
• # TA
• gHisiTokenSpaceGuid.PcdArmPrimaryCoreTemp|0x80010000
• gArmTokenSpaceGuid.PcdGicDistributorBase|0xAE000000
• gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000
• gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000
• #
• # ARM Architectual Timer Frequency
• #
• # Set it to 0 so that the code will read frequency from register and be
• # adapted to 100M and 50M boards
• gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
• gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000
• gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
• gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
• gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b

*cough* I see that "|VOID*|0x0001006b" in d03 and d05 as well. It's copy-pasted from a .dec file and shouldn't be here :)

• gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x94010000
• gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
• gHisiTokenSpaceGuid.PcdCpldBaseAddress|0x80000000
• gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress|0x204000000
• gHisiTokenSpaceGuid.PcdPeriSubctrlAddress|0x94000000
• ## DTB address at spi flash
• gHisiTokenSpaceGuid.FdtFileAddress|0xA47C0000

Are we really still including DT in server platforms?

• ## 2+1
• gHisiTokenSpaceGuid.PcdPlatformDefaultPackageType|0x1
• gHisiTokenSpaceGuid.PcdTopOfLowMemory|0x40000000
• gHisiTokenSpaceGuid.PcdBottomOfHighMemory|0x1000000000
• gHisiTokenSpaceGuid.PcdNORFlashBase|0x80000000
• gHisiTokenSpaceGuid.PcdNORFlashCachableSize|0x8000000
• gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable|0x1
• gHisiTokenSpaceGuid.PcdMacAddress|0xA47E0000
• # PCIe ECAM Access BaseAddress
• gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xD0000000
• gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
• gHisiTokenSpaceGuid.Pcdsoctype|0x1620
• # SMBIOS 3.0 only
• # BIT0 set indicates 32-bit entry point and table are produced.<BR>
• # BIT1 set indicates 64-bit entry point and table are produced.<BR>
• gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
• #
• # ACPI Table Version
• #
• # BIT 1 - EFI_ACPI_TABLE_VERSION_1_0B.<BR>
• # BIT 2 - EFI_ACPI_TABLE_VERSION_2_0.<BR>
• # BIT 3 - EFI_ACPI_TABLE_VERSION_3_0.<BR>
• # BIT 4 - EFI_ACPI_TABLE_VERSION_4_0.<BR>
• # BIT 5 - EFI_ACPI_TABLE_VERSION_5_0.<BR>
• gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
• gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
• gArmTokenSpaceGuid.PcdPciIoTranslation|0x0

+################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common]

• #
• # SEC
• #
• #
• # PEI Phase modules
• #
• ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
• MdeModulePkg/Core/Pei/PeiMain.inf
• MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• ArmPlatformPkg/PlatformPei/PlatformPeim.inf
• ArmPkg/Drivers/CpuPei/CpuPei.inf
• IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
• MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
• MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
• Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
• MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {

• <LibraryClasses>

•  NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
  

Can you switch this to MdeModulePkg/Library/LzmaCustomDecompressLib instead?

• }
• #
• # DXE
• #
• MdeModulePkg/Core/Dxe/DxeMain.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
  

• }
• MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• #
• # Architectural Protocols
• #
• ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {

• <LibraryClasses>

•  NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
  

• }
• SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf

+!else

• MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+!endif

• Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
• MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
  

•  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
  

• }
• MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
• MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
• MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
• EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf {

• <LibraryClasses>

•  CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.inf
  

• }
• EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
• IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
• #
• #ACPI
• #
• MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
• Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
• Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
• #
• # Usb Support
• #
• MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
• MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
• MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
• MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
• MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
• MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
• #
• #network
• #
• MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
• MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
• MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
• MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
• MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
• MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
• MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• NetworkPkg/Ip6Dxe/Ip6Dxe.inf
• NetworkPkg/TcpDxe/TcpDxe.inf
• NetworkPkg/Udp6Dxe/Udp6Dxe.inf
• NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
• NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
• NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!else

• MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
• MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!endif

• MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf

+!if $(HTTP_BOOT_ENABLE) == TRUE

• NetworkPkg/DnsDxe/DnsDxe.inf
• NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
• NetworkPkg/HttpDxe/HttpDxe.inf
• NetworkPkg/HttpBootDxe/HttpBootDxe.inf

+!endif

• MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
• MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
• MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
• #
• # FAT filesystem + GPT/MBR partitioning
• #
• MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• FatPkg/EnhancedFatDxe/Fat.inf
• MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• MdeModulePkg/Application/UiApp/UiApp.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
  

•  NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
  

•  NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
  

• }
• #
• # Bds
• #
• MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
• #PCIe Support
• Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf
• ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
• MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {

• <LibraryClasses>

•  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
  

•  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
  

•  PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
  

• }
• MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
• MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
• #
• # Memory test
• #
• MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
• MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
• #
• # UEFI application (Shell Embedded Boot Loader)
• #
• ShellPkg/Application/Shell/Shell.inf {

• <LibraryClasses>

•  ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
  

•  HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
  

•  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
  

•  BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
  

+!if $(NETWORK_IP6_ENABLE) == TRUE

•  NULL|ShellPkg/Library/UefiShellNetwork2CommandsLib/UefiShellNetwork2CommandsLib.inf
  

+!endif

+!ifdef $(INCLUDE_DP)

Please change to !if (...) == TRUE

•  NULL|ShellPkg/Library/UefiDpLib/UefiDpLib.inf
  

+!endif #$(INCLUDE_DP)

• <PcdsFixedAtBuild>

•  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
  

•  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  

•  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
  

• }

+!ifdef $(INCLUDE_TFTP_COMMAND)

Please change to !if (...) == TRUE

• ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf {

• <PcdsFixedAtBuild>

•  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  

• }

+!endif #$(INCLUDE_TFTP_COMMAND)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf new file mode 100644 index 0000000000..93c464c9f7 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.fdf @@ -0,0 +1,351 @@ +# +# Copyright (c) 2011, 2012, ARM Limited. All rights reserved. +# Copyright (c) 2017 - 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017 - 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#

+[DEFINES]

+################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ +[FD.D06]

+BaseAddress = 0x204100000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.

+Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1

+# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00010000 +NumBlocks = 0x40

+################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType <FV, DATA, or FILE> +# +################################################################################

+0x00000000|0x00100000 +gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize

+0x00100000|0x00280000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT

+0x00380000|0x00020000 +gHisiTokenSpaceGuid.PcdTrustedFirmwareBL1Base +FILE = Platform/Hisilicon/D06/bl1.bin +0x003A0000|0x00020000 +FILE = Platform/Hisilicon/D06/fip.bin

+0x003C0000|0x0000e000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +DATA = {

• ## This is the EFI_FIRMWARE_VOLUME_HEADER
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• # FileSystemGuid: gEfiSystemNvDataFvGuid =
• 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
• 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
• # FvLength: 0x20000
• 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
• #Signature "_FVH" #Attributes
• 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
• #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
• 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,
• #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block
• 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
• #Blockmap[1]: End
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• ## This is the VARIABLE_STORE_HEADER

+!if $(SECURE_BOOT_ENABLE) == TRUE

• #Signature: gEfiAuthenticatedVariableGuid =
• # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
• 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
• 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,

+!else

• #Signature: gEfiVariableGuid =
• # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
• 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
• 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,

+!endif

• #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
• 0xB8, 0xdF, 0x00, 0x00,
• #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
• 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

+}

+0x003CE000|0x00002000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize +#NV_FTW_WORKING +DATA = {

• # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
• 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
• 0xA0, 0xCE, 0x65, 0x0 , 0xFD, 0x9F, 0x1B, 0x95,
• # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
• 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
• # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
• 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

+}

+0x003D0000|0x00010000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+0x003E0000|0x00010000

+0x003F0000|0x00010000 +FILE = Platform/Hisilicon/D03/CustomData.Fv

D03? (I think I said the same about D05.) Can we move the binary in edk2-non-osi to Platform/Hisilicon/D0x-CustomData.Fv?

+################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################

+[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 16 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE

• APRIORI DXE {
• INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• }
• INF MdeModulePkg/Core/Dxe/DxeMain.inf
• INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• #
• # PI DXE Drivers producing Architectural Protocols (EFI Services)
• #
• INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
• INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
• INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
• INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
• INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
• INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf

+!endif

• INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
• INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
• INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• #
• # Multiple Console IO support
• #
• INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
• #
• # FAT filesystem + GPT/MBR partitioning
• #
• INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• INF FatPkg/EnhancedFatDxe/Fat.inf
• INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
• #
• # Usb Support
• #
• INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
• INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
• INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
• INF Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
• #
• #ACPI
• #
• INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
• INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
• INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
• #
• #Network
• #
• INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
• INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
• INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
• INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
• INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
• INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
• INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
• INF NetworkPkg/TcpDxe/TcpDxe.inf
• INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
• INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
• INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
• INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!else

• INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
• INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!endif

• INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf

+!if $(HTTP_BOOT_ENABLE) == TRUE

• INF NetworkPkg/DnsDxe/DnsDxe.inf
• INF NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
• INF NetworkPkg/HttpDxe/HttpDxe.inf
• INF NetworkPkg/HttpBootDxe/HttpBootDxe.inf

+!endif

• #
• # PCI Support
• #
• INF Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf
• INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
• INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
• INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
• INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
• INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
• INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
• INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
• INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• #
• # Build Shell from latest source code instead of prebuilt binary
• #
• INF ShellPkg/Application/Shell/Shell.inf
• INF MdeModulePkg/Application/UiApp/UiApp.inf
• #
• # Bds
• #
• INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
• INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf

+[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE

• APRIORI PEI {
• INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• }
• INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
• INF MdeModulePkg/Core/Pei/PeiMain.inf
• INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
• INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
• INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
• INF Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
• INF ArmPkg/Drivers/CpuPei/CpuPei.inf
• INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
• INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
• FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
• SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {

•  SECTION FV_IMAGE = FVMAIN
  

• }
• }

+!include Silicon/Hisilicon/Hisilicon.fdf.inc

diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h b/Platform/Hisilicon/D06/Include/Library/CpldD06.h new file mode 100644 index 0000000000..2e7deeca6d --- /dev/null +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h @@ -0,0 +1,37 @@ +/** @file

• Copyright (c) 2018, Hisilicon Limited. All rights reserved.<BR>
• Copyright (c) 2018, Linaro Limited. All rights reserved.<BR>
• This program and the accompanying materials
• are licensed and made available under the terms and conditions of the BSD License
• which accompanies this distribution. The full text of the license may be found at
• http://opensource.org/licenses/bsd-license.php
• THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
• WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+#ifndef __CPLDD06_H__ +#define __CPLDD06_H__

+#define CPLD_BASE_ADDRESS 0x80000000

+#define CPLD_BIOSINDICATE_FLAG 0x09 +#define CPLD_I2C_SWITCH_FLAG 0x17 +#define CPU_GET_I2C_CONTROL BIT2 +#define BMC_I2C_STATUS BIT3

+#define CPLD_LOGIC_VERSION (0x4) +#define CPLD_LOGIC_COMPLIER_YEAR (0x1) +#define CPLD_LOGIC_COMPLIER_MONTH (0x2) +#define CPLD_LOGIC_COMPLIER_DAY (0x3)

COMPLIER? Is this meant to be COMPILER? or COMPILATION?

+#define CPLD_RISER_PRSNT_FLAG 0x40 +#define CPLD_RISER2_BOARD_ID 0x44

+#define CPLD_X8_X8_X8_BOARD_ID 0x92 +#define CPLD_X16_X8_BOARD_ID 0x93

+#endif /* __CPLDD06_H__ */ diff --git a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h new file mode 100644 index 0000000000..e13309a6bc --- /dev/null +++ b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h @@ -0,0 +1,85 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _SERDES_LIB_H_ +#define _SERDES_LIB_H_

+typedef enum {

• EmHilink0Hccs1X8 = 0,
• EmHilink0Pcie1X8 = 2,
• EmHilink0Pcie1X4Pcie2X4 = 3,
• EmHilink0Sas2X8 = 4,
• EmHilink0Hccs1X8Width16,
• EmHilink0Hccs1X8Width32,
• EmHilink0Hccs1X8Speed5G,

+} HILINK0_MODE_TYPE;

+typedef enum {

• EmHilink1Sas2X1 = 0,
• EmHilink1Hccs0X8 = 1,
• EmHilink1Pcie0X8 = 2,
• EmHilink1Hccs0X8Width16,
• EmHilink1Hccs0X8Width32,
• EmHilink1Hccs0X8Speed5G,

+} HILINK1_MODE_TYPE;

+typedef enum {

• EmHilink2Pcie2X8 = 0,
• EmHilink2Hccs2X8 = 1,
• EmHilink2Sas0X8 = 2,
• EmHilink2Hccs2X8Width16,
• EmHilink2Hccs2X8Width32,
• EmHilink2Hccs2X8Speed5G,

+} HILINK2_MODE_TYPE;

+typedef enum {

• EmHilink5Pcie3X4 = 0,
• EmHilink5Pcie2X2Pcie3X2 = 1,
• EmHilink5Sas1X4 = 2,

+} HILINK5_MODE_TYPE;

+typedef struct {

• HILINK0_MODE_TYPE Hilink0Mode;
• HILINK1_MODE_TYPE Hilink1Mode;
• HILINK2_MODE_TYPE Hilink2Mode;
• UINT32 Hilink3Mode;
• UINT32 Hilink4Mode;
• HILINK5_MODE_TYPE Hilink5Mode;
• UINT32 Hilink6Mode;
• UINT32 UseSsc;

+} SERDES_PARAM;

+#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF +#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF +#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF

+typedef struct {

• UINT32 MacroId;
• UINT32 DsNum;
• UINT32 DsCfg;

+} SERDES_POLARITY_INVERT;

+EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); +extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; +extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; +UINT32 GetEthType(UINT8 EthChannel);

Space after ( for functions. (Applies throughout.)

+VOID SerdesEnableCtleDfe(UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode);

+EFI_STATUS EfiSerdesInitWrap (UINT32 RateMode); +INT32 SerdesReset(UINT32 SiclId, UINT32 Macro); +VOID SerdesLoadFirmware(UINT32 SiclId, UINT32 Macro); +int h30_serdes_run_firmware(UINT32 nimbus_id, UINT32 macro, UINT8 DsMask, UINT8 ctle_mode);

There's no 'int' in EDK2. Is this INT64, INT32 or INTN?

+#endif diff --git a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h index 21498b7056..86a839b935 100644 --- a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h +++ b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h @@ -24,10 +24,16 @@ typedef struct _DDRC_BASE_ID{ // Invalid address, will cause exception when accessed by bug code #define ADDRESS_MAP_INVALID ((UINTN)(-1)) +UINTN OemGetGicSubBase (UINT32 NodeId); +UINTN OemGetCfgbusBase (UINT32 NodeId); UINTN OemGetPoeSubBase (UINT32 NodeId); UINTN OemGetPeriSubBase (UINT32 NodeId); UINTN OemGetAlgSubBase (UINT32 NodeId); UINTN OemGetM3SubBase (UINT32 NodeId); +UINTN OemGetPCIeSubBase (UINT32 NodeId); +UINTN OemGetIOMGMTSubBase(UINT32 NodeId); +UINTN OemGetNetworkSubBase(UINT32 NodeId); +UINTN OemGetHACSubBase(UINT32 NodeId);

Could the new declarations be added in best possible alphabetical order? Something like

UINTN OemGetPoeSubBase (UINT32 NodeId); UINTN OemGetPeriSubBase (UINT32 NodeId); UINTN OemGetAlgSubBase (UINT32 NodeId); +UINTN OemGetCfgbusBase (UINT32 NodeId); +UINTN OemGetGicSubBase (UINT32 NodeId); +UINTN OemGetHACSubBase(UINT32 NodeId); +UINTN OemGetIOMGMTSubBase(UINT32 NodeId); +UINTN OemGetNetworkSubBase(UINT32 NodeId); UINTN OemGetM3SubBase (UINT32 NodeId); +UINTN OemGetPCIeSubBase (UINT32 NodeId);

?

At least then we're left with only two prototypes out of order within the block.

VOID OemAddressMapInit(VOID); diff --git a/Silicon/Hisilicon/Include/Library/OemNicLib.h b/Silicon/Hisilicon/Include/Library/OemNicLib.h new file mode 100644 index 0000000000..22a29257fb --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OemNicLib.h @@ -0,0 +1,58 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _OEM_NIC_LIB_H_ +#define _OEM_NIC_LIB_H_

+#define ETH_MAX_PORT 8 +#define ETH_DEBUG_PORT0 6 +#define ETH_DEBUG_PORT1 7

+#define ETH_SPEED_10M 6 +#define ETH_SPEED_100M 7 +#define ETH_SPEED_1000M 8 +#define ETH_SPEED_10KM 9 +#define ETH_HALF_DUPLEX 0 +#define ETH_FULL_DUPLEX 1

+#define ETH_GDD_ID 0x001378e0 +#define ETH_PHY_BCM5241_ID 0x0143bc30 +#define ETH_PHY_MVL88E1145_ID 0x01410cd0 +#define ETH_PHY_MVL88E1119_ID 0x01410e80 +#define ETH_PHY_MVL88E1512_ID 0x01410dd0 +#define ETH_PHY_MVL88E1543_ID 0x01410ea0 +#define ETH_PHY_NLP3142_ID 0x00000412

+#define ETH_INVALID 0xffffffff

+typedef struct {

• UINT32 Valid;
• UINT32 Speed;
• UINT32 Duplex;
• UINT32 PhyId;
• UINT32 PhyAddr;

+} ETH_PRODUCT_DESC;

+BOOLEAN OemIsInitEth (UINT32 Port); +UINT32 OemEthFindFirstSP(); +ETH_PRODUCT_DESC *OemEthInit(UINT32 port); +//UINT32 GetFiberType(UINT8* FiberType);

Please don't add commented-out code.

/ Leif

+UINT32 GetCpu1FiberType(UINT8* Fiber1Type, UINT8* Fiber2Type); +UINT32 GetCpu2FiberType(UINT8* Fiber1Type, UINT8* Fiber2Type, UINT8* Fiber100Ge); +EFI_STATUS EFIAPI OemGetMac (IN OUT EFI_MAC_ADDRESS *Mac, IN UINTN Port); +EFI_STATUS EFIAPI OemSetMac (IN EFI_MAC_ADDRESS *Mac, IN UINTN Port);

+#endif

2.17.0

在 8/5/2018 11:06 PM, Ming 写道:

在 8/3/2018 12:14 AM, Leif Lindholm 写道:

...

On Tue, Jul 24, 2018 at 03:08:47PM +0800, Ming Huang wrote:

...

Add several basal head file and add several build configuration

basal -> base

...

for D06.

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang ming.huang@linaro.org Signed-off-by: Heyi Guo heyi.guo@linaro.org

Ah, yes - please drop the multiple Signed-off-bys as well. If Heyi wrote the patch, keep him as Author - but only your Signed-off-by on patches you send out.

...

---

Platform/Hisilicon/D06/D06.dec | 29 ++ Platform/Hisilicon/D06/D06.dsc | 459 ++++++++++++++++++++ Platform/Hisilicon/D06/D06.fdf | 351 +++++++++++++++ Platform/Hisilicon/D06/Include/Library/CpldD06.h | 37 ++ Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h | 85 ++++ Silicon/Hisilicon/Include/Library/OemAddressMapLib.h | 6 + Silicon/Hisilicon/Include/Library/OemNicLib.h | 58 +++ 7 files changed, 1025 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dec b/Platform/Hisilicon/D06/D06.dec new file mode 100644 index 0000000000..555f816e69 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.dec @@ -0,0 +1,29 @@ +#/** @file +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/

+# +# D06 Package +# +# +#

+[Defines]

• DEC_SPECIFICATION = 0x00010005

0x0001001a

...

• PACKAGE_NAME = D06Pkg
• PACKAGE_GUID = B46F75D7-3864-450D-86D9-A0346A882232
• PACKAGE_VERSION = 0.1

+[Includes]

• Include

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc new file mode 100644 index 0000000000..91470118b2 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.dsc @@ -0,0 +1,459 @@ +# +# Copyright (c) 2011-2012, ARM Limited. All rights reserved. +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#

+################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines]

• PLATFORM_NAME = D06
• PLATFORM_GUID = D0D445F1-B2CA-4101-9986-1B23525CBEA6
• PLATFORM_VERSION = 0.1
• DSC_SPECIFICATION = 0x00010005

0x0001001a

...

• OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
• SUPPORTED_ARCHITECTURES = AARCH64
• BUILD_TARGETS = DEBUG|RELEASE

Can you also add NOOPT please? Between DEBUG and RELEASE.

Yes, I will add spaces between DEBUG and RELEASE.

I think that I made a mistake in last email. Do you mean add NOOPT targets? DEBUG|NOOPT|RELEASE ? What is the NOOPT?

...

...

• SKUID_IDENTIFIER = DEFAULT
• FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
• DEFINE INCLUDE_TFTP_COMMAND=1

TFTP needs to be disabled by default. Also, if you set a default value here to edit, the test belows needs to be !if ... == 1 (but preferable to use TRUE/FALSE) rather than !ifdef ... (Currently it would be included regardless of what you set this variable to.)

I will delete this line and modify the test statement below.

...

...

• DEFINE NETWORK_IP6_ENABLE = FALSE
• DEFINE HTTP_BOOT_ENABLE = FALSE
• DEFINE SECURE_BOOT_ENABLE = FALSE

+!include Silicon/Hisilicon/Hisilicon.dsc.inc

+[LibraryClasses.common]

• ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
• ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
• I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
• TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
• NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
• DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
• HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
• UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
• UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
• IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
• OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
• ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
• BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
• SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf

+!endif

+!if $(HTTP_BOOT_ENABLE) == TRUE

• HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf

+!endif

• CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
• TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
• CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
• GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
• BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
• UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
• SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
• ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
• DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
• PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
• CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
• # USB Requirements
• UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
• SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf

+!endif

• PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf

+[LibraryClasses.common.SEC]

• ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

• I2CLib|Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
• SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf

+[BuildOptions]

• GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/Silicon/Hisilicon/Hi1620/Include -I$(WORKSPACE)/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/

I do not understand the need for the Hi1620AcpiTables/ addition at all. Can you explain why it is needed?

Hi1620Platform.h is included by Apei.h, but after moving ARM_ACPI_HEADER to PlatformArch, Hi1620Platform.h is no need by Apei.h. So it can be delete here.

...

...

+################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################

+[PcdsFeatureFlag.common]

• ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
• # It could be set FALSE to save size.
• gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
• gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
• gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE
• gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE

+[PcdsFixedAtBuild.common]

• gArmPlatformTokenSpaceGuid.PcdCoreCount|48
• gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|48
• gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
• # Stacks for MPCores in Normal World
• gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0xA0E88000
• gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000
• gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00000000
• gArmTokenSpaceGuid.PcdSystemMemorySize|0x3FC00000
• # Size of the region used by UEFI in permanent memory (Reserved 64MB)
• gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x10000000
• gHisiTokenSpaceGuid.PcdSerDesFlowCtrlFlag|1
• gHisiTokenSpaceGuid.PcdSlotPerChannelNum|0x2
• ## Serial Terminal
• gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x94080000
• gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x400094080000
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
• gArmPlatformTokenSpaceGuid.PL011UartClkInHz|200000000
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
• gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
• gHisiTokenSpaceGuid.PcdIsMPBoot|1
• gHisiTokenSpaceGuid.PcdSocketMask|0x3
• !ifdef $(FIRMWARE_VER)
• gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
• !else
• gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D06 UEFI RC0 - B308 (V0.38)"
• !endif
• gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
• gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.38"
• gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
• gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
• gHisiTokenSpaceGuid.PcdBaseBoardProductName|L"D06"
• gHisiTokenSpaceGuid.PcdBaseBoardVersion|L"Estuary"
• gHisiTokenSpaceGuid.PcdCPUInfo|L"Hisilicon 1620"
• # TA
• gHisiTokenSpaceGuid.PcdArmPrimaryCoreTemp|0x80010000
• gArmTokenSpaceGuid.PcdGicDistributorBase|0xAE000000
• gArmTokenSpaceGuid.PcdGicRedistributorsBase|0xAE100000
• gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFE000000
• #
• # ARM Architectual Timer Frequency
• #
• # Set it to 0 so that the code will read frequency from register and be
• # adapted to 100M and 50M boards
• gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0
• gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000
• gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
• gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
• gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b

*cough* I see that "|VOID*|0x0001006b" in d03 and d05 as well. It's copy-pasted from a .dec file and shouldn't be here :)

Yes, I will remove it.

...

...

• gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x94010000
• gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
• gHisiTokenSpaceGuid.PcdCpldBaseAddress|0x80000000
• gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress|0x204000000
• gHisiTokenSpaceGuid.PcdPeriSubctrlAddress|0x94000000
• ## DTB address at spi flash
• gHisiTokenSpaceGuid.FdtFileAddress|0xA47C0000

Are we really still including DT in server platforms?

DT is not included in D06 now, just acpi boot is support, so I will remove this.

...

...

• ## 2+1
• gHisiTokenSpaceGuid.PcdPlatformDefaultPackageType|0x1
• gHisiTokenSpaceGuid.PcdTopOfLowMemory|0x40000000
• gHisiTokenSpaceGuid.PcdBottomOfHighMemory|0x1000000000
• gHisiTokenSpaceGuid.PcdNORFlashBase|0x80000000
• gHisiTokenSpaceGuid.PcdNORFlashCachableSize|0x8000000
• gHisiTokenSpaceGuid.PcdTrustedFirmwareEnable|0x1
• gHisiTokenSpaceGuid.PcdMacAddress|0xA47E0000
• # PCIe ECAM Access BaseAddress
• gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xD0000000
• gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
• gHisiTokenSpaceGuid.Pcdsoctype|0x1620
• # SMBIOS 3.0 only
• # BIT0 set indicates 32-bit entry point and table are produced.<BR>
• # BIT1 set indicates 64-bit entry point and table are produced.<BR>
• gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2
• #
• # ACPI Table Version
• #
• # BIT 1 - EFI_ACPI_TABLE_VERSION_1_0B.<BR>
• # BIT 2 - EFI_ACPI_TABLE_VERSION_2_0.<BR>
• # BIT 3 - EFI_ACPI_TABLE_VERSION_3_0.<BR>
• # BIT 4 - EFI_ACPI_TABLE_VERSION_4_0.<BR>
• # BIT 5 - EFI_ACPI_TABLE_VERSION_5_0.<BR>
• gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
• gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
• gArmTokenSpaceGuid.PcdPciIoTranslation|0x0

+################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common]

• #
• # SEC
• #
• #
• # PEI Phase modules
• #
• ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
• MdeModulePkg/Core/Pei/PeiMain.inf
• MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• ArmPlatformPkg/PlatformPei/PlatformPeim.inf
• ArmPkg/Drivers/CpuPei/CpuPei.inf
• IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
• MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
• MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
• Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
• MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {

• <LibraryClasses>

•  NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
  

Can you switch this to MdeModulePkg/Library/LzmaCustomDecompressLib instead?

Yes, the module in MdeModulePkg should be used first.

...

...

• }
• #
• # DXE
• #
• MdeModulePkg/Core/Dxe/DxeMain.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
  

• }
• MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• #
• # Architectural Protocols
• #
• ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {

• <LibraryClasses>

•  NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
  

• }
• SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf

+!else

• MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+!endif

• Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
• MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
  

•  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
  

• }
• MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
• MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
• MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
• EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf {

• <LibraryClasses>

•  CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLibRuntime.inf
  

• }
• EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
• IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
• #
• #ACPI
• #
• MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
• Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
• Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
• #
• # Usb Support
• #
• MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
• MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
• MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
• MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
• MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
• MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
• #
• #network
• #
• MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
• MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
• MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
• MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
• MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
• MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
• MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• NetworkPkg/Ip6Dxe/Ip6Dxe.inf
• NetworkPkg/TcpDxe/TcpDxe.inf
• NetworkPkg/Udp6Dxe/Udp6Dxe.inf
• NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
• NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
• NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!else

• MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
• MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!endif

• MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf

+!if $(HTTP_BOOT_ENABLE) == TRUE

• NetworkPkg/DnsDxe/DnsDxe.inf
• NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
• NetworkPkg/HttpDxe/HttpDxe.inf
• NetworkPkg/HttpBootDxe/HttpBootDxe.inf

+!endif

• MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
• MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
• MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
• #
• # FAT filesystem + GPT/MBR partitioning
• #
• MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• FatPkg/EnhancedFatDxe/Fat.inf
• MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• MdeModulePkg/Application/UiApp/UiApp.inf {

• <LibraryClasses>

•  NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
  

•  NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
  

•  NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
  

• }
• #
• # Bds
• #
• MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
• Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
• #PCIe Support
• Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf
• ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
• MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {

• <LibraryClasses>

•  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
  

•  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
  

•  PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
  

• }
• MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
• MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
• #
• # Memory test
• #
• MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
• MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
• #
• # UEFI application (Shell Embedded Boot Loader)
• #
• ShellPkg/Application/Shell/Shell.inf {

• <LibraryClasses>

•  ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
  

•  NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
  

•  HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
  

•  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
  

•  BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
  

+!if $(NETWORK_IP6_ENABLE) == TRUE

•  NULL|ShellPkg/Library/UefiShellNetwork2CommandsLib/UefiShellNetwork2CommandsLib.inf
  

+!endif

+!ifdef $(INCLUDE_DP)

Please change to !if (...) == TRUE

...

•  NULL|ShellPkg/Library/UefiDpLib/UefiDpLib.inf
  

+!endif #$(INCLUDE_DP)

• <PcdsFixedAtBuild>

•  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
  

•  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  

•  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
  

• }

+!ifdef $(INCLUDE_TFTP_COMMAND)

Please change to !if (...) == TRUE

...

• ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf {

• <PcdsFixedAtBuild>

•  gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  

• }

+!endif #$(INCLUDE_TFTP_COMMAND)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf new file mode 100644 index 0000000000..93c464c9f7 --- /dev/null +++ b/Platform/Hisilicon/D06/D06.fdf @@ -0,0 +1,351 @@ +# +# Copyright (c) 2011, 2012, ARM Limited. All rights reserved. +# Copyright (c) 2017 - 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017 - 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#

+[DEFINES]

+################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ +[FD.D06]

+BaseAddress = 0x204100000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.

+Size = 0x00400000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device +ErasePolarity = 1

+# This one is tricky, it must be: BlockSize * NumBlocks = Size +BlockSize = 0x00010000 +NumBlocks = 0x40

+################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType <FV, DATA, or FILE> +# +################################################################################

+0x00000000|0x00100000 +gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize

+0x00100000|0x00280000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT

+0x00380000|0x00020000 +gHisiTokenSpaceGuid.PcdTrustedFirmwareBL1Base +FILE = Platform/Hisilicon/D06/bl1.bin +0x003A0000|0x00020000 +FILE = Platform/Hisilicon/D06/fip.bin

+0x003C0000|0x0000e000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +DATA = {

• ## This is the EFI_FIRMWARE_VOLUME_HEADER
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• # FileSystemGuid: gEfiSystemNvDataFvGuid =
• 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
• 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
• # FvLength: 0x20000
• 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
• #Signature "_FVH" #Attributes
• 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
• #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
• 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,
• #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block
• 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
• #Blockmap[1]: End
• 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
• ## This is the VARIABLE_STORE_HEADER

+!if $(SECURE_BOOT_ENABLE) == TRUE

• #Signature: gEfiAuthenticatedVariableGuid =
• # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
• 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
• 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,

+!else

• #Signature: gEfiVariableGuid =
• # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
• 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
• 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,

+!endif

• #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
• 0xB8, 0xdF, 0x00, 0x00,
• #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
• 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

+}

+0x003CE000|0x00002000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize +#NV_FTW_WORKING +DATA = {

• # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
• 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
• 0xA0, 0xCE, 0x65, 0x0 , 0xFD, 0x9F, 0x1B, 0x95,
• # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
• 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
• # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
• 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

+}

+0x003D0000|0x00010000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+0x003E0000|0x00010000

+0x003F0000|0x00010000 +FILE = Platform/Hisilicon/D03/CustomData.Fv

D03? (I think I said the same about D05.) Can we move the binary in edk2-non-osi to Platform/Hisilicon/D0x-CustomData.Fv?

Yes, I will do this and add patch in edk2-non-osi.

...

...

+################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################

+[FV.FvMain] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 16 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE

• APRIORI DXE {
• INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• }
• INF MdeModulePkg/Core/Dxe/DxeMain.inf
• INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
• #
• # PI DXE Drivers producing Architectural Protocols (EFI Services)
• #
• INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
• INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
• INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
• INF Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
• INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
• INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
• INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
• INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+!if $(SECURE_BOOT_ENABLE) == TRUE

• INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf

+!endif

• INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
• INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
• INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
• INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
• #
• # Multiple Console IO support
• #
• INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
• INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
• INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
• INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
• INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
• INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
• INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
• INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
• #
• # FAT filesystem + GPT/MBR partitioning
• #
• INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
• INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
• INF FatPkg/EnhancedFatDxe/Fat.inf
• INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
• INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
• #
• # Usb Support
• #
• INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
• INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
• INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
• INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
• INF Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
• INF Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
• #
• #ACPI
• #
• INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
• INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
• INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
• #
• #Network
• #
• INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
• INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
• INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
• INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
• INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
• INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
• INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf

+!if $(NETWORK_IP6_ENABLE) == TRUE

• INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
• INF NetworkPkg/TcpDxe/TcpDxe.inf
• INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
• INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
• INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
• INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!else

• INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
• INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf

+!endif

• INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf

+!if $(HTTP_BOOT_ENABLE) == TRUE

• INF NetworkPkg/DnsDxe/DnsDxe.inf
• INF NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
• INF NetworkPkg/HttpDxe/HttpDxe.inf
• INF NetworkPkg/HttpBootDxe/HttpBootDxe.inf

+!endif

• #
• # PCI Support
• #
• INF Silicon/Hisilicon/Drivers/PciPlatform/PciPlatform.inf
• INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
• INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
• INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
• INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
• INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
• INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
• INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
• INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
• #
• # Build Shell from latest source code instead of prebuilt binary
• #
• INF ShellPkg/Application/Shell/Shell.inf
• INF MdeModulePkg/Application/UiApp/UiApp.inf
• #
• # Bds
• #
• INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
• INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
• INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
• INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
• INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf

+[FV.FVMAIN_COMPACT] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE

• APRIORI PEI {
• INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• }
• INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
• INF MdeModulePkg/Core/Pei/PeiMain.inf
• INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
• INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
• INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
• INF Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
• INF ArmPkg/Drivers/CpuPei/CpuPei.inf
• INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
• INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
• INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
• FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
• SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {

•  SECTION FV_IMAGE = FVMAIN
  

• }
• }

+!include Silicon/Hisilicon/Hisilicon.fdf.inc

diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h b/Platform/Hisilicon/D06/Include/Library/CpldD06.h new file mode 100644 index 0000000000..2e7deeca6d --- /dev/null +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h @@ -0,0 +1,37 @@ +/** @file

• Copyright (c) 2018, Hisilicon Limited. All rights reserved.<BR>
• Copyright (c) 2018, Linaro Limited. All rights reserved.<BR>
• This program and the accompanying materials
• are licensed and made available under the terms and conditions of the BSD License
• which accompanies this distribution. The full text of the license may be found at
• http://opensource.org/licenses/bsd-license.php
• THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
• WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+#ifndef __CPLDD06_H__ +#define __CPLDD06_H__

+#define CPLD_BASE_ADDRESS 0x80000000

+#define CPLD_BIOSINDICATE_FLAG 0x09 +#define CPLD_I2C_SWITCH_FLAG 0x17 +#define CPU_GET_I2C_CONTROL BIT2 +#define BMC_I2C_STATUS BIT3

+#define CPLD_LOGIC_VERSION (0x4) +#define CPLD_LOGIC_COMPLIER_YEAR (0x1) +#define CPLD_LOGIC_COMPLIER_MONTH (0x2) +#define CPLD_LOGIC_COMPLIER_DAY (0x3)

COMPLIER? Is this meant to be COMPILER? or COMPILATION?

I think this is COMPILE for build date of cpld.

...

...

+#define CPLD_RISER_PRSNT_FLAG 0x40 +#define CPLD_RISER2_BOARD_ID 0x44

+#define CPLD_X8_X8_X8_BOARD_ID 0x92 +#define CPLD_X16_X8_BOARD_ID 0x93

+#endif /* __CPLDD06_H__ */ diff --git a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h new file mode 100644 index 0000000000..e13309a6bc --- /dev/null +++ b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h @@ -0,0 +1,85 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _SERDES_LIB_H_ +#define _SERDES_LIB_H_

+typedef enum {

• EmHilink0Hccs1X8 = 0,
• EmHilink0Pcie1X8 = 2,
• EmHilink0Pcie1X4Pcie2X4 = 3,
• EmHilink0Sas2X8 = 4,
• EmHilink0Hccs1X8Width16,
• EmHilink0Hccs1X8Width32,
• EmHilink0Hccs1X8Speed5G,

+} HILINK0_MODE_TYPE;

+typedef enum {

• EmHilink1Sas2X1 = 0,
• EmHilink1Hccs0X8 = 1,
• EmHilink1Pcie0X8 = 2,
• EmHilink1Hccs0X8Width16,
• EmHilink1Hccs0X8Width32,
• EmHilink1Hccs0X8Speed5G,

+} HILINK1_MODE_TYPE;

+typedef enum {

• EmHilink2Pcie2X8 = 0,
• EmHilink2Hccs2X8 = 1,
• EmHilink2Sas0X8 = 2,
• EmHilink2Hccs2X8Width16,
• EmHilink2Hccs2X8Width32,
• EmHilink2Hccs2X8Speed5G,

+} HILINK2_MODE_TYPE;

+typedef enum {

• EmHilink5Pcie3X4 = 0,
• EmHilink5Pcie2X2Pcie3X2 = 1,
• EmHilink5Sas1X4 = 2,

+} HILINK5_MODE_TYPE;

+typedef struct {

• HILINK0_MODE_TYPE Hilink0Mode;
• HILINK1_MODE_TYPE Hilink1Mode;
• HILINK2_MODE_TYPE Hilink2Mode;
• UINT32 Hilink3Mode;
• UINT32 Hilink4Mode;
• HILINK5_MODE_TYPE Hilink5Mode;
• UINT32 Hilink6Mode;
• UINT32 UseSsc;

+} SERDES_PARAM;

+#define SERDES_INVALID_MACRO_ID 0xFFFFFFFF +#define SERDES_INVALID_LANE_NUM 0xFFFFFFFF +#define SERDES_INVALID_RATE_MODE 0xFFFFFFFF

+typedef struct {

• UINT32 MacroId;
• UINT32 DsNum;
• UINT32 DsCfg;

+} SERDES_POLARITY_INVERT;

+EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); +extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; +extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; +UINT32 GetEthType(UINT8 EthChannel);

Space after ( for functions. (Applies throughout.)

...

+VOID SerdesEnableCtleDfe(UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode);

+EFI_STATUS EfiSerdesInitWrap (UINT32 RateMode); +INT32 SerdesReset(UINT32 SiclId, UINT32 Macro); +VOID SerdesLoadFirmware(UINT32 SiclId, UINT32 Macro); +int h30_serdes_run_firmware(UINT32 nimbus_id, UINT32 macro, UINT8 DsMask, UINT8 ctle_mode);

There's no 'int' in EDK2. Is this INT64, INT32 or INTN?

It is INT32 here.

...

...

+#endif diff --git a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h index 21498b7056..86a839b935 100644 --- a/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h +++ b/Silicon/Hisilicon/Include/Library/OemAddressMapLib.h @@ -24,10 +24,16 @@ typedef struct _DDRC_BASE_ID{ // Invalid address, will cause exception when accessed by bug code #define ADDRESS_MAP_INVALID ((UINTN)(-1)) +UINTN OemGetGicSubBase (UINT32 NodeId); +UINTN OemGetCfgbusBase (UINT32 NodeId); UINTN OemGetPoeSubBase (UINT32 NodeId); UINTN OemGetPeriSubBase (UINT32 NodeId); UINTN OemGetAlgSubBase (UINT32 NodeId); UINTN OemGetM3SubBase (UINT32 NodeId); +UINTN OemGetPCIeSubBase (UINT32 NodeId); +UINTN OemGetIOMGMTSubBase(UINT32 NodeId); +UINTN OemGetNetworkSubBase(UINT32 NodeId); +UINTN OemGetHACSubBase(UINT32 NodeId);

Could the new declarations be added in best possible alphabetical order? Something like

UINTN OemGetPoeSubBase (UINT32 NodeId); UINTN OemGetPeriSubBase (UINT32 NodeId); UINTN OemGetAlgSubBase (UINT32 NodeId); +UINTN OemGetCfgbusBase (UINT32 NodeId); +UINTN OemGetGicSubBase (UINT32 NodeId); +UINTN OemGetHACSubBase(UINT32 NodeId); +UINTN OemGetIOMGMTSubBase(UINT32 NodeId); +UINTN OemGetNetworkSubBase(UINT32 NodeId); UINTN OemGetM3SubBase (UINT32 NodeId); +UINTN OemGetPCIeSubBase (UINT32 NodeId);

?

At least then we're left with only two prototypes out of order within the block.

Yes, I will modify this as your suggestions.

...

...

VOID OemAddressMapInit(VOID); diff --git a/Silicon/Hisilicon/Include/Library/OemNicLib.h b/Silicon/Hisilicon/Include/Library/OemNicLib.h new file mode 100644 index 0000000000..22a29257fb --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OemNicLib.h @@ -0,0 +1,58 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/

+#ifndef _OEM_NIC_LIB_H_ +#define _OEM_NIC_LIB_H_

+#define ETH_MAX_PORT 8 +#define ETH_DEBUG_PORT0 6 +#define ETH_DEBUG_PORT1 7

+#define ETH_SPEED_10M 6 +#define ETH_SPEED_100M 7 +#define ETH_SPEED_1000M 8 +#define ETH_SPEED_10KM 9 +#define ETH_HALF_DUPLEX 0 +#define ETH_FULL_DUPLEX 1

+#define ETH_GDD_ID 0x001378e0 +#define ETH_PHY_BCM5241_ID 0x0143bc30 +#define ETH_PHY_MVL88E1145_ID 0x01410cd0 +#define ETH_PHY_MVL88E1119_ID 0x01410e80 +#define ETH_PHY_MVL88E1512_ID 0x01410dd0 +#define ETH_PHY_MVL88E1543_ID 0x01410ea0 +#define ETH_PHY_NLP3142_ID 0x00000412

+#define ETH_INVALID 0xffffffff

+typedef struct {

• UINT32 Valid;
• UINT32 Speed;
• UINT32 Duplex;
• UINT32 PhyId;
• UINT32 PhyAddr;

+} ETH_PRODUCT_DESC;

+BOOLEAN OemIsInitEth (UINT32 Port); +UINT32 OemEthFindFirstSP(); +ETH_PRODUCT_DESC *OemEthInit(UINT32 port); +//UINT32 GetFiberType(UINT8* FiberType);

Please don't add commented-out code.

/ Leif

This line will be remove, all comments above will be applied.

Ming

...

...

+UINT32 GetCpu1FiberType(UINT8* Fiber1Type, UINT8* Fiber2Type); +UINT32 GetCpu2FiberType(UINT8* Fiber1Type, UINT8* Fiber2Type, UINT8* Fiber100Ge); +EFI_STATUS EFIAPI OemGetMac (IN OUT EFI_MAC_ADDRESS *Mac, IN UINTN Port); +EFI_STATUS EFIAPI OemSetMac (IN EFI_MAC_ADDRESS *Mac, IN UINTN Port);

+#endif

2.17.0

在 8/3/2018 12:56 AM, Leif Lindholm 写道:

On Tue, Jul 24, 2018 at 03:08:48PM +0800, Ming Huang wrote:

...

Add M41T83RealTimeClockLib for RTC.

Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang ming.huang@linaro.org Signed-off-by: Heyi Guo heyi.guo@linaro.org

---

Platform/Hisilicon/D06/D06.dsc | 1 + Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 168 ++++++ Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 603 ++++++++++++++++++++ Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 45 ++

Move this to Silicon/Hisilicon/Library?

OK

...

4 files changed, 817 insertions(+)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc index 91470118b2..e05c97e1c6 100644 --- a/Platform/Hisilicon/D06/D06.dsc +++ b/Platform/Hisilicon/D06/D06.dsc @@ -66,6 +66,7 @@ CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf

• RealTimeClockLib|Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf

CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h new file mode 100644 index 0000000000..12a67948c3 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h @@ -0,0 +1,168 @@ +/** @file

• Copyright (c) 2018, Hisilicon Limited. All rights reserved.<BR>
• Copyright (c) 2018, Linaro Limited. All rights reserved.<BR>
• This program and the accompanying materials
• are licensed and made available under the terms and conditions of the BSD License
• which accompanies this distribution. The full text of the license may be found at
• http://opensource.org/licenses/bsd-license.php
• THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
• WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+#ifndef __M41T83_REAL_TIME_CLOCK_H__ +#define __M41T83_REAL_TIME_CLOCK_H__

+#define M41T83_REGADDR_DOTSECONDS 0x00 +#define M41T83_REGADDR_SECONDS 0x01 +#define M41T83_REGADDR_MINUTES 0x02 +#define M41T83_REGADDR_HOURS 0x03 +#define M41T83_REGADDR_WEEK_DAY 0x04 +#define M41T83_REGADDR_DAY 0x05 +#define M41T83_REGADDR_MONTH 0x06 +#define M41T83_REGADDR_YEAR 0x07 +#define M41T83_REGADDR_ALARM1SEC 0x0E +#define M41T83_REGADDR_ALARM1MIN 0x0D +#define M41T83_REGADDR_ALARM1HOUR 0x0C +#define M41T83_REGADDR_ALARM1DATE 0x0B +#define M41T83_REGADDR_ALARM1MONTH 0x0A

+#define M41T83_REGADDR_TIMERCONTROL 0x11

+#define M41T83_REGADDR_ALARM2SEC 0x18 +#define M41T83_REGADDR_ALARM2MIN 0x17 +#define M41T83_REGADDR_ALARM2HOUR 0x16 +#define M41T83_REGADDR_ALARM2DATE 0x15 +#define M41T83_REGADDR_ALARM2MONTH 0x14

+#pragma pack(1)

It is not obivous to me why this pragma is needed here. I don't mind the use of pack where it's helpful, but I don't want it added "just in case".

I think it is not necessary and it will be removed in v2.

...

+typedef union {

• struct {
• UINT8 TD0:1;
• UINT8 TD1:1;
• UINT8 RSV:3;
• UINT8 TIE:1;
• UINT8 TITP:1;
• UINT8 TE:1;
• } bits;

Bits.

...

• UINT8 u8;

Uint8.

(Please follow this pattern throughout.)

...

+} RTC_M41T83_TIMERCONTROL;

+typedef union {

• struct {
• UINT8 MicroSeconds;
• } bits;
• UINT8 u8;

+} RTC_M41T83_DOTSECOND;

+typedef union {

• struct{
• UINT8 Seconds:7;
• UINT8 ST:1;
• } bits;
• UINT8 u8;

+} RTC_M41T83_SECOND;

+typedef union {

• struct {
• UINT8 Minutes:7;
• UINT8 Rsv:1;
• } bits;
• UINT8 u8;

+} RTC_M41T83_MINUTE;

+typedef union {

• struct {
• UINT8 Hours:6;
• UINT8 CB:2;
• } bits;
• UINT8 u8;

+} RTC_M41T83_HOUR;

+typedef union {

• struct{
• UINT8 Days:3;
• UINT8 Rsv:5;
• } bits;
• UINT8 u8;

+} RTC_M41T83_WEEK_DAY;

+typedef union {

• struct{
• UINT8 Days:6;
• UINT8 Rsv:2;
• } bits;
• UINT8 u8;

+} RTC_M41T83_MONTH_DAY;

+typedef union {

• struct {
• UINT8 Months:5;
• UINT8 Rsv:3;
• } bits;
• UINT8 u8;

+} RTC_M41T83_MONTH;

+typedef union {

• struct {
• UINT8 Years:8;
• } bits;
• UINT8 u8;

+} RTC_M41T83_YEAR;

+typedef union {

• struct {
• UINT8 Second:7;
• UINT8 RPT11:1;
• } bits;
• UINT8 u8;

+} RTC_M41T83_ALARM1SEC;

+typedef union {

• struct {
• UINT8 Minute:7;
• UINT8 RPT12:1;
• } bits;
• UINT8 u8;

+} RTC_M41T83_ALARM1MIN;

+typedef union {

• struct {
• UINT8 Hour:6;
• UINT8 HT:1;
• UINT8 RPT13:1;
• } bits;
• UINT8 u8;

+} RTC_M41T83_ALARM1HOUR;

+typedef struct {

• RTC_M41T83_DOTSECOND Addr0;

Why use AddrX names instead of descriptive ones?

Descriptive ones are better, modify it in v2.

...

• RTC_M41T83_SECOND Addr1;
• RTC_M41T83_MINUTE Addr2;
• RTC_M41T83_HOUR Addr3;
• RTC_M41T83_WEEK_DAY Addr4;
• RTC_M41T83_MONTH_DAY Addr5;
• RTC_M41T83_MONTH Addr6;
• RTC_M41T83_YEAR Addr7;

+} RTC_M41T83_TIME;

+#pragma pack()

+// Define EPOCH (1970-JANUARY-01) in the Julian Date representation +#define EPOCH_JULIAN_DATE 2440588

Can this be imported from EmbeddedPkg TimeBaseLib?

Yes

...

+// Seconds per unit +#define SEC_PER_MIN ((UINTN) 60) +#define SEC_PER_HOUR ((UINTN) 3600) +#define SEC_PER_DAY ((UINTN) 86400)

+#define SEC_PER_MONTH ((UINTN) 2,592,000) +#define SEC_PER_YEAR ((UINTN) 31,536,000)

And these?

Modify it in v2.

...

+EFI_LOCK mRtcLock;

Please move this to the .c file, and make it STATIC.

...

+#endif diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c new file mode 100644 index 0000000000..9b1d7c00e8 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c @@ -0,0 +1,603 @@ +/** @file

• Copyright (c) 2018, Hisilicon Limited. All rights reserved.<BR>
• Copyright (c) 2018, Linaro Limited. All rights reserved.<BR>
• This program and the accompanying materials
• are licensed and made available under the terms and conditions of the BSD License
• which accompanies this distribution. The full text of the license may be found at
• http://opensource.org/licenses/bsd-license.php
• THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
• WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+#include <Uefi.h> +#include <PiDxe.h> +#include <Library/BaseLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/CpldD06.h> +#include <Library/CpldIoLib.h> +#include <Library/DebugLib.h> +#include <Library/I2CLib.h> +#include <Library/IoLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> +#include <Library/TimerLib.h> +#include <Library/UefiLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiRuntimeLib.h> +#include <Library/UefiRuntimeServicesTableLib.h> +#include <Protocol/RealTimeClock.h> +#include "M41T83RealTimeClock.h"

+extern I2C_DEVICE gDS3231RtcDevice;

Hang on - on the branch you pointed to for the code, this line is

extern I2C_DEVICE gRtcDevice;

Please make sure you only ever send out patches that match the branch you point to! I now find myself wondering how many other things differ between the two versions, and will need to apply the same level of review to the next version of this set.

This RTC library is add to D06 first and then we realize the global name is used by some common modules, so we add a patch to modify the name. Is the rename patch should add before this patch?

...

+EFI_STATUS +SwitchRtcI2cChannelAndLock (

• VOID
• )

+{

• UINT8 Temp;
• UINT8 Count;
• for (Count = 0; Count < 100; Count++) {
• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //To get the other side's state is idle first

Many very long lines in this function. Please move comments to the line preceding the statement to solve this. (Throughout.)

...

• if (0 != (Temp & BIT3)) {

No jeopardy-tests please. Please turn away the right way, throughout.

...

•  (VOID) MicroSecondDelay (30000);
  

Why 30000? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

...

•  if (99 == Count) {                        //Try 100 times, the other side has not released the bus, return preemption failed
  

•    if (!EfiAtRuntime ()) {
  

•      DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Clear cpu_i2c_rtc_state 100 times fail !!!\n", __FUNCTION__, __LINE__));
  

And please break this line after \n",

...

•    }
  

•    return EFI_DEVICE_ERROR;
  

•  }
  

•  continue;                                 //The other side occupies, continue polling is idle
  

• }
• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //Each other free, can be set 1 preemption
• Temp = Temp | CPU_GET_I2C_CONTROL; //bit2 = 1

Comments should describe what operation is being performed, not which numbers are changing and how. What is bit2?

...

• WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp); //Come up directly write CPU occupied RTC I2C State
• (VOID) MicroSecondDelay (2);

Why 2? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

...

• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG); //Whether or not to preempt success
• if(CPU_GET_I2C_CONTROL == (Temp & CPU_GET_I2C_CONTROL)) {

•  break;                                    //Preemption Successful exit loop continue
  

• }
• if (99 == Count) {//Try 100 times, the other side has not released the bus, return preemption failed

•  if (!EfiAtRuntime ()) {
  

•    DEBUG((DEBUG_ERROR, "[%a]:[%dL]  Clear cpu_i2c_rtc_state fail !!! \n", __FUNCTION__, __LINE__));
  

Again, please break line after format string.

...

•  }
  

•  return EFI_DEVICE_ERROR;
  

• }
• (VOID) MicroSecondDelay (30000); //Delay 30ms

The code already says we're delaying 30ms. The comment should say why. Also, why 30000? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

...

• }
• //Polling BMC RTC I2C status
• for (Count = 0; Count < 100; Count++) {
• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG);
• if (0 == (Temp & BIT3)) {

•  return EFI_SUCCESS;
  

• }
• (VOID) MicroSecondDelay (30000); //Delay 30ms

The code already says we're delaying 30ms. The comment should say why. Also, why 30000? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

...

• }
• //If the BMC occupies the RTC I2C Channel, write back the CPU side is idle or the subsequent BMC will not preempt
• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG);
• Temp = Temp & (~CPU_GET_I2C_CONTROL); //BIT2 = 0

What is bit2? Why are we setting it to 0?

...

• WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp);
• return EFI_NOT_READY;

+}

+/**

• Read RTC content through its registers.
• @param Address Address offset of RTC data.
• @param Size Size of RTC data to read.
• @param Data The data of UINT8 type read from RTC.
• @return EFI_STATUS

+**/ +EFI_STATUS +RtcRead (

• IN UINT8 Address,
• IN UINT8 Size,
• OUT UINT8 *Data
• )

+{

• EFI_STATUS Status;
• Status = I2CRead (&gDS3231RtcDevice, Address, Size, Data);
• MicroSecondDelay (1000);

Why 1000? Do we need a MemoryFence ()?

...

• return Status;

+}

+/**

• Write RTC through its registers.
• @param Address Address offset of RTC data.
• @param Size Size of RTC data to write.
• @param Data The data of UINT8 type write from RTC.
• @return EFI_STATUS

+**/ +EFI_STATUS +RtcWrite (

• IN UINT8 Address,
• IN UINT8 Size,
• UINT8 *Data
• )

+{

• EFI_STATUS Status;
• Status = I2CWrite(&gDS3231RtcDevice, Address, Size, Data);

Space before (.

...

• MicroSecondDelay (1000);

Why 1000? Do we need a MemoryFence ()?

...

• return Status;

+}

+VOID +ReleaseOwnershipOfRtc (

• VOID
• )

+{

• UINT8 Temp;
• Temp = ReadCpldReg (CPLD_I2C_SWITCH_FLAG);
• Temp = Temp & ~CPU_GET_I2C_CONTROL;
• WriteCpldReg (CPLD_I2C_SWITCH_FLAG, Temp);

+}

+EFI_STATUS +InitializeM41T83 (

• VOID
• )

+{

• EFI_STATUS Status;
• RTC_M41T83_ALARM1HOUR Alarm1Hour;
• RTC_M41T83_SECOND Second;
• // Acquire RTC Lock to make access to RTC atomic
• if (!EfiAtRuntime ()) {
• EfiAcquireLock (&mRtcLock);
• }
• Status = I2CInit (gDS3231RtcDevice.Socket, gDS3231RtcDevice.Port, Normal);
• MicroSecondDelay (1000);

Why 1000? Do we need a MemoryFence ()?

...

• if (EFI_ERROR (Status)) {
• if (!EfiAtRuntime ()) {

•  EfiReleaseLock (&mRtcLock);
  

• }
• return Status;
• }
• Status = SwitchRtcI2cChannelAndLock ();
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• if (!EfiAtRuntime ()) {

•  EfiReleaseLock (&mRtcLock);
  

• }
• return Status;
• }
• MicroSecondDelay(1000);

Why 1000? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

...

• // Set ST at Power up to clear Oscillator fail detection(OF)
• Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• }
• Second.bits.ST= 1;
• Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• goto Exit;
• }
• Status = RtcRead (M41T83_REGADDR_SECONDS, 1, &Second.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• }
• Second.bits.ST= 0;
• Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &Second.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• goto Exit;
• }
• // Clear HT bit to enanle write to the RTC registers (addresses 0-7)
• Status = RtcRead (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• }
• Alarm1Hour.bits.HT = 0;
• Status = RtcWrite (M41T83_REGADDR_ALARM1HOUR, 1, &Alarm1Hour.u8);
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
• goto Exit;
• }

+Exit:

• // Release RTC Lock.
• ReleaseOwnershipOfRtc ();
• if (!EfiAtRuntime ()) {
• EfiReleaseLock (&mRtcLock);
• }
• return Status;

+}

+BOOLEAN +IsLeapYear (

Use the one from EmbeddedPkg TimeBaseLib instead?

OK, good idea.

...

• IN EFI_TIME *Time
• )

+{

• if (Time->Year % 4 == 0) {
• if (Time->Year % 100 == 0) {

•  if (Time->Year % 400 == 0) {
  

•    return TRUE;
  

•  } else {
  

•    return FALSE;
  

•  }
  

• } else {

•  return TRUE;
  

• }
• } else {
• return FALSE;
• }

+}

+BOOLEAN +DayValid (

Use IsDayValid from EmbeddedPkg TimeBaseLib instead?

OK, good idea.

...

• IN EFI_TIME *Time
• )

+{

• INTN DayOfMonth[12] = { 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
• if (Time->Day < 1 ||

•  Time->Day > DayOfMonth[Time->Month - 1] ||
  

•  (Time->Month == 2 && (!IsLeapYear (Time) && Time->Day > 28))
  

• ) {
  

• return FALSE;
• }
• return TRUE;

+}

+BOOLEAN TimeValid(

Use IsTimeValid from EmbeddedPkg TimeBaseLib instead?

OK, good idea.

...

• IN EFI_TIME *Time
• )

+{

• // Check the input parameters are within the range specified by UEFI
• if ((Time->Year < 2000) ||

•  (Time->Year   > 2399) ||
  

•  (Time->Month  < 1   ) ||
  

•  (Time->Month  > 12  ) ||
  

•  (!DayValid (Time)   ) ||
  

•  (Time->Hour   > 23  ) ||
  

•  (Time->Minute > 59  ) ||
  

•  (Time->Second > 59  ) ||
  

•  (Time->Nanosecond > 999999999) ||
  

•  (!(Time->TimeZone == EFI_UNSPECIFIED_TIMEZONE || (Time->TimeZone >= -1440 && Time->TimeZone <= 1440))) ||
  

•  (Time->Daylight & (~(EFI_TIME_ADJUST_DAYLIGHT | EFI_TIME_IN_DAYLIGHT)))
  

• ) {
• return FALSE;
• }
• return TRUE;

+}

+/**

• Sets the current local time and date information.
• @param Time A pointer to the current time.
• @retval EFI_SUCCESS The operation completed successfully.
• @retval EFI_INVALID_PARAMETER A time field is out of range.
• @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.

+**/ +EFI_STATUS +EFIAPI +LibSetTime (

• IN EFI_TIME *Time
• )

+{

• EFI_STATUS Status = EFI_SUCCESS;
• RTC_M41T83_TIME BcdTime;
• UINT16 CenturyBase = 2000;
• UINTN LineNum = 0;
• if (NULL == Time) {
• return EFI_INVALID_PARAMETER;
• }
• if (!TimeValid (Time)) {
• if (!EfiAtRuntime ()) {

•  DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, __LINE__, Status));
  

•  DEBUG ((
  

•    DEBUG_ERROR, "Now RTC Time is : %04d-%02d-%02d %02d:%02d:%02d\n",
  

•    Time->Year, Time->Month, Time->Day, Time->Hour, Time->Minute, Time->Second
  

•  ));
  

• }
• return EFI_INVALID_PARAMETER;
• }
• Status = SwitchRtcI2cChannelAndLock ();
• if (EFI_ERROR (Status)) {
• return Status;
• }
• (VOID) MicroSecondDelay (1000);

Why 1000? Do we need a MemoryFence ()?

...

• SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0);
• // Acquire RTC Lock to make access to RTC atomic
• if (!EfiAtRuntime ()) {
• EfiAcquireLock (&mRtcLock);
• }
• BcdTime.Addr1.bits.Seconds = DecimalToBcd8 (Time->Second);
• BcdTime.Addr2.bits.Minutes = DecimalToBcd8 (Time->Minute);
• BcdTime.Addr3.bits.Hours = DecimalToBcd8 (Time->Hour);
• BcdTime.Addr5.bits.Days = DecimalToBcd8 (Time->Day);
• BcdTime.Addr6.bits.Months = DecimalToBcd8 (Time->Month);
• BcdTime.Addr7.bits.Years = DecimalToBcd8 (Time->Year % 100);
• BcdTime.Addr3.bits.CB = (Time->Year - CenturyBase) / 100 % 10;
• Status = RtcWrite (M41T83_REGADDR_DOTSECONDS, 1, &BcdTime.Addr0.u8);

Just keep the the one space before 1 (throughout).

...

• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_SECONDS, 1, &BcdTime.Addr1.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_MINUTES, 1, &BcdTime.Addr2.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_HOURS, 1, &BcdTime.Addr3.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_DAY, 1, &BcdTime.Addr5.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_MONTH, 1, &BcdTime.Addr6.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• Status = RtcWrite (M41T83_REGADDR_YEAR, 1, &BcdTime.Addr7.u8);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }

+Exit:

• ReleaseOwnershipOfRtc ();
• // Release RTC Lock.
• if (!EfiAtRuntime ()) {
• if (EFI_ERROR (Status)) {

•  DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, LineNum, Status));
  

• }
• EfiReleaseLock (&mRtcLock);
• }
• return Status;

+}

+/**

• Returns the current time and date information, and the time-keeping capabilities
• of the hardware platform.
• @param Time A pointer to storage to receive a snapshot of the current time.
• @param Capabilities An optional pointer to a buffer to receive the real time clock

•                             device's capabilities.
  

• @retval EFI_SUCCESS The operation completed successfully.
• @retval EFI_INVALID_PARAMETER Time is NULL.
• @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.
• @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an authentication failure.

+**/ +EFI_STATUS +EFIAPI +LibGetTime (

• OUT EFI_TIME *Time,
• OUT EFI_TIME_CAPABILITIES *Capabilities
• )

+{

• EFI_STATUS Status = EFI_SUCCESS;
• RTC_M41T83_TIME BcdTime;
• UINT16 CenturyBase = 2000;
• UINTN LineNum = 0;
• BOOLEAN IsTimeInvalid = FALSE;
• UINT8 TimeTemp[7] = {0};
• // Ensure Time is a valid pointer
• if (NULL == Time) {
• return EFI_INVALID_PARAMETER;
• }
• Status = SwitchRtcI2cChannelAndLock ();
• if (EFI_ERROR (Status)) {
• return Status;
• }
• MicroSecondDelay(1000);

Why 1000? Do we need a MemoryFence ()?

The delay is need for cpld and I2C.This is a empirical value. MemoryFance is no need.

Ming

/ Leif

...

• SetMem (&BcdTime, sizeof (RTC_M41T83_TIME), 0);
• SetMem (Time , sizeof (EFI_TIME) , 0);
• // Acquire RTC Lock to make access to RTC atomic
• if (!EfiAtRuntime ()) {
• EfiAcquireLock (&mRtcLock);
• }
• Status = RtcRead (M41T83_REGADDR_SECONDS, 7, TimeTemp);
• if (EFI_ERROR (Status)) {
• LineNum = __LINE__;
• goto Exit;
• }
• BcdTime.Addr1.u8 = TimeTemp[0]; //SECONDS
• BcdTime.Addr2.u8 = TimeTemp[1]; //MINUTES
• BcdTime.Addr3.u8 = TimeTemp[2]; //HOURS
• BcdTime.Addr5.u8 = TimeTemp[4]; //DAY
• BcdTime.Addr6.u8 = TimeTemp[5]; //MONTH
• BcdTime.Addr7.u8 = TimeTemp[6]; //Year
• Time->Year = BcdToDecimal8 (BcdTime.Addr7.bits.Years);
• Time->Year += CenturyBase + BcdTime.Addr3.bits.CB * 100;
• Time->Month = BcdToDecimal8 (BcdTime.Addr6.bits.Months);
• Time->Day = BcdToDecimal8 (BcdTime.Addr5.bits.Days);
• Time->Hour = BcdToDecimal8 (BcdTime.Addr3.bits.Hours);
• Time->Minute = BcdToDecimal8 (BcdTime.Addr2.bits.Minutes);
• Time->Second = BcdToDecimal8 (BcdTime.Addr1.bits.Seconds);
• Time->TimeZone = EFI_UNSPECIFIED_TIMEZONE;
• if (!TimeValid (Time)) {

•  Status = EFI_DEVICE_ERROR;
  

•  LineNum = __LINE__;
  

•  IsTimeInvalid = TRUE;
  

•  goto Exit;
  

• }

+Exit:

• ReleaseOwnershipOfRtc ();
• // Release RTC Lock.
• if (!EfiAtRuntime ()) {
• if (EFI_ERROR (Status)) {

•  if (IsTimeInvalid == TRUE) {
  

•    DEBUG((DEBUG_ERROR, "%a(%d) Time invalid.\r\n",__FUNCTION__, LineNum));
  

•  } else {
  

•    DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\n", __FUNCTION__, LineNum, Status));
  

•  }
  

• }
• EfiReleaseLock (&mRtcLock);
• }
• return Status;

+}

+/**

• Returns the current wakeup alarm clock setting.
• @param Enabled Indicates if the alarm is currently enabled or disabled.
• @param Pending Indicates if the alarm signal is pending and requires acknowledgement.
• @param Time The current alarm setting.
• @retval EFI_SUCCESS The alarm settings were returned.
• @retval EFI_INVALID_PARAMETER Any parameter is NULL.
• @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.

+**/ +EFI_STATUS +EFIAPI +LibGetWakeupTime (

• OUT BOOLEAN *Enabled,
• OUT BOOLEAN *Pending,
• OUT EFI_TIME *Time
• )

+{

• // Not a required feature
• return EFI_UNSUPPORTED;

+}

+/**

• Sets the system wakeup alarm clock time.
• @param Enabled Enable or disable the wakeup alarm.
• @param Time If Enable is TRUE, the time to set the wakeup alarm for.
• @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If

•                            Enable is FALSE, then the wakeup alarm was disabled.
  

• @retval EFI_INVALID_PARAMETER A time field is out of range.
• @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.
• @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.

+**/ +EFI_STATUS +EFIAPI +LibSetWakeupTime (

• IN BOOLEAN Enabled,
• OUT EFI_TIME *Time
• )

+{

• // Not a required feature
• return EFI_UNSUPPORTED;

+}

+/**

• This is the declaration of an EFI image entry point. This can be the entry point to an application
• written to this specification, an EFI boot service driver, or an EFI runtime driver.
• @param ImageHandle Handle that identifies the loaded image.
• @param SystemTable System Table for this image.
• @retval EFI_SUCCESS The operation completed successfully.

+**/ +EFI_STATUS +EFIAPI +LibRtcInitialize (

• IN EFI_HANDLE ImageHandle,
• IN EFI_SYSTEM_TABLE *SystemTable
• )

+{

• EFI_STATUS Status = EFI_SUCCESS;
• EFI_TIME EfiTime;
• EfiInitializeLock (&mRtcLock, TPL_CALLBACK);
• // Setup the setters and getters
• gRT->GetTime = LibGetTime;
• gRT->SetTime = LibSetTime;
• gRT->GetWakeupTime = LibGetWakeupTime;
• gRT->SetWakeupTime = LibSetWakeupTime;
• Status = InitializeM41T83 ();
• if (EFI_ERROR (Status)) {
• DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Status : %r\nRTC M41T83 Init Failed !!!\n",

•        __FUNCTION__, __LINE__, Status));
  

• /*

• * Returning ERROR on failure of RTC initilization will cause the system to hang up.
  

• * So we add some debug message to indecate the RTC initilization failed,
  

• * and continue without returning with error to avoid system hanging up.
  

• *
  

• *return Status;
  

• */
  

• }
• LibGetTime (&EfiTime, NULL);
• if (!TimeValid (&EfiTime)) {
• EfiTime.Year = 2015;
• EfiTime.Month = 1;
• EfiTime.Day = 1;
• EfiTime.Hour = 0;
• EfiTime.Minute = 0;
• EfiTime.Second = 0;
• Status = LibSetTime (&EfiTime);
• if (EFI_ERROR (Status)) {

•  DEBUG ((DEBUG_ERROR, "[%a]:[%dL] RTC settime Status : %r\n", __FUNCTION__, __LINE__, Status));
  

• }
• }
• DEBUG ((
• DEBUG_ERROR, "Now RTC Time is : %04d-%02d-%02d %02d:%02d:%02d\n",
• EfiTime.Year, EfiTime.Month, EfiTime.Day, EfiTime.Hour, EfiTime.Minute, EfiTime.Second
• ));
• /*

• * Returning ERROR on failure of RTC initilization will cause the system to hang up.
  

• * So we add some debug message to indecate the RTC initilization failed,
  

• * and return success to avoid system hanging up.
  

• */
  

• return EFI_SUCCESS;

+} diff --git a/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf new file mode 100644 index 0000000000..0d0bb37557 --- /dev/null +++ b/Platform/Hisilicon/D06/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf @@ -0,0 +1,45 @@ +#/** @file +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.<BR> +# Copyright (c) 2018, Linaro Limited. All rights reserved.<BR> +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/

+[Defines]

• INF_VERSION = 0x0001001A
• BASE_NAME = M41T83RealTimeClockLib
• FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D
• MODULE_TYPE = BASE
• VERSION_STRING = 1.0
• LIBRARY_CLASS = RealTimeClockLib

+[Sources.common]

• M41T83RealTimeClockLib.c

+[Packages]

• EmbeddedPkg/EmbeddedPkg.dec
• MdePkg/MdePkg.dec
• Platform/Hisilicon/D06/D06.dec
• Silicon/Hisilicon/HisiPkg.dec

+[LibraryClasses]

• BaseMemoryLib
• CpldIoLib
• DebugLib
• I2CLib
• IoLib
• PcdLib
• TimerLib
• UefiLib
• UefiRuntimeLib # Use EFiAtRuntime to check stage

+[Depex]

• gEfiCpuArchProtocolGuid

-- 2.17.0