The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
Clément Léger (5): dt-bindings: riscv: add Zimop ISA extension description riscv: add ISA extension parsing for Zimop riscv: hwprobe: export Zimop ISA extension RISC-V: KVM: Allow Zimop extension for Guest/VM KVM: riscv: selftests: Add Zimop extension to get-reg-list test
Documentation/arch/riscv/hwprobe.rst | 4 ++++ Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + arch/riscv/kernel/sys_hwprobe.c | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 9 files changed, 20 insertions(+)
Add description for the Zimop (May-Be-Operations) ISA extension which was ratified in commit 58220614a5f of the riscv-isa-manual.
Signed-off-by: Clément Léger cleger@rivosinc.com --- Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 468c646247aa..616370318a66 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -363,6 +363,11 @@ properties: ratified in the 20191213 version of the unprivileged ISA specification.
+ - const: zimop + description: + The standard Zimop extension version 1.0, as ratified in commit + 58220614a5f ("Zimop is ratified/1.0") of the riscv-isa-manual. + - const: ztso description: The standard Ztso extension for total store ordering, as ratified
Add parsing for Zimop ISA extension which was ratified in commit 58220614a5f of the riscv-isa-manual.
Signed-off-by: Clément Léger cleger@rivosinc.com --- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + 2 files changed, 2 insertions(+)
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index e17d0078a651..543e3ea2da0e 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -81,6 +81,7 @@ #define RISCV_ISA_EXT_ZTSO 72 #define RISCV_ISA_EXT_ZACAS 73 #define RISCV_ISA_EXT_XANDESPMU 74 +#define RISCV_ISA_EXT_ZIMOP 75
#define RISCV_ISA_EXT_XLINUXENVCFG 127
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 3ed2359eae35..115ba001f1bc 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -256,6 +256,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(zihintntl, RISCV_ISA_EXT_ZIHINTNTL), __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE), __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM), + __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP), __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS), __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH),
Export Zimop ISA extension through hwprobe.
Signed-off-by: Clément Léger cleger@rivosinc.com --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/sys_hwprobe.c | 1 + 3 files changed, 6 insertions(+)
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index b2bcc9eed9aa..9ca5b093b6d5 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -188,6 +188,10 @@ The following keys are defined: manual starting from commit 95cf1f9 ("Add changes requested by Ved during signoff")
+ * :c:macro:`RISCV_HWPROBE_EXT_ZIMOP`: The Zimop May-Be-Operations extension is + supported as defined in the RISC-V ISA manual starting from commit + 58220614a5f ("Zimop is ratified/1.0"). + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors.
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index 9f2a8e3ff204..ac6874ab743a 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -59,6 +59,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33) #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) +#define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 36) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index 8cae41a502dd..c99a4cf231c5 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -111,6 +111,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZTSO); EXT_KEY(ZACAS); EXT_KEY(ZICOND); + EXT_KEY(ZIMOP);
if (has_vector()) { EXT_KEY(ZVBB);
Extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zimop extension for Guest/VM.
Signed-off-by: Clément Léger cleger@rivosinc.com --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ 2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index b1c503c2959c..35a12aa1953e 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZFA, KVM_RISCV_ISA_EXT_ZTSO, KVM_RISCV_ISA_EXT_ZACAS, + KVM_RISCV_ISA_EXT_ZIMOP, KVM_RISCV_ISA_EXT_MAX, };
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index f4a6124d25c9..c6ee763422f2 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -60,6 +60,7 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(ZIHINTNTL), KVM_ISA_EXT_ARR(ZIHINTPAUSE), KVM_ISA_EXT_ARR(ZIHPM), + KVM_ISA_EXT_ARR(ZIMOP), KVM_ISA_EXT_ARR(ZKND), KVM_ISA_EXT_ARR(ZKNE), KVM_ISA_EXT_ARR(ZKNH), @@ -137,6 +138,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_ZIHINTNTL: case KVM_RISCV_ISA_EXT_ZIHINTPAUSE: case KVM_RISCV_ISA_EXT_ZIHPM: + case KVM_RISCV_ISA_EXT_ZIMOP: case KVM_RISCV_ISA_EXT_ZKND: case KVM_RISCV_ISA_EXT_ZKNE: case KVM_RISCV_ISA_EXT_ZKNH:
The KVM RISC-V allows Zimop extension for Guest/VM so add this extension to get-reg-list test.
Signed-off-by: Clément Léger cleger@rivosinc.com --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index b882b7b9b785..40107bb61975 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -67,6 +67,7 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHINTNTL: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHINTPAUSE: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIHPM: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZIMOP: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKND: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKNE: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKNH: @@ -432,6 +433,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) KVM_ISA_EXT_ARR(ZIHINTNTL), KVM_ISA_EXT_ARR(ZIHINTPAUSE), KVM_ISA_EXT_ARR(ZIHPM), + KVM_ISA_EXT_ARR(ZIMOP), KVM_ISA_EXT_ARR(ZKND), KVM_ISA_EXT_ARR(ZKNE), KVM_ISA_EXT_ARR(ZKNH), @@ -955,6 +957,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zifencei, ZIFENCEI); KVM_ISA_EXT_SIMPLE_CONFIG(zihintntl, ZIHINTNTL); KVM_ISA_EXT_SIMPLE_CONFIG(zihintpause, ZIHINTPAUSE); KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM); +KVM_ISA_EXT_SIMPLE_CONFIG(zimop, ZIMOP); KVM_ISA_EXT_SIMPLE_CONFIG(zknd, ZKND); KVM_ISA_EXT_SIMPLE_CONFIG(zkne, ZKNE); KVM_ISA_EXT_SIMPLE_CONFIG(zknh, ZKNH); @@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = { &config_zihintntl, &config_zihintpause, &config_zihpm, + &config_zimop, &config_zknd, &config_zkne, &config_zknh,
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Thanks, drew
Clément Léger (5): dt-bindings: riscv: add Zimop ISA extension description riscv: add ISA extension parsing for Zimop riscv: hwprobe: export Zimop ISA extension RISC-V: KVM: Allow Zimop extension for Guest/VM KVM: riscv: selftests: Add Zimop extension to get-reg-list test
Documentation/arch/riscv/hwprobe.rst | 4 ++++ Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + arch/riscv/kernel/sys_hwprobe.c | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 9 files changed, 20 insertions(+)
-- 2.43.0
-- kvm-riscv mailing list kvm-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kvm-riscv
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
1) check elf header if binary was compiled with zicfiss and zicfilp, if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4 4) This binary won't be able to run successfully on this platform, issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On 05/04/2024 19:33, Deepak Gupta wrote:
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
Yes, the rationale was that some binaries using extensions that overload MOPs could still be run. With Zimop exposed, the loader could determine if the binary can be executed without potentially crashing. We could also let the program run anyway but the execution could potentially crash unexpectedly, which IMHO is not really good for the user experience nor for debugging. I already think that the segfaults which happens when executing binaries that need some missing extension are not so easy to debug, so better add more guards.
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
- check elf header if binary was compiled with zicfiss and zicfilp,
if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4
I think you meant step 5 rather than step 6.
Clément
- This binary won't be able to run successfully on this platform,
issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote:
On 05/04/2024 19:33, Deepak Gupta wrote:
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
Yes, the rationale was that some binaries using extensions that overload MOPs could still be run. With Zimop exposed, the loader could determine if the binary can be executed without potentially crashing. We could also let the program run anyway but the execution could potentially crash unexpectedly, which IMHO is not really good for the user experience nor for debugging. I already think that the segfaults which happens when executing binaries that need some missing extension are not so easy to debug, so better add more guards.
OK. It's only one more extension out of dozens, so I won't complain more, but I was thinking that binaries that use particular extensions would check for those particular extensions (step 2), rather than Zimop.
Thanks, drew
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
- check elf header if binary was compiled with zicfiss and zicfilp,
if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4
I think you meant step 5 rather than step 6.
Clément
- This binary won't be able to run successfully on this platform,
issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
Clément Léger (5): dt-bindings: riscv: add Zimop ISA extension description riscv: add ISA extension parsing for Zimop riscv: hwprobe: export Zimop ISA extension RISC-V: KVM: Allow Zimop extension for Guest/VM KVM: riscv: selftests: Add Zimop extension to get-reg-list test
Documentation/arch/riscv/hwprobe.rst | 4 ++++ Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + arch/riscv/kernel/sys_hwprobe.c | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 9 files changed, 20 insertions(+)
-- 2.43.0
For the series,
Reviewed-by: Andrew Jones ajones@ventanamicro.com
On 08/04/2024 13:03, Andrew Jones wrote:
On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote:
On 05/04/2024 19:33, Deepak Gupta wrote:
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
Yes, the rationale was that some binaries using extensions that overload MOPs could still be run. With Zimop exposed, the loader could determine if the binary can be executed without potentially crashing. We could also let the program run anyway but the execution could potentially crash unexpectedly, which IMHO is not really good for the user experience nor for debugging. I already think that the segfaults which happens when executing binaries that need some missing extension are not so easy to debug, so better add more guards.
OK. It's only one more extension out of dozens, so I won't complain more,
No worries, your point *is* valid since I'm not sure yet that the loader will actually do that one day.
BTW, are you aware of any effort to make the elf dynamic loader "smarter" and actually check for needed extensions to be present rather than blindly running the elf and potentially catching SIGILL ?
Thanks,
Clément
but I was thinking that binaries that use particular extensions would check for those particular extensions (step 2), rather than Zimop.
Thanks, drew
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
- check elf header if binary was compiled with zicfiss and zicfilp,
if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4
I think you meant step 5 rather than step 6.
Clément
- This binary won't be able to run successfully on this platform,
issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On Mon, Apr 08, 2024 at 01:19:39PM +0200, Clément Léger wrote:
On 08/04/2024 13:03, Andrew Jones wrote:
On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote:
On 05/04/2024 19:33, Deepak Gupta wrote:
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
Yes, the rationale was that some binaries using extensions that overload MOPs could still be run. With Zimop exposed, the loader could determine if the binary can be executed without potentially crashing. We could also let the program run anyway but the execution could potentially crash unexpectedly, which IMHO is not really good for the user experience nor for debugging. I already think that the segfaults which happens when executing binaries that need some missing extension are not so easy to debug, so better add more guards.
OK. It's only one more extension out of dozens, so I won't complain more,
No worries, your point *is* valid since I'm not sure yet that the loader will actually do that one day.
BTW, are you aware of any effort to make the elf dynamic loader "smarter" and actually check for needed extensions to be present rather than blindly running the elf and potentially catching SIGILL ?
Jeff Law told me a bit about FMV (function multiversioning). I don't know much about this, but, from what he's told me, it sounds like there will be an ifunc resolver which invokes hwprobe to determine which variants are possible/best to use, so it should be possible to avoid SIGILL by always having a basic variant.
Thanks, drew
Thanks,
Clément
but I was thinking that binaries that use particular extensions would check for those particular extensions (step 2), rather than Zimop.
Thanks, drew
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
- check elf header if binary was compiled with zicfiss and zicfilp,
if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4
I think you meant step 5 rather than step 6.
Clément
- This binary won't be able to run successfully on this platform,
issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On Thu, Apr 04, 2024 at 12:32:47PM +0200, Clément Léger wrote:
Add description for the Zimop (May-Be-Operations) ISA extension which was ratified in commit 58220614a5f of the riscv-isa-manual.
Signed-off-by: Clément Léger cleger@rivosinc.com
Acked-by: Conor Dooley conor.dooley@microchip.com
On Mon, Apr 08, 2024 at 10:01:12AM +0200, Clément Léger wrote:
On 05/04/2024 19:33, Deepak Gupta wrote:
On Fri, Apr 5, 2024 at 8:26 AM Andrew Jones ajones@ventanamicro.com wrote:
On Thu, Apr 04, 2024 at 12:32:46PM +0200, Clément Léger wrote:
The Zimop ISA extension was ratified recently. This series adds support for parsing it from riscv,isa, hwprobe export and kvm support for Guest/VM.
I'm not sure we need this. Zimop by itself isn't useful, so I don't know if we need to advertise it at all. When an extension comes along that redefines some MOPs, then we'll advertise that extension, but the fact Zimop is used for that extension is really just an implementation detail.
Only situation I see this can be useful is this:--
An implementer, implemented Zimops in CPU solely for the purpose that they can run mainline distro & packages on their hardware and don't want to leverage any feature which are built on top of Zimop.
Yes, the rationale was that some binaries using extensions that overload MOPs could still be run. With Zimop exposed, the loader could determine if the binary can be executed without potentially crashing. We could also let the program run anyway but the execution could potentially crash unexpectedly, which IMHO is not really good for the user experience nor for debugging. I already think that the segfaults which happens when executing binaries that need some missing extension are not so easy to debug, so better add more guards.
As an example zicfilp and zicfiss are dependent on zimops. glibc can do following
- check elf header if binary was compiled with zicfiss and zicfilp,
if yes goto step 2, else goto step 6. 2) check if zicfiss/zicfilp is available in hw via hwprobe, if yes goto step 5. else goto step 3 3) check if zimop is available via hwprobe, if yes goto step 6, else goto step 4
I think you meant step 5 rather than step 6.
No I did mean step 6 which is let the binary run. Step 5 is "issue the prctl" to light up the feature, this should have been reached via step 2 if feature was available.
Going to step 6 from step 3 basically means that underlying hardware only supports zimops and thus this binary is safe to run on this hardware. But no need to issue any prctl to kernel to enable this feature.
Clément
- This binary won't be able to run successfully on this platform,
issue exit syscall. <-- termination 5) issue prctl to enable shadow stack and landing pad for current task <-- enable feature 6) let the binary run <-- let the binary run because no harm can be done
On Thu, Apr 04, 2024 at 12:32:48PM +0200, Clément Léger wrote:
Add parsing for Zimop ISA extension which was ratified in commit 58220614a5f of the riscv-isa-manual.
Signed-off-by: Clément Léger cleger@rivosinc.com
Reviewed-by: Conor Dooley conor.dooley@microchip.com
arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + 2 files changed, 2 insertions(+)
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index e17d0078a651..543e3ea2da0e 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -81,6 +81,7 @@ #define RISCV_ISA_EXT_ZTSO 72 #define RISCV_ISA_EXT_ZACAS 73 #define RISCV_ISA_EXT_XANDESPMU 74 +#define RISCV_ISA_EXT_ZIMOP 75 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 3ed2359eae35..115ba001f1bc 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -256,6 +256,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(zihintntl, RISCV_ISA_EXT_ZIHINTNTL), __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE), __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),
- __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP), __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS), __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH),
-- 2.43.0
linux-kselftest-mirror@lists.linaro.org
-
Andrew Jones -
Clément Léger -
Conor Dooley -
Deepak Gupta