Tcwg-commits January 2020

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (5cee34013cf -> cb297050bb0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 5cee34013cf [PowerPC][Future] Add prefixed instruction paddi to future CPU adds 0a002f679be [Sema] Try 2: Sanity-check alignment requested via `__attri [...] adds 8e96697c7df FileCheck [9/12]: Add support for matching formats adds 08ebd8c79e4 [VE] aligned load/store isel patterns adds 1d0972ff5ea [Sema] Introduce MaximumAlignment value, to be used instead [...] adds 6ef1ccecf7a [clangd] Rename DiagnosticsConsumer -> ClangdServer::Callba [...] adds 76fa5d50f3d [clangd] Remove pesky ;. NFC adds f69eba07726 [llvm-objcopy][COFF] Add support for --set-section-flags adds a8c3608a27a [Sema] Provide declarations for MaximumAlignment, MaxAlignm [...] adds 3fd5d1c6e7d [X86][SSE] combineTargetShuffle - permilps(shufps(load(),x) [...] adds 80fd37f9d66 [analyzer] PthreadLock: Fix return value modeling for XNU l [...] adds 15624a7bda9 [analyzer] PthreadLock: Add more XNU rwlock unlock functions. adds 152bc7ffdcd [analyzer] NFC: PthreadLock: Use CallDescriptionMap, modernize. adds dd22be1e3d9 [analyzer] PthreadLock: Implement mutex escaping. adds 1484d0f12ad [analyzer] PthreadLock: Implement dead region cleanup. adds f5147765ba1 [DebugInfo][LiveDebugValues] Teach Live Debug Values About [...] adds 0fca35c652f [VE] global variable isel patterns adds f1dab29908d [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY adds b535aa405a0 [ARM] Use reduction intrinsics for larger than legal reductions adds 0d61cd25a69 Verify that clang's max alignment is <= LLVM's max alignment adds 50a3ff30e15 [PatchableFunction] Allow empty entry MachineBasicBlock adds a33accde954 [PGO] Early detection regarding whether pgo counter promoti [...] adds 0d90d2457c3 [LoopStrengthReduce] Teach LoopStrengthReduce to preserve M [...] adds abd1927d446 Fix some comment typos. NFC. adds 5dda92fcb0c Add test for spaceship operator to __config adds 37aa16ebb71 [DA] Don't propagate from unreachable blocks adds c5bd3d07262 Support Swift calling convention for WebAssembly targets adds c2266463377 Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI adds 7a94d4f4ee4 Allow combining of extract_subvector to extract element adds 44b865fa7fe [AMDGPU] Allow narrowing muti-dword loads adds b35b7da4608 [PGO] Attach appropriate funclet operand bundles to value p [...] adds 555d8f4ef5e [AMDGPU] Bundle loads before post-RA scheduler adds 698d1cd3b81 Make address-space-lambda.cl pass on 32-bit Windows adds 6530136fe3f [gn build] Port 555d8f4ef5e adds 58592f6c492 Include <cstdlib> for std::abort() in clangd adds a107f864176 [GlobalsAA] Add back a check to intrinsic_addresstaken.ll t [...] adds 4fdae24733d AMDGPU/GlobalISel: Add selection tests for G_ATOMICRMW_ADD adds 84e035d8f1d AMDGPU: Don't check constant address space for atomic stores adds d8328c0b624 TableGen: Work around assert on Mips register definitions adds 9c346464c15 TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG adds be8e38cbd97 Correct NumLoads in clustering adds 3f8b100e94b [clang-tidy] Add library for clang-tidy main function adds 36b887ed15a [gn build] Port 3f8b100e94b adds 87c46a31297 AMDGPU: Don't error on ds.ordered intrinsic in function adds 3b93945587a AMDGPU/GlobalISel: Select wqm, softwqm and wwm intrinsics adds b1f3a0f972f Revert a107f86 "[GlobalsAA] Add back a check to intrinsic_a [...] adds 8a81daaa8b5 [AST] Split parent map traversal logic into ParentMapContext.h adds da8bada9383 [gn build] Port 8a81daaa8b5 adds 596d06145a2 [GWP-ASan] enable/disable and fork support. adds 9fa0f236d50 [PATCH] [Target] Test commit adds 118efa5cda8 [LLDB][NFC] Adding clarifying comment in SymbolFileDWARFDeb [...] adds d3bf06bc81e [DAGCombiner] Add combine for (not (strict_fsetcc)) to crea [...] adds 764f4089e89 [WebAssembly] Add reference types target feature adds 65eb11306e9 [WebAssembly] Update bleeding-edge CPU features adds 1df8549b268 [msan] Instrument x86.pclmulqdq* intrinsics. adds 70cbf8c71c5 [X86] Make `llc --help` output readable again adds 2c1decc040d [X86] Break the loop in LowerReturn into 2 loops. NFCI adds 1e487e4c168 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c adds daee63f9741 [SelectionDag] Updated FoldConstantArithmetic method signat [...] adds e1440f594c1 [GWP-ASan] Add names to anonymous mappings. adds 9902c8e3c66 [lldb/debugserver] Unify the breakpoint/watchpoint interfac [...] adds 96f3ea0d21b [lldb/debugserver] Implement hardware breakpoints for x86_6 [...] adds ec62bf2fd32 [libc] Move the implementation of mmap and munmap into a li [...] adds bce360b7048 Detect source location overflow due includes adds 632ba9fcb52 [codeview] Prune SimpleTypeSerializer.h headers, NFC adds e3a7c7713cd [lldb/Lit] Change the lldbtest format to behave more like s [...] adds 303fddeeab1 [mlir] [VectorOps] Rewriting of vector.extract/insert_slice [...] adds 81b700e302b [sanitizer_common] Implement MemoryMappingLayout for Fuchsia adds 5d87b5d2029 [GISelKnownBits] Add support for PHIs adds aae707cd881 [lsan] Expose Frontier object to OS-specific LockStuffAndSt [...] adds 38fd1806a16 [lsan] Factor pthread-specific assumptions out of thread tr [...] adds 3da47749ddd [IR] Move CallBase::getOperandBundlesAsDefs out of line, NFC adds 0697bcb66f1 [Support] Split MallocAllocator out of Allocator.h adds dd8e0a0a23b [Sema] Split availability processing into SemaAvailability.cpp adds de863bcc6c8 [Support] Fix up header comments after splitting Allocator.h, NFC adds 0ebc8e6c421 [Sema] Remove unneeded TreeTransform.h includes, NFC adds 802bec89617 Revert "Reland: [DWARF] Allow cross-CU references of subpro [...] adds 9f69157bf4a Fix header includes after 0697bcb66f1d82f2fd447e9d13b74d141c3ce085 adds 8d35c798f19 [gn build] (manually) merge 81b700e302b1 adds ef7f3af760e [gn build] Port dd8e0a0a23b adds 04f131da0b1 DR1753: Don't permit x.NS::~T() as a pseudo-destructor name. adds c48974ffd7d [libunwind] Set LIBUNWIND_ASM_SOURCES to the ASM source lan [...] adds 2bc38ab3d03 [lldb/Breakpoint] Recogize hardware breakpoints as such adds d8e0f4fae7a [lldb/Breakpoint] Include whether or not a breakpoint is a HW BP adds 86c944d7907 AMDGPU/SILoadStoreOptimizer: Improve merging of out of orde [...] adds fe9765762ce AMDGPU: Generate test checks adds 1ed561aa4bd [lldb/Test] Update minidebuginfo-set-and-hit-breakpoint.test adds 1c90ce0c761 [lldb/Test] Disable hardware check on arm/aarch64 adds cb297050bb0 AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 4 +- .../readability/MakeMemberFunctionConstCheck.cpp | 3 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 19 +- .../clang-tidy/tool/ClangTidyMain.cpp | 7 +- clang-tools-extra/clang-tidy/tool/ClangTidyMain.h | 23 + .../clang-tidy/tool/ClangTidyToolMain.cpp | 21 + .../clang-tidy/utils/ExprSequence.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdLSPServer.h | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 41 +- clang-tools-extra/clangd/ClangdServer.h | 63 +- clang-tools-extra/clangd/Shutdown.cpp | 1 + clang-tools-extra/clangd/unittests/ClangdTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 62 +- .../clangd/unittests/FindSymbolsTests.cpp | 13 +- .../clangd/unittests/HeaderSourceSwitchTests.cpp | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 6 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 9 +- .../clangd/unittests/SemanticSelectionTests.cpp | 8 +- .../clangd/unittests/TUSchedulerTests.cpp | 4 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 14 +- clang/include/clang/AST/ASTContext.h | 112 +- clang/include/clang/AST/ASTNodeTraverser.h | 1 + clang/include/clang/AST/ParentMapContext.h | 150 ++ clang/include/clang/ASTMatchers/ASTMatchers.h | 1 + clang/include/clang/Basic/DiagnosticCommonKinds.td | 3 + clang/include/clang/Lex/Preprocessor.h | 4 +- clang/include/clang/Sema/Sema.h | 13 + clang/lib/AST/ASTContext.cpp | 248 +--- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Linkage.h | 1 + clang/lib/AST/ParentMapContext.cpp | 265 ++++ clang/lib/ASTMatchers/ASTMatchFinder.cpp | 15 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 7 +- clang/lib/Basic/SourceManager.cpp | 10 +- clang/lib/Basic/Targets/OSTargets.cpp | 2 +- clang/lib/Basic/Targets/WebAssembly.cpp | 15 + clang/lib/Basic/Targets/WebAssembly.h | 11 + clang/lib/CodeGen/CGCall.h | 1 + clang/lib/CodeGen/CGValue.h | 4 + clang/lib/Lex/PPDirectives.cpp | 12 +- clang/lib/Lex/Preprocessor.cpp | 10 + clang/lib/Parse/ParseExprCXX.cpp | 55 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/Sema.cpp | 3 + clang/lib/Sema/SemaAvailability.cpp | 963 +++++++++++++ clang/lib/Sema/SemaChecking.cpp | 12 +- clang/lib/Sema/SemaDecl.cpp | 1 - clang/lib/Sema/SemaDeclAttr.cpp | 957 +------------ clang/lib/Sema/SemaType.cpp | 1 - .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 382 +++-- clang/lib/Tooling/ASTDiff/ASTDiff.cpp | 1 + .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 1 + .../system-header-simulator-for-pthread-lock.h | 20 +- clang/test/Analysis/pthreadlock.c | 42 + clang/test/CXX/drs/dr17xx.cpp | 30 +- clang/test/CXX/drs/dr6xx.cpp | 6 +- clang/test/Lexer/Inputs/inc1.h | 1470 ++++++++++++++++++++ clang/test/Lexer/Inputs/inc2.h | 1000 +++++++++++++ clang/test/Lexer/SourceLocationsOverflow.c | 25 + clang/test/Preprocessor/init.c | 2 + clang/test/Preprocessor/wasm-target-features.c | 15 +- clang/test/Sema/attr-aligned.c | 5 +- clang/test/Sema/builtin-assume-aligned.c | 1 + clang/test/SemaCXX/pseudo-destructors.cpp | 12 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 12 +- clang/www/cxx_dr_status.html | 2 +- .../lib/gwp_asan/guarded_pool_allocator.cpp | 54 +- compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 44 +- compiler-rt/lib/gwp_asan/options.inc | 4 + .../guarded_pool_allocator_posix.cpp | 62 +- compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 4 +- compiler-rt/lib/gwp_asan/tests/enable_disable.cpp | 86 ++ compiler-rt/lib/gwp_asan/tests/harness.cpp | 10 + compiler-rt/lib/gwp_asan/tests/harness.h | 17 +- compiler-rt/lib/lsan/CMakeLists.txt | 3 +- compiler-rt/lib/lsan/lsan.cpp | 5 +- compiler-rt/lib/lsan/lsan.h | 3 + compiler-rt/lib/lsan/lsan_common.cpp | 32 +- compiler-rt/lib/lsan/lsan_common.h | 14 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 3 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 3 +- compiler-rt/lib/lsan/lsan_interceptors.cpp | 3 +- compiler-rt/lib/lsan/lsan_posix.cpp | 85 ++ compiler-rt/lib/lsan/lsan_posix.h | 49 + compiler-rt/lib/lsan/lsan_thread.cpp | 98 +- compiler-rt/lib/lsan/lsan_thread.h | 35 +- compiler-rt/lib/sanitizer_common/CMakeLists.txt | 1 + .../lib/sanitizer_common/sanitizer_fuchsia.h | 6 + .../lib/sanitizer_common/sanitizer_procmaps.h | 7 +- .../sanitizer_procmaps_fuchsia.cpp | 80 ++ compiler-rt/lib/scudo/standalone/CMakeLists.txt | 5 +- compiler-rt/lib/scudo/standalone/combined.h | 27 +- .../lib/scudo/standalone/tests/CMakeLists.txt | 5 +- .../lib/scudo/standalone/tests/combined_test.cpp | 12 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 1 + libc/config/linux/CMakeLists.txt | 10 + libc/config/linux/platfrom_defs.h.inc | 6 - libc/{src/unistd => config/linux}/syscall.h.def | 0 libc/include/CMakeLists.txt | 1 + libc/src/CMakeLists.txt | 1 - libc/src/sys/mman/CMakeLists.txt | 30 +- libc/src/sys/mman/{ => linux}/CMakeLists.txt | 10 +- libc/src/sys/mman/{ => linux}/mmap.cpp | 17 +- libc/src/sys/mman/{ => linux}/munmap.cpp | 7 +- libc/src/unistd/CMakeLists.txt | 9 - libc/test/config/linux/x86_64/CMakeLists.txt | 2 +- libc/test/config/linux/x86_64/syscall_test.cpp | 2 +- libc/test/src/sys/mman/CMakeLists.txt | 18 +- libc/test/src/sys/mman/{ => linux}/CMakeLists.txt | 0 libc/test/src/sys/mman/{ => linux}/mmap_test.cpp | 0 libcxx/include/__config | 5 +- libunwind/src/CMakeLists.txt | 3 - lld/ELF/Arch/PPC.cpp | 1 + lld/ELF/Arch/PPC64.cpp | 1 + lld/test/ELF/ppc-reloc-copy.s | 29 + lldb/include/lldb/Breakpoint/BreakpointSite.h | 2 + lldb/include/lldb/Breakpoint/StoppointLocation.h | 2 +- lldb/include/lldb/Symbol/TypeSystemClang.h | 1 + .../TestHWBreakMultiThread.py | 45 +- lldb/source/Breakpoint/BreakpointLocation.cpp | 7 +- lldb/source/Breakpoint/BreakpointSite.cpp | 7 + .../Process/Utility/StopInfoMachException.cpp | 59 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 3 + lldb/test/API/lldbtest.py | 31 +- .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 10 +- lldb/tools/debugserver/source/DNBArch.h | 8 +- .../tools/debugserver/source/MacOSX/MachThread.cpp | 18 +- lldb/tools/debugserver/source/MacOSX/MachThread.h | 6 +- .../debugserver/source/MacOSX/MachThreadList.cpp | 46 +- .../debugserver/source/MacOSX/MachThreadList.h | 4 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.cpp | 6 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.h | 6 +- .../source/MacOSX/i386/DNBArchImplI386.cpp | 150 ++ .../source/MacOSX/i386/DNBArchImplI386.h | 8 + .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 153 ++ .../source/MacOSX/x86_64/DNBArchImplX86_64.h | 9 + lldb/tools/debugserver/source/RNBRemote.cpp | 10 +- llvm/docs/CommandGuide/FileCheck.rst | 71 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 61 +- llvm/include/llvm/ADT/ScopedHashTable.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 3 +- llvm/include/llvm/ADT/StringSet.h | 2 +- .../llvm/Analysis/LegacyDivergenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 6 + .../llvm/Analysis/TargetTransformInfoImpl.h | 2 + .../llvm/BinaryFormat/ELFRelocs/PowerPC64.def | 2 + llvm/include/llvm/BinaryFormat/MachO.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 2 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 7 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 + .../DebugInfo/CodeView/ContinuationRecordBuilder.h | 1 - .../llvm/DebugInfo/CodeView/SimpleTypeSerializer.h | 16 +- .../llvm/DebugInfo/PDB/Native/SymbolCache.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/Object/IRSymtab.h | 1 + llvm/include/llvm/ProfileData/SampleProf.h | 1 + llvm/include/llvm/Remarks/RemarkStringTable.h | 1 + llvm/include/llvm/Support/Allocator.h | 87 +- llvm/include/llvm/Support/AllocatorBase.h | 104 ++ llvm/include/llvm/Support/BinaryStreamArray.h | 1 + llvm/include/llvm/Support/BinaryStreamReader.h | 1 + llvm/include/llvm/Support/Process.h | 2 +- llvm/include/llvm/Target/Target.td | 5 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 4 + llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp | 9 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 47 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 6 + llvm/lib/CodeGen/MachineScheduler.cpp | 2 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 104 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 +- .../DebugInfo/CodeView/SimpleTypeSerializer.cpp | 11 + llvm/lib/IR/Instructions.cpp | 6 + llvm/lib/IR/SafepointIRVerifier.cpp | 1 + llvm/lib/Support/FileCheck.cpp | 197 ++- llvm/lib/Support/FileCheckImpl.h | 168 ++- llvm/lib/Support/Unix/Memory.inc | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 48 - llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 10 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 53 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 312 +++-- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 15 + llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 138 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 3 +- llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt | 1 + llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h | 30 + llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 97 ++ llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h | 82 ++ llvm/lib/Target/VE/VEISelDAGToDAG.cpp | 36 + llvm/lib/Target/VE/VEISelLowering.cpp | 70 +- llvm/lib/Target/VE/VEISelLowering.h | 15 + llvm/lib/Target/VE/VEInstrInfo.td | 104 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 7 +- llvm/lib/Target/WebAssembly/WebAssembly.td | 7 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 4 + llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h | 2 + llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 79 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 41 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 61 +- .../Instrumentation/PGOInstrumentation.cpp | 47 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 53 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/atomics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/intrinsics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/kernel-args.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.atomic.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.atomic.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/loads.ll | 2 +- .../AMDGPU/no-return-blocks.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/phi-undef.ll | 2 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../AMDGPU/workitem-intrinsics.ll | 2 +- .../AArch64/patchable-function-entry-empty.mir | 64 + .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 10 +- .../GlobalISel/inst-select-atomicrmw-add-flat.mir | 707 ++++++++++ .../inst-select-atomicrmw-add-global.mir | 785 +++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll | 82 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir | 3 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 4 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 13 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 24 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 15 +- llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll | 4 +- llvm/test/CodeGen/AMDGPU/ds_write2st64.ll | 4 +- llvm/test/CodeGen/AMDGPU/global-saddr.ll | 2 +- llvm/test/CodeGen/AMDGPU/half.ll | 2 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 20 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 48 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot8u.ll | 86 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 30 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 64 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll | 36 + llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 10 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 2 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 6 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 18 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 24 + llvm/test/CodeGen/AMDGPU/merge-store-crash.ll | 6 +- llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir | 120 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 114 ++ .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 4 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 5 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 12 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 135 +- llvm/test/CodeGen/AMDGPU/shl.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 8 +- .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 10 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 2 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 2 +- llvm/test/CodeGen/AMDGPU/v_mac_f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 152 +- llvm/test/CodeGen/ARM/vdup.ll | 8 +- llvm/test/CodeGen/ARM/vext.ll | 24 +- llvm/test/CodeGen/ARM/vpadd.ll | 18 +- llvm/test/CodeGen/ARM/vuzp.ll | 11 +- llvm/test/CodeGen/Thumb2/mve-vaddv.ll | 76 +- llvm/test/CodeGen/VE/load.ll | 193 +++ llvm/test/CodeGen/VE/load_gv.ll | 86 ++ llvm/test/CodeGen/VE/store.ll | 160 +++ llvm/test/CodeGen/VE/store_gv.ll | 87 ++ llvm/test/CodeGen/WebAssembly/reference-types.ll | 14 + llvm/test/CodeGen/WebAssembly/target-features.ll | 35 +- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-ext.mir | 29 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 4 +- .../CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 18 +- .../CodeGen/X86/GlobalISel/x86_64-select-zext.mir | 6 +- llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll | 78 ++ llvm/test/CodeGen/X86/insertelement-duplicates.ll | 20 +- llvm/test/CodeGen/X86/sse41.ll | 10 +- .../AArch64/unretained-declaration-subprogram.ll | 44 - .../MIR/AArch64/dbgcall-site-orr-moves.mir | 6 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 18 +- .../MIR/X86/entry-value-of-modified-param.mir | 1 - .../livedebugvalues-ignores-metaInstructions.mir | 64 + .../DebugInfo/X86/lto-cross-cu-call-origin-ref.ll | 211 --- llvm/test/FileCheck/line-count.txt | 23 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 16 +- llvm/test/FileCheck/numeric-defines.txt | 81 +- llvm/test/FileCheck/numeric-expression.txt | 215 ++- llvm/test/FileCheck/string-defines-diagnostics.txt | 8 +- llvm/test/Instrumentation/MemorySanitizer/clmul.ll | 72 + llvm/test/TableGen/GlobalISelEmitterSubreg.td | 47 + .../Transforms/LoopVectorize/ARM/mve-reduce.ll | 62 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 73 + .../PGOProfile/indirect_call_profile_funclet.ll | 68 + .../Transforms/PGOProfile/memop_profile_funclet.ll | 73 + .../tools/llvm-objcopy/COFF/set-section-flags.test | 82 ++ .../llvm-readobj/ELF/reloc-types-elf-ppc64.test | 3 + llvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp | 52 +- llvm/unittests/CodeGen/GlobalISel/GISelMITest.h | 3 + .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 104 ++ .../DebugInfo/CodeView/RandomAccessVisitorTest.cpp | 1 + llvm/unittests/Support/BinaryStreamTest.cpp | 1 + llvm/unittests/Support/FileCheckTest.cpp | 438 +++++- llvm/utils/TableGen/CodeGenRegisters.cpp | 10 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 129 +- .../clang-tools-extra/clang-tidy/tool/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + .../compiler-rt/lib/sanitizer_common/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/Dialect/VectorOps/VectorOps.h | 11 + mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 132 ++ .../VectorOps/vector-slices-transforms.mlir | 63 + mlir/test/lib/Transforms/TestVectorTransforms.cpp | 15 + 349 files changed, 12890 insertions(+), 3785 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyMain.h create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyToolMain.cpp create mode 100644 clang/include/clang/AST/ParentMapContext.h create mode 100644 clang/lib/AST/ParentMapContext.cpp create mode 100644 clang/lib/Sema/SemaAvailability.cpp create mode 100644 clang/test/Lexer/Inputs/inc1.h create mode 100644 clang/test/Lexer/Inputs/inc2.h create mode 100644 clang/test/Lexer/SourceLocationsOverflow.c create mode 100644 compiler-rt/lib/gwp_asan/tests/enable_disable.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_procmaps_fuchsia.cpp rename libc/{src/unistd => config/linux}/syscall.h.def (100%) copy libc/src/sys/mman/{ => linux}/CMakeLists.txt (63%) rename libc/src/sys/mman/{ => linux}/mmap.cpp (79%) rename libc/src/sys/mman/{ => linux}/munmap.cpp (81%) delete mode 100644 libc/src/unistd/CMakeLists.txt copy libc/test/src/sys/mman/{ => linux}/CMakeLists.txt (100%) rename libc/test/src/sys/mman/{ => linux}/mmap_test.cpp (100%) create mode 100644 lld/test/ELF/ppc-reloc-copy.s create mode 100644 llvm/include/llvm/Support/AllocatorBase.h create mode 100644 llvm/lib/Target/AMDGPU/SIPostRABundler.cpp create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h copy llvm/test/Analysis/{LegacyDivergenceAnalysis => DivergenceAnalysis}/AMDGPU/un [...] create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-g [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir create mode 100644 llvm/test/CodeGen/VE/load.ll create mode 100644 llvm/test/CodeGen/VE/load_gv.ll create mode 100644 llvm/test/CodeGen/VE/store.ll create mode 100644 llvm/test/CodeGen/VE/store_gv.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reference-types.ll delete mode 100644 llvm/test/DebugInfo/AArch64/unretained-declaration-subprogram.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstruc [...] delete mode 100644 llvm/test/DebugInfo/X86/lto-cross-cu-call-origin-ref.ll create mode 100644 llvm/test/Instrumentation/MemorySanitizer/clmul.ll create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-reduce.ll create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll create mode 100644 llvm/test/Transforms/PGOProfile/indirect_call_profile_funclet.ll create mode 100644 llvm/test/Transforms/PGOProfile/memop_profile_funclet.ll create mode 100644 llvm/test/tools/llvm-objcopy/COFF/set-section-flags.test create mode 100644 mlir/test/Dialect/VectorOps/vector-slices-transforms.mlir -- To stop receiving notification emails like this one, please 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5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (df83437a -> 821076f5)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards df83437a 0: update: llvm-linux: all new 821076f5 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (df83437a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 231 +- 02-build_llvm/console.log | 12654 +++++++++++++++++------------------ 03-build_linux/console.log | 790 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 18 +- 06-update_baseline/console.log | 10 +- console.log | 13705 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13722 insertions(+), 13696 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig updated (06ae3748db8 -> cb297050bb0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project. from 06ae3748db8 [lldb][NFC] Cleanup some if conditions in ASTImporterDelega [...] adds 5cee34013cf [PowerPC][Future] Add prefixed instruction paddi to future CPU adds 0a002f679be [Sema] Try 2: Sanity-check alignment requested via `__attri [...] adds 8e96697c7df FileCheck [9/12]: Add support for matching formats adds 08ebd8c79e4 [VE] aligned load/store isel patterns adds 1d0972ff5ea [Sema] Introduce MaximumAlignment value, to be used instead [...] adds 6ef1ccecf7a [clangd] Rename DiagnosticsConsumer -> ClangdServer::Callba [...] adds 76fa5d50f3d [clangd] Remove pesky ;. NFC adds f69eba07726 [llvm-objcopy][COFF] Add support for --set-section-flags adds a8c3608a27a [Sema] Provide declarations for MaximumAlignment, MaxAlignm [...] adds 3fd5d1c6e7d [X86][SSE] combineTargetShuffle - permilps(shufps(load(),x) [...] adds 80fd37f9d66 [analyzer] PthreadLock: Fix return value modeling for XNU l [...] adds 15624a7bda9 [analyzer] PthreadLock: Add more XNU rwlock unlock functions. adds 152bc7ffdcd [analyzer] NFC: PthreadLock: Use CallDescriptionMap, modernize. adds dd22be1e3d9 [analyzer] PthreadLock: Implement mutex escaping. adds 1484d0f12ad [analyzer] PthreadLock: Implement dead region cleanup. adds f5147765ba1 [DebugInfo][LiveDebugValues] Teach Live Debug Values About [...] adds 0fca35c652f [VE] global variable isel patterns adds f1dab29908d [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY adds b535aa405a0 [ARM] Use reduction intrinsics for larger than legal reductions adds 0d61cd25a69 Verify that clang's max alignment is <= LLVM's max alignment adds 50a3ff30e15 [PatchableFunction] Allow empty entry MachineBasicBlock adds a33accde954 [PGO] Early detection regarding whether pgo counter promoti [...] adds 0d90d2457c3 [LoopStrengthReduce] Teach LoopStrengthReduce to preserve M [...] adds abd1927d446 Fix some comment typos. NFC. adds 5dda92fcb0c Add test for spaceship operator to __config adds 37aa16ebb71 [DA] Don't propagate from unreachable blocks adds c5bd3d07262 Support Swift calling convention for WebAssembly targets adds c2266463377 Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI adds 7a94d4f4ee4 Allow combining of extract_subvector to extract element adds 44b865fa7fe [AMDGPU] Allow narrowing muti-dword loads adds b35b7da4608 [PGO] Attach appropriate funclet operand bundles to value p [...] adds 555d8f4ef5e [AMDGPU] Bundle loads before post-RA scheduler adds 698d1cd3b81 Make address-space-lambda.cl pass on 32-bit Windows adds 6530136fe3f [gn build] Port 555d8f4ef5e adds 58592f6c492 Include <cstdlib> for std::abort() in clangd adds a107f864176 [GlobalsAA] Add back a check to intrinsic_addresstaken.ll t [...] adds 4fdae24733d AMDGPU/GlobalISel: Add selection tests for G_ATOMICRMW_ADD adds 84e035d8f1d AMDGPU: Don't check constant address space for atomic stores adds d8328c0b624 TableGen: Work around assert on Mips register definitions adds 9c346464c15 TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG adds be8e38cbd97 Correct NumLoads in clustering adds 3f8b100e94b [clang-tidy] Add library for clang-tidy main function adds 36b887ed15a [gn build] Port 3f8b100e94b adds 87c46a31297 AMDGPU: Don't error on ds.ordered intrinsic in function adds 3b93945587a AMDGPU/GlobalISel: Select wqm, softwqm and wwm intrinsics adds b1f3a0f972f Revert a107f86 "[GlobalsAA] Add back a check to intrinsic_a [...] adds 8a81daaa8b5 [AST] Split parent map traversal logic into ParentMapContext.h adds da8bada9383 [gn build] Port 8a81daaa8b5 adds 596d06145a2 [GWP-ASan] enable/disable and fork support. adds 9fa0f236d50 [PATCH] [Target] Test commit adds 118efa5cda8 [LLDB][NFC] Adding clarifying comment in SymbolFileDWARFDeb [...] adds d3bf06bc81e [DAGCombiner] Add combine for (not (strict_fsetcc)) to crea [...] adds 764f4089e89 [WebAssembly] Add reference types target feature adds 65eb11306e9 [WebAssembly] Update bleeding-edge CPU features adds 1df8549b268 [msan] Instrument x86.pclmulqdq* intrinsics. adds 70cbf8c71c5 [X86] Make `llc --help` output readable again adds 2c1decc040d [X86] Break the loop in LowerReturn into 2 loops. NFCI adds 1e487e4c168 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c adds daee63f9741 [SelectionDag] Updated FoldConstantArithmetic method signat [...] adds e1440f594c1 [GWP-ASan] Add names to anonymous mappings. adds 9902c8e3c66 [lldb/debugserver] Unify the breakpoint/watchpoint interfac [...] adds 96f3ea0d21b [lldb/debugserver] Implement hardware breakpoints for x86_6 [...] adds ec62bf2fd32 [libc] Move the implementation of mmap and munmap into a li [...] adds bce360b7048 Detect source location overflow due includes adds 632ba9fcb52 [codeview] Prune SimpleTypeSerializer.h headers, NFC adds e3a7c7713cd [lldb/Lit] Change the lldbtest format to behave more like s [...] adds 303fddeeab1 [mlir] [VectorOps] Rewriting of vector.extract/insert_slice [...] adds 81b700e302b [sanitizer_common] Implement MemoryMappingLayout for Fuchsia adds 5d87b5d2029 [GISelKnownBits] Add support for PHIs adds aae707cd881 [lsan] Expose Frontier object to OS-specific LockStuffAndSt [...] adds 38fd1806a16 [lsan] Factor pthread-specific assumptions out of thread tr [...] adds 3da47749ddd [IR] Move CallBase::getOperandBundlesAsDefs out of line, NFC adds 0697bcb66f1 [Support] Split MallocAllocator out of Allocator.h adds dd8e0a0a23b [Sema] Split availability processing into SemaAvailability.cpp adds de863bcc6c8 [Support] Fix up header comments after splitting Allocator.h, NFC adds 0ebc8e6c421 [Sema] Remove unneeded TreeTransform.h includes, NFC adds 802bec89617 Revert "Reland: [DWARF] Allow cross-CU references of subpro [...] adds 9f69157bf4a Fix header includes after 0697bcb66f1d82f2fd447e9d13b74d141c3ce085 adds 8d35c798f19 [gn build] (manually) merge 81b700e302b1 adds ef7f3af760e [gn build] Port dd8e0a0a23b adds 04f131da0b1 DR1753: Don't permit x.NS::~T() as a pseudo-destructor name. adds c48974ffd7d [libunwind] Set LIBUNWIND_ASM_SOURCES to the ASM source lan [...] adds 2bc38ab3d03 [lldb/Breakpoint] Recogize hardware breakpoints as such adds d8e0f4fae7a [lldb/Breakpoint] Include whether or not a breakpoint is a HW BP adds 86c944d7907 AMDGPU/SILoadStoreOptimizer: Improve merging of out of orde [...] adds fe9765762ce AMDGPU: Generate test checks adds 1ed561aa4bd [lldb/Test] Update minidebuginfo-set-and-hit-breakpoint.test adds 1c90ce0c761 [lldb/Test] Disable hardware check on arm/aarch64 adds cb297050bb0 AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 4 +- .../readability/MakeMemberFunctionConstCheck.cpp | 3 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 19 +- .../clang-tidy/tool/ClangTidyMain.cpp | 7 +- clang-tools-extra/clang-tidy/tool/ClangTidyMain.h | 23 + .../clang-tidy/tool/ClangTidyToolMain.cpp | 21 + .../clang-tidy/utils/ExprSequence.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdLSPServer.h | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 41 +- clang-tools-extra/clangd/ClangdServer.h | 63 +- clang-tools-extra/clangd/Shutdown.cpp | 1 + clang-tools-extra/clangd/unittests/ClangdTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 62 +- .../clangd/unittests/FindSymbolsTests.cpp | 13 +- .../clangd/unittests/HeaderSourceSwitchTests.cpp | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 6 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 9 +- .../clangd/unittests/SemanticSelectionTests.cpp | 8 +- .../clangd/unittests/TUSchedulerTests.cpp | 4 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 14 +- clang/include/clang/AST/ASTContext.h | 112 +- clang/include/clang/AST/ASTNodeTraverser.h | 1 + clang/include/clang/AST/ParentMapContext.h | 150 ++ clang/include/clang/ASTMatchers/ASTMatchers.h | 1 + clang/include/clang/Basic/DiagnosticCommonKinds.td | 3 + clang/include/clang/Lex/Preprocessor.h | 4 +- clang/include/clang/Sema/Sema.h | 13 + clang/lib/AST/ASTContext.cpp | 248 +--- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Linkage.h | 1 + clang/lib/AST/ParentMapContext.cpp | 265 ++++ clang/lib/ASTMatchers/ASTMatchFinder.cpp | 15 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 7 +- clang/lib/Basic/SourceManager.cpp | 10 +- clang/lib/Basic/Targets/OSTargets.cpp | 2 +- clang/lib/Basic/Targets/WebAssembly.cpp | 15 + clang/lib/Basic/Targets/WebAssembly.h | 11 + clang/lib/CodeGen/CGCall.h | 1 + clang/lib/CodeGen/CGValue.h | 4 + clang/lib/Lex/PPDirectives.cpp | 12 +- clang/lib/Lex/Preprocessor.cpp | 10 + clang/lib/Parse/ParseExprCXX.cpp | 55 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/Sema.cpp | 3 + clang/lib/Sema/SemaAvailability.cpp | 963 +++++++++++++ clang/lib/Sema/SemaChecking.cpp | 12 +- clang/lib/Sema/SemaDecl.cpp | 1 - clang/lib/Sema/SemaDeclAttr.cpp | 957 +------------ clang/lib/Sema/SemaType.cpp | 1 - .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 382 +++-- clang/lib/Tooling/ASTDiff/ASTDiff.cpp | 1 + .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 1 + .../system-header-simulator-for-pthread-lock.h | 20 +- clang/test/Analysis/pthreadlock.c | 42 + clang/test/CXX/drs/dr17xx.cpp | 30 +- clang/test/CXX/drs/dr6xx.cpp | 6 +- clang/test/Lexer/Inputs/inc1.h | 1470 ++++++++++++++++++++ clang/test/Lexer/Inputs/inc2.h | 1000 +++++++++++++ clang/test/Lexer/SourceLocationsOverflow.c | 25 + clang/test/Preprocessor/init.c | 2 + clang/test/Preprocessor/wasm-target-features.c | 15 +- clang/test/Sema/attr-aligned.c | 5 +- clang/test/Sema/builtin-assume-aligned.c | 1 + clang/test/SemaCXX/pseudo-destructors.cpp | 12 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 12 +- clang/www/cxx_dr_status.html | 2 +- .../lib/gwp_asan/guarded_pool_allocator.cpp | 54 +- compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 44 +- compiler-rt/lib/gwp_asan/options.inc | 4 + .../guarded_pool_allocator_posix.cpp | 62 +- compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 4 +- compiler-rt/lib/gwp_asan/tests/enable_disable.cpp | 86 ++ compiler-rt/lib/gwp_asan/tests/harness.cpp | 10 + compiler-rt/lib/gwp_asan/tests/harness.h | 17 +- compiler-rt/lib/lsan/CMakeLists.txt | 3 +- compiler-rt/lib/lsan/lsan.cpp | 5 +- compiler-rt/lib/lsan/lsan.h | 3 + compiler-rt/lib/lsan/lsan_common.cpp | 32 +- compiler-rt/lib/lsan/lsan_common.h | 14 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 3 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 3 +- compiler-rt/lib/lsan/lsan_interceptors.cpp | 3 +- compiler-rt/lib/lsan/lsan_posix.cpp | 85 ++ compiler-rt/lib/lsan/lsan_posix.h | 49 + compiler-rt/lib/lsan/lsan_thread.cpp | 98 +- compiler-rt/lib/lsan/lsan_thread.h | 35 +- compiler-rt/lib/sanitizer_common/CMakeLists.txt | 1 + .../lib/sanitizer_common/sanitizer_fuchsia.h | 6 + .../lib/sanitizer_common/sanitizer_procmaps.h | 7 +- .../sanitizer_procmaps_fuchsia.cpp | 80 ++ compiler-rt/lib/scudo/standalone/CMakeLists.txt | 5 +- compiler-rt/lib/scudo/standalone/combined.h | 27 +- .../lib/scudo/standalone/tests/CMakeLists.txt | 5 +- .../lib/scudo/standalone/tests/combined_test.cpp | 12 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 1 + libc/config/linux/CMakeLists.txt | 10 + libc/config/linux/platfrom_defs.h.inc | 6 - libc/{src/unistd => config/linux}/syscall.h.def | 0 libc/include/CMakeLists.txt | 1 + libc/src/CMakeLists.txt | 1 - libc/src/sys/mman/CMakeLists.txt | 30 +- libc/src/sys/mman/{ => linux}/CMakeLists.txt | 10 +- libc/src/sys/mman/{ => linux}/mmap.cpp | 17 +- libc/src/sys/mman/{ => linux}/munmap.cpp | 7 +- libc/src/unistd/CMakeLists.txt | 9 - libc/test/config/linux/x86_64/CMakeLists.txt | 2 +- libc/test/config/linux/x86_64/syscall_test.cpp | 2 +- libc/test/src/sys/mman/CMakeLists.txt | 18 +- libc/test/src/sys/mman/{ => linux}/CMakeLists.txt | 0 libc/test/src/sys/mman/{ => linux}/mmap_test.cpp | 0 libcxx/include/__config | 5 +- libunwind/src/CMakeLists.txt | 3 - lld/ELF/Arch/PPC.cpp | 1 + lld/ELF/Arch/PPC64.cpp | 1 + lld/test/ELF/ppc-reloc-copy.s | 29 + lldb/include/lldb/Breakpoint/BreakpointSite.h | 2 + lldb/include/lldb/Breakpoint/StoppointLocation.h | 2 +- lldb/include/lldb/Symbol/TypeSystemClang.h | 1 + .../TestHWBreakMultiThread.py | 45 +- lldb/source/Breakpoint/BreakpointLocation.cpp | 7 +- lldb/source/Breakpoint/BreakpointSite.cpp | 7 + .../Process/Utility/StopInfoMachException.cpp | 59 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 3 + lldb/test/API/lldbtest.py | 31 +- .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 10 +- lldb/tools/debugserver/source/DNBArch.h | 8 +- .../tools/debugserver/source/MacOSX/MachThread.cpp | 18 +- lldb/tools/debugserver/source/MacOSX/MachThread.h | 6 +- .../debugserver/source/MacOSX/MachThreadList.cpp | 46 +- .../debugserver/source/MacOSX/MachThreadList.h | 4 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.cpp | 6 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.h | 6 +- .../source/MacOSX/i386/DNBArchImplI386.cpp | 150 ++ .../source/MacOSX/i386/DNBArchImplI386.h | 8 + .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 153 ++ .../source/MacOSX/x86_64/DNBArchImplX86_64.h | 9 + lldb/tools/debugserver/source/RNBRemote.cpp | 10 +- llvm/docs/CommandGuide/FileCheck.rst | 71 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 61 +- llvm/include/llvm/ADT/ScopedHashTable.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 3 +- llvm/include/llvm/ADT/StringSet.h | 2 +- .../llvm/Analysis/LegacyDivergenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 6 + .../llvm/Analysis/TargetTransformInfoImpl.h | 2 + .../llvm/BinaryFormat/ELFRelocs/PowerPC64.def | 2 + llvm/include/llvm/BinaryFormat/MachO.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 2 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 7 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 + .../DebugInfo/CodeView/ContinuationRecordBuilder.h | 1 - .../llvm/DebugInfo/CodeView/SimpleTypeSerializer.h | 16 +- .../llvm/DebugInfo/PDB/Native/SymbolCache.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/Object/IRSymtab.h | 1 + llvm/include/llvm/ProfileData/SampleProf.h | 1 + llvm/include/llvm/Remarks/RemarkStringTable.h | 1 + llvm/include/llvm/Support/Allocator.h | 87 +- llvm/include/llvm/Support/AllocatorBase.h | 104 ++ llvm/include/llvm/Support/BinaryStreamArray.h | 1 + llvm/include/llvm/Support/BinaryStreamReader.h | 1 + llvm/include/llvm/Support/Process.h | 2 +- llvm/include/llvm/Target/Target.td | 5 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 4 + llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp | 9 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 47 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 6 + llvm/lib/CodeGen/MachineScheduler.cpp | 2 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 104 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 +- .../DebugInfo/CodeView/SimpleTypeSerializer.cpp | 11 + llvm/lib/IR/Instructions.cpp | 6 + llvm/lib/IR/SafepointIRVerifier.cpp | 1 + llvm/lib/Support/FileCheck.cpp | 197 ++- llvm/lib/Support/FileCheckImpl.h | 168 ++- llvm/lib/Support/Unix/Memory.inc | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 48 - llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 10 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 53 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 312 +++-- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 15 + llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 138 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 2 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 7 + .../PowerPC/Disassembler/PPCDisassembler.cpp | 34 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 2 + .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 2 +- .../Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h | 2 +- llvm/lib/Target/PowerPC/PPC.td | 7 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 24 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 123 ++ llvm/lib/Target/PowerPC/PPCScheduleP9.td | 6 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt | 1 + llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h | 30 + llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 97 ++ llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h | 82 ++ llvm/lib/Target/VE/VEISelDAGToDAG.cpp | 36 + llvm/lib/Target/VE/VEISelLowering.cpp | 70 +- llvm/lib/Target/VE/VEISelLowering.h | 15 + llvm/lib/Target/VE/VEInstrInfo.td | 104 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 7 +- llvm/lib/Target/WebAssembly/WebAssembly.td | 7 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 4 + llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h | 2 + llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 79 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 41 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 61 +- .../Instrumentation/PGOInstrumentation.cpp | 47 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 53 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/atomics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/intrinsics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/kernel-args.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.atomic.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.atomic.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/loads.ll | 2 +- .../AMDGPU/no-return-blocks.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/phi-undef.ll | 2 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../AMDGPU/workitem-intrinsics.ll | 2 +- .../AArch64/patchable-function-entry-empty.mir | 64 + .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 10 +- .../GlobalISel/inst-select-atomicrmw-add-flat.mir | 707 ++++++++++ .../inst-select-atomicrmw-add-global.mir | 785 +++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll | 82 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir | 3 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 4 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 13 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 24 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 15 +- llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll | 4 +- llvm/test/CodeGen/AMDGPU/ds_write2st64.ll | 4 +- llvm/test/CodeGen/AMDGPU/global-saddr.ll | 2 +- llvm/test/CodeGen/AMDGPU/half.ll | 2 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 20 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 48 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot8u.ll | 86 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 30 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 64 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll | 36 + llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 10 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 2 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 6 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 18 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 24 + llvm/test/CodeGen/AMDGPU/merge-store-crash.ll | 6 +- llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir | 120 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 114 ++ .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 4 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 5 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 12 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 135 +- llvm/test/CodeGen/AMDGPU/shl.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 8 +- .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 10 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 2 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 2 +- llvm/test/CodeGen/AMDGPU/v_mac_f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 152 +- llvm/test/CodeGen/ARM/vdup.ll | 8 +- llvm/test/CodeGen/ARM/vext.ll | 24 +- llvm/test/CodeGen/ARM/vpadd.ll | 18 +- llvm/test/CodeGen/ARM/vuzp.ll | 11 +- llvm/test/CodeGen/PowerPC/future-check-features.ll | 19 + llvm/test/CodeGen/Thumb2/mve-vaddv.ll | 76 +- llvm/test/CodeGen/VE/load.ll | 193 +++ llvm/test/CodeGen/VE/load_gv.ll | 86 ++ llvm/test/CodeGen/VE/store.ll | 160 +++ llvm/test/CodeGen/VE/store_gv.ll | 87 ++ llvm/test/CodeGen/WebAssembly/reference-types.ll | 14 + llvm/test/CodeGen/WebAssembly/target-features.ll | 35 +- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-ext.mir | 29 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 4 +- .../CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 18 +- .../CodeGen/X86/GlobalISel/x86_64-select-zext.mir | 6 +- llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll | 78 ++ llvm/test/CodeGen/X86/insertelement-duplicates.ll | 20 +- llvm/test/CodeGen/X86/sse41.ll | 10 +- .../AArch64/unretained-declaration-subprogram.ll | 44 - .../MIR/AArch64/dbgcall-site-orr-moves.mir | 6 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 18 +- .../MIR/X86/entry-value-of-modified-param.mir | 1 - .../livedebugvalues-ignores-metaInstructions.mir | 64 + .../DebugInfo/X86/lto-cross-cu-call-origin-ref.ll | 211 --- llvm/test/FileCheck/line-count.txt | 23 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 16 +- llvm/test/FileCheck/numeric-defines.txt | 81 +- llvm/test/FileCheck/numeric-expression.txt | 215 ++- llvm/test/FileCheck/string-defines-diagnostics.txt | 8 +- llvm/test/Instrumentation/MemorySanitizer/clmul.ll | 72 + .../MC/Disassembler/PowerPC/future-invalid.txt | 5 + llvm/test/MC/Disassembler/PowerPC/futureinsts.txt | 9 + llvm/test/MC/PowerPC/future.s | 27 + llvm/test/TableGen/GlobalISelEmitterSubreg.td | 47 + .../Transforms/LoopVectorize/ARM/mve-reduce.ll | 62 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 73 + .../PGOProfile/indirect_call_profile_funclet.ll | 68 + .../Transforms/PGOProfile/memop_profile_funclet.ll | 73 + .../tools/llvm-objcopy/COFF/set-section-flags.test | 82 ++ .../llvm-readobj/ELF/reloc-types-elf-ppc64.test | 3 + llvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp | 52 +- llvm/unittests/CodeGen/GlobalISel/GISelMITest.h | 3 + .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 104 ++ .../DebugInfo/CodeView/RandomAccessVisitorTest.cpp | 1 + llvm/unittests/Support/BinaryStreamTest.cpp | 1 + llvm/unittests/Support/FileCheckTest.cpp | 438 +++++- llvm/utils/TableGen/CodeGenRegisters.cpp | 10 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 129 +- .../clang-tools-extra/clang-tidy/tool/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + .../compiler-rt/lib/sanitizer_common/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/Dialect/VectorOps/VectorOps.h | 11 + mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 132 ++ .../VectorOps/vector-slices-transforms.mlir | 63 + mlir/test/lib/Transforms/TestVectorTransforms.cpp | 15 + 367 files changed, 13173 insertions(+), 3794 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyMain.h create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyToolMain.cpp create mode 100644 clang/include/clang/AST/ParentMapContext.h create mode 100644 clang/lib/AST/ParentMapContext.cpp create mode 100644 clang/lib/Sema/SemaAvailability.cpp create mode 100644 clang/test/Lexer/Inputs/inc1.h create mode 100644 clang/test/Lexer/Inputs/inc2.h create mode 100644 clang/test/Lexer/SourceLocationsOverflow.c create mode 100644 compiler-rt/lib/gwp_asan/tests/enable_disable.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_procmaps_fuchsia.cpp rename libc/{src/unistd => config/linux}/syscall.h.def (100%) copy libc/src/sys/mman/{ => linux}/CMakeLists.txt (63%) rename libc/src/sys/mman/{ => linux}/mmap.cpp (79%) rename libc/src/sys/mman/{ => linux}/munmap.cpp (81%) delete mode 100644 libc/src/unistd/CMakeLists.txt copy libc/test/src/sys/mman/{ => linux}/CMakeLists.txt (100%) rename libc/test/src/sys/mman/{ => linux}/mmap_test.cpp (100%) create mode 100644 lld/test/ELF/ppc-reloc-copy.s create mode 100644 llvm/include/llvm/Support/AllocatorBase.h create mode 100644 llvm/lib/Target/AMDGPU/SIPostRABundler.cpp create mode 100644 llvm/lib/Target/PowerPC/PPCInstrPrefix.td create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h copy llvm/test/Analysis/{LegacyDivergenceAnalysis => DivergenceAnalysis}/AMDGPU/un [...] create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-g [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir create mode 100644 llvm/test/CodeGen/PowerPC/future-check-features.ll create mode 100644 llvm/test/CodeGen/VE/load.ll create mode 100644 llvm/test/CodeGen/VE/load_gv.ll create mode 100644 llvm/test/CodeGen/VE/store.ll create mode 100644 llvm/test/CodeGen/VE/store_gv.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reference-types.ll delete mode 100644 llvm/test/DebugInfo/AArch64/unretained-declaration-subprogram.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstruc [...] delete mode 100644 llvm/test/DebugInfo/X86/lto-cross-cu-call-origin-ref.ll create mode 100644 llvm/test/Instrumentation/MemorySanitizer/clmul.ll create mode 100644 llvm/test/MC/Disassembler/PowerPC/future-invalid.txt create mode 100644 llvm/test/MC/Disassembler/PowerPC/futureinsts.txt create mode 100644 llvm/test/MC/PowerPC/future.s create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-reduce.ll create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll create mode 100644 llvm/test/Transforms/PGOProfile/indirect_call_profile_funclet.ll create mode 100644 llvm/test/Transforms/PGOProfile/memop_profile_funclet.ll create mode 100644 llvm/test/tools/llvm-objcopy/COFF/set-section-flags.test create mode 100644 mlir/test/Dialect/VectorOps/vector-slices-transforms.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig updated (111fb074 -> e6078a45)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 111fb074 0: update: llvm-linux: 18436 new e6078a45 0: update: llvm-linux: 18436 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (111fb074) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12470 +++++++++++++++++----------------- 03-build_linux/console.log | 836 ++- 05-check_regression/console.log | 16 +- 06-update_baseline/console.log | 65 +- console.log | 13607 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 13565 insertions(+), 13659 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (4703d9119972 -> d5d359b0ac3f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from 4703d9119972 Merge tag 'xarray-5.5' of git://git.infradead.org/users/wi [...] adds 4d627c88546a mmc: sdhci_am654: Remove Inverted Write Protect flag adds de31f6ab68a3 mmc: sdhci_am654: Reset Command and Data line after tuning adds 27f4e1e9425e mmc: sdhci_am654: Fix Command Queuing in AM65x adds f571389c0b01 mmc: tegra: fix SDR50 tuning override adds 2a187d033520 mmc: sdhci: fix minimum clock rate for v3 controller adds 838a860a3905 Merge tag 'mmc-v5.5-rc2-2' of git://git.kernel.org/pub/scm [...] adds ab10ae1c3bef lib: Reduce user_access_begin() boundaries in strncpy_from [...] adds db1a07956968 drm/dp_mst: Handle SST-only branch device case adds bdefca2d8dc0 drm/panfrost: Add the panfrost_gem_mapping concept adds a48d4a33b6ef Merge tag 'drm-misc-fixes-2020-01-22-1' of git://anongit.f [...] adds ecc4d2a52df6 drm/i915/userptr: fix size calculation adds 5eec71829ad7 drm/i915: Align engine->uabi_class/instance with i915_drm.h adds b52937145d6f Merge tag 'drm-intel-fixes-2020-01-23' of git://anongit.fr [...] adds 23fe1390c7f1 drm/amdgpu: remove the experimental flag for renoir adds 49412f6636ba Merge tag 'amd-drm-fixes-5.5-2020-01-23' of git://people.f [...] adds 274adbff45e3 Merge tag 'drm-fixes-2020-01-24' of git://anongit.freedesk [...] adds a2db55dda9cf powerpc: Ultravisor: Fix the dependencies for CONFIG_PPC_UV adds 17328f218fb7 powerpc/xive: Discard ESB load value when interrupt is invalid adds 5d2e5dd5849b powerpc/mm/hash: Fix sharing context ids between kernel & [...] adds 3c45d7510cf5 Merge tag 'powerpc-5.5-6' of git://git.kernel.org/pub/scm/ [...] adds bf708cfb2f48 iommu/vt-d: Call __dmar_remove_one_dev_info with valid pointer adds 8c17bbf6c8f7 iommu/amd: Fix IOMMU perf counter clobbering during init adds 6381b442836e Merge tag 'iommu-fixes-v5.5-rc7' of git://git.kernel.org/p [...] adds 7f439bc2d7e8 Input: evdev - convert kzalloc()/vzalloc() to kvzalloc() adds 97e24b095348 Input: sun4i-ts - add a check for devm_thermal_zone_of_sen [...] adds bcfcb7f9b480 Input: pegasus_notetaker - fix endpoint sanity check adds 3111491fca4f Input: aiptek - fix endpoint sanity check adds cfa4f6a99fb1 Input: aiptek - use descriptors of current altsetting adds a8eeb74df5a6 Input: gtco - fix endpoint sanity check adds 3563c629fb9a Input: gtco - fix extra-descriptor debug message adds cea799114475 Input: gtco - drop redundant variable reinit adds 6b32391ed675 Input: sur40 - fix interface sanity checks adds 8ff771f8c8d5 Revert "Input: synaptics-rmi4 - don't increment rmiaddr fo [...] adds c15f8ba6dc1f Input: rmi_f54 - read from FIFO in 32 byte blocks adds ce535a2efb48 Input: max77650-onkey - add of_match table adds ba9a103f40fc Input: keyspan-remote - fix control-message timeouts adds 996d5d5f89a5 Input: pm8xxx-vib - fix handling of separate enable register adds d5d359b0ac3f Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] No new revisions were added by this update. Summary of changes: arch/powerpc/Kconfig | 6 +- arch/powerpc/include/asm/book3s/64/mmu-hash.h | 5 +- arch/powerpc/include/asm/xive-regs.h | 1 + arch/powerpc/sysdev/xive/common.c | 15 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +- drivers/gpu/drm/drm_dp_mst_topology.c | 140 +++++++++++++---------- drivers/gpu/drm/i915/gem/i915_gem_busy.c | 12 +- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 9 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 + drivers/gpu/drm/panfrost/panfrost_drv.c | 91 +++++++++++++-- drivers/gpu/drm/panfrost/panfrost_gem.c | 124 +++++++++++++++++--- drivers/gpu/drm/panfrost/panfrost_gem.h | 41 ++++++- drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c | 3 +- drivers/gpu/drm/panfrost/panfrost_job.c | 13 ++- drivers/gpu/drm/panfrost/panfrost_job.h | 1 + drivers/gpu/drm/panfrost/panfrost_mmu.c | 61 +++++----- drivers/gpu/drm/panfrost/panfrost_mmu.h | 6 +- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 34 ++++-- drivers/input/evdev.c | 5 +- drivers/input/misc/keyspan_remote.c | 9 +- drivers/input/misc/max77650-onkey.c | 7 ++ drivers/input/misc/pm8xxx-vibrator.c | 2 +- drivers/input/rmi4/rmi_f54.c | 43 ++++--- drivers/input/rmi4/rmi_smbus.c | 2 + drivers/input/tablet/aiptek.c | 8 +- drivers/input/tablet/gtco.c | 13 +-- drivers/input/tablet/pegasus_notetaker.c | 2 +- drivers/input/touchscreen/sun4i-ts.c | 6 +- drivers/input/touchscreen/sur40.c | 2 +- drivers/iommu/amd_iommu_init.c | 24 +++- drivers/iommu/intel-iommu.c | 3 +- drivers/mmc/host/sdhci-tegra.c | 2 +- drivers/mmc/host/sdhci.c | 10 +- drivers/mmc/host/sdhci_am654.c | 54 ++++++--- lib/strncpy_from_user.c | 14 +-- lib/strnlen_user.c | 14 +-- 37 files changed, 549 insertions(+), 241 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (06ae3748db8 -> cb297050bb0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from 06ae3748db8 [lldb][NFC] Cleanup some if conditions in ASTImporterDelega [...] adds 5cee34013cf [PowerPC][Future] Add prefixed instruction paddi to future CPU adds 0a002f679be [Sema] Try 2: Sanity-check alignment requested via `__attri [...] adds 8e96697c7df FileCheck [9/12]: Add support for matching formats adds 08ebd8c79e4 [VE] aligned load/store isel patterns adds 1d0972ff5ea [Sema] Introduce MaximumAlignment value, to be used instead [...] adds 6ef1ccecf7a [clangd] Rename DiagnosticsConsumer -> ClangdServer::Callba [...] adds 76fa5d50f3d [clangd] Remove pesky ;. NFC adds f69eba07726 [llvm-objcopy][COFF] Add support for --set-section-flags adds a8c3608a27a [Sema] Provide declarations for MaximumAlignment, MaxAlignm [...] adds 3fd5d1c6e7d [X86][SSE] combineTargetShuffle - permilps(shufps(load(),x) [...] adds 80fd37f9d66 [analyzer] PthreadLock: Fix return value modeling for XNU l [...] adds 15624a7bda9 [analyzer] PthreadLock: Add more XNU rwlock unlock functions. adds 152bc7ffdcd [analyzer] NFC: PthreadLock: Use CallDescriptionMap, modernize. adds dd22be1e3d9 [analyzer] PthreadLock: Implement mutex escaping. adds 1484d0f12ad [analyzer] PthreadLock: Implement dead region cleanup. adds f5147765ba1 [DebugInfo][LiveDebugValues] Teach Live Debug Values About [...] adds 0fca35c652f [VE] global variable isel patterns adds f1dab29908d [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY adds b535aa405a0 [ARM] Use reduction intrinsics for larger than legal reductions adds 0d61cd25a69 Verify that clang's max alignment is <= LLVM's max alignment adds 50a3ff30e15 [PatchableFunction] Allow empty entry MachineBasicBlock adds a33accde954 [PGO] Early detection regarding whether pgo counter promoti [...] adds 0d90d2457c3 [LoopStrengthReduce] Teach LoopStrengthReduce to preserve M [...] adds abd1927d446 Fix some comment typos. NFC. adds 5dda92fcb0c Add test for spaceship operator to __config adds 37aa16ebb71 [DA] Don't propagate from unreachable blocks adds c5bd3d07262 Support Swift calling convention for WebAssembly targets adds c2266463377 Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI adds 7a94d4f4ee4 Allow combining of extract_subvector to extract element adds 44b865fa7fe [AMDGPU] Allow narrowing muti-dword loads adds b35b7da4608 [PGO] Attach appropriate funclet operand bundles to value p [...] adds 555d8f4ef5e [AMDGPU] Bundle loads before post-RA scheduler adds 698d1cd3b81 Make address-space-lambda.cl pass on 32-bit Windows adds 6530136fe3f [gn build] Port 555d8f4ef5e adds 58592f6c492 Include <cstdlib> for std::abort() in clangd adds a107f864176 [GlobalsAA] Add back a check to intrinsic_addresstaken.ll t [...] adds 4fdae24733d AMDGPU/GlobalISel: Add selection tests for G_ATOMICRMW_ADD adds 84e035d8f1d AMDGPU: Don't check constant address space for atomic stores adds d8328c0b624 TableGen: Work around assert on Mips register definitions adds 9c346464c15 TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG adds be8e38cbd97 Correct NumLoads in clustering adds 3f8b100e94b [clang-tidy] Add library for clang-tidy main function adds 36b887ed15a [gn build] Port 3f8b100e94b adds 87c46a31297 AMDGPU: Don't error on ds.ordered intrinsic in function adds 3b93945587a AMDGPU/GlobalISel: Select wqm, softwqm and wwm intrinsics adds b1f3a0f972f Revert a107f86 "[GlobalsAA] Add back a check to intrinsic_a [...] adds 8a81daaa8b5 [AST] Split parent map traversal logic into ParentMapContext.h adds da8bada9383 [gn build] Port 8a81daaa8b5 adds 596d06145a2 [GWP-ASan] enable/disable and fork support. adds 9fa0f236d50 [PATCH] [Target] Test commit adds 118efa5cda8 [LLDB][NFC] Adding clarifying comment in SymbolFileDWARFDeb [...] adds d3bf06bc81e [DAGCombiner] Add combine for (not (strict_fsetcc)) to crea [...] adds 764f4089e89 [WebAssembly] Add reference types target feature adds 65eb11306e9 [WebAssembly] Update bleeding-edge CPU features adds 1df8549b268 [msan] Instrument x86.pclmulqdq* intrinsics. adds 70cbf8c71c5 [X86] Make `llc --help` output readable again adds 2c1decc040d [X86] Break the loop in LowerReturn into 2 loops. NFCI adds 1e487e4c168 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c adds daee63f9741 [SelectionDag] Updated FoldConstantArithmetic method signat [...] adds e1440f594c1 [GWP-ASan] Add names to anonymous mappings. adds 9902c8e3c66 [lldb/debugserver] Unify the breakpoint/watchpoint interfac [...] adds 96f3ea0d21b [lldb/debugserver] Implement hardware breakpoints for x86_6 [...] adds ec62bf2fd32 [libc] Move the implementation of mmap and munmap into a li [...] adds bce360b7048 Detect source location overflow due includes adds 632ba9fcb52 [codeview] Prune SimpleTypeSerializer.h headers, NFC adds e3a7c7713cd [lldb/Lit] Change the lldbtest format to behave more like s [...] adds 303fddeeab1 [mlir] [VectorOps] Rewriting of vector.extract/insert_slice [...] adds 81b700e302b [sanitizer_common] Implement MemoryMappingLayout for Fuchsia adds 5d87b5d2029 [GISelKnownBits] Add support for PHIs adds aae707cd881 [lsan] Expose Frontier object to OS-specific LockStuffAndSt [...] adds 38fd1806a16 [lsan] Factor pthread-specific assumptions out of thread tr [...] adds 3da47749ddd [IR] Move CallBase::getOperandBundlesAsDefs out of line, NFC adds 0697bcb66f1 [Support] Split MallocAllocator out of Allocator.h adds dd8e0a0a23b [Sema] Split availability processing into SemaAvailability.cpp adds de863bcc6c8 [Support] Fix up header comments after splitting Allocator.h, NFC adds 0ebc8e6c421 [Sema] Remove unneeded TreeTransform.h includes, NFC adds 802bec89617 Revert "Reland: [DWARF] Allow cross-CU references of subpro [...] adds 9f69157bf4a Fix header includes after 0697bcb66f1d82f2fd447e9d13b74d141c3ce085 adds 8d35c798f19 [gn build] (manually) merge 81b700e302b1 adds ef7f3af760e [gn build] Port dd8e0a0a23b adds 04f131da0b1 DR1753: Don't permit x.NS::~T() as a pseudo-destructor name. adds c48974ffd7d [libunwind] Set LIBUNWIND_ASM_SOURCES to the ASM source lan [...] adds 2bc38ab3d03 [lldb/Breakpoint] Recogize hardware breakpoints as such adds d8e0f4fae7a [lldb/Breakpoint] Include whether or not a breakpoint is a HW BP adds 86c944d7907 AMDGPU/SILoadStoreOptimizer: Improve merging of out of orde [...] adds fe9765762ce AMDGPU: Generate test checks adds 1ed561aa4bd [lldb/Test] Update minidebuginfo-set-and-hit-breakpoint.test adds 1c90ce0c761 [lldb/Test] Disable hardware check on arm/aarch64 adds cb297050bb0 AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 4 +- .../readability/MakeMemberFunctionConstCheck.cpp | 3 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 19 +- .../clang-tidy/tool/ClangTidyMain.cpp | 7 +- clang-tools-extra/clang-tidy/tool/ClangTidyMain.h | 23 + .../clang-tidy/tool/ClangTidyToolMain.cpp | 21 + .../clang-tidy/utils/ExprSequence.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdLSPServer.h | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 41 +- clang-tools-extra/clangd/ClangdServer.h | 63 +- clang-tools-extra/clangd/Shutdown.cpp | 1 + clang-tools-extra/clangd/unittests/ClangdTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 62 +- .../clangd/unittests/FindSymbolsTests.cpp | 13 +- .../clangd/unittests/HeaderSourceSwitchTests.cpp | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 6 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 9 +- .../clangd/unittests/SemanticSelectionTests.cpp | 8 +- .../clangd/unittests/TUSchedulerTests.cpp | 4 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 14 +- clang/include/clang/AST/ASTContext.h | 112 +- clang/include/clang/AST/ASTNodeTraverser.h | 1 + clang/include/clang/AST/ParentMapContext.h | 150 ++ clang/include/clang/ASTMatchers/ASTMatchers.h | 1 + clang/include/clang/Basic/DiagnosticCommonKinds.td | 3 + clang/include/clang/Lex/Preprocessor.h | 4 +- clang/include/clang/Sema/Sema.h | 13 + clang/lib/AST/ASTContext.cpp | 248 +--- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Linkage.h | 1 + clang/lib/AST/ParentMapContext.cpp | 265 ++++ clang/lib/ASTMatchers/ASTMatchFinder.cpp | 15 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 7 +- clang/lib/Basic/SourceManager.cpp | 10 +- clang/lib/Basic/Targets/OSTargets.cpp | 2 +- clang/lib/Basic/Targets/WebAssembly.cpp | 15 + clang/lib/Basic/Targets/WebAssembly.h | 11 + clang/lib/CodeGen/CGCall.h | 1 + clang/lib/CodeGen/CGValue.h | 4 + clang/lib/Lex/PPDirectives.cpp | 12 +- clang/lib/Lex/Preprocessor.cpp | 10 + clang/lib/Parse/ParseExprCXX.cpp | 55 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/Sema.cpp | 3 + clang/lib/Sema/SemaAvailability.cpp | 963 +++++++++++++ clang/lib/Sema/SemaChecking.cpp | 12 +- clang/lib/Sema/SemaDecl.cpp | 1 - clang/lib/Sema/SemaDeclAttr.cpp | 957 +------------ clang/lib/Sema/SemaType.cpp | 1 - .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 382 +++-- clang/lib/Tooling/ASTDiff/ASTDiff.cpp | 1 + .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 1 + .../system-header-simulator-for-pthread-lock.h | 20 +- clang/test/Analysis/pthreadlock.c | 42 + clang/test/CXX/drs/dr17xx.cpp | 30 +- clang/test/CXX/drs/dr6xx.cpp | 6 +- clang/test/Lexer/Inputs/inc1.h | 1470 ++++++++++++++++++++ clang/test/Lexer/Inputs/inc2.h | 1000 +++++++++++++ clang/test/Lexer/SourceLocationsOverflow.c | 25 + clang/test/Preprocessor/init.c | 2 + clang/test/Preprocessor/wasm-target-features.c | 15 +- clang/test/Sema/attr-aligned.c | 5 +- clang/test/Sema/builtin-assume-aligned.c | 1 + clang/test/SemaCXX/pseudo-destructors.cpp | 12 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 12 +- clang/www/cxx_dr_status.html | 2 +- .../lib/gwp_asan/guarded_pool_allocator.cpp | 54 +- compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 44 +- compiler-rt/lib/gwp_asan/options.inc | 4 + .../guarded_pool_allocator_posix.cpp | 62 +- compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 4 +- compiler-rt/lib/gwp_asan/tests/enable_disable.cpp | 86 ++ compiler-rt/lib/gwp_asan/tests/harness.cpp | 10 + compiler-rt/lib/gwp_asan/tests/harness.h | 17 +- compiler-rt/lib/lsan/CMakeLists.txt | 3 +- compiler-rt/lib/lsan/lsan.cpp | 5 +- compiler-rt/lib/lsan/lsan.h | 3 + compiler-rt/lib/lsan/lsan_common.cpp | 32 +- compiler-rt/lib/lsan/lsan_common.h | 14 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 3 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 3 +- compiler-rt/lib/lsan/lsan_interceptors.cpp | 3 +- compiler-rt/lib/lsan/lsan_posix.cpp | 85 ++ compiler-rt/lib/lsan/lsan_posix.h | 49 + compiler-rt/lib/lsan/lsan_thread.cpp | 98 +- compiler-rt/lib/lsan/lsan_thread.h | 35 +- compiler-rt/lib/sanitizer_common/CMakeLists.txt | 1 + .../lib/sanitizer_common/sanitizer_fuchsia.h | 6 + .../lib/sanitizer_common/sanitizer_procmaps.h | 7 +- .../sanitizer_procmaps_fuchsia.cpp | 80 ++ compiler-rt/lib/scudo/standalone/CMakeLists.txt | 5 +- compiler-rt/lib/scudo/standalone/combined.h | 27 +- .../lib/scudo/standalone/tests/CMakeLists.txt | 5 +- .../lib/scudo/standalone/tests/combined_test.cpp | 12 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 1 + libc/config/linux/CMakeLists.txt | 10 + libc/config/linux/platfrom_defs.h.inc | 6 - libc/{src/unistd => config/linux}/syscall.h.def | 0 libc/include/CMakeLists.txt | 1 + libc/src/CMakeLists.txt | 1 - libc/src/sys/mman/CMakeLists.txt | 30 +- libc/src/sys/mman/{ => linux}/CMakeLists.txt | 10 +- libc/src/sys/mman/{ => linux}/mmap.cpp | 17 +- libc/src/sys/mman/{ => linux}/munmap.cpp | 7 +- libc/src/unistd/CMakeLists.txt | 9 - libc/test/config/linux/x86_64/CMakeLists.txt | 2 +- libc/test/config/linux/x86_64/syscall_test.cpp | 2 +- libc/test/src/sys/mman/CMakeLists.txt | 18 +- libc/test/src/sys/mman/{ => linux}/CMakeLists.txt | 0 libc/test/src/sys/mman/{ => linux}/mmap_test.cpp | 0 libcxx/include/__config | 5 +- libunwind/src/CMakeLists.txt | 3 - lld/ELF/Arch/PPC.cpp | 1 + lld/ELF/Arch/PPC64.cpp | 1 + lld/test/ELF/ppc-reloc-copy.s | 29 + lldb/include/lldb/Breakpoint/BreakpointSite.h | 2 + lldb/include/lldb/Breakpoint/StoppointLocation.h | 2 +- lldb/include/lldb/Symbol/TypeSystemClang.h | 1 + .../TestHWBreakMultiThread.py | 45 +- lldb/source/Breakpoint/BreakpointLocation.cpp | 7 +- lldb/source/Breakpoint/BreakpointSite.cpp | 7 + .../Process/Utility/StopInfoMachException.cpp | 59 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 3 + lldb/test/API/lldbtest.py | 31 +- .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 10 +- lldb/tools/debugserver/source/DNBArch.h | 8 +- .../tools/debugserver/source/MacOSX/MachThread.cpp | 18 +- lldb/tools/debugserver/source/MacOSX/MachThread.h | 6 +- .../debugserver/source/MacOSX/MachThreadList.cpp | 46 +- .../debugserver/source/MacOSX/MachThreadList.h | 4 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.cpp | 6 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.h | 6 +- .../source/MacOSX/i386/DNBArchImplI386.cpp | 150 ++ .../source/MacOSX/i386/DNBArchImplI386.h | 8 + .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 153 ++ .../source/MacOSX/x86_64/DNBArchImplX86_64.h | 9 + lldb/tools/debugserver/source/RNBRemote.cpp | 10 +- llvm/docs/CommandGuide/FileCheck.rst | 71 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 61 +- llvm/include/llvm/ADT/ScopedHashTable.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 3 +- llvm/include/llvm/ADT/StringSet.h | 2 +- .../llvm/Analysis/LegacyDivergenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 6 + .../llvm/Analysis/TargetTransformInfoImpl.h | 2 + .../llvm/BinaryFormat/ELFRelocs/PowerPC64.def | 2 + llvm/include/llvm/BinaryFormat/MachO.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 2 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 7 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 + .../DebugInfo/CodeView/ContinuationRecordBuilder.h | 1 - .../llvm/DebugInfo/CodeView/SimpleTypeSerializer.h | 16 +- .../llvm/DebugInfo/PDB/Native/SymbolCache.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/Object/IRSymtab.h | 1 + llvm/include/llvm/ProfileData/SampleProf.h | 1 + llvm/include/llvm/Remarks/RemarkStringTable.h | 1 + llvm/include/llvm/Support/Allocator.h | 87 +- llvm/include/llvm/Support/AllocatorBase.h | 104 ++ llvm/include/llvm/Support/BinaryStreamArray.h | 1 + llvm/include/llvm/Support/BinaryStreamReader.h | 1 + llvm/include/llvm/Support/Process.h | 2 +- llvm/include/llvm/Target/Target.td | 5 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 4 + llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp | 9 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 47 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 6 + llvm/lib/CodeGen/MachineScheduler.cpp | 2 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 104 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 +- .../DebugInfo/CodeView/SimpleTypeSerializer.cpp | 11 + llvm/lib/IR/Instructions.cpp | 6 + llvm/lib/IR/SafepointIRVerifier.cpp | 1 + llvm/lib/Support/FileCheck.cpp | 197 ++- llvm/lib/Support/FileCheckImpl.h | 168 ++- llvm/lib/Support/Unix/Memory.inc | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 48 - llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 10 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 53 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 312 +++-- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 15 + llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 138 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 2 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 7 + .../PowerPC/Disassembler/PPCDisassembler.cpp | 34 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 2 + .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 2 +- .../Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h | 2 +- llvm/lib/Target/PowerPC/PPC.td | 7 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 24 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 123 ++ llvm/lib/Target/PowerPC/PPCScheduleP9.td | 6 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt | 1 + llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h | 30 + llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 97 ++ llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h | 82 ++ llvm/lib/Target/VE/VEISelDAGToDAG.cpp | 36 + llvm/lib/Target/VE/VEISelLowering.cpp | 70 +- llvm/lib/Target/VE/VEISelLowering.h | 15 + llvm/lib/Target/VE/VEInstrInfo.td | 104 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 7 +- llvm/lib/Target/WebAssembly/WebAssembly.td | 7 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 4 + llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h | 2 + llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 79 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 41 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 61 +- .../Instrumentation/PGOInstrumentation.cpp | 47 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 53 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/atomics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/intrinsics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/kernel-args.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.atomic.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.atomic.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/loads.ll | 2 +- .../AMDGPU/no-return-blocks.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/phi-undef.ll | 2 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../AMDGPU/workitem-intrinsics.ll | 2 +- .../AArch64/patchable-function-entry-empty.mir | 64 + .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 10 +- .../GlobalISel/inst-select-atomicrmw-add-flat.mir | 707 ++++++++++ .../inst-select-atomicrmw-add-global.mir | 785 +++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll | 82 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir | 3 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 4 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 13 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 24 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 15 +- llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll | 4 +- llvm/test/CodeGen/AMDGPU/ds_write2st64.ll | 4 +- llvm/test/CodeGen/AMDGPU/global-saddr.ll | 2 +- llvm/test/CodeGen/AMDGPU/half.ll | 2 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 20 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 48 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot8u.ll | 86 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 30 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 64 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll | 36 + llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 10 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 2 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 6 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 18 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 24 + llvm/test/CodeGen/AMDGPU/merge-store-crash.ll | 6 +- llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir | 120 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 114 ++ .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 4 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 5 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 12 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 135 +- llvm/test/CodeGen/AMDGPU/shl.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 8 +- .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 10 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 2 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 2 +- llvm/test/CodeGen/AMDGPU/v_mac_f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 152 +- llvm/test/CodeGen/ARM/vdup.ll | 8 +- llvm/test/CodeGen/ARM/vext.ll | 24 +- llvm/test/CodeGen/ARM/vpadd.ll | 18 +- llvm/test/CodeGen/ARM/vuzp.ll | 11 +- llvm/test/CodeGen/PowerPC/future-check-features.ll | 19 + llvm/test/CodeGen/Thumb2/mve-vaddv.ll | 76 +- llvm/test/CodeGen/VE/load.ll | 193 +++ llvm/test/CodeGen/VE/load_gv.ll | 86 ++ llvm/test/CodeGen/VE/store.ll | 160 +++ llvm/test/CodeGen/VE/store_gv.ll | 87 ++ llvm/test/CodeGen/WebAssembly/reference-types.ll | 14 + llvm/test/CodeGen/WebAssembly/target-features.ll | 35 +- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-ext.mir | 29 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 4 +- .../CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 18 +- .../CodeGen/X86/GlobalISel/x86_64-select-zext.mir | 6 +- llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll | 78 ++ llvm/test/CodeGen/X86/insertelement-duplicates.ll | 20 +- llvm/test/CodeGen/X86/sse41.ll | 10 +- .../AArch64/unretained-declaration-subprogram.ll | 44 - .../MIR/AArch64/dbgcall-site-orr-moves.mir | 6 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 18 +- .../MIR/X86/entry-value-of-modified-param.mir | 1 - .../livedebugvalues-ignores-metaInstructions.mir | 64 + .../DebugInfo/X86/lto-cross-cu-call-origin-ref.ll | 211 --- llvm/test/FileCheck/line-count.txt | 23 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 16 +- llvm/test/FileCheck/numeric-defines.txt | 81 +- llvm/test/FileCheck/numeric-expression.txt | 215 ++- llvm/test/FileCheck/string-defines-diagnostics.txt | 8 +- llvm/test/Instrumentation/MemorySanitizer/clmul.ll | 72 + .../MC/Disassembler/PowerPC/future-invalid.txt | 5 + llvm/test/MC/Disassembler/PowerPC/futureinsts.txt | 9 + llvm/test/MC/PowerPC/future.s | 27 + llvm/test/TableGen/GlobalISelEmitterSubreg.td | 47 + .../Transforms/LoopVectorize/ARM/mve-reduce.ll | 62 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 73 + .../PGOProfile/indirect_call_profile_funclet.ll | 68 + .../Transforms/PGOProfile/memop_profile_funclet.ll | 73 + .../tools/llvm-objcopy/COFF/set-section-flags.test | 82 ++ .../llvm-readobj/ELF/reloc-types-elf-ppc64.test | 3 + llvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp | 52 +- llvm/unittests/CodeGen/GlobalISel/GISelMITest.h | 3 + .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 104 ++ .../DebugInfo/CodeView/RandomAccessVisitorTest.cpp | 1 + llvm/unittests/Support/BinaryStreamTest.cpp | 1 + llvm/unittests/Support/FileCheckTest.cpp | 438 +++++- llvm/utils/TableGen/CodeGenRegisters.cpp | 10 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 129 +- .../clang-tools-extra/clang-tidy/tool/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + .../compiler-rt/lib/sanitizer_common/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/Dialect/VectorOps/VectorOps.h | 11 + mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 132 ++ .../VectorOps/vector-slices-transforms.mlir | 63 + mlir/test/lib/Transforms/TestVectorTransforms.cpp | 15 + 367 files changed, 13173 insertions(+), 3794 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyMain.h create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyToolMain.cpp create mode 100644 clang/include/clang/AST/ParentMapContext.h create mode 100644 clang/lib/AST/ParentMapContext.cpp create mode 100644 clang/lib/Sema/SemaAvailability.cpp create mode 100644 clang/test/Lexer/Inputs/inc1.h create mode 100644 clang/test/Lexer/Inputs/inc2.h create mode 100644 clang/test/Lexer/SourceLocationsOverflow.c create mode 100644 compiler-rt/lib/gwp_asan/tests/enable_disable.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_procmaps_fuchsia.cpp rename libc/{src/unistd => config/linux}/syscall.h.def (100%) copy libc/src/sys/mman/{ => linux}/CMakeLists.txt (63%) rename libc/src/sys/mman/{ => linux}/mmap.cpp (79%) rename libc/src/sys/mman/{ => linux}/munmap.cpp (81%) delete mode 100644 libc/src/unistd/CMakeLists.txt copy libc/test/src/sys/mman/{ => linux}/CMakeLists.txt (100%) rename libc/test/src/sys/mman/{ => linux}/mmap_test.cpp (100%) create mode 100644 lld/test/ELF/ppc-reloc-copy.s create mode 100644 llvm/include/llvm/Support/AllocatorBase.h create mode 100644 llvm/lib/Target/AMDGPU/SIPostRABundler.cpp create mode 100644 llvm/lib/Target/PowerPC/PPCInstrPrefix.td create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h copy llvm/test/Analysis/{LegacyDivergenceAnalysis => DivergenceAnalysis}/AMDGPU/un [...] create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-g [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir create mode 100644 llvm/test/CodeGen/PowerPC/future-check-features.ll create mode 100644 llvm/test/CodeGen/VE/load.ll create mode 100644 llvm/test/CodeGen/VE/load_gv.ll create mode 100644 llvm/test/CodeGen/VE/store.ll create mode 100644 llvm/test/CodeGen/VE/store_gv.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reference-types.ll delete mode 100644 llvm/test/DebugInfo/AArch64/unretained-declaration-subprogram.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstruc [...] delete mode 100644 llvm/test/DebugInfo/X86/lto-cross-cu-call-origin-ref.ll create mode 100644 llvm/test/Instrumentation/MemorySanitizer/clmul.ll create mode 100644 llvm/test/MC/Disassembler/PowerPC/future-invalid.txt create mode 100644 llvm/test/MC/Disassembler/PowerPC/futureinsts.txt create mode 100644 llvm/test/MC/PowerPC/future.s create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-reduce.ll create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll create mode 100644 llvm/test/Transforms/PGOProfile/indirect_call_profile_funclet.ll create mode 100644 llvm/test/Transforms/PGOProfile/memop_profile_funclet.ll create mode 100644 llvm/test/tools/llvm-objcopy/COFF/set-section-flags.test create mode 100644 mlir/test/Dialect/VectorOps/vector-slices-transforms.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (6d509d7b -> b7fe8a99)

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5 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (a1f6eff20e3 -> 53d172975f2)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/gcc. from a1f6eff20e3 Remove bogus __has_include controlling macro adds ba386bea111 libgo: handle --with-toolexeclibdir=. adds 612137e1710 contrib: Change 'remote' for personal branches and add bran [...] adds f4d4a40698c Fix ICE on unsupported FP comparison adds e6e5cd2fd70 Add PR markers for yesterday's H8 changes adds 64c9f2d9972 Emit reasonable diagnostic rather than ICE on invalid ASM o [...] adds 482eeff5f11 libstdc++: Simplify construction of comparison category types adds 6ad405c430f Add missing ChangeLog entry. adds 28a5d5c3650 c++: Unshare expressions from constexpr cache. adds 7c75a2a3bfd Add -fdelete-null-pointer-checks to some C++ testcases. adds d54a86cd928 c++: Fix ICE in tsubst_copy with parenthesized expression [ [...] adds 6ccc19bd4d1 Decrease cortexa57_extra_costs's alu.shift_reg adds 14e5881e377 simplify-rtx: Punt for modes with precision above MAX_BITSI [...] adds 5d782a8d909 i386: prefer vpermilpd over vpermpd [PR93395] adds 55dd44535d2 c++: Fix parameter map handling of member typedef. adds 98181563dc4 Fix ICE due to invalid jump threading request adds c671727004b Daily bump. adds 8b91e848130 c++: Fix ICE with lambda in member operator (PR93279) adds 9c1179c339e c++: Fix ICE with constrained friend (PR93400). adds 53d172975f2 Fix gcc.target/aarch64/vec_zeroextend.c for big-endian No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 7 + contrib/gcc-git-customization.sh | 37 +- contrib/git-add-user-branch.sh | 46 ++ gcc/ChangeLog | 54 +++ gcc/DATESTAMP | 2 +- gcc/config/arm/aarch-cost-tables.h | 2 +- gcc/config/gcn/gcn-valu.md | 24 +- gcc/config/h8300/h8300.c | 24 +- gcc/config/i386/sse.md | 312 +++++++------- gcc/cp/ChangeLog | 31 ++ gcc/cp/constexpr.c | 2 +- gcc/cp/constraint.cc | 23 + gcc/cp/cp-tree.h | 1 + gcc/cp/decl.c | 2 + gcc/cp/name-lookup.c | 6 + gcc/cp/pt.c | 59 ++- gcc/go/gofrontend/MERGE | 2 +- gcc/simplify-rtx.c | 9 +- gcc/testsuite/ChangeLog | 50 +++ gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C | 1 + gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C | 1 + .../g++.dg/cpp0x/lambda/lambda-template16.C | 15 + gcc/testsuite/g++.dg/cpp0x/nontype4.C | 1 + gcc/testsuite/g++.dg/cpp1y/constexpr-new.C | 1 + gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C | 12 + gcc/testsuite/g++.dg/cpp1y/new1.C | 1 + gcc/testsuite/g++.dg/cpp1y/new2.C | 1 + gcc/testsuite/g++.dg/cpp1y/paren5.C | 12 + gcc/testsuite/g++.dg/cpp1z/decomp48.C | 8 +- gcc/testsuite/g++.dg/cpp2a/concepts-alias5.C | 62 +++ gcc/testsuite/g++.dg/cpp2a/concepts-friend3.C | 3 + gcc/testsuite/g++.dg/cpp2a/concepts-friend5.C | 8 + gcc/testsuite/g++.dg/cpp2a/concepts-pr84140.C | 5 +- gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic17.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new1.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new10.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new2.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new3.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new4.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new8.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new9.C | 1 + gcc/testsuite/g++.dg/cpp2a/nontype-class1.C | 1 + gcc/testsuite/g++.dg/pr92788.C | 470 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/vec_zeroextend.c | 8 +- gcc/testsuite/gcc.target/h8300/pr13721.c | 71 ++++ .../gcc.target/i386/avx512vl-vpermilpdi-1.c | 4 +- gcc/testsuite/gcc.target/i386/pr93395.c | 44 ++ gcc/tree-ssa-threadedge.c | 2 +- libgo/Makefile.in | 1 + libgo/aclocal.m4 | 1 + libgo/configure | 33 +- libgo/configure.ac | 11 +- libgo/testsuite/Makefile.in | 1 + libstdc++-v3/ChangeLog | 10 + libstdc++-v3/libsupc++/compare | 39 +- 57 files changed, 1268 insertions(+), 262 deletions(-) create mode 100755 contrib/git-add-user-branch.sh create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-template16.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/paren5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-alias5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-friend5.C create mode 100644 gcc/testsuite/g++.dg/pr92788.C create mode 100644 gcc/testsuite/gcc.target/h8300/pr13721.c create mode 100644 gcc/testsuite/gcc.target/i386/pr93395.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (42cd72aa02 -> e47e48f6a7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/binutils-gdb. from 42cd72aa02 gdbserver: Make `make TAGS' actually work adds caa31cfad6 Fix an illegal call to free() when copying a PE format file. adds 43198d2089 Support the NetBSD version of pthread_setname_np adds 73685c7ede Define _KERNTYPES in arm-nbsd-nat.c adds 3050c6f4bc Make the class name in the definition match the declaration adds bdaed379e9 Add install-strip target to gdbserver adds 53af73bf5e Fix re-runs of a second inferior (PR gdb/25410) adds b5f998b2dd RISC-V: Minor cleanup for s extension support. adds 94a72be708 gdb: Include end of sequence markers in the line table adds 3d92a3e313 gdb: Don't reorder line table entries too much when sorting. adds 7ffa82e122 gdb: Better frame tracking for inline frames adds e53c0f75bd Automatic date update in version.in adds a2fedca99c Implement 'set/show exec-file-mismatch'. adds b1468492c6 Test 'set exec-file-mismatch ask|warn|off'. adds e47e48f6a7 Document 'set|show exec-file-mismatch (ask|warn|off)' No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 13 + bfd/coffgen.c | 6 +- bfd/elfxx-riscv.c | 8 +- bfd/version.h | 2 +- gdb/ChangeLog | 72 ++++ gdb/NEWS | 13 + gdb/arm-nbsd-nat.c | 6 +- gdb/buildsym.c | 40 +-- gdb/doc/ChangeLog | 6 + gdb/doc/gdb.texinfo | 30 ++ gdb/dwarf2read.c | 8 +- gdb/exec.c | 150 +++++++- gdb/frame.c | 9 +- gdb/gdbcore.h | 5 + gdb/gdbserver/ChangeLog | 8 + gdb/gdbserver/Makefile.in | 10 + gdb/gdbserver/aclocal.m4 | 101 ++++++ gdb/gdbserver/configure | 117 ++++++- gdb/gdbserver/configure.ac | 1 + gdb/infcmd.c | 3 + gdb/infrun.c | 16 +- gdb/inline-frame.c | 30 +- gdb/remote.c | 3 + gdb/symmisc.c | 8 +- gdb/symtab.c | 7 +- gdb/testsuite/ChangeLog | 26 ++ gdb/testsuite/gdb.base/attach.c | 1 + gdb/testsuite/gdb.base/attach.exp | 84 ++++- gdb/testsuite/gdb.base/attach2.c | 1 + gdb/testsuite/gdb.base/maint.exp | 20 +- gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c | 158 +++++++++ .../gdb.dwarf2/dw2-inline-many-frames.exp | 379 +++++++++++++++++++++ gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c | 45 +++ gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp | 146 ++++++++ gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 22 ++ gdb/testsuite/gdb.multi/multi-re-run-1.c | 61 ++++ gdb/testsuite/gdb.multi/multi-re-run-2.c | 61 ++++ gdb/testsuite/gdb.multi/multi-re-run.exp | 115 +++++++ gdb/thread.c | 5 +- gdbsupport/ChangeLog | 5 + gdbsupport/thread-pool.c | 12 +- 41 files changed, 1720 insertions(+), 93 deletions(-) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.exp create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-1.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-2.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (7221222f -> 93fc1600)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 7221222f 0: update: binutils-gcc-linux: all new 93fc1600 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7221222f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 423 +- 03-build_abe-binutils/console.log | 11333 +++++++------ 04-build_abe-stage1/console.log | 19697 +++++++++++----------- 05-build_linux/console.log | 698 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 32328 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 32313 insertions(+), 32352 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

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Tcwg-commits January 2020