Tcwg-commits January 2020

tcwg-commits@lists.linaro.org

5 participants
12654 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (1b996faa157 -> cb297050bb0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/llvm-project. from 1b996faa157 [clangd][Hover] Change arrow in return type back to → adds 06ae3748db8 [lldb][NFC] Cleanup some if conditions in ASTImporterDelega [...] adds 5cee34013cf [PowerPC][Future] Add prefixed instruction paddi to future CPU adds 0a002f679be [Sema] Try 2: Sanity-check alignment requested via `__attri [...] adds 8e96697c7df FileCheck [9/12]: Add support for matching formats adds 08ebd8c79e4 [VE] aligned load/store isel patterns adds 1d0972ff5ea [Sema] Introduce MaximumAlignment value, to be used instead [...] adds 6ef1ccecf7a [clangd] Rename DiagnosticsConsumer -> ClangdServer::Callba [...] adds 76fa5d50f3d [clangd] Remove pesky ;. NFC adds f69eba07726 [llvm-objcopy][COFF] Add support for --set-section-flags adds a8c3608a27a [Sema] Provide declarations for MaximumAlignment, MaxAlignm [...] adds 3fd5d1c6e7d [X86][SSE] combineTargetShuffle - permilps(shufps(load(),x) [...] adds 80fd37f9d66 [analyzer] PthreadLock: Fix return value modeling for XNU l [...] adds 15624a7bda9 [analyzer] PthreadLock: Add more XNU rwlock unlock functions. adds 152bc7ffdcd [analyzer] NFC: PthreadLock: Use CallDescriptionMap, modernize. adds dd22be1e3d9 [analyzer] PthreadLock: Implement mutex escaping. adds 1484d0f12ad [analyzer] PthreadLock: Implement dead region cleanup. adds f5147765ba1 [DebugInfo][LiveDebugValues] Teach Live Debug Values About [...] adds 0fca35c652f [VE] global variable isel patterns adds f1dab29908d [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY adds b535aa405a0 [ARM] Use reduction intrinsics for larger than legal reductions adds 0d61cd25a69 Verify that clang's max alignment is <= LLVM's max alignment adds 50a3ff30e15 [PatchableFunction] Allow empty entry MachineBasicBlock adds a33accde954 [PGO] Early detection regarding whether pgo counter promoti [...] adds 0d90d2457c3 [LoopStrengthReduce] Teach LoopStrengthReduce to preserve M [...] adds abd1927d446 Fix some comment typos. NFC. adds 5dda92fcb0c Add test for spaceship operator to __config adds 37aa16ebb71 [DA] Don't propagate from unreachable blocks adds c5bd3d07262 Support Swift calling convention for WebAssembly targets adds c2266463377 Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI adds 7a94d4f4ee4 Allow combining of extract_subvector to extract element adds 44b865fa7fe [AMDGPU] Allow narrowing muti-dword loads adds b35b7da4608 [PGO] Attach appropriate funclet operand bundles to value p [...] adds 555d8f4ef5e [AMDGPU] Bundle loads before post-RA scheduler adds 698d1cd3b81 Make address-space-lambda.cl pass on 32-bit Windows adds 6530136fe3f [gn build] Port 555d8f4ef5e adds 58592f6c492 Include <cstdlib> for std::abort() in clangd adds a107f864176 [GlobalsAA] Add back a check to intrinsic_addresstaken.ll t [...] adds 4fdae24733d AMDGPU/GlobalISel: Add selection tests for G_ATOMICRMW_ADD adds 84e035d8f1d AMDGPU: Don't check constant address space for atomic stores adds d8328c0b624 TableGen: Work around assert on Mips register definitions adds 9c346464c15 TableGen/GlobalISel: Handle non-leaf EXTRACT_SUBREG adds be8e38cbd97 Correct NumLoads in clustering adds 3f8b100e94b [clang-tidy] Add library for clang-tidy main function adds 36b887ed15a [gn build] Port 3f8b100e94b adds 87c46a31297 AMDGPU: Don't error on ds.ordered intrinsic in function adds 3b93945587a AMDGPU/GlobalISel: Select wqm, softwqm and wwm intrinsics adds b1f3a0f972f Revert a107f86 "[GlobalsAA] Add back a check to intrinsic_a [...] adds 8a81daaa8b5 [AST] Split parent map traversal logic into ParentMapContext.h adds da8bada9383 [gn build] Port 8a81daaa8b5 adds 596d06145a2 [GWP-ASan] enable/disable and fork support. adds 9fa0f236d50 [PATCH] [Target] Test commit adds 118efa5cda8 [LLDB][NFC] Adding clarifying comment in SymbolFileDWARFDeb [...] adds d3bf06bc81e [DAGCombiner] Add combine for (not (strict_fsetcc)) to crea [...] adds 764f4089e89 [WebAssembly] Add reference types target feature adds 65eb11306e9 [WebAssembly] Update bleeding-edge CPU features adds 1df8549b268 [msan] Instrument x86.pclmulqdq* intrinsics. adds 70cbf8c71c5 [X86] Make `llc --help` output readable again adds 2c1decc040d [X86] Break the loop in LowerReturn into 2 loops. NFCI adds 1e487e4c168 clang: Only define OBJC_NEW_PROPERTIES when -x objective-c adds daee63f9741 [SelectionDag] Updated FoldConstantArithmetic method signat [...] adds e1440f594c1 [GWP-ASan] Add names to anonymous mappings. adds 9902c8e3c66 [lldb/debugserver] Unify the breakpoint/watchpoint interfac [...] adds 96f3ea0d21b [lldb/debugserver] Implement hardware breakpoints for x86_6 [...] adds ec62bf2fd32 [libc] Move the implementation of mmap and munmap into a li [...] adds bce360b7048 Detect source location overflow due includes adds 632ba9fcb52 [codeview] Prune SimpleTypeSerializer.h headers, NFC adds e3a7c7713cd [lldb/Lit] Change the lldbtest format to behave more like s [...] adds 303fddeeab1 [mlir] [VectorOps] Rewriting of vector.extract/insert_slice [...] adds 81b700e302b [sanitizer_common] Implement MemoryMappingLayout for Fuchsia adds 5d87b5d2029 [GISelKnownBits] Add support for PHIs adds aae707cd881 [lsan] Expose Frontier object to OS-specific LockStuffAndSt [...] adds 38fd1806a16 [lsan] Factor pthread-specific assumptions out of thread tr [...] adds 3da47749ddd [IR] Move CallBase::getOperandBundlesAsDefs out of line, NFC adds 0697bcb66f1 [Support] Split MallocAllocator out of Allocator.h adds dd8e0a0a23b [Sema] Split availability processing into SemaAvailability.cpp adds de863bcc6c8 [Support] Fix up header comments after splitting Allocator.h, NFC adds 0ebc8e6c421 [Sema] Remove unneeded TreeTransform.h includes, NFC adds 802bec89617 Revert "Reland: [DWARF] Allow cross-CU references of subpro [...] adds 9f69157bf4a Fix header includes after 0697bcb66f1d82f2fd447e9d13b74d141c3ce085 adds 8d35c798f19 [gn build] (manually) merge 81b700e302b1 adds ef7f3af760e [gn build] Port dd8e0a0a23b adds 04f131da0b1 DR1753: Don't permit x.NS::~T() as a pseudo-destructor name. adds c48974ffd7d [libunwind] Set LIBUNWIND_ASM_SOURCES to the ASM source lan [...] adds 2bc38ab3d03 [lldb/Breakpoint] Recogize hardware breakpoints as such adds d8e0f4fae7a [lldb/Breakpoint] Include whether or not a breakpoint is a HW BP adds 86c944d7907 AMDGPU/SILoadStoreOptimizer: Improve merging of out of orde [...] adds fe9765762ce AMDGPU: Generate test checks adds 1ed561aa4bd [lldb/Test] Update minidebuginfo-set-and-hit-breakpoint.test adds 1c90ce0c761 [lldb/Test] Disable hardware check on arm/aarch64 adds cb297050bb0 AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 4 +- .../readability/MakeMemberFunctionConstCheck.cpp | 3 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 19 +- .../clang-tidy/tool/ClangTidyMain.cpp | 7 +- clang-tools-extra/clang-tidy/tool/ClangTidyMain.h | 23 + .../clang-tidy/tool/ClangTidyToolMain.cpp | 21 + .../clang-tidy/utils/ExprSequence.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdLSPServer.h | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 41 +- clang-tools-extra/clangd/ClangdServer.h | 63 +- clang-tools-extra/clangd/Shutdown.cpp | 1 + clang-tools-extra/clangd/unittests/ClangdTests.cpp | 76 +- .../clangd/unittests/CodeCompleteTests.cpp | 62 +- .../clangd/unittests/FindSymbolsTests.cpp | 13 +- .../clangd/unittests/HeaderSourceSwitchTests.cpp | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 6 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 9 +- .../clangd/unittests/SemanticSelectionTests.cpp | 8 +- .../clangd/unittests/TUSchedulerTests.cpp | 4 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 14 +- clang/include/clang/AST/ASTContext.h | 112 +- clang/include/clang/AST/ASTNodeTraverser.h | 1 + clang/include/clang/AST/ParentMapContext.h | 150 ++ clang/include/clang/ASTMatchers/ASTMatchers.h | 1 + clang/include/clang/Basic/DiagnosticCommonKinds.td | 3 + clang/include/clang/Lex/Preprocessor.h | 4 +- clang/include/clang/Sema/Sema.h | 13 + clang/lib/AST/ASTContext.cpp | 248 +--- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Linkage.h | 1 + clang/lib/AST/ParentMapContext.cpp | 265 ++++ clang/lib/ASTMatchers/ASTMatchFinder.cpp | 15 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 7 +- clang/lib/Basic/SourceManager.cpp | 10 +- clang/lib/Basic/Targets/OSTargets.cpp | 2 +- clang/lib/Basic/Targets/WebAssembly.cpp | 15 + clang/lib/Basic/Targets/WebAssembly.h | 11 + clang/lib/CodeGen/CGCall.h | 1 + clang/lib/CodeGen/CGValue.h | 4 + clang/lib/Lex/PPDirectives.cpp | 12 +- clang/lib/Lex/Preprocessor.cpp | 10 + clang/lib/Parse/ParseExprCXX.cpp | 55 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/Sema.cpp | 3 + clang/lib/Sema/SemaAvailability.cpp | 963 +++++++++++++ clang/lib/Sema/SemaChecking.cpp | 12 +- clang/lib/Sema/SemaDecl.cpp | 1 - clang/lib/Sema/SemaDeclAttr.cpp | 957 +------------ clang/lib/Sema/SemaType.cpp | 1 - .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 382 +++-- clang/lib/Tooling/ASTDiff/ASTDiff.cpp | 1 + .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 1 + .../system-header-simulator-for-pthread-lock.h | 20 +- clang/test/Analysis/pthreadlock.c | 42 + clang/test/CXX/drs/dr17xx.cpp | 30 +- clang/test/CXX/drs/dr6xx.cpp | 6 +- clang/test/Lexer/Inputs/inc1.h | 1470 ++++++++++++++++++++ clang/test/Lexer/Inputs/inc2.h | 1000 +++++++++++++ clang/test/Lexer/SourceLocationsOverflow.c | 25 + clang/test/Preprocessor/init.c | 2 + clang/test/Preprocessor/wasm-target-features.c | 15 +- clang/test/Sema/attr-aligned.c | 5 +- clang/test/Sema/builtin-assume-aligned.c | 1 + clang/test/SemaCXX/pseudo-destructors.cpp | 12 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 12 +- clang/www/cxx_dr_status.html | 2 +- .../lib/gwp_asan/guarded_pool_allocator.cpp | 54 +- compiler-rt/lib/gwp_asan/guarded_pool_allocator.h | 44 +- compiler-rt/lib/gwp_asan/options.inc | 4 + .../guarded_pool_allocator_posix.cpp | 62 +- compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 4 +- compiler-rt/lib/gwp_asan/tests/enable_disable.cpp | 86 ++ compiler-rt/lib/gwp_asan/tests/harness.cpp | 10 + compiler-rt/lib/gwp_asan/tests/harness.h | 17 +- compiler-rt/lib/lsan/CMakeLists.txt | 3 +- compiler-rt/lib/lsan/lsan.cpp | 5 +- compiler-rt/lib/lsan/lsan.h | 3 + compiler-rt/lib/lsan/lsan_common.cpp | 32 +- compiler-rt/lib/lsan/lsan_common.h | 14 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 3 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 3 +- compiler-rt/lib/lsan/lsan_interceptors.cpp | 3 +- compiler-rt/lib/lsan/lsan_posix.cpp | 85 ++ compiler-rt/lib/lsan/lsan_posix.h | 49 + compiler-rt/lib/lsan/lsan_thread.cpp | 98 +- compiler-rt/lib/lsan/lsan_thread.h | 35 +- compiler-rt/lib/sanitizer_common/CMakeLists.txt | 1 + .../lib/sanitizer_common/sanitizer_fuchsia.h | 6 + .../lib/sanitizer_common/sanitizer_procmaps.h | 7 +- .../sanitizer_procmaps_fuchsia.cpp | 80 ++ compiler-rt/lib/scudo/standalone/CMakeLists.txt | 5 +- compiler-rt/lib/scudo/standalone/combined.h | 27 +- .../lib/scudo/standalone/tests/CMakeLists.txt | 5 +- .../lib/scudo/standalone/tests/combined_test.cpp | 12 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 1 + libc/config/linux/CMakeLists.txt | 10 + libc/config/linux/platfrom_defs.h.inc | 6 - libc/{src/unistd => config/linux}/syscall.h.def | 0 libc/include/CMakeLists.txt | 1 + libc/src/CMakeLists.txt | 1 - libc/src/sys/mman/CMakeLists.txt | 30 +- libc/src/sys/mman/{ => linux}/CMakeLists.txt | 10 +- libc/src/sys/mman/{ => linux}/mmap.cpp | 17 +- libc/src/sys/mman/{ => linux}/munmap.cpp | 7 +- libc/src/unistd/CMakeLists.txt | 9 - libc/test/config/linux/x86_64/CMakeLists.txt | 2 +- libc/test/config/linux/x86_64/syscall_test.cpp | 2 +- libc/test/src/sys/mman/CMakeLists.txt | 18 +- libc/test/src/sys/mman/{ => linux}/CMakeLists.txt | 0 libc/test/src/sys/mman/{ => linux}/mmap_test.cpp | 0 libcxx/include/__config | 5 +- libunwind/src/CMakeLists.txt | 3 - lld/ELF/Arch/PPC.cpp | 1 + lld/ELF/Arch/PPC64.cpp | 1 + lld/test/ELF/ppc-reloc-copy.s | 29 + lldb/include/lldb/Breakpoint/BreakpointSite.h | 2 + lldb/include/lldb/Breakpoint/StoppointLocation.h | 2 +- lldb/include/lldb/Symbol/TypeSystemClang.h | 1 + .../TestHWBreakMultiThread.py | 45 +- lldb/source/Breakpoint/BreakpointLocation.cpp | 7 +- lldb/source/Breakpoint/BreakpointSite.cpp | 7 + .../Process/Utility/StopInfoMachException.cpp | 59 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 3 + lldb/source/Symbol/ClangASTImporter.cpp | 22 +- lldb/test/API/lldbtest.py | 31 +- .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 10 +- lldb/tools/debugserver/source/DNBArch.h | 8 +- .../tools/debugserver/source/MacOSX/MachThread.cpp | 18 +- lldb/tools/debugserver/source/MacOSX/MachThread.h | 6 +- .../debugserver/source/MacOSX/MachThreadList.cpp | 46 +- .../debugserver/source/MacOSX/MachThreadList.h | 4 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.cpp | 6 +- .../debugserver/source/MacOSX/arm/DNBArchImpl.h | 6 +- .../source/MacOSX/i386/DNBArchImplI386.cpp | 150 ++ .../source/MacOSX/i386/DNBArchImplI386.h | 8 + .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 153 ++ .../source/MacOSX/x86_64/DNBArchImplX86_64.h | 9 + lldb/tools/debugserver/source/RNBRemote.cpp | 10 +- llvm/docs/CommandGuide/FileCheck.rst | 71 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 61 +- llvm/include/llvm/ADT/ScopedHashTable.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 3 +- llvm/include/llvm/ADT/StringSet.h | 2 +- .../llvm/Analysis/LegacyDivergenceAnalysis.h | 3 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 6 + .../llvm/Analysis/TargetTransformInfoImpl.h | 2 + .../llvm/BinaryFormat/ELFRelocs/PowerPC64.def | 2 + llvm/include/llvm/BinaryFormat/MachO.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 2 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 7 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 15 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 4 + .../DebugInfo/CodeView/ContinuationRecordBuilder.h | 1 - .../llvm/DebugInfo/CodeView/SimpleTypeSerializer.h | 16 +- .../llvm/DebugInfo/PDB/Native/SymbolCache.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 5 +- llvm/include/llvm/Object/IRSymtab.h | 1 + llvm/include/llvm/ProfileData/SampleProf.h | 1 + llvm/include/llvm/Remarks/RemarkStringTable.h | 1 + llvm/include/llvm/Support/Allocator.h | 87 +- llvm/include/llvm/Support/AllocatorBase.h | 104 ++ llvm/include/llvm/Support/BinaryStreamArray.h | 1 + llvm/include/llvm/Support/BinaryStreamReader.h | 1 + llvm/include/llvm/Support/Process.h | 2 +- llvm/include/llvm/Target/Target.td | 5 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 4 + llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp | 9 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 24 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 47 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 6 + llvm/lib/CodeGen/MachineScheduler.cpp | 2 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 104 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 +- .../DebugInfo/CodeView/SimpleTypeSerializer.cpp | 11 + llvm/lib/IR/Instructions.cpp | 6 + llvm/lib/IR/SafepointIRVerifier.cpp | 1 + llvm/lib/Support/FileCheck.cpp | 197 ++- llvm/lib/Support/FileCheckImpl.h | 168 ++- llvm/lib/Support/Unix/Memory.inc | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 30 + llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 48 - llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 10 + llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 53 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 312 +++-- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 15 + llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 138 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 2 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 7 + .../PowerPC/Disassembler/PPCDisassembler.cpp | 34 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 2 + .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 2 +- .../Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h | 2 +- llvm/lib/Target/PowerPC/PPC.td | 7 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrFormats.td | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.h | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 24 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 123 ++ llvm/lib/Target/PowerPC/PPCScheduleP9.td | 6 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt | 1 + llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h | 30 + llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp | 97 ++ llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h | 82 ++ llvm/lib/Target/VE/VEISelDAGToDAG.cpp | 36 + llvm/lib/Target/VE/VEISelLowering.cpp | 70 +- llvm/lib/Target/VE/VEISelLowering.h | 15 + llvm/lib/Target/VE/VEInstrInfo.td | 104 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 7 +- llvm/lib/Target/WebAssembly/WebAssembly.td | 7 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 4 + llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h | 2 + llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 79 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 41 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 61 +- .../Instrumentation/PGOInstrumentation.cpp | 47 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 53 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/atomics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/intrinsics.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/kernel-args.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.atomic.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.atomic.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/loads.ll | 2 +- .../AMDGPU/no-return-blocks.ll | 2 +- .../LegacyDivergenceAnalysis/AMDGPU/phi-undef.ll | 2 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../AMDGPU/workitem-intrinsics.ll | 2 +- .../AArch64/patchable-function-entry-empty.mir | 64 + .../CodeGen/AMDGPU/GlobalISel/insertelement.ll | 10 +- .../GlobalISel/inst-select-atomicrmw-add-flat.mir | 707 ++++++++++ .../inst-select-atomicrmw-add-global.mir | 785 +++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll | 82 ++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll | 82 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir | 3 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir | 3 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 4 +- llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 13 +- .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 2 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 24 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 15 +- llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll | 4 +- llvm/test/CodeGen/AMDGPU/ds_write2st64.ll | 4 +- llvm/test/CodeGen/AMDGPU/global-saddr.ll | 2 +- llvm/test/CodeGen/AMDGPU/half.ll | 2 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot4s.ll | 20 +- llvm/test/CodeGen/AMDGPU/idot4u.ll | 48 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 24 +- llvm/test/CodeGen/AMDGPU/idot8u.ll | 86 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 30 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 64 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll | 36 + llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 207 ++- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 10 +- llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 2 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll | 6 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 18 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 24 + llvm/test/CodeGen/AMDGPU/merge-store-crash.ll | 6 +- llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir | 120 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 114 ++ .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 4 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 5 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 12 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 135 +- llvm/test/CodeGen/AMDGPU/shl.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 8 +- .../CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 10 +- llvm/test/CodeGen/AMDGPU/sign_extend.ll | 2 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 2 +- llvm/test/CodeGen/AMDGPU/v_mac_f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 152 +- llvm/test/CodeGen/ARM/vdup.ll | 8 +- llvm/test/CodeGen/ARM/vext.ll | 24 +- llvm/test/CodeGen/ARM/vpadd.ll | 18 +- llvm/test/CodeGen/ARM/vuzp.ll | 11 +- llvm/test/CodeGen/PowerPC/future-check-features.ll | 19 + llvm/test/CodeGen/Thumb2/mve-vaddv.ll | 76 +- llvm/test/CodeGen/VE/load.ll | 193 +++ llvm/test/CodeGen/VE/load_gv.ll | 86 ++ llvm/test/CodeGen/VE/store.ll | 160 +++ llvm/test/CodeGen/VE/store_gv.ll | 87 ++ llvm/test/CodeGen/WebAssembly/reference-types.ll | 14 + llvm/test/CodeGen/WebAssembly/target-features.ll | 35 +- llvm/test/CodeGen/X86/GlobalISel/select-copy.mir | 6 +- llvm/test/CodeGen/X86/GlobalISel/select-ext.mir | 29 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 4 +- .../CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 18 +- .../CodeGen/X86/GlobalISel/x86_64-select-zext.mir | 6 +- llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll | 78 ++ llvm/test/CodeGen/X86/insertelement-duplicates.ll | 20 +- llvm/test/CodeGen/X86/sse41.ll | 10 +- .../AArch64/unretained-declaration-subprogram.ll | 44 - .../MIR/AArch64/dbgcall-site-orr-moves.mir | 6 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 18 +- .../MIR/X86/entry-value-of-modified-param.mir | 1 - .../livedebugvalues-ignores-metaInstructions.mir | 64 + .../DebugInfo/X86/lto-cross-cu-call-origin-ref.ll | 211 --- llvm/test/FileCheck/line-count.txt | 23 +- .../test/FileCheck/numeric-defines-diagnostics.txt | 16 +- llvm/test/FileCheck/numeric-defines.txt | 81 +- llvm/test/FileCheck/numeric-expression.txt | 215 ++- llvm/test/FileCheck/string-defines-diagnostics.txt | 8 +- llvm/test/Instrumentation/MemorySanitizer/clmul.ll | 72 + .../MC/Disassembler/PowerPC/future-invalid.txt | 5 + llvm/test/MC/Disassembler/PowerPC/futureinsts.txt | 9 + llvm/test/MC/PowerPC/future.s | 27 + llvm/test/TableGen/GlobalISelEmitterSubreg.td | 47 + .../Transforms/LoopVectorize/ARM/mve-reduce.ll | 62 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 73 + .../PGOProfile/indirect_call_profile_funclet.ll | 68 + .../Transforms/PGOProfile/memop_profile_funclet.ll | 73 + .../tools/llvm-objcopy/COFF/set-section-flags.test | 82 ++ .../llvm-readobj/ELF/reloc-types-elf-ppc64.test | 3 + llvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp | 52 +- llvm/unittests/CodeGen/GlobalISel/GISelMITest.h | 3 + .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 104 ++ .../DebugInfo/CodeView/RandomAccessVisitorTest.cpp | 1 + llvm/unittests/Support/BinaryStreamTest.cpp | 1 + llvm/unittests/Support/FileCheckTest.cpp | 438 +++++- llvm/utils/TableGen/CodeGenRegisters.cpp | 10 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 129 +- .../clang-tools-extra/clang-tidy/tool/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + .../compiler-rt/lib/sanitizer_common/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 1 + mlir/include/mlir/Dialect/VectorOps/VectorOps.h | 11 + mlir/lib/Dialect/VectorOps/VectorTransforms.cpp | 132 ++ .../VectorOps/vector-slices-transforms.mlir | 63 + mlir/test/lib/Transforms/TestVectorTransforms.cpp | 15 + 368 files changed, 13179 insertions(+), 3810 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyMain.h create mode 100644 clang-tools-extra/clang-tidy/tool/ClangTidyToolMain.cpp create mode 100644 clang/include/clang/AST/ParentMapContext.h create mode 100644 clang/lib/AST/ParentMapContext.cpp create mode 100644 clang/lib/Sema/SemaAvailability.cpp create mode 100644 clang/test/Lexer/Inputs/inc1.h create mode 100644 clang/test/Lexer/Inputs/inc2.h create mode 100644 clang/test/Lexer/SourceLocationsOverflow.c create mode 100644 compiler-rt/lib/gwp_asan/tests/enable_disable.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/harness.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.cpp create mode 100644 compiler-rt/lib/lsan/lsan_posix.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_procmaps_fuchsia.cpp rename libc/{src/unistd => config/linux}/syscall.h.def (100%) copy libc/src/sys/mman/{ => linux}/CMakeLists.txt (63%) rename libc/src/sys/mman/{ => linux}/mmap.cpp (79%) rename libc/src/sys/mman/{ => linux}/munmap.cpp (81%) delete mode 100644 libc/src/unistd/CMakeLists.txt copy libc/test/src/sys/mman/{ => linux}/CMakeLists.txt (100%) rename libc/test/src/sys/mman/{ => linux}/mmap_test.cpp (100%) create mode 100644 lld/test/ELF/ppc-reloc-copy.s create mode 100644 llvm/include/llvm/Support/AllocatorBase.h create mode 100644 llvm/lib/Target/AMDGPU/SIPostRABundler.cpp create mode 100644 llvm/lib/Target/PowerPC/PPCInstrPrefix.td create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEFixupKinds.h create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp create mode 100644 llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h copy llvm/test/Analysis/{LegacyDivergenceAnalysis => DivergenceAnalysis}/AMDGPU/un [...] create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-g [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll create mode 100644 llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir create mode 100644 llvm/test/CodeGen/PowerPC/future-check-features.ll create mode 100644 llvm/test/CodeGen/VE/load.ll create mode 100644 llvm/test/CodeGen/VE/load_gv.ll create mode 100644 llvm/test/CodeGen/VE/store.ll create mode 100644 llvm/test/CodeGen/VE/store_gv.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reference-types.ll delete mode 100644 llvm/test/DebugInfo/AArch64/unretained-declaration-subprogram.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/livedebugvalues-ignores-metaInstruc [...] delete mode 100644 llvm/test/DebugInfo/X86/lto-cross-cu-call-origin-ref.ll create mode 100644 llvm/test/Instrumentation/MemorySanitizer/clmul.ll create mode 100644 llvm/test/MC/Disassembler/PowerPC/future-invalid.txt create mode 100644 llvm/test/MC/Disassembler/PowerPC/futureinsts.txt create mode 100644 llvm/test/MC/PowerPC/future.s create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/mve-reduce.ll create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll create mode 100644 llvm/test/Transforms/PGOProfile/indirect_call_profile_funclet.ll create mode 100644 llvm/test/Transforms/PGOProfile/memop_profile_funclet.ll create mode 100644 llvm/test/tools/llvm-objcopy/COFF/set-section-flags.test create mode 100644 mlir/test/Dialect/VectorOps/vector-slices-transforms.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig updated (13c13142 -> 69b7c653)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 13c13142 0: update: llvm-linux: boot new 69b7c653 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (13c13142) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 132 +- 02-build_llvm/console.log | 12550 +++++++++++++++++------------------ 03-build_linux/console.log | 748 ++- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 18 +- console.log | 13461 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 13440 insertions(+), 13481 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig updated (e2bcf65feea -> 7058d1744c6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig in repository toolchain/ci/gcc. from e2bcf65feea libstdc++: Simplify makefile rule for largefile-config.h (PR91947) adds a4b7cf58658 c++: Unshare expressions from constexpr cache. adds 7058d1744c6 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 5 +++++ gcc/cp/constexpr.c | 2 +- gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C | 12 ++++++++++++ gcc/testsuite/g++.dg/cpp1z/decomp48.C | 8 ++++---- 5 files changed, 23 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig updated (d58df901 -> 616fe291)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-defconfig in repository toolchain/ci/base-artifacts. discards d58df901 0: update: binutils-gcc-linux: boot new 616fe291 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d58df901) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 184 +- 03-build_abe-binutils/console.log | 11338 ++++++------- 04-build_abe-stage1/console.log | 18197 +++++++++++---------- 05-build_linux/console.log | 700 +- 06-boot_linux/console.log | 480 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 31093 ++++++++++++++++++------------------ jenkins/manifest.sh | 10 +- 10 files changed, 31063 insertions(+), 31109 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (901a7890c0e -> 0df13627c6a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from 901a7890c0e [Concepts] Update cxx_status.html with Concepts support status adds 425d15aeb13 [ELF][PowerPC] Support R_PPC_COPY and R_PPC64_COPY adds a3db4e05e36 [lld][RISCV] Print error when encountering R_RISCV_ALIGN adds 39c349e8fc7 Add test for spaceship operator to __config adds 50627622856 [XRay] Set hasSideEffects flag of PATCHABLE_FUNCTION_{ENTER,EXIT} adds 6c1e479db22 [CodeGen] Move fentry-insert, xray-instrumentation and patc [...] adds 0e2eea29cc4 [AsmPrinter] Don't emit __patchable_function_entries entry [...] adds bf04730dee1 Add function attribute "patchable-function-prefix" to suppo [...] adds 6f4edc606b2 [X86][test] Add tests for -fpatchable-function-entry=N,M (w [...] adds 5d1fe1a1a9f [Driver][CodeGen] Support -fpatchable-function-entry=N,M an [...] adds 4d5a200f31d [PatchableFunction] Allow empty entry MachineBasicBlock adds b86c3b26acf [openmp] Disable archer if LIBOMP_OMPT_SUPPORT is off adds e9739ba8ffc Make address-space-lambda.cl pass on 32-bit Windows adds d11abddb32f [DebugInfo][test] Change two MIR tests to use -start-before [...] adds 0df13627c6a [CUDA] Fix order of memcpy arguments in __shfl_*(<64-bit type>). No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/AttrDocs.td | 2 - clang/include/clang/Basic/CodeGenOptions.def | 1 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 +- clang/include/clang/Driver/CC1Options.td | 3 + clang/include/clang/Driver/Options.td | 2 +- clang/lib/CodeGen/CodeGenFunction.cpp | 17 ++++-- clang/lib/Driver/ToolChains/Clang.cpp | 11 ++-- clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/lib/Headers/__clang_cuda_intrinsics.h | 4 +- clang/lib/Sema/SemaDeclAttr.cpp | 4 +- clang/test/CodeGen/patchable-function-entry.c | 18 ++++-- clang/test/Driver/fpatchable-function-entry.c | 8 ++- clang/test/Sema/patchable-function-entry-attr.c | 4 +- clang/test/SemaOpenCLCXX/address-space-lambda.cl | 12 ++-- libcxx/include/__config | 5 +- lld/ELF/Arch/PPC.cpp | 1 + lld/ELF/Arch/PPC64.cpp | 1 + lld/ELF/Arch/RISCV.cpp | 9 ++- lld/test/ELF/ppc-reloc-copy.s | 29 ++++++++++ lld/test/ELF/riscv-reloc-align.s | 12 ++++ .../llvm/BinaryFormat/ELFRelocs/PowerPC64.def | 2 + llvm/include/llvm/CodeGen/AsmPrinter.h | 6 ++ llvm/include/llvm/Target/Target.td | 4 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 35 ++++++++++- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +++- llvm/lib/CodeGen/TargetPassConfig.cpp | 12 ++-- llvm/lib/IR/Verifier.cpp | 21 +++++-- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 3 +- llvm/lib/Target/ARM/ARMMCInstLower.cpp | 5 +- llvm/test/CodeGen/AArch64/O0-pipeline.ll | 6 +- llvm/test/CodeGen/AArch64/O3-pipeline.ll | 6 +- .../AArch64/patchable-function-entry-bti.ll | 43 ++++++++++++++ .../AArch64/patchable-function-entry-empty.mir | 64 +++++++++++++++++++++ .../CodeGen/AArch64/patchable-function-entry.ll | 67 +++++++++++++++++++--- llvm/test/CodeGen/ARM/O3-pipeline.ll | 6 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 6 +- llvm/test/CodeGen/X86/O3-pipeline.ll | 6 +- .../CodeGen/X86/patchable-function-entry-ibt.ll | 48 ++++++++++++++++ llvm/test/CodeGen/X86/patchable-function-entry.ll | 66 +++++++++++++++++---- llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 4 +- llvm/test/DebugInfo/X86/debug-loc-asan.mir | 4 +- .../Verifier/invalid-patchable-function-entry.ll | 10 ++++ .../llvm-readobj/ELF/reloc-types-elf-ppc64.test | 3 + openmp/tools/archer/CMakeLists.txt | 16 +++--- 44 files changed, 491 insertions(+), 110 deletions(-) create mode 100644 lld/test/ELF/ppc-reloc-copy.s create mode 100644 lld/test/ELF/riscv-reloc-align.s create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll create mode 100644 llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir create mode 100644 llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (6dc94e6d -> 0cec44be)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 6dc94e6d 0: update: llvm-linux: 18068 new 0cec44be 0: update: llvm-linux: 18068 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6dc94e6d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12604 +++++++++++++++++----------------- 03-build_linux/console.log | 976 +-- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 32 - console.log | 13842 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 13815 insertions(+), 13879 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (e8e66971cdc -> 9c1179c339e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/gcc. from e8e66971cdc Add `--with-toolexeclibdir=' configuration option adds a1f6eff20e3 Remove bogus __has_include controlling macro adds ba386bea111 libgo: handle --with-toolexeclibdir=. adds 612137e1710 contrib: Change 'remote' for personal branches and add bran [...] adds f4d4a40698c Fix ICE on unsupported FP comparison adds e6e5cd2fd70 Add PR markers for yesterday's H8 changes adds 64c9f2d9972 Emit reasonable diagnostic rather than ICE on invalid ASM o [...] adds 482eeff5f11 libstdc++: Simplify construction of comparison category types adds 6ad405c430f Add missing ChangeLog entry. adds 28a5d5c3650 c++: Unshare expressions from constexpr cache. adds 7c75a2a3bfd Add -fdelete-null-pointer-checks to some C++ testcases. adds d54a86cd928 c++: Fix ICE in tsubst_copy with parenthesized expression [ [...] adds 6ccc19bd4d1 Decrease cortexa57_extra_costs's alu.shift_reg adds 14e5881e377 simplify-rtx: Punt for modes with precision above MAX_BITSI [...] adds 5d782a8d909 i386: prefer vpermilpd over vpermpd [PR93395] adds 55dd44535d2 c++: Fix parameter map handling of member typedef. adds 98181563dc4 Fix ICE due to invalid jump threading request adds c671727004b Daily bump. adds 8b91e848130 c++: Fix ICE with lambda in member operator (PR93279) adds 9c1179c339e c++: Fix ICE with constrained friend (PR93400). No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 7 + contrib/gcc-git-customization.sh | 37 +- contrib/git-add-user-branch.sh | 46 ++ gcc/ChangeLog | 54 +++ gcc/DATESTAMP | 2 +- gcc/config/arm/aarch-cost-tables.h | 2 +- gcc/config/gcn/gcn-valu.md | 24 +- gcc/config/h8300/h8300.c | 24 +- gcc/config/i386/sse.md | 312 +++++++------- gcc/cp/ChangeLog | 31 ++ gcc/cp/constexpr.c | 2 +- gcc/cp/constraint.cc | 23 + gcc/cp/cp-tree.h | 1 + gcc/cp/decl.c | 2 + gcc/cp/name-lookup.c | 6 + gcc/cp/pt.c | 59 ++- gcc/go/gofrontend/MERGE | 2 +- gcc/simplify-rtx.c | 9 +- gcc/testsuite/ChangeLog | 46 ++ gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C | 1 + gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C | 1 + .../g++.dg/cpp0x/lambda/lambda-template16.C | 15 + gcc/testsuite/g++.dg/cpp0x/nontype4.C | 1 + gcc/testsuite/g++.dg/cpp1y/constexpr-new.C | 1 + gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C | 12 + gcc/testsuite/g++.dg/cpp1y/new1.C | 1 + gcc/testsuite/g++.dg/cpp1y/new2.C | 1 + gcc/testsuite/g++.dg/cpp1y/paren5.C | 12 + gcc/testsuite/g++.dg/cpp1z/decomp48.C | 8 +- gcc/testsuite/g++.dg/cpp2a/concepts-alias5.C | 62 +++ gcc/testsuite/g++.dg/cpp2a/concepts-friend3.C | 3 + gcc/testsuite/g++.dg/cpp2a/concepts-friend5.C | 8 + gcc/testsuite/g++.dg/cpp2a/concepts-pr84140.C | 5 +- gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic17.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new1.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new10.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new2.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new3.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new4.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new8.C | 1 + gcc/testsuite/g++.dg/cpp2a/constexpr-new9.C | 1 + gcc/testsuite/g++.dg/cpp2a/nontype-class1.C | 1 + gcc/testsuite/g++.dg/pr92788.C | 470 +++++++++++++++++++++ gcc/testsuite/gcc.target/h8300/pr13721.c | 71 ++++ .../gcc.target/i386/avx512vl-vpermilpdi-1.c | 4 +- gcc/testsuite/gcc.target/i386/pr93395.c | 44 ++ gcc/tree-ssa-threadedge.c | 2 +- libcpp/ChangeLog | 4 + libcpp/expr.c | 5 - libgo/Makefile.in | 1 + libgo/aclocal.m4 | 1 + libgo/configure | 33 +- libgo/configure.ac | 11 +- libgo/testsuite/Makefile.in | 1 + libstdc++-v3/ChangeLog | 10 + libstdc++-v3/libsupc++/compare | 39 +- 58 files changed, 1262 insertions(+), 265 deletions(-) create mode 100755 contrib/git-add-user-branch.sh create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-template16.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-ref1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/paren5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-alias5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-friend5.C create mode 100644 gcc/testsuite/g++.dg/pr92788.C create mode 100644 gcc/testsuite/gcc.target/h8300/pr13721.c create mode 100644 gcc/testsuite/gcc.target/i386/pr93395.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (2f796de6da -> e47e48f6a7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 2f796de6da Fix issue with warning messages about corrupt debuginfod notes. adds 42ba50eccb gdbserver: Remove a stale TAGS recipe for config files adds 42cd72aa02 gdbserver: Make `make TAGS' actually work adds caa31cfad6 Fix an illegal call to free() when copying a PE format file. adds 43198d2089 Support the NetBSD version of pthread_setname_np adds 73685c7ede Define _KERNTYPES in arm-nbsd-nat.c adds 3050c6f4bc Make the class name in the definition match the declaration adds bdaed379e9 Add install-strip target to gdbserver adds 53af73bf5e Fix re-runs of a second inferior (PR gdb/25410) adds b5f998b2dd RISC-V: Minor cleanup for s extension support. adds 94a72be708 gdb: Include end of sequence markers in the line table adds 3d92a3e313 gdb: Don't reorder line table entries too much when sorting. adds 7ffa82e122 gdb: Better frame tracking for inline frames adds e53c0f75bd Automatic date update in version.in new a2fedca99c Implement 'set/show exec-file-mismatch'. new b1468492c6 Test 'set exec-file-mismatch ask|warn|off'. new e47e48f6a7 Document 'set|show exec-file-mismatch (ask|warn|off)' The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 13 + bfd/coffgen.c | 6 +- bfd/elfxx-riscv.c | 8 +- bfd/version.h | 2 +- gdb/ChangeLog | 72 ++++ gdb/NEWS | 13 + gdb/arm-nbsd-nat.c | 6 +- gdb/buildsym.c | 40 +-- gdb/doc/ChangeLog | 6 + gdb/doc/gdb.texinfo | 30 ++ gdb/dwarf2read.c | 8 +- gdb/exec.c | 150 +++++++- gdb/frame.c | 9 +- gdb/gdbcore.h | 5 + gdb/gdbserver/ChangeLog | 26 ++ gdb/gdbserver/Makefile.in | 50 +-- gdb/gdbserver/aclocal.m4 | 101 ++++++ gdb/gdbserver/configure | 119 ++++++- gdb/gdbserver/configure.ac | 3 +- gdb/gdbserver/configure.srv | 49 +-- gdb/infcmd.c | 3 + gdb/infrun.c | 16 +- gdb/inline-frame.c | 30 +- gdb/remote.c | 3 + gdb/symmisc.c | 8 +- gdb/symtab.c | 7 +- gdb/testsuite/ChangeLog | 26 ++ gdb/testsuite/gdb.base/attach.c | 1 + gdb/testsuite/gdb.base/attach.exp | 84 ++++- gdb/testsuite/gdb.base/attach2.c | 1 + gdb/testsuite/gdb.base/maint.exp | 20 +- gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c | 158 +++++++++ .../gdb.dwarf2/dw2-inline-many-frames.exp | 379 +++++++++++++++++++++ gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c | 45 +++ gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp | 146 ++++++++ gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 22 ++ gdb/testsuite/gdb.multi/multi-re-run-1.c | 61 ++++ gdb/testsuite/gdb.multi/multi-re-run-2.c | 61 ++++ gdb/testsuite/gdb.multi/multi-re-run.exp | 115 +++++++ gdb/thread.c | 5 +- gdbsupport/ChangeLog | 5 + gdbsupport/thread-pool.c | 12 +- 42 files changed, 1790 insertions(+), 134 deletions(-) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.exp create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-1.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-2.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (88d73a91 -> 4cda9768)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 88d73a91 0: update: binutils-gcc-linux: all new 4cda9768 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (88d73a91) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 76 +- 02-prepare_abe/console.log | 404 +- 03-build_abe-binutils/console.log | 11422 +++++------ 04-build_abe-stage1/console.log | 20303 ++++++++++--------- 05-build_linux/console.log | 5486 +++--- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 37699 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 10 files changed, 37576 insertions(+), 37834 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig updated (b9ca1af69e -> e53c0f75bd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from b9ca1af69e Don't touch r11 in __tls_get_addr stub adds 14470f0755 x86-64: Fix TLSDESC relaxation for x32 adds 26916852e1 Updated translations for various binutils sub-directories adds 53570fbcca Automatic date update in version.in adds c906a69a1f x86: VCVTNEPS2BF16{X,Y} should permit broadcasting adds c006a730e9 x86: improve handling of insns with ambiguous operand sizes adds 1a0351246a x86: replace adhoc ambiguous operand checking for CRC32 adds 0c27188999 Fix step-over-syscall.exp failure adds 1ab139e5be Add more debugging output to aarch64_displaced_step_fixup adds f0c702d4b8 Convert an int flag variable to bool adds e3ed17f393 x86: testsuite adjustments after commit 1a0351246a5c adds b4654b109b pr23900-1.d: Also check PT_GNU_PROPERTY program header adds f6474de9aa Allow use of Pygments to colorize source code adds f9fac3c81b gdb: fix indentation in infrun.c adds b3ee6dd9f2 gdb: remove uses of iterate_over_inferiors in remote-sim.c adds a12378729f gdb: add declaration for _initialize_gdbarch in gdbarch.sh adds ea91954d07 Automatic date update in version.in adds 1e1613647f pr23900-1.d: Adjusted adds c48acf6f26 PR25417, Fix minor typos adds abc489c64a PowerPC64 TLS optimization fix adds 9e7028aa1e PowerPC64 __tls_get_addr_desc adds a804e4760a PowerPC64 tls_get_addr_desc static support adds 6a462ad49e x86-64: Skip GNU2 TLS tests only without compiler support adds be4c5e58bd x86: Always disallow double word suffix with word general register adds b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction adds 3401347452 Automatic date update in version.in adds 403d1bd91d RISC-V: Change -march parsing. adds 67641dd326 PR25444, Floating point exception in _bfd_elf_compute_sectio [...] adds 24e648d4b8 Updated translations for various binutils sub-directories. adds c162ed3e66 Cache the text section offset of shared libraries adds e7eee665a1 gdb: fix darwin-nat.c build / adapt to multi-target adds ab53f38262 gdb: fix variable shadowing error in darwin-nat.c adds b3b3bada0d gdb: introduce objfile text_section_offset and data_section_ [...] adds a05d007dfe Automatic date update in version.in adds 2f267673f0 gdb/tui: Prevent exceptions from trying to cross readline adds 733d0a6795 gdb/tui: asm window handles invalid memory and scrolls better adds f3364a6d0f gdb: Re-enable stdin for all UIs from start_event_loop adds 1ba1ac8801 gdb: Enable stdin on exception in execute_gdb_command adds 89203d4062 Update comments about removed function adds 2f796de6da Fix issue with warning messages about corrupt debuginfod notes. adds 42ba50eccb gdbserver: Remove a stale TAGS recipe for config files adds 42cd72aa02 gdbserver: Make `make TAGS' actually work adds caa31cfad6 Fix an illegal call to free() when copying a PE format file. adds 43198d2089 Support the NetBSD version of pthread_setname_np adds 73685c7ede Define _KERNTYPES in arm-nbsd-nat.c adds 3050c6f4bc Make the class name in the definition match the declaration adds bdaed379e9 Add install-strip target to gdbserver adds 53af73bf5e Fix re-runs of a second inferior (PR gdb/25410) adds b5f998b2dd RISC-V: Minor cleanup for s extension support. adds 94a72be708 gdb: Include end of sequence markers in the line table adds 3d92a3e313 gdb: Don't reorder line table entries too much when sorting. adds 7ffa82e122 gdb: Better frame tracking for inline frames adds e53c0f75bd Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 109 + bfd/coffgen.c | 6 +- bfd/elf.c | 16 +- bfd/elf64-ppc.c | 577 +- bfd/elf64-ppc.h | 3 + bfd/elf64-x86-64.c | 100 +- bfd/elfnn-riscv.c | 146 +- bfd/elfxx-riscv.c | 211 +- bfd/elfxx-riscv.h | 17 + bfd/po/fr.po | 3366 +++++----- bfd/po/pt.po | 3366 +++++----- bfd/po/ru.po | 3364 +++++----- bfd/po/uk.po | 3367 +++++----- bfd/version.h | 2 +- binutils/ChangeLog | 19 + binutils/po/fr.po | 4054 ++++++------ binutils/po/pt.po | 4073 ++++++------ binutils/po/uk.po | 4069 ++++++------ binutils/readelf.c | 6 +- gas/ChangeLog | 117 + gas/config/tc-i386.c | 165 +- gas/config/tc-ppc.c | 5 +- gas/doc/c-i386.texi | 25 + gas/po/uk.po | 6903 +++++++++++--------- gas/testsuite/gas/i386/avx512_bf16_vl.d | 4 + gas/testsuite/gas/i386/avx512_bf16_vl.s | 4 + gas/testsuite/gas/i386/bundle.s | 2 +- gas/testsuite/gas/i386/general.l | 12 +- gas/testsuite/gas/i386/general.s | 6 +- gas/testsuite/gas/i386/i386.exp | 3 + gas/testsuite/gas/i386/ilp32/x32-tls.d | 2 + gas/testsuite/gas/i386/ilp32/x32-tls.s | 2 + gas/testsuite/gas/i386/ilp32/x86-64-nops.d | 2 - gas/testsuite/gas/i386/inval-crc32.l | 8 +- gas/testsuite/gas/i386/inval-crc32.s | 2 + gas/testsuite/gas/i386/inval.l | 7 + gas/testsuite/gas/i386/inval.s | 4 + gas/testsuite/gas/i386/lock-1.s | 20 +- gas/testsuite/gas/i386/nops.d | 1 - gas/testsuite/gas/i386/nops.s | 1 - gas/testsuite/gas/i386/noreg16.d | 80 + gas/testsuite/gas/i386/noreg16.l | 116 + gas/testsuite/gas/i386/noreg16.s | 79 + gas/testsuite/gas/i386/noreg32.d | 90 + gas/testsuite/gas/i386/noreg32.l | 126 + gas/testsuite/gas/i386/noreg32.s | 89 + gas/testsuite/gas/i386/noreg64.d | 92 + gas/testsuite/gas/i386/noreg64.l | 137 + gas/testsuite/gas/i386/noreg64.s | 91 + gas/testsuite/gas/i386/opcode.s | 4 +- gas/testsuite/gas/i386/sse-noavx.d | 1 - gas/testsuite/gas/i386/sse-noavx.s | 1 - gas/testsuite/gas/i386/sse3.s | 2 +- gas/testsuite/gas/i386/x86-64-avx-scalar.s | 4 +- gas/testsuite/gas/i386/x86-64-avx.s | 4 +- gas/testsuite/gas/i386/x86-64-avx512_bf16_vl.d | 4 + gas/testsuite/gas/i386/x86-64-avx512_bf16_vl.s | 4 + gas/testsuite/gas/i386/x86-64-bundle.s | 2 +- gas/testsuite/gas/i386/x86-64-intel64.d | 1 + gas/testsuite/gas/i386/x86-64-intel64.s | 3 +- gas/testsuite/gas/i386/x86-64-inval-crc32.l | 14 +- gas/testsuite/gas/i386/x86-64-inval-crc32.s | 2 + gas/testsuite/gas/i386/x86-64-lock-1.s | 20 +- gas/testsuite/gas/i386/x86-64-nops.d | 2 - gas/testsuite/gas/i386/x86-64-nops.s | 2 - gas/testsuite/gas/i386/x86-64-opcode.d | 1 + gas/testsuite/gas/i386/x86-64-opcode.s | 67 +- gas/testsuite/gas/i386/x86-64-ptwrite-intel.d | 1 - gas/testsuite/gas/i386/x86-64-ptwrite.d | 1 - gas/testsuite/gas/i386/x86-64-ptwrite.s | 1 - gas/testsuite/gas/i386/x86-64-simd-intel.d | 2 - gas/testsuite/gas/i386/x86-64-simd-suffix.d | 2 - gas/testsuite/gas/i386/x86-64-simd.d | 2 - gas/testsuite/gas/i386/x86-64-simd.s | 2 - gas/testsuite/gas/i386/x86-64-sse-noavx.d | 1 - gas/testsuite/gas/i386/x86-64-sse-noavx.s | 1 - gas/testsuite/gas/i386/x86-64-sse2avx.s | 4 +- gas/testsuite/gas/i386/x86-64-sse3.s | 2 +- gas/testsuite/gas/i386/x86-64-suffix-intel.d | 2 - gas/testsuite/gas/i386/x86-64-suffix.d | 2 - gas/testsuite/gas/i386/x86-64-suffix.s | 2 - gas/testsuite/gas/riscv/march-fail-s-with-version | 2 + ...-with-version.d => march-fail-s-with-version.d} | 1 + .../gas/riscv/march-fail-s-with-version.l | 2 + .../gas/riscv/{march-ok-s.d => march-fail-s.d} | 1 + gas/testsuite/gas/riscv/march-fail-s.l | 2 + .../gas/riscv/{march-ok-sx.d => march-fail-sx.d} | 3 +- gas/testsuite/gas/riscv/march-fail-sx.l | 2 + gdb/ChangeLog | 249 + gdb/aarch64-fbsd-tdep.c | 2 +- gdb/aarch64-linux-tdep.c | 2 +- gdb/aarch64-tdep.c | 48 +- gdb/amd64-windows-tdep.c | 3 +- gdb/arm-fbsd-tdep.c | 2 +- gdb/arm-nbsd-nat.c | 6 +- gdb/buildsym.c | 40 +- gdb/cli/cli-style.c | 5 +- gdb/coff-pe-read.c | 2 +- gdb/coffread.c | 14 +- gdb/ctfread.c | 2 +- gdb/darwin-nat.c | 108 +- gdb/darwin-nat.h | 121 +- gdb/dtrace-probe.c | 3 +- gdb/dwarf2-frame.c | 4 +- gdb/dwarf2read.c | 46 +- gdb/event-loop.c | 5 +- gdb/exec.c | 5 +- gdb/extension-priv.h | 7 + gdb/extension.c | 21 + gdb/extension.h | 9 + gdb/frame.c | 9 +- gdb/gdbarch.sh | 3 +- gdb/gdbcore.h | 3 +- gdb/gdbserver/ChangeLog | 26 + gdb/gdbserver/Makefile.in | 50 +- gdb/gdbserver/aclocal.m4 | 101 + gdb/gdbserver/configure | 119 +- gdb/gdbserver/configure.ac | 3 +- gdb/gdbserver/configure.srv | 49 +- gdb/hppa-bsd-tdep.c | 2 +- gdb/hppa-tdep.c | 2 +- gdb/i386-cygwin-tdep.c | 2 +- gdb/ia64-tdep.c | 2 +- gdb/infrun.c | 90 +- gdb/inline-frame.c | 30 +- gdb/minsyms.c | 41 +- gdb/minsyms.h | 17 +- gdb/nat/fork-inferior.c | 5 +- gdb/nat/fork-inferior.h | 3 +- gdb/objfiles.h | 72 +- gdb/psympriv.h | 4 +- gdb/psymtab.c | 2 +- gdb/python/lib/gdb/__init__.py | 14 + gdb/python/python.c | 78 + gdb/remote-sim.c | 78 +- gdb/riscv-fbsd-tdep.c | 2 +- gdb/solib-svr4.c | 2 +- gdb/source-cache.c | 14 +- gdb/stap-probe.c | 2 +- gdb/symmisc.c | 8 +- gdb/symtab.c | 7 +- gdb/testsuite/ChangeLog | 37 + gdb/testsuite/gdb.base/maint.exp | 20 +- gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c | 158 + .../gdb.dwarf2/dw2-inline-many-frames.exp | 379 ++ gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c | 45 + gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp | 146 + gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp | 22 + gdb/testsuite/gdb.multi/multi-re-run-1.c | 61 + gdb/testsuite/gdb.multi/multi-re-run-2.c | 61 + gdb/testsuite/gdb.multi/multi-re-run.exp | 115 + .../gdb.server/multi-ui-errors.c} | 29 +- gdb/testsuite/gdb.server/multi-ui-errors.exp | 107 + gdb/testsuite/gdb.server/server-kill-python.exp | 88 + gdb/testsuite/gdb.tui/tui-layout-asm.exp | 42 + gdb/thread.c | 5 +- gdb/tui/tui-disasm.c | 243 +- gdb/tui/tui-io.c | 31 +- gdb/windows-nat.c | 2 + gdb/windows-tdep.c | 20 +- gdb/windows-tdep.h | 1 + gdb/xcoffread.c | 12 +- gdbsupport/ChangeLog | 5 + gdbsupport/thread-pool.c | 12 +- gold/ChangeLog | 4 + gold/po/uk.po | 310 +- gprof/ChangeLog | 13 + gprof/po/de.po | 52 +- gprof/po/es.po | 280 +- gprof/po/fi.po | 282 +- gprof/po/pt_BR.po | 54 +- gprof/po/ru.po | 48 +- gprof/po/tr.po | 52 +- gprof/po/uk.po | 50 +- ld/ChangeLog | 79 + ld/emultempl/ppc64elf.em | 20 +- ld/emultempl/z80elf.em | 2 +- ld/ld.texi | 23 +- ld/ldlang.c | 2 +- ld/po/pt_BR.po | 6268 +++++++----------- ld/po/uk.po | 6232 +++++++----------- ld/testsuite/ld-elf/pr23900-1.d | 10 +- ld/testsuite/ld-powerpc/powerpc.exp | 33 + ld/testsuite/ld-powerpc/tlsdesc.d | 68 + ld/testsuite/ld-powerpc/tlsdesc.s | 8 + ld/testsuite/ld-powerpc/tlsdesc.wf | 50 + ld/testsuite/ld-powerpc/tlsdesc2.d | 69 + ld/testsuite/ld-powerpc/tlsdesc2.wf | 49 + ld/testsuite/ld-powerpc/tlsdesc3.d | 38 + ld/testsuite/ld-powerpc/tlsdesc3.wf | 43 + ld/testsuite/ld-powerpc/tlsdesc4.d | 46 + ld/testsuite/ld-powerpc/tlsdesc4.s | 18 + ld/testsuite/ld-powerpc/tlsdesc4.wf | 49 + ld/testsuite/ld-powerpc/tlsexenors.d | 106 + ld/testsuite/ld-powerpc/tlsexenors.r | 113 + ld/testsuite/ld-powerpc/tlsexers.d | 104 + ld/testsuite/ld-powerpc/tlsexers.r | 112 + ld/testsuite/ld-powerpc/tlsexetocnors.d | 90 + ld/testsuite/ld-powerpc/tlsexetocrs.d | 88 + ld/testsuite/ld-powerpc/tlsexetocrs.r | 113 + ld/testsuite/ld-powerpc/tlsopt6.d | 86 + ld/testsuite/ld-powerpc/tlsopt6.wf | 49 + ld/testsuite/ld-x86-64/pr25416-1.s | 13 + ld/testsuite/ld-x86-64/pr25416-1a.d | 16 + ld/testsuite/ld-x86-64/pr25416-1b.d | 15 + ld/testsuite/ld-x86-64/pr25416-2.s | 13 + ld/testsuite/ld-x86-64/pr25416-2a.d | 16 + ld/testsuite/ld-x86-64/pr25416-2b.d | 15 + ld/testsuite/ld-x86-64/pr25416-3.d | 16 + ld/testsuite/ld-x86-64/pr25416-3.s | 15 + ld/testsuite/ld-x86-64/pr25416-4.d | 16 + ld/testsuite/ld-x86-64/pr25416-4.s | 15 + ld/testsuite/ld-x86-64/pr25416-5a.c | 33 + ld/testsuite/ld-x86-64/pr25416-5b.s | 52 + ld/testsuite/ld-x86-64/pr25416-5c.s | 56 + ld/testsuite/ld-x86-64/pr25416-5d.s | 19 + ld/testsuite/ld-x86-64/pr25416-5e.s | 23 + ld/testsuite/ld-x86-64/tls.exp | 4 +- ld/testsuite/ld-x86-64/x86-64.exp | 112 + opcodes/ChangeLog | 18 + opcodes/i386-opc.tbl | 6 +- opcodes/i386-tbl.h | 14 +- opcodes/po/de.po | 804 ++- opcodes/po/pt_BR.po | 804 ++- opcodes/po/uk.po | 804 ++- sim/msp430/ChangeLog | 5 + sim/msp430/msp430-sim.c | 6 +- sim/testsuite/sim/msp430/ChangeLog | 4 + sim/testsuite/sim/msp430/rrux.s | 14 + 229 files changed, 31024 insertions(+), 25444 deletions(-) create mode 100644 gas/testsuite/gas/i386/noreg16.l create mode 100644 gas/testsuite/gas/i386/noreg32.l create mode 100644 gas/testsuite/gas/i386/noreg64.l create mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version rename gas/testsuite/gas/riscv/{march-ok-s-with-version.d => march-fail-s-with-ver [...] create mode 100644 gas/testsuite/gas/riscv/march-fail-s-with-version.l rename gas/testsuite/gas/riscv/{march-ok-s.d => march-fail-s.d} (75%) create mode 100644 gas/testsuite/gas/riscv/march-fail-s.l rename gas/testsuite/gas/riscv/{march-ok-sx.d => march-fail-sx.d} (56%) create mode 100644 gas/testsuite/gas/riscv/march-fail-sx.l create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-many-frames.exp create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.c create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-inline-stepping.exp create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-1.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run-2.c create mode 100644 gdb/testsuite/gdb.multi/multi-re-run.exp copy gdb/{windows-tdep.h => testsuite/gdb.server/multi-ui-errors.c} (56%) create mode 100644 gdb/testsuite/gdb.server/multi-ui-errors.exp create mode 100644 gdb/testsuite/gdb.server/server-kill-python.exp create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.s create mode 100644 ld/testsuite/ld-powerpc/tlsdesc.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc2.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc2.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc3.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc3.wf create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.d create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.s create mode 100644 ld/testsuite/ld-powerpc/tlsdesc4.wf create mode 100644 ld/testsuite/ld-powerpc/tlsexenors.d create mode 100644 ld/testsuite/ld-powerpc/tlsexenors.r create mode 100644 ld/testsuite/ld-powerpc/tlsexers.d create mode 100644 ld/testsuite/ld-powerpc/tlsexers.r create mode 100644 ld/testsuite/ld-powerpc/tlsexetocnors.d create mode 100644 ld/testsuite/ld-powerpc/tlsexetocrs.d create mode 100644 ld/testsuite/ld-powerpc/tlsexetocrs.r create mode 100644 ld/testsuite/ld-powerpc/tlsopt6.d create mode 100644 ld/testsuite/ld-powerpc/tlsopt6.wf create mode 100644 ld/testsuite/ld-x86-64/pr25416-1.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-1a.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-1b.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-2.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-2a.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-2b.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-3.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-3.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-4.d create mode 100644 ld/testsuite/ld-x86-64/pr25416-4.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5a.c create mode 100644 ld/testsuite/ld-x86-64/pr25416-5b.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5c.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5d.s create mode 100644 ld/testsuite/ld-x86-64/pr25416-5e.s create mode 100644 sim/testsuite/sim/msp430/rrux.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 9 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2020