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from 6472b2302de Add OpenBSD AArch64 GAS support. new 3095d92634a gdb/riscv: improve (and fix) display of frm field in 'info [...] new b49d7aa7446 gdb: Add tdesc_found_register function to tdesc API new 4749b84b51b gdb/riscv: better support for fflags and frm registers
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Summary of changes: gdb/arch/riscv.h | 19 +- gdb/features/riscv/32bit-fpu.c | 4 +- gdb/features/riscv/32bit-fpu.xml | 2 - gdb/features/riscv/64bit-fpu.c | 4 +- gdb/features/riscv/64bit-fpu.xml | 2 - gdb/riscv-tdep.c | 242 ++++++++++++++++++---- gdb/riscv-tdep.h | 6 + gdb/target-descriptions.c | 11 + gdb/target-descriptions.h | 4 + gdb/testsuite/gdb.arch/riscv-info-fcsr.c | 22 ++ gdb/testsuite/gdb.arch/riscv-info-fcsr.exp | 149 +++++++++++++ gdb/testsuite/gdb.arch/riscv-tdesc-fcsr-32.xml | 75 +++++++ gdb/testsuite/gdb.arch/riscv-tdesc-fcsr-64.xml | 79 +++++++ gdb/testsuite/gdb.arch/riscv-tdesc-loading-05.xml | 77 +++++++ gdb/testsuite/gdb.arch/riscv-tdesc-loading-06.xml | 75 +++++++ gdb/testsuite/gdb.arch/riscv-tdesc-regs.exp | 36 ++++ gdb/testsuite/gdb.base/float.exp | 9 +- 17 files changed, 768 insertions(+), 48 deletions(-) create mode 100644 gdb/testsuite/gdb.arch/riscv-info-fcsr.c create mode 100644 gdb/testsuite/gdb.arch/riscv-info-fcsr.exp create mode 100644 gdb/testsuite/gdb.arch/riscv-tdesc-fcsr-32.xml create mode 100644 gdb/testsuite/gdb.arch/riscv-tdesc-fcsr-64.xml create mode 100644 gdb/testsuite/gdb.arch/riscv-tdesc-loading-05.xml create mode 100644 gdb/testsuite/gdb.arch/riscv-tdesc-loading-06.xml