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from 42b2a1d5ed9 [Hexagon] Rename HexagonISelLowering::getNode to getInstr, NFC new 1076969bfeb Followup on Proposal to move MIR physical register namespac [...]
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Summary of changes: lib/CodeGen/MIRParser/MILexer.cpp | 23 +- lib/CodeGen/TargetRegisterInfo.cpp | 6 +- .../AArch64/GlobalISel/arm64-callingconv-ios.ll | 6 +- .../AArch64/GlobalISel/arm64-callingconv.ll | 74 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 554 +- .../AArch64/GlobalISel/arm64-regbankselect.mir | 286 +- .../AArch64/GlobalISel/call-translator-ios.ll | 22 +- test/CodeGen/AArch64/GlobalISel/call-translator.ll | 114 +- test/CodeGen/AArch64/GlobalISel/debug-insts.ll | 12 +- test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll | 24 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 8 +- .../AArch64/GlobalISel/irtranslator-bitcast.ll | 2 +- .../AArch64/GlobalISel/irtranslator-exceptions.ll | 22 +- test/CodeGen/AArch64/GlobalISel/legalize-add.mir | 110 +- test/CodeGen/AArch64/GlobalISel/legalize-and.mir | 18 +- .../AArch64/GlobalISel/legalize-atomicrmw.mir | 40 +- test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 22 +- .../GlobalISel/legalize-cmpxchg-with-success.mir | 20 +- .../AArch64/GlobalISel/legalize-cmpxchg.mir | 40 +- .../AArch64/GlobalISel/legalize-combines.mir | 34 +- .../AArch64/GlobalISel/legalize-constant.mir | 40 +- test/CodeGen/AArch64/GlobalISel/legalize-div.mir | 18 +- .../AArch64/GlobalISel/legalize-exceptions.ll | 4 +- test/CodeGen/AArch64/GlobalISel/legalize-ext.mir | 78 +- .../AArch64/GlobalISel/legalize-extracts.mir | 46 +- test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir | 18 +- test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir | 20 +- test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir | 128 +- test/CodeGen/AArch64/GlobalISel/legalize-gep.mir | 14 +- .../GlobalISel/legalize-ignore-non-generic.mir | 10 +- .../AArch64/GlobalISel/legalize-inserts.mir | 68 +- test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir | 112 +- .../AArch64/GlobalISel/legalize-load-store.mir | 26 +- .../AArch64/GlobalISel/legalize-merge-values.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-mul.mir | 50 +- .../GlobalISel/legalize-nonpowerof2eltsvec.mir | 10 +- test/CodeGen/AArch64/GlobalISel/legalize-or.mir | 44 +- test/CodeGen/AArch64/GlobalISel/legalize-phi.mir | 122 +- test/CodeGen/AArch64/GlobalISel/legalize-pow.mir | 30 +- test/CodeGen/AArch64/GlobalISel/legalize-rem.mir | 84 +- test/CodeGen/AArch64/GlobalISel/legalize-shift.mir | 22 +- .../CodeGen/AArch64/GlobalISel/legalize-simple.mir | 94 +- test/CodeGen/AArch64/GlobalISel/legalize-sub.mir | 14 +- test/CodeGen/AArch64/GlobalISel/legalize-undef.mir | 2 +- .../AArch64/GlobalISel/legalize-unmerge-values.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 4 +- test/CodeGen/AArch64/GlobalISel/legalize-xor.mir | 14 +- .../GlobalISel/localizer-in-O0-pipeline.mir | 10 +- test/CodeGen/AArch64/GlobalISel/localizer.mir | 8 +- .../GlobalISel/machine-cse-mid-pipeline.mir | 72 +- test/CodeGen/AArch64/GlobalISel/no-regclass.mir | 12 +- .../CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir | 10 +- .../AArch64/GlobalISel/regbankselect-dbg-value.mir | 12 +- .../AArch64/GlobalISel/regbankselect-default.mir | 262 +- .../GlobalISel/regbankselect-reg_sequence.mir | 4 +- .../AArch64/GlobalISel/select-atomicrmw.mir | 112 +- test/CodeGen/AArch64/GlobalISel/select-binop.mir | 462 +- .../GlobalISel/select-bitcast-bigendian.mir | 10 +- test/CodeGen/AArch64/GlobalISel/select-bitcast.mir | 100 +- test/CodeGen/AArch64/GlobalISel/select-br.mir | 6 +- test/CodeGen/AArch64/GlobalISel/select-bswap.mir | 20 +- test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 24 +- test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir | 20 +- .../CodeGen/AArch64/GlobalISel/select-constant.mir | 24 +- .../AArch64/GlobalISel/select-dbg-value.mir | 22 +- test/CodeGen/AArch64/GlobalISel/select-fma.mir | 18 +- .../CodeGen/AArch64/GlobalISel/select-fp-casts.mir | 220 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 10 +- test/CodeGen/AArch64/GlobalISel/select-imm.mir | 12 +- .../AArch64/GlobalISel/select-implicit-def.mir | 4 +- .../AArch64/GlobalISel/select-insert-extract.mir | 16 +- test/CodeGen/AArch64/GlobalISel/select-int-ext.mir | 100 +- .../AArch64/GlobalISel/select-int-ptr-casts.mir | 60 +- .../GlobalISel/select-intrinsic-aarch64-hint.mir | 2 +- .../GlobalISel/select-intrinsic-aarch64-sdiv.mir | 14 +- .../GlobalISel/select-intrinsic-crypto-aesmc.mir | 14 +- test/CodeGen/AArch64/GlobalISel/select-load.mir | 206 +- test/CodeGen/AArch64/GlobalISel/select-mul.mir | 12 +- test/CodeGen/AArch64/GlobalISel/select-muladd.mir | 18 +- .../AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir | 10 +- test/CodeGen/AArch64/GlobalISel/select-phi.mir | 20 +- test/CodeGen/AArch64/GlobalISel/select-pr32733.mir | 12 +- test/CodeGen/AArch64/GlobalISel/select-store.mir | 152 +- test/CodeGen/AArch64/GlobalISel/select-trunc.mir | 30 +- test/CodeGen/AArch64/GlobalISel/select-xor.mir | 64 +- test/CodeGen/AArch64/GlobalISel/select.mir | 108 +- test/CodeGen/AArch64/GlobalISel/translate-gep.ll | 58 +- .../AArch64/GlobalISel/varargs-ios-translator.ll | 2 +- test/CodeGen/AArch64/GlobalISel/vastart.ll | 2 +- .../AArch64/GlobalISel/verify-regbankselected.mir | 4 +- .../CodeGen/AArch64/GlobalISel/verify-selected.mir | 6 +- test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir | 66 +- test/CodeGen/AArch64/arm64-csldst-mmo.ll | 4 +- .../AArch64/arm64-ldst-unscaled-pre-post.mir | 106 +- test/CodeGen/AArch64/arm64-misched-memdep-bug.ll | 6 +- test/CodeGen/AArch64/arm64-misched-multimmo.ll | 4 +- test/CodeGen/AArch64/arm64-regress-opt-cmp.mir | 14 +- test/CodeGen/AArch64/ccmp-successor-probs.mir | 18 +- test/CodeGen/AArch64/cfi_restore.mir | 30 +- test/CodeGen/AArch64/falkor-hwpf-fix.mir | 306 +- .../fast-regalloc-empty-bb-with-liveins.mir | 12 +- test/CodeGen/AArch64/ldst-opt-aa.mir | 16 +- test/CodeGen/AArch64/ldst-opt-zr-clobber.mir | 16 +- test/CodeGen/AArch64/ldst-opt.mir | 144 +- test/CodeGen/AArch64/live-interval-analysis.mir | 10 +- test/CodeGen/AArch64/loh.mir | 206 +- test/CodeGen/AArch64/machine-combiner.mir | 22 +- test/CodeGen/AArch64/machine-copy-remove.mir | 374 +- test/CodeGen/AArch64/machine-dead-copy.mir | 42 +- test/CodeGen/AArch64/machine-outliner.mir | 188 +- test/CodeGen/AArch64/machine-scheduler.mir | 18 +- test/CodeGen/AArch64/machine-sink-zr.mir | 14 +- test/CodeGen/AArch64/machine-zero-copy-remove.mir | 424 +- test/CodeGen/AArch64/movimm-wzr.mir | 8 +- test/CodeGen/AArch64/phi-dbg.ll | 2 +- test/CodeGen/AArch64/reg-scavenge-frame.mir | 136 +- test/CodeGen/AArch64/regcoal-physreg.mir | 108 +- test/CodeGen/AArch64/scheduledag-constreg.mir | 16 +- test/CodeGen/AArch64/spill-fold.mir | 46 +- test/CodeGen/AArch64/spill-undef.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 10 +- .../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 20 +- test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 12 +- test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 8 +- .../AMDGPU/GlobalISel/legalize-constant.mir | 4 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 8 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 12 +- test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 10 +- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 12 +- test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 8 +- test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 12 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir | 12 +- test/CodeGen/AMDGPU/break-smem-soft-clauses.mir | 252 +- test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir | 360 +- test/CodeGen/AMDGPU/clamp-omod-special-case.mir | 162 +- test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir | 26 +- test/CodeGen/AMDGPU/cluster-flat-loads.mir | 6 +- test/CodeGen/AMDGPU/coalescer-subreg-join.mir | 18 +- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 366 +- test/CodeGen/AMDGPU/dead_copy.mir | 20 +- test/CodeGen/AMDGPU/debug-value2.ll | 4 +- test/CodeGen/AMDGPU/detect-dead-lanes.mir | 26 +- test/CodeGen/AMDGPU/endpgm-dce.mir | 130 +- test/CodeGen/AMDGPU/fix-vgpr-copies.mir | 28 +- test/CodeGen/AMDGPU/fix-wwm-liveness.mir | 44 +- test/CodeGen/AMDGPU/flat-load-clustering.mir | 38 +- test/CodeGen/AMDGPU/fold-cndmask.mir | 20 +- test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 186 +- test/CodeGen/AMDGPU/fold-immediate-output-mods.mir | 112 +- test/CodeGen/AMDGPU/fold-multiple.mir | 12 +- test/CodeGen/AMDGPU/fold-operands-order.mir | 8 +- test/CodeGen/AMDGPU/hazard-inlineasm.mir | 4 +- test/CodeGen/AMDGPU/hazard.mir | 32 +- test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 10 +- test/CodeGen/AMDGPU/insert-waits-callee.mir | 8 +- test/CodeGen/AMDGPU/insert-waits-exp.mir | 32 +- test/CodeGen/AMDGPU/inserted-wait-states.mir | 198 +- test/CodeGen/AMDGPU/invert-br-undef-vcc.mir | 38 +- test/CodeGen/AMDGPU/limit-coalesce.mir | 16 +- test/CodeGen/AMDGPU/liveness.mir | 2 +- test/CodeGen/AMDGPU/llvm.dbg.value.ll | 2 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 170 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 46 +- ...ory-legalizer-multiple-mem-operands-atomics.mir | 60 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 62 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 62 +- test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 22 +- test/CodeGen/AMDGPU/merge-load-store.mir | 20 +- test/CodeGen/AMDGPU/merge-m0.mir | 74 +- test/CodeGen/AMDGPU/misched-killflags.mir | 62 +- test/CodeGen/AMDGPU/movrels-bug.mir | 12 +- test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 94 +- test/CodeGen/AMDGPU/optimize-if-exec-masking.mir | 438 +- test/CodeGen/AMDGPU/readlane_exec0.mir | 20 +- test/CodeGen/AMDGPU/reduce-saveexec.mir | 92 +- test/CodeGen/AMDGPU/regcoal-subrange-join.mir | 44 +- test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 18 +- test/CodeGen/AMDGPU/regcoalesce-prune.mir | 8 +- .../rename-independent-subregs-mac-operands.mir | 66 +- test/CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- test/CodeGen/AMDGPU/scalar-store-cache-flush.mir | 16 +- test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 152 +- test/CodeGen/AMDGPU/schedule-regpressure.mir | 14 +- test/CodeGen/AMDGPU/sdwa-gfx9.mir | 60 +- test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 468 +- test/CodeGen/AMDGPU/sdwa-preserve.mir | 44 +- test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 96 +- test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir | 42 +- test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir | 24 +- test/CodeGen/AMDGPU/shrink-carry.mir | 24 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 170 +- test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 14 +- .../si-instr-info-correct-implicit-operands.ll | 2 +- test/CodeGen/AMDGPU/spill-empty-live-interval.mir | 24 +- test/CodeGen/AMDGPU/splitkit.mir | 36 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 16 +- test/CodeGen/AMDGPU/subreg-intervals.mir | 2 +- test/CodeGen/AMDGPU/subreg_interference.mir | 12 +- test/CodeGen/AMDGPU/syncscopes.ll | 6 +- test/CodeGen/AMDGPU/twoaddr-mad.mir | 62 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 104 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 84 +- test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 48 +- test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 20 +- test/CodeGen/AMDGPU/waitcnt-permute.mir | 14 +- test/CodeGen/AMDGPU/waitcnt.mir | 36 +- test/CodeGen/AMDGPU/wqm.mir | 30 +- .../ARM/2014-01-09-pseudo_expand_implicit_reg.ll | 4 +- test/CodeGen/ARM/ARMLoadStoreDBG.mir | 96 +- test/CodeGen/ARM/GlobalISel/arm-call-lowering.ll | 22 +- .../ARM/GlobalISel/arm-instruction-select-cmp.mir | 1140 +-- .../GlobalISel/arm-instruction-select-combos.mir | 586 +- .../ARM/GlobalISel/arm-instruction-select.mir | 1008 +-- test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 230 +- .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 336 +- test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 1758 ++-- test/CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir | 94 +- test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 398 +- test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll | 412 +- test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 480 +- .../arm-select-copy_to_regclass-of-fptosi.mir | 14 +- .../ARM/GlobalISel/arm-select-globals-pic.mir | 40 +- .../GlobalISel/arm-select-globals-ropi-rwpi.mir | 56 +- .../ARM/GlobalISel/arm-select-globals-static.mir | 24 +- test/CodeGen/ARM/GlobalISel/select-pr35926.mir | 14 +- .../ARM/PR32721_ifcvt_triangle_unanalyzable.mir | 2 +- test/CodeGen/ARM/Windows/vla-cpsr.ll | 2 +- test/CodeGen/ARM/cmp1-peephole-thumb.mir | 30 +- test/CodeGen/ARM/cmp2-peephole-thumb.mir | 36 +- test/CodeGen/ARM/constant-islands-cfg.mir | 18 +- test/CodeGen/ARM/dbg-range-extension.mir | 170 +- test/CodeGen/ARM/debug-info-arg.ll | 2 +- test/CodeGen/ARM/debug-info-branch-folding.ll | 4 +- test/CodeGen/ARM/expand-pseudos.mir | 48 +- test/CodeGen/ARM/fpoffset_overflow.mir | 122 +- test/CodeGen/ARM/ifcvt_canFallThroughTo.mir | 6 +- test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir | 16 +- .../ARM/ifcvt_forked_diamond_unanalyzable.mir | 28 +- .../ARM/ifcvt_simple_bad_zero_prob_succ.mir | 8 +- test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir | 10 +- test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir | 24 +- test/CodeGen/ARM/imm-peephole-arm.mir | 20 +- test/CodeGen/ARM/imm-peephole-thumb.mir | 20 +- test/CodeGen/ARM/load_store_opt_kill.mir | 10 +- test/CodeGen/ARM/machine-copyprop.mir | 24 +- test/CodeGen/ARM/misched-int-basic-thumb2.mir | 68 +- test/CodeGen/ARM/misched-int-basic.mir | 50 +- test/CodeGen/ARM/peephole-phi.mir | 40 +- test/CodeGen/ARM/pei-swiftself.mir | 64 +- test/CodeGen/ARM/prera-ldst-aliasing.mir | 20 +- test/CodeGen/ARM/prera-ldst-insertpt.mir | 84 +- test/CodeGen/ARM/scavenging.mir | 80 +- test/CodeGen/ARM/sched-it-debug-nodes.mir | 90 +- test/CodeGen/ARM/single-issue-r52.mir | 24 +- test/CodeGen/ARM/tail-dup-bundle.mir | 34 +- test/CodeGen/ARM/thumb1-ldst-opt.ll | 2 +- test/CodeGen/ARM/v6-jumptable-clobber.mir | 60 +- .../CodeGen/ARM/virtregrewriter-subregliveness.mir | 30 +- test/CodeGen/ARM/vldm-liveness.mir | 20 +- test/CodeGen/BPF/sockex2.ll | 2 +- test/CodeGen/Hexagon/addrmode-globoff.mir | 10 +- test/CodeGen/Hexagon/addrmode-keepdeadphis.mir | 18 +- test/CodeGen/Hexagon/addrmode-rr-to-io.mir | 12 +- test/CodeGen/Hexagon/anti-dep-partial.mir | 26 +- test/CodeGen/Hexagon/bank-conflict-load.mir | 16 +- test/CodeGen/Hexagon/branch-folder-hoist-kills.mir | 34 +- .../CodeGen/Hexagon/branchfolder-insert-impdef.mir | 66 +- test/CodeGen/Hexagon/cext-opt-basic.mir | 20 +- test/CodeGen/Hexagon/cext-opt-numops.mir | 8 +- test/CodeGen/Hexagon/cext-opt-range-assert.mir | 22 +- test/CodeGen/Hexagon/cext-opt-range-offset.mir | 4 +- test/CodeGen/Hexagon/cext-opt-shifted-range.mir | 4 +- test/CodeGen/Hexagon/duplex-addi-global-imm.mir | 6 +- test/CodeGen/Hexagon/early-if-debug.mir | 30 +- test/CodeGen/Hexagon/expand-condsets-def-undef.mir | 14 +- test/CodeGen/Hexagon/expand-condsets-imm.mir | 2 +- test/CodeGen/Hexagon/expand-condsets-impuse.mir | 18 +- test/CodeGen/Hexagon/expand-condsets-rm-reg.mir | 20 +- .../Hexagon/expand-condsets-same-inputs.mir | 10 +- test/CodeGen/Hexagon/hwloop-redef-imm.mir | 8 +- test/CodeGen/Hexagon/ifcvt-common-kill.mir | 24 +- test/CodeGen/Hexagon/ifcvt-impuse-livein.mir | 24 +- test/CodeGen/Hexagon/ifcvt-live-subreg.mir | 34 +- test/CodeGen/Hexagon/invalid-dotnew-attempt.mir | 6 +- .../CodeGen/Hexagon/livephysregs-add-pristines.mir | 22 +- test/CodeGen/Hexagon/livephysregs-lane-masks.mir | 28 +- test/CodeGen/Hexagon/livephysregs-lane-masks2.mir | 44 +- test/CodeGen/Hexagon/mux-kill1.mir | 10 +- test/CodeGen/Hexagon/mux-kill2.mir | 14 +- test/CodeGen/Hexagon/mux-kill3.mir | 40 +- test/CodeGen/Hexagon/newvaluejump-c4.mir | 30 +- test/CodeGen/Hexagon/newvaluejump-kill2.mir | 16 +- test/CodeGen/Hexagon/newvaluejump-solo.mir | 8 +- .../Hexagon/packetize-load-store-aliasing.mir | 16 +- test/CodeGen/Hexagon/packetize-nvj-no-prune.mir | 12 +- test/CodeGen/Hexagon/post-ra-kill-update.mir | 20 +- test/CodeGen/Hexagon/postinc-baseoffset.mir | 6 +- .../Hexagon/rdf-copy-renamable-reserved.mir | 8 +- test/CodeGen/Hexagon/rdf-ehlabel-live.mir | 2 +- test/CodeGen/Hexagon/regalloc-bad-undef.mir | 46 +- test/CodeGen/Hexagon/regalloc-liveout-undef.mir | 6 +- test/CodeGen/Hexagon/target-flag-ext.mir | 12 +- .../CodeGen/Hexagon/unreachable-mbb-phi-subreg.mir | 10 +- test/CodeGen/Hexagon/vextract-basic.mir | 8 +- test/CodeGen/Lanai/peephole-compare.mir | 300 +- test/CodeGen/MIR/AArch64/addrspace-memoperands.mir | 4 +- test/CodeGen/MIR/AArch64/atomic-memoperands.mir | 4 +- test/CodeGen/MIR/AArch64/cfi.mir | 32 +- .../MIR/AArch64/expected-target-flag-name.mir | 6 +- .../AArch64/generic-virtual-registers-error.mir | 4 +- ...eneric-virtual-registers-with-regbank-error.mir | 4 +- test/CodeGen/MIR/AArch64/intrinsics.mir | 4 +- .../MIR/AArch64/invalid-target-flag-name.mir | 6 +- .../MIR/AArch64/invalid-target-memoperands.mir | 2 +- test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir | 12 +- test/CodeGen/MIR/AArch64/register-operand-bank.mir | 8 +- test/CodeGen/MIR/AArch64/swp.mir | 10 +- test/CodeGen/MIR/AArch64/target-flags.mir | 28 +- test/CodeGen/MIR/AArch64/target-memoperands.mir | 4 +- .../MIR/AMDGPU/expected-target-index-name.mir | 38 +- .../MIR/AMDGPU/invalid-target-index-operand.mir | 38 +- test/CodeGen/MIR/AMDGPU/syncscopes.mir | 46 +- test/CodeGen/MIR/AMDGPU/target-flags.mir | 8 +- test/CodeGen/MIR/AMDGPU/target-index-operands.mir | 80 +- test/CodeGen/MIR/ARM/bundled-instructions.mir | 62 +- test/CodeGen/MIR/ARM/cfi-same-value.mir | 68 +- test/CodeGen/MIR/ARM/expected-closing-brace.mir | 26 +- .../MIR/ARM/extraneous-closing-brace-error.mir | 6 +- .../MIR/ARM/nested-instruction-bundle-error.mir | 18 +- test/CodeGen/MIR/Hexagon/parse-lane-masks.mir | 4 +- test/CodeGen/MIR/Hexagon/target-flags.mir | 26 +- ...ted-global-value-or-symbol-after-call-entry.mir | 28 +- test/CodeGen/MIR/Mips/memory-operands.mir | 76 +- .../MIR/PowerPC/unordered-implicit-registers.mir | 12 +- test/CodeGen/MIR/X86/auto-successor.mir | 24 +- test/CodeGen/MIR/X86/basic-block-liveins.mir | 24 +- .../X86/basic-block-not-at-start-of-line-error.mir | 18 +- test/CodeGen/MIR/X86/block-address-operands.mir | 40 +- test/CodeGen/MIR/X86/branch-probabilities.mir | 4 +- test/CodeGen/MIR/X86/callee-saved-info.mir | 48 +- test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir | 4 +- test/CodeGen/MIR/X86/cfi-def-cfa-register.mir | 12 +- test/CodeGen/MIR/X86/cfi-offset.mir | 26 +- test/CodeGen/MIR/X86/constant-pool.mir | 52 +- test/CodeGen/MIR/X86/dead-register-flag.mir | 6 +- .../MIR/X86/def-register-already-tied-error.mir | 10 +- test/CodeGen/MIR/X86/diexpr-win32.mir | 44 +- .../MIR/X86/duplicate-memory-operand-flag.mir | 12 +- .../MIR/X86/duplicate-register-flag-error.mir | 12 +- .../MIR/X86/early-clobber-register-flag.mir | 22 +- .../MIR/X86/expected-align-in-memory-operand.mir | 16 +- ...ted-alignment-after-align-in-memory-operand.mir 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test/CodeGen/X86/avx512f-vec-test-testn.ll | 16 +- test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 52 +- test/CodeGen/X86/avx512vl-intrinsics.ll | 8 +- test/CodeGen/X86/avx512vl-vec-cmp.ll | 338 +- test/CodeGen/X86/avx512vl-vec-masked-cmp.ll | 2318 ++--- test/CodeGen/X86/avx512vl-vec-test-testn.ll | 64 +- test/CodeGen/X86/bitcast-and-setcc-128.ll | 102 +- test/CodeGen/X86/bitcast-and-setcc-256.ll | 46 +- test/CodeGen/X86/bitcast-and-setcc-512.ll | 36 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 18 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 28 +- test/CodeGen/X86/bitcast-int-to-vector-bool.ll | 6 +- test/CodeGen/X86/bitcast-int-to-vector.ll | 2 +- test/CodeGen/X86/bitcast-setcc-128.ll | 102 +- test/CodeGen/X86/bitcast-setcc-256.ll | 46 +- test/CodeGen/X86/bitcast-setcc-512.ll | 40 +- test/CodeGen/X86/bitreverse.ll | 14 +- test/CodeGen/X86/block-placement.mir | 32 +- test/CodeGen/X86/bmi-schedule.ll | 24 +- test/CodeGen/X86/bmi.ll | 22 +- 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test/CodeGen/X86/movtopush.mir | 80 +- test/CodeGen/X86/mul-constant-i16.ll | 180 +- test/CodeGen/X86/mul-constant-i32.ll | 190 +- test/CodeGen/X86/mul-constant-result.ll | 48 +- test/CodeGen/X86/negate-i1.ll | 6 +- test/CodeGen/X86/non-value-mem-operand.mir | 212 +- test/CodeGen/X86/oddshuffles.ll | 14 +- test/CodeGen/X86/or-lea.ll | 26 +- test/CodeGen/X86/patchpoint-verifiable.mir | 20 +- test/CodeGen/X86/peephole-recurrence.mir | 66 +- test/CodeGen/X86/pmul.ll | 4 +- test/CodeGen/X86/popcnt-schedule.ll | 16 +- test/CodeGen/X86/popcnt.ll | 8 +- test/CodeGen/X86/post-ra-sched-with-debug.mir | 126 +- test/CodeGen/X86/pr22970.ll | 2 +- test/CodeGen/X86/pr27681.mir | 94 +- test/CodeGen/X86/pr28173.ll | 4 +- test/CodeGen/X86/pr28560.ll | 2 +- test/CodeGen/X86/pr29061.ll | 4 +- test/CodeGen/X86/pr30430.ll | 6 +- test/CodeGen/X86/pr32282.ll | 2 +- test/CodeGen/X86/pr32284.ll | 4 +- test/CodeGen/X86/pr32329.ll | 2 +- test/CodeGen/X86/pr32345.ll | 14 +- test/CodeGen/X86/pr32484.ll | 4 +- test/CodeGen/X86/pr34592.ll | 4 +- test/CodeGen/X86/pr34653.ll | 8 +- test/CodeGen/X86/pr35765.ll | 2 +- test/CodeGen/X86/pre-coalesce.mir | 28 +- test/CodeGen/X86/prefer-avx256-mask-extend.ll | 2 +- test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 6 +- test/CodeGen/X86/prefer-avx256-popcnt.ll | 2 +- test/CodeGen/X86/prefer-avx256-shift.ll | 24 +- test/CodeGen/X86/prefer-avx256-trunc.ll | 4 +- test/CodeGen/X86/promote-vec3.ll | 48 +- test/CodeGen/X86/psubus.ll | 4 +- test/CodeGen/X86/rdpid-schedule.ll | 4 +- test/CodeGen/X86/rdpid.ll | 2 +- test/CodeGen/X86/reduce-trunc-shl.ll | 2 +- test/CodeGen/X86/regalloc-advanced-split-cost.ll | 18 +- test/CodeGen/X86/remat-phys-dead.ll | 4 +- test/CodeGen/X86/sar_fold64.ll | 8 +- test/CodeGen/X86/scalar-fp-to-i64.ll | 12 +- test/CodeGen/X86/scalar_widen_div.ll | 30 +- test/CodeGen/X86/scavenger.mir | 30 +- test/CodeGen/X86/schedule-x86-64-shld.ll | 12 +- test/CodeGen/X86/schedule-x86_64.ll | 40 +- test/CodeGen/X86/select.ll | 12 +- test/CodeGen/X86/select_const.ll | 12 +- test/CodeGen/X86/setcc-lowering.ll | 4 +- test/CodeGen/X86/sext-i1.ll | 4 +- test/CodeGen/X86/shift-combine.ll | 8 +- test/CodeGen/X86/shift-double.ll | 4 +- test/CodeGen/X86/shrink-compare.ll | 4 +- test/CodeGen/X86/shrink_wrap_dbg_value.mir | 50 +- test/CodeGen/X86/shuffle-vs-trunc-256.ll | 12 +- .../X86/simple-register-allocation-read-undef.mir | 2 +- test/CodeGen/X86/sqrt-fastmath-mir.ll | 12 +- test/CodeGen/X86/sse2-schedule.ll | 20 +- test/CodeGen/X86/sse42-schedule.ll | 36 +- test/CodeGen/X86/subvector-broadcast.ll | 112 +- test/CodeGen/X86/swift-return.ll | 4 +- test/CodeGen/X86/switch-lower-peel-top-case.ll | 58 +- test/CodeGen/X86/tail-call-conditional.mir | 52 +- test/CodeGen/X86/tail-dup-debugloc.ll | 2 +- test/CodeGen/X86/tail-merge-after-mbp.mir | 60 +- test/CodeGen/X86/tail-merge-debugloc.ll | 2 +- test/CodeGen/X86/tbm-intrinsics-fast-isel.ll | 8 +- test/CodeGen/X86/tbm_patterns.ll | 10 +- test/CodeGen/X86/trunc-subvector.ll | 20 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test/CodeGen/X86/vector-compare-results.ll | 48 +- test/CodeGen/X86/vector-extend-inreg.ll | 4 +- test/CodeGen/X86/vector-half-conversions.ll | 118 +- test/CodeGen/X86/vector-lzcnt-128.ll | 16 +- test/CodeGen/X86/vector-lzcnt-256.ll | 16 +- test/CodeGen/X86/vector-popcnt-128.ll | 18 +- test/CodeGen/X86/vector-popcnt-256.ll | 16 +- test/CodeGen/X86/vector-rotate-128.ll | 38 +- test/CodeGen/X86/vector-rotate-256.ll | 38 +- test/CodeGen/X86/vector-sext.ll | 28 +- test/CodeGen/X86/vector-shift-ashr-128.ll | 38 +- test/CodeGen/X86/vector-shift-ashr-256.ll | 28 +- test/CodeGen/X86/vector-shift-lshr-128.ll | 24 +- test/CodeGen/X86/vector-shift-lshr-256.ll | 10 +- test/CodeGen/X86/vector-shift-shl-128.ll | 20 +- test/CodeGen/X86/vector-shift-shl-256.ll | 10 +- test/CodeGen/X86/vector-shuffle-256-v4.ll | 6 +- test/CodeGen/X86/vector-shuffle-512-v16.ll | 4 +- test/CodeGen/X86/vector-shuffle-512-v8.ll | 12 +- test/CodeGen/X86/vector-shuffle-avx512.ll | 84 +- test/CodeGen/X86/vector-shuffle-combining-avx2.ll | 24 +- test/CodeGen/X86/vector-shuffle-v1.ll | 52 +- test/CodeGen/X86/vector-shuffle-variable-128.ll | 228 +- test/CodeGen/X86/vector-shuffle-variable-256.ll | 72 +- test/CodeGen/X86/vector-trunc-math.ll | 150 +- test/CodeGen/X86/vector-trunc-packus.ll | 34 +- test/CodeGen/X86/vector-trunc-ssat.ll | 34 +- test/CodeGen/X86/vector-trunc-usat.ll | 30 +- test/CodeGen/X86/vector-trunc.ll | 48 +- test/CodeGen/X86/vector-tzcnt-128.ll | 20 +- test/CodeGen/X86/vector-tzcnt-256.ll | 16 +- test/CodeGen/X86/verifier-phi-fail0.mir | 2 +- test/CodeGen/X86/verifier-phi.mir | 4 +- ...gisters-cleared-in-machine-functions-liveins.ll | 8 +- test/CodeGen/X86/vpshufbitqbm-intrinsics.ll | 2 +- test/CodeGen/X86/vselect-pcmp.ll | 70 +- test/CodeGen/X86/widen_bitops-0.ll | 36 +- test/CodeGen/X86/x86-64-baseptr.ll | 2 +- test/CodeGen/X86/x86-interleaved-access.ll | 4 +- test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll | 2 +- test/CodeGen/X86/xor-combine-debugloc.ll | 10 +- test/CodeGen/X86/xray-empty-firstmbb.mir | 4 +- test/CodeGen/X86/xray-empty-function.mir | 2 +- test/CodeGen/X86/xray-multiplerets-in-blocks.mir | 4 +- test/CodeGen/X86/zext-demanded.ll | 8 +- test/DebugInfo/ARM/PR16736.ll | 2 +- test/DebugInfo/ARM/sdag-split-arg.ll | 4 +- test/DebugInfo/ARM/sdag-split-arg1.ll | 2 +- test/DebugInfo/COFF/fpo-csrs.ll | 20 +- test/DebugInfo/COFF/local-variable-gap.ll | 6 +- test/DebugInfo/COFF/pieces.ll | 18 +- test/DebugInfo/COFF/register-variables.ll | 22 +- test/DebugInfo/MIR/AArch64/clobber-sp.mir | 60 +- .../MIR/AArch64/implicit-def-dead-scope.mir | 78 +- test/DebugInfo/MIR/ARM/split-superreg-complex.mir | 52 +- test/DebugInfo/MIR/ARM/split-superreg-piece.mir | 52 +- test/DebugInfo/MIR/ARM/split-superreg.mir | 52 +- test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 48 +- test/DebugInfo/MIR/X86/bit-piece-dh.mir | 22 +- test/DebugInfo/MIR/X86/empty-inline.mir | 26 +- test/DebugInfo/MIR/X86/kill-after-spill.mir | 204 +- .../DebugInfo/MIR/X86/live-debug-values-3preds.mir | 142 +- test/DebugInfo/MIR/X86/live-debug-values-spill.mir | 242 +- test/DebugInfo/MIR/X86/live-debug-values.mir | 102 +- .../X86/live-debug-vars-unused-arg-debugonly.mir | 30 +- .../MIR/X86/live-debug-vars-unused-arg.mir | 32 +- test/DebugInfo/MIR/X86/livedebugvalues-limit.mir | 108 +- test/DebugInfo/MIR/X86/mlicm-hoist.mir | 14 +- test/DebugInfo/MIR/X86/no-cfi-loc.mir | 14 +- test/DebugInfo/MIR/X86/regcoalescer.mir | 10 +- test/DebugInfo/MSP430/sdagsplit-1.ll | 8 +- test/DebugInfo/X86/bbjoin.ll | 10 +- test/DebugInfo/X86/dbg-addr-dse.ll | 4 +- test/DebugInfo/X86/dbg-addr.ll | 2 +- test/DebugInfo/X86/dbg-value-dag-combine.ll | 4 +- test/DebugInfo/X86/dbg-value-frame-index.ll | 2 +- test/DebugInfo/X86/dbg-value-regmask-clobber.ll | 2 +- test/DebugInfo/X86/dbg-value-transfer-order.ll | 2 +- test/DebugInfo/X86/debug-loc-asan.ll | 2 +- test/DebugInfo/X86/live-debug-values.ll | 2 +- test/DebugInfo/X86/live-debug-vars-dse.mir | 28 +- test/DebugInfo/X86/op_deref.ll | 2 +- test/DebugInfo/X86/pieces-4.ll | 2 +- test/DebugInfo/X86/pr34545.ll | 18 +- test/DebugInfo/X86/sdag-combine.ll | 2 +- test/DebugInfo/X86/sdag-salvage-add.ll | 6 +- test/DebugInfo/X86/sdag-split-arg.ll | 10 +- test/DebugInfo/X86/sdagsplit-1.ll | 4 +- test/DebugInfo/X86/spill-indirect-nrvo.ll | 4 +- test/DebugInfo/X86/spill-nontrivial-param.ll | 4 +- test/DebugInfo/X86/spill-nospill.ll | 6 +- test/DebugInfo/X86/vla.ll | 2 +- .../LoopStrengthReduce/X86/ivchain-X86.ll | 4 +- test/Verifier/test_g_phi.mir | 8 +- unittests/CodeGen/GlobalISel/PatternMatchTest.cpp | 6 +- unittests/CodeGen/MachineInstrTest.cpp | 2 +- unittests/CodeGen/MachineOperandTest.cpp | 2 +- unittests/MI/LiveIntervalTest.cpp | 12 +- 970 files changed, 29359 insertions(+), 29350 deletions(-)