Hi,
On Mon, 27 Feb 2023 at 06:20, Tao Zhang quic_taozha@quicinc.com wrote:
Hi Mike,
在 2/24/2023 11:43 PM, Tao Zhang 写道:
Hi Mike,
I have a question about the following code you promoted.
Patch - coresight: cti: Add device tree support for v8 arch CTI
You set the following mask variables in the function "cti_plat_create_v8_connections".
tc->con_in->used_mask = 0x3; /* sigs <0 1> */
tc->con_out->used_mask = 0x7; /* sigs <0 1 2 > */
Could you tell us why they should be set to 0x3 and 0x7 here?
Is there any particular reason for this design?
Add more background on this question below.
The CPU CTIs we use based on the CTI v8 architecture that support more trigger number for the trigger in and trigger out.
If we configured "arm,coresight-cti-v8-arch" for CPU CTIs in the device tree, it will causes the trigger number to be unavailable.
CTI's in v8 attached to the CPU have an architecturally mandated set of triggers - this is the set that is defined with this compatible. This is designed to save effort in describing the elements in the device tree.
Is there any way to solve the problem we have now?
Is it possible to change the trigger number supported by CPU CTIs by configuring device tree?
For custom CTIs use the arm,coresight-cti compatible, and describe your CTI as shown in ./Documentation/devicetree/bindings/arm/arm.coresight-cti.yaml This has an example of custom CTI bindings
Regards
Mike
Best,
Tao
Best,
Tao
Hi Mike
在 2/27/2023 6:58 PM, Mike Leach 写道:
Hi,
On Mon, 27 Feb 2023 at 06:20, Tao Zhang quic_taozha@quicinc.com wrote:
Hi Mike,
在 2/24/2023 11:43 PM, Tao Zhang 写道:
Hi Mike,
I have a question about the following code you promoted.
Patch - coresight: cti: Add device tree support for v8 arch CTI
You set the following mask variables in the function "cti_plat_create_v8_connections".
tc->con_in->used_mask = 0x3; /* sigs <0 1> */
tc->con_out->used_mask = 0x7; /* sigs <0 1 2 > */
Could you tell us why they should be set to 0x3 and 0x7 here?
Is there any particular reason for this design?
Add more background on this question below.
The CPU CTIs we use based on the CTI v8 architecture that support more trigger number for the trigger in and trigger out.
If we configured "arm,coresight-cti-v8-arch" for CPU CTIs in the device tree, it will causes the trigger number to be unavailable.
CTI's in v8 attached to the CPU have an architecturally mandated set of triggers - this is the set that is defined with this compatible. This is designed to save effort in describing the elements in the device tree.
But the CTI's in v8 attached to the CPU on our processor that have more triggers in design.
Do you have any ideas for this case?
Best,
Tao
Is there any way to solve the problem we have now?
Is it possible to change the trigger number supported by CPU CTIs by configuring device tree?
For custom CTIs use the arm,coresight-cti compatible, and describe your CTI as shown in ./Documentation/devicetree/bindings/arm/arm.coresight-cti.yaml This has an example of custom CTI bindings
Regards
Mike
Best,
Tao
Best,
Tao
Hi,
On Tue, 28 Feb 2023 at 05:56, Tao Zhang quic_taozha@quicinc.com wrote:
Hi Mike
在 2/27/2023 6:58 PM, Mike Leach 写道:
Hi,
On Mon, 27 Feb 2023 at 06:20, Tao Zhang quic_taozha@quicinc.com wrote:
Hi Mike,
在 2/24/2023 11:43 PM, Tao Zhang 写道:
Hi Mike,
I have a question about the following code you promoted.
Patch - coresight: cti: Add device tree support for v8 arch CTI
You set the following mask variables in the function "cti_plat_create_v8_connections".
tc->con_in->used_mask = 0x3; /* sigs <0 1> */
tc->con_out->used_mask = 0x7; /* sigs <0 1 2 > */
Could you tell us why they should be set to 0x3 and 0x7 here?
Is there any particular reason for this design?
Add more background on this question below.
The CPU CTIs we use based on the CTI v8 architecture that support more trigger number for the trigger in and trigger out.
If we configured "arm,coresight-cti-v8-arch" for CPU CTIs in the device tree, it will causes the trigger number to be unavailable.
CTI's in v8 attached to the CPU have an architecturally mandated set of triggers - this is the set that is defined with this compatible. This is designed to save effort in describing the elements in the device tree.
But the CTI's in v8 attached to the CPU on our processor that have more triggers in design.
Do you have any ideas for this case?
Yes - as mentioned below, use the "arm,coresight-cti" compatible in device tree and describe all the connections in your design in device tree
"arm,coresight-cti-v8-arch" represents v8 CTIs that have a fixed set of connections as mandated by the architecture manual. The driver will use this compatible to set up this set of connections only - without the connections being described in the device tree.
Regards
Mike
Best,
Tao
Is there any way to solve the problem we have now?
Is it possible to change the trigger number supported by CPU CTIs by configuring device tree?
For custom CTIs use the arm,coresight-cti compatible, and describe your CTI as shown in ./Documentation/devicetree/bindings/arm/arm.coresight-cti.yaml This has an example of custom CTI bindings
Regards
Mike
Best,
Tao
Best,
Tao
-
Mike Leach -
Tao Zhang