CoreSight April 2023

coresight@lists.linaro.org

9 participants
28 discussions

[PATCH v4 00/11] Add support to configure TPDM DSB subunit

by Tao Zhang

Introduction of TPDM DSB subunit DSB subunit is responsible for creating a dataset element, and is also optionally responsible for packing it to fit multiple elements on a single ATB transfer if possible in the configuration. The TPDM Core Datapath requests timestamps be stored by the TPDA and then delivering ATB sized data (depending on ATB width and element size, this could be smaller or larger than a dataset element) to the ATB Mast FSM. The DSB subunit must be configured prior to enablement. This series adds support for TPDM to configure the configure DSB subunit. Once this series patches are applied properly, the new tpdm nodes for should be observed at the tpdm path /sys/bus/coresight/devices/tpdm* which supports DSB subunit. e.g. /sys/devices/platform/soc(a)0/69d0000.tpdm/tpdm0#ls -l | grep dsb -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_edge_ctrl -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_edge_ctrl_mask -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_mode -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_patt_mask -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_patt_ts -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_patt_type -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_patt_val -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_trig_patt_mask -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_trig_patt_val -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_trig_ts -rw-r--r-- 1 root root 4096 Jan 1 00:01 dsb_trig_type We can use the commands are similar to the below to configure the TPDMs which support DSB subunit. Enable coresight sink first. echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink echo 1 > /sys/bus/coresight/devices/tpdm0/reset echo 0x3 0x3 0x1 > /sys/bus/coresight/devices/tpdm0/dsb_edge_ctrl_mask echo 0x6d 0x6d 0 > /sys/bus/coresight/devices/tpdm0/dsb_edge_ctrl echo 1 > /sys/bus/coresight/devices/tpdm0/dsb_patt_ts echo 1 > /sys/bus/coresight/devices/tpdm0/dsb_patt_type echo 0 > /sys/bus/coresight/devices/tpdm0/dsb_trig_ts echo 0 0xFFFFFFFF > /sys/bus/coresight/devices/tpdm0/dsb_patt_mask echo 0 0xFFFFFFFF > /sys/bus/coresight/devices/tpdm0/dsb_trig_patt_val This patch series depends on patch series "[PATCH v2 0/9] coresight: Fix CTI module refcount leak by making it a helper device" https://patchwork.kernel.org/project/linux-arm-kernel/patch/20230425143542.… TPDM_DSB commit tree: https://git.codelinaro.org/clo/linux-kernel/coresight/-/tree/tpdm-dsb-v4 https://git.codelinaro.org/clo/linux-kernel/coresight/-/commits/tpdm-dsb-v4 Changes in V4: 1. Change the range of the property "qcom,dsb-element-size", and change the type to enumeration. -- Suzuki K Poulose, Krzysztof Kozlowski 2. Change dsb_esize from 32 bits to 8 bits. -- Suzuki K Poulose 3. Update the function tpda_set_element_size since James has updated the dependency series. Meanwhile, it will send out a warning if it detects more than one TPDM from the same TPDA input port. -- Suzuki K Poulose 4. Add a source_sub_type for TPDM to distinguish TPDM from the other coresight source. -- Suzuki K Poulose 5. Return error if the element size is not configured on devicetree in TPDA enablement. -- Suzuki K Poulose 6. Move memory allocation from "tpdm_init_datasets" to "tpdm_datasets_setup". Rename "tpdm_init_datasets" as "tpdm_reset_datasets". -- Suzuki K Poulose 7. Replace "coresight_disable" with "coresight_disable_source" to disable the TPDM in resetting. -- Suzuki K Poulose 8. Make sure "drvdata" is not NULL pointer before using it. -- Suzuki K Poulose 9. Change "set_dsb_cycacc_mode" to "set_dsb_test_mode" since cycle accurate mode is not supported on the current targets. It is replaced by test mode. 10. Document the value of "dsb_mode". -- Suzuki K Poulose 11. Macros are used to replace the formulas on dsb edge control nodes. -- Suzuki K Poulose 12. Document the values of "dsb_trig_patt_val" and "dsb_trig_patt_mask". -- Suzuki K Poulose 13. Combine two pattern related loops to one. And move DSB TIER register configurations to the new function "set_dsb_tier". -- Suzuki K Poulose 14. Rename the property "qcom,dsb_msr_num" to "qcom,dsb-msrs-num". -- Suzuki K Poulose, Krzysztof Kozlowski Changes in V3: 1. Move the property "qcom,dsb-element-size" to TPDM devicetree and update the TPDM yaml file for this item. -- Suzuki K Poulose 2. Add the error message when the DSB element size is not set to 32-bit or 64-bit. -- Suzuki K Poulose 3. Add more information to the comments of patch #3 -- Suzuki K Poulose 4. Combine the value updates to the TPDM_DSB_CR for TPDM. -- Suzuki K Poulose 5. Remove the function "tpdm_datasets_alloc", and fold its code to a new function "tpdm_init_datasets". It will complete the initialization of TPDM. -- Suzuki K Poulose 6. Change the method of qualifying input values. -- Suzuki K Poulose 7. Add the documentation of the new sysfs handles. -- Suzuki K Poulose 8. Provide the separate handles for the "mode bits". -- Suzuki K Poulose Changes in V2: 1. Change the name of the property "qcom,dsb-elem-size" to "qcom,dsb-element-size" -- Suzuki K Poulose 2. Update the TPDA yaml file for the item "qcom,dsb-elem-size". -- Krzysztof Kozlowski 3. Add the full name of DSB in the description of the item "qcom,dsb-elem-size". -- Rob Herring Changes in V1: 1. Change the definition of the property "qcom,dsb-elem-size" from "uint32-array" to "uint32-matrix". -- Krzysztof Kozlowski 2. Add the full name of DSB. -- Rob Herring 3. Deal with 2 entries in an iteration in TPDA driver. -- Suzuki K Poulose 4. Divide the function "tpdm_datasets_alloc" into two functions, "tpdm_datasets_setup" and "tpdm_datasets_alloc". 5. Detecte the input string with the conventional semantics automatically, and constrain the size of the input value. -- Suzuki K Poulose 6. Use the hook function "is_visible()" to hide the DSB related knobs if the data sets are missing. -- Suzuki K Poulose 7. Use the macros "FIELD_GET" and "FIELD_PREP" to set the values. -- Suzuki K Poulose 8. Update the definition of the macros in TPDM driver. 9. Update the comments of the values for the nodes which are for DSB element creation and onfigure pattern match output. -- Suzuki K Poulose 10. Use API "sysfs_emit" to "replace scnprintf". -- Suzuki K Poulose Tao Zhang (11): dt-bindings: arm: Add support for DSB element size coresight-tpda: Add DSB dataset support coresight-tpdm: Initialize DSB subunit configuration coresight-tpdm: Add reset node to TPDM node coresight-tpdm: Add nodes to set trigger timestamp and type coresight-tpdm: Add node to set dsb programming mode coresight-tpdm: Add nodes for dsb edge control coresight-tpdm: Add nodes to configure pattern match output coresight-tpdm: Add nodes for timestamp request dt-bindings: arm: Add support for DSB MSR register coresight-tpdm: Add nodes for dsb msr support .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 174 ++++++ .../bindings/arm/qcom,coresight-tpdm.yaml | 19 + drivers/hwtracing/coresight/coresight-core.c | 1 + drivers/hwtracing/coresight/coresight-tpda.c | 92 ++- drivers/hwtracing/coresight/coresight-tpda.h | 4 + drivers/hwtracing/coresight/coresight-tpdm.c | 691 ++++++++++++++++++++- drivers/hwtracing/coresight/coresight-tpdm.h | 79 +++ include/linux/coresight.h | 1 + 8 files changed, 1045 insertions(+), 16 deletions(-) -- 2.7.4

10 months, 3 weeks

[PATCH v6 00/13] coresight: Fix CTI module refcount leak by making it a helper device

by James Clark

Changes since v5: * Formatting fixes * helper->type != CORESIGHT_DEV_TYPE_HELPER -> !coresight_is_helper() * Remove ect from coresight_dev_type and add a static assert so that it stays in sync with the enum ------------------ Changes since v4: * Update commit message on patch 1 * Drop previous change that added lockdep checks to coresight_add_helper() because they are already in mutex_lock(). But keep extra comment. * Check for allocation failure in coresight_add_out_conn() ------------------ Changes since v3: * Put connection loss fix at the beginning so that it can be backported * Replace coresight_find_link_{x}() with coresight_find_out_connection() * Reorder coresight_enable_source() arguments for consistency * Add source and destination reference counts so that two link devices connected together don't clash * Add coresight_is_helper() * Fix overwriting csdev bug in coresight_orphan_match() * Don't clear conns[i]->dest_fwnode in coresight_remove_conns() in case it's used again * Use dev instead of adev->dev for devmem allocation in acpi_coresight_parse_graph() so that it's consistent with DT mode and doesn't cause a warning on free. * Rename coresight_add_helper_mutex() -> coresight_add_helper() * Ensure coresight_mutex isn't already held in coresight_add_helper() * Return new connection from coresight_add_out_conn() * Comment and formatting improvements ------------------ Changes since v2: * Make out_conns array contiguous instead of sparse which simplifies filling and using it. New connections are always added to the end * Store pointers to individual connection objects so that they can be shared between inputs and outputs * Fix an existing bug where connection info was lost when unloading a device * Simplify connection fixup functions. Now the orphan mechanism is used for inputs in the same way as outputs to guarantee that all connections have both an input and an output set * Use input connections to disconnect devices on unload instead of iterating through them all * Make refcount a property of the connection rather than use it's own array based on the number of inputs and outputs * Fix a bug in v2 where helpers attached to the source device weren't disabled because coresight-etm-perf.c was making a raw call to disable rather than using a helper. * Change names of connection members to make direction explicit now that the connection is shared between input and outputs ------------------ Changes since v1: * Don't dereference handle in tmc_etr_get_buffer() when not in perf mode. * Fix some W=1 warnings * Add a commit to rename child/output in terms of local/remote ------------------- Currently there is a refcount leak in CTI when using system wide mode or tracing multithreaded applications. See the last commit for a reproducer. This prevents the module from being unloaded. Historically there have been a few issues and fixes attempted around here which have resulted in some extra logic and a member to keep track of CTI being enabled 'struct coresight_device->ect_enabled'. The fix in commit 665c157e0204 ("coresight: cti: Fix hang in cti_disable_hw()") was also related to CTI having its own enable/disable path which came later than other devices. If we make CTI a helper device and enable helper devices adjacent to the path we get very similar enable/disable behavior to now, but with more reuse of the existing reference counting logic in the coresight core code. This also affects CATU which can have a little bit of its hard coded enable/disable code removed. Enabling CATU on the generic path does require that input connections are tracked so that it can get its associated ETR buffer. Applies to coresight/next (18996a113f256) but everything except the first fixes commit requires the realloc_array patch here [1]. Also available in full here [2]. [1]: https://lore.kernel.org/linux-arm-kernel/20230320145710.1120469-1-james.cla… [2]: https://gitlab.arm.com/linux-arm/linux-jc/-/tree/james-cs-cti-module-refcou… James Clark (13): coresight: Fix loss of connection info when a module is unloaded coresight: Use enum type for cs_mode wherever possible coresight: Change name of pdata->conns coresight: Rename nr_outports to nr_outconns coresight: Rename connection members to make the direction explicit coresight: Dynamically add connections coresight: Store pointers to connections rather than an array of them coresight: Simplify connection fixup mechanism coresight: Store in-connections as well as out-connections coresight: Make refcount a property of the connection coresight: Refactor out buffer allocation function for ETR coresight: Enable and disable helper devices adjacent to the path coresight: Fix CTI module refcount leak by making it a helper device drivers/hwtracing/coresight/coresight-catu.c | 21 +- drivers/hwtracing/coresight/coresight-core.c | 605 +++++++++--------- .../hwtracing/coresight/coresight-cti-core.c | 52 +- .../hwtracing/coresight/coresight-cti-sysfs.c | 4 +- drivers/hwtracing/coresight/coresight-cti.h | 4 +- drivers/hwtracing/coresight/coresight-etb10.c | 13 +- .../hwtracing/coresight/coresight-etm-perf.c | 4 +- .../coresight/coresight-etm3x-core.c | 6 +- .../coresight/coresight-etm4x-core.c | 6 +- .../hwtracing/coresight/coresight-funnel.c | 26 +- .../hwtracing/coresight/coresight-platform.c | 269 +++----- drivers/hwtracing/coresight/coresight-priv.h | 17 +- .../coresight/coresight-replicator.c | 23 +- drivers/hwtracing/coresight/coresight-stm.c | 6 +- drivers/hwtracing/coresight/coresight-sysfs.c | 17 +- .../hwtracing/coresight/coresight-tmc-etf.c | 26 +- .../hwtracing/coresight/coresight-tmc-etr.c | 110 ++-- drivers/hwtracing/coresight/coresight-tmc.h | 2 + drivers/hwtracing/coresight/coresight-tpda.c | 23 +- drivers/hwtracing/coresight/coresight-tpdm.c | 4 +- drivers/hwtracing/coresight/coresight-tpiu.c | 7 +- drivers/hwtracing/coresight/coresight-trbe.c | 3 +- drivers/hwtracing/coresight/ultrasoc-smb.c | 11 +- drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- include/linux/coresight.h | 126 ++-- 25 files changed, 714 insertions(+), 673 deletions(-) -- 2.34.1

10 months, 3 weeks

[PATCH V2 0/5] coresight: etm4x: Migrate ACPI AMBA devices to platform driver

by Anshuman Khandual

CoreSight ETM4x devices could be accessed either via MMIO (handled via amba_driver) or CPU system instructions (handled via platform driver). But this has the following issues : - Each new CPU comes up with its own PID and thus we need to keep on adding the "known" PIDs to get it working with AMBA driver. While the ETM4 architecture (and CoreSight architecture) defines way to identify a device as ETM4. Thus older kernels won't be able to "discover" a newer CPU, unless we add the PIDs. - With ACPI, the ETM4x devices have the same HID to identify the device irrespective of the mode of access. This creates a problem where two different drivers (both AMBA based driver and platform driver) would hook into the "HID" and could conflict. e.g., if AMBA driver gets hold of a non-MMIO device, the probe fails. If we have single driver hooked into the given "HID", we could handle them seamlessly, irrespective of the mode of access. - CoreSight is heavily dependent on the runtime power management. With ACPI, amba_driver doesn't get us anywhere with handling the power and thus one need to always turn the power ON to use them. Moving to platform driver gives us the power management for free. Due to all of the above, we are moving the MMIO based etm4x devices to be supported via platform driver. The series makes the existing platform driver generic to handle both type of the access modes. Although existing AMBA driver would still continue to support DT based etm4x MMIO devices. The series applies on 6.3-rc4. Changes in V2: - Enables ACPI etm4x device support in the existing platform driver - Dropped last two patches from the series - Dropped redundant 'devarch' checking from is_etm4x_device() - Renamed updated is_etm4x_device() as is_etm4x_devtype() - Fixed arguments in fallback stub for etm4_check_arch_features() - Tagged etm4_dev_pm_ops with etm4_platform_driver - Updated the comment for coresight_get_enable_apb_pclk() helper - Updated the comment for new 'pclk' element in struct etm4_drvdata - Dropped the clock when devm_ioremap_resource() fails - Convert IS_ERR() into a direct pointer check in etm4_remove_platform_dev() - Dropped "arm,coresight-etm4x" compatible property from etm4_match[] Changes in V1: https://lore.kernel.org/all/20230317030501.1811905-1-anshuman.khandual@arm.… Cc: Steve Clevenger <scclevenger(a)os.amperecomputing.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Frank Rowand <frowand.list(a)gmail.com> Cc: Russell King (Oracle) <linux(a)armlinux.org.uk> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Len Brown <lenb(a)kernel.org> Cc: Sudeep Holla <sudeep.holla(a)arm.com> Cc: Lorenzo Pieralisi <lpieralisi(a)kernel.org> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Leo Yan <leo.yan(a)linaro.org> Cc: devicetree(a)vger.kernel.org Cc: linux-acpi(a)vger.kernel.org Cc: coresight(a)lists.linaro.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-kernel(a)vger.kernel.org Anshuman Khandual (4): coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier coresight: etm4x: Drop iomem 'base' argument from etm4_probe() coresight: etm4x: Drop pid argument from etm4_probe() coresight: etm4x: Change etm4_platform_driver driver for MMIO devices Suzuki Poulose (1): coresight: etm4x: Add ACPI support in platform driver drivers/acpi/acpi_amba.c | 1 - .../coresight/coresight-etm4x-core.c | 114 ++++++++++++++---- drivers/hwtracing/coresight/coresight-etm4x.h | 4 + include/linux/coresight.h | 59 +++++++++ 4 files changed, 154 insertions(+), 24 deletions(-) -- 2.25.1

11 months, 2 weeks

[PATCH 0/7] perf: cs-etm: Fixes around timestamped and timeless decoding

by James Clark

The first commit contains a fix for a recently introduced regression, but was always a shortcoming in the Coresight code anyway. The following commits are a tidyup in preparation for the last commit, which is a fairly major change to the decode logic that's also indirectly related to the regression so I thought it would be good time to fix that now. Applies to perf/core (9be6ab181b7b) James Clark (7): perf: cs-etm: Fix timeless decode mode detection perf tools: Add util function for overriding user set config values perf: cs-etm: Don't test full_auxtrace because it's always set perf: cs-etm: Validate options after applying them perf: cs-etm: Allow user to override timestamp and contextid settings perf: cs-etm: Use bool type for boolean values perf: cs-etm: Add separate decode paths for timeless and per-thread modes tools/perf/arch/arm/util/cs-etm.c | 223 +++++++++--------- tools/perf/arch/arm/util/pmu.c | 2 + tools/perf/arch/arm64/util/arm-spe.c | 26 +- tools/perf/arch/x86/util/intel-pt.c | 22 +- tools/perf/tests/shell/test_arm_coresight.sh | 24 ++ .../perf/util/cs-etm-decoder/cs-etm-decoder.h | 8 +- tools/perf/util/cs-etm.c | 200 +++++++++++----- tools/perf/util/cs-etm.h | 6 +- tools/perf/util/evsel.c | 29 +++ tools/perf/util/evsel.h | 3 + 10 files changed, 325 insertions(+), 218 deletions(-) -- 2.34.1

12 months

[PATCH v5 00/13] coresight: Fix CTI module refcount leak by making it a helper device

by James Clark

Changes since v4: * Update commit message on patch 1 * Drop previous change that added lockdep checks to coresight_add_helper() because they are already in mutex_lock(). But keep extra comment. * Check for allocation failure in coresight_add_out_conn() ------------------ Changes since v3: * Put connection loss fix at the beginning so that it can be backported * Replace coresight_find_link_{x}() with coresight_find_out_connection() * Reorder coresight_enable_source() arguments for consistency * Add source and destination reference counts so that two link devices connected together don't clash * Add coresight_is_helper() * Fix overwriting csdev bug in coresight_orphan_match() * Don't clear conns[i]->dest_fwnode in coresight_remove_conns() in case it's used again * Use dev instead of adev->dev for devmem allocation in acpi_coresight_parse_graph() so that it's consistent with DT mode and doesn't cause a warning on free. * Rename coresight_add_helper_mutex() -> coresight_add_helper() * Ensure coresight_mutex isn't already held in coresight_add_helper() * Return new connection from coresight_add_out_conn() * Comment and formatting improvements ------------------ Changes since v2: * Make out_conns array contiguous instead of sparse which simplifies filling and using it. New connections are always added to the end * Store pointers to individual connection objects so that they can be shared between inputs and outputs * Fix an existing bug where connection info was lost when unloading a device * Simplify connection fixup functions. Now the orphan mechanism is used for inputs in the same way as outputs to guarantee that all connections have both an input and an output set * Use input connections to disconnect devices on unload instead of iterating through them all * Make refcount a property of the connection rather than use it's own array based on the number of inputs and outputs * Fix a bug in v2 where helpers attached to the source device weren't disabled because coresight-etm-perf.c was making a raw call to disable rather than using a helper. * Change names of connection members to make direction explicit now that the connection is shared between input and outputs ------------------ Changes since v1: * Don't dereference handle in tmc_etr_get_buffer() when not in perf mode. * Fix some W=1 warnings * Add a commit to rename child/output in terms of local/remote ------------------- Currently there is a refcount leak in CTI when using system wide mode or tracing multithreaded applications. See the last commit for a reproducer. This prevents the module from being unloaded. Historically there have been a few issues and fixes attempted around here which have resulted in some extra logic and a member to keep track of CTI being enabled 'struct coresight_device->ect_enabled'. The fix in commit 665c157e0204 ("coresight: cti: Fix hang in cti_disable_hw()") was also related to CTI having its own enable/disable path which came later than other devices. If we make CTI a helper device and enable helper devices adjacent to the path we get very similar enable/disable behavior to now, but with more reuse of the existing reference counting logic in the coresight core code. This also affects CATU which can have a little bit of its hard coded enable/disable code removed. Enabling CATU on the generic path does require that input connections are tracked so that it can get its associated ETR buffer. Applies to coresight/next (197b6b60ae7b) but also requires the realloc_array patch here [1]. Also available in full here [2]. [1]: https://lore.kernel.org/linux-arm-kernel/20230306152723.3090195-1-james.cla… [2]: https://gitlab.arm.com/linux-arm/linux-jc/-/tree/james-cs-cti-module-refcou… James Clark (13): coresight: Fix loss of connection info when a module is unloaded coresight: Use enum type for cs_mode wherever possible coresight: Change name of pdata->conns coresight: Rename nr_outports to nr_outconns coresight: Rename connection members to make the direction explicit coresight: Dynamically add connections coresight: Store pointers to connections rather than an array of them coresight: Simplify connection fixup mechanism coresight: Store in-connections as well as out-connections coresight: Make refcount a property of the connection coresight: Refactor out buffer allocation function for ETR coresight: Enable and disable helper devices adjacent to the path coresight: Fix CTI module refcount leak by making it a helper device drivers/hwtracing/coresight/coresight-catu.c | 21 +- drivers/hwtracing/coresight/coresight-core.c | 593 ++++++++++-------- .../hwtracing/coresight/coresight-cti-core.c | 52 +- .../hwtracing/coresight/coresight-cti-sysfs.c | 4 +- drivers/hwtracing/coresight/coresight-cti.h | 4 +- drivers/hwtracing/coresight/coresight-etb10.c | 13 +- .../hwtracing/coresight/coresight-etm-perf.c | 4 +- .../coresight/coresight-etm3x-core.c | 6 +- .../coresight/coresight-etm4x-core.c | 6 +- .../hwtracing/coresight/coresight-funnel.c | 26 +- .../hwtracing/coresight/coresight-platform.c | 269 ++++---- drivers/hwtracing/coresight/coresight-priv.h | 17 +- .../coresight/coresight-replicator.c | 23 +- drivers/hwtracing/coresight/coresight-stm.c | 6 +- drivers/hwtracing/coresight/coresight-sysfs.c | 17 +- .../hwtracing/coresight/coresight-tmc-etf.c | 26 +- .../hwtracing/coresight/coresight-tmc-etr.c | 110 ++-- drivers/hwtracing/coresight/coresight-tmc.h | 2 + drivers/hwtracing/coresight/coresight-tpda.c | 23 +- drivers/hwtracing/coresight/coresight-tpdm.c | 4 +- drivers/hwtracing/coresight/coresight-tpiu.c | 7 +- drivers/hwtracing/coresight/coresight-trbe.c | 3 +- drivers/hwtracing/coresight/ultrasoc-smb.c | 11 +- drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- include/linux/coresight.h | 127 ++-- 25 files changed, 708 insertions(+), 668 deletions(-) -- 2.34.1

1 year

Re: [PATCH 2/7] perf tools: Add util function for overriding user set config values

by Arnaldo Carvalho de Melo

Em Mon, Apr 24, 2023 at 06:36:14PM +0300, Adrian Hunter escreveu: > On 24/04/23 16:47, James Clark wrote: > > There is some duplicated code to only override config values if they > > haven't already been set by the user so make a util function for this. > > > > Signed-off-by: James Clark <james.clark(a)arm.com> > > One minor comment, nevertheless: > > Acked-by: Adrian Hunter <adrian.hunter(a)intel.com> I just moved to evsel__set_config_if_unset() to util/pmu.c, next to some other evsel__ functions to not break the python.so binding, before I was getting: [acme@quaco perf-tools-next]$ perf test -v python Couldn't bump rlimit(MEMLOCK), failures may take place when creating BPF maps, etc 19: 'import perf' in python : --- start --- test child forked, pid 500086 python usage test: "echo "import sys ; sys.path.append('/tmp/build/perf-tools-next/python'); import perf" | '/usr/bin/python3' " Traceback (most recent call last): File "<stdin>", line 1, in <module> ImportError: /tmp/build/perf-tools-next/python/perf.cpython-311-x86_64-linux-gnu.so: undefined symbol: perf_pmu__format_bits test child finished with -1 ---- end ---- 'import perf' in python: FAILED! [acme@quaco perf-tools-next]$ Please run 'perf test' and 'make -C tools/perf build-test' prior to sending pull requests, Thanks, applied. - Arnaldo

1 year

[PATCH] coresight: perf: Release Coresight path when alloc trace id failed

by Ruidong Tian

Error handler for etm_setup_aux can not release coresight path because cpu mask was cleared when coresight_trace_id_get_cpu_id failed. Call coresight_release_path function explicitly when alloc trace id filed. Signed-off-by: Ruidong Tian <tianruidong(a)linux.alibaba.com> --- drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 711f451b6946..89e8ed214ea4 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -402,6 +402,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, trace_id = coresight_trace_id_get_cpu_id(cpu); if (!IS_VALID_CS_TRACE_ID(trace_id)) { cpumask_clear_cpu(cpu, mask); + coresight_release_path(path); continue; } -- 2.33.1

1 year

[PATCH] coresight: core: Add coresight name support

by Mao Jinlong

Apart from STM and ETM sources, there will be more sources added to coresight components. For example, there are over 10 TPDM sources. Add coresight name support for custom names which will be easy to identify the source. Signed-off-by: Mao Jinlong <quic_jinlmao(a)quicinc.com> --- drivers/hwtracing/coresight/coresight-core.c | 34 +++++++++++--------- 1 file changed, 19 insertions(+), 15 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index d3bf82c0de1d..5e95d9c7f256 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1733,28 +1733,32 @@ char *coresight_alloc_device_name(struct coresight_dev_list *dict, { int idx; char *name = NULL; + const char *coresight_name = NULL; struct fwnode_handle **list; + struct device_node *node = dev->of_node; mutex_lock(&coresight_mutex); - idx = coresight_search_device_idx(dict, dev_fwnode(dev)); - if (idx < 0) { - /* Make space for the new entry */ - idx = dict->nr_idx; - list = krealloc_array(dict->fwnode_list, - idx + 1, sizeof(*dict->fwnode_list), - GFP_KERNEL); - if (ZERO_OR_NULL_PTR(list)) { - idx = -ENOMEM; - goto done; + if (!of_property_read_string(node, "coresight-name", &coresight_name)) + name = devm_kasprintf(dev, GFP_KERNEL, "%s", coresight_name); + else { + idx = coresight_search_device_idx(dict, dev_fwnode(dev)); + if (idx < 0) { + /* Make space for the new entry */ + idx = dict->nr_idx; + list = krealloc_array(dict->fwnode_list, + idx + 1, sizeof(*dict->fwnode_list), + GFP_KERNEL); + if (ZERO_OR_NULL_PTR(list)) + goto done; + + list[idx] = dev_fwnode(dev); + dict->fwnode_list = list; + dict->nr_idx = idx + 1; } - list[idx] = dev_fwnode(dev); - dict->fwnode_list = list; - dict->nr_idx = idx + 1; + name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); } - - name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); done: mutex_unlock(&coresight_mutex); return name; -- 2.39.0

1 year

Re: [PATCH 2/7] perf tools: Add util function for overriding user set config values

by James Clark

On 24/04/2023 16:36, Adrian Hunter wrote: > On 24/04/23 16:47, James Clark wrote: >> There is some duplicated code to only override config values if they >> haven't already been set by the user so make a util function for this. >> >> Signed-off-by: James Clark <james.clark(a)arm.com> > > One minor comment, nevertheless: > > Acked-by: Adrian Hunter <adrian.hunter(a)intel.com> > Thanks for the review >> --- >> tools/perf/arch/arm64/util/arm-spe.c | 26 ++----------------------- >> tools/perf/arch/x86/util/intel-pt.c | 22 ++------------------- >> tools/perf/util/evsel.c | 29 ++++++++++++++++++++++++++++ >> tools/perf/util/evsel.h | 3 +++ >> 4 files changed, 36 insertions(+), 44 deletions(-) >> [...] >> } >> } >> + >> +/* >> + * Set @config_name to @val as long as the user hasn't already set or cleared it >> + * by passing a config term on the command line. >> + * >> + * @val is the value to put into the bits specified by @config_name rather than >> + * the bit pattern. It is shifted into position by this function, so to set >> + * something to true, pass 1 for val rather than a pre shifted value. >> + */ >> +#define field_prep(_mask, _val) (((_val) << (ffsll(_mask) - 1)) & (_mask)) > > I notice there is already tools/include/linux/bitfield.h > so may FIELD_PREP from there could be used? I tried that first, but it seems like quite a lot of effort went into it to make it work on const only values so it doesn't work here. There is this [1] change to make a non const one but it doesn't look like it went anywhere: [1]: https://patchwork.kernel.org/project/linux-omap/patch/3a54a6703879d10f08cf0…

1 year

Re: [PATCH v3 1/3] Coresight: Add coresight dummy driver

by Suzuki K Poulose

On 22/04/2023 08:37, Hao Zhang wrote: > Some Coresight devices that kernel don't have permission to access or > configure. So there need driver to register dummy devices as Coresight > devices. It may also be used to define components that may not have > any programming interfaces (e.g, static links), so that paths can be > established in the driver. Provide Coresight API for dummy device > operations, such as enabling and disabling dummy devices. Build the > Coresight path for dummy sink or dummy source for debugging. > > Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com> > --- > drivers/hwtracing/coresight/Kconfig | 11 ++ > drivers/hwtracing/coresight/Makefile | 1 + > drivers/hwtracing/coresight/coresight-dummy.c | 179 ++++++++++++++++++ > include/linux/coresight.h | 1 + > 4 files changed, 192 insertions(+) > create mode 100644 drivers/hwtracing/coresight/coresight-dummy.c > > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig > index 2b5bbfffbc4f..06f0a7594169 100644 > --- a/drivers/hwtracing/coresight/Kconfig > +++ b/drivers/hwtracing/coresight/Kconfig > @@ -236,4 +236,15 @@ config CORESIGHT_TPDA > > To compile this driver as a module, choose M here: the module will be > called coresight-tpda. > + > +config CORESIGHT_DUMMY > + tristate "Dummy driver support" > + help > + Enables support for dummy driver. Dummy driver can be used for > + CoreSight sources/sinks that are owned and configured by some > + other subsystem and use Linux drivers to configure rest of trace > + path. > + > + To compile this driver as a module, choose M here: the module will be > + called coresight-dummy. > endif > diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile > index 33bcc3f7b8ae..995d3b2c76df 100644 > --- a/drivers/hwtracing/coresight/Makefile > +++ b/drivers/hwtracing/coresight/Makefile > @@ -30,3 +30,4 @@ obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o > coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ > coresight-cti-sysfs.o > obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o > +obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o > diff --git a/drivers/hwtracing/coresight/coresight-dummy.c b/drivers/hwtracing/coresight/coresight-dummy.c > new file mode 100644 > index 000000000000..1fb8b3d1c170 > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-dummy.c > @@ -0,0 +1,179 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/platform_device.h> > +#include <linux/coresight.h> > +#include <linux/of.h> > +#include <linux/pm_runtime.h> > + > +#include "coresight-priv.h" > +#include "coresight-trace-id.h" > + > +struct dummy_drvdata { > + struct device *dev; > + struct coresight_device *csdev; > + int traceid; > +}; > + > +DEFINE_CORESIGHT_DEVLIST(source_devs, "dummy_source"); > +DEFINE_CORESIGHT_DEVLIST(sink_devs, "dummy_sink"); > + > +static int dummy_source_enable(struct coresight_device *csdev, > + struct perf_event *event, u32 mode) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy source enabled\n"); > + > + return 0; > +} > + > +static void dummy_source_disable(struct coresight_device *csdev, > + struct perf_event *event) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy source disabled\n"); > +} > + > +static int dummy_sink_enable(struct coresight_device *csdev, u32 mode, > + void *data) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy sink enabled\n"); > + > + return 0; > +} > + > +static int dummy_sink_disable(struct coresight_device *csdev) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy sink disabled\n"); > + > + return 0; > +} > + > +static const struct coresight_ops_source dummy_source_ops = { > + .enable = dummy_source_enable, > + .disable = dummy_source_disable, > +}; > + > +static const struct coresight_ops dummy_source_cs_ops = { > + .source_ops = &dummy_source_ops, > +}; > + > +static const struct coresight_ops_sink dummy_sink_ops = { > + .enable = dummy_sink_enable, > + .disable = dummy_sink_disable, > +}; > + > +static const struct coresight_ops dummy_sink_cs_ops = { > + .sink_ops = &dummy_sink_ops, > +}; > + > +static int dummy_probe(struct platform_device *pdev) > +{ > + int trace_id; > + struct device *dev = &pdev->dev; > + struct device_node *node = dev->of_node; > + struct coresight_platform_data *pdata; > + struct dummy_drvdata *drvdata; > + struct coresight_desc desc = { 0 }; > + > + if (of_device_is_compatible(node, "arm,coresight-dummy-source")) { > + trace_id = coresight_trace_id_get_system_id(); Why is this needed ? If at all we need something, this must be explicitly asked for. How is this used ? > + if (trace_id < 0) > + return trace_id; > + > + desc.name = coresight_alloc_device_name(&source_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + > + desc.type = CORESIGHT_DEV_TYPE_SOURCE; > + desc.subtype.source_subtype = > + CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS; > + desc.ops = &dummy_source_cs_ops; > + } else if (of_device_is_compatible(node, "arm,coresight-dummy-sink")) { > + desc.name = coresight_alloc_device_name(&sink_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + > + desc.type = CORESIGHT_DEV_TYPE_SINK; > + desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_DUMMY; > + desc.ops = &dummy_sink_cs_ops; > + } else { > + dev_err(dev, "Device type not set\n"); > + return -EINVAL; > + } > + > + pdata = coresight_get_platform_data(dev); > + if (IS_ERR(pdata)) > + return PTR_ERR(pdata); > + pdev->dev.platform_data = pdata; > + > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > + if (!drvdata) > + return -ENOMEM; If we have allocated a traceid, we must clean it up here and/or at device removal. > + > + drvdata->dev = &pdev->dev; > + platform_set_drvdata(pdev, drvdata); > + > + desc.pdata = pdev->dev.platform_data; > + desc.dev = &pdev->dev; > + drvdata->csdev = coresight_register(&desc); > + if (IS_ERR(drvdata->csdev)) > + return PTR_ERR(drvdata->csdev); > + > + drvdata->traceid = (u8)trace_id; Where/how is this used ? Suzuki

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CoreSight April 2023