Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent patchset fixing a handful of simple GICv3 bugs
+ usual codereview work
+ sent out a sketch of how we can transition our documentation
from the current texinfo manual to a set of sphinx manuals
+ had a look at the practicalities of converting our hand-written
VFP decoder to 'decodetree' -- this may be the easiest way to
support FPU configs which only support single-precision, like Cortex-M33
thanks
-- PMM
== Progress ==
* FDPIC
- GCC: Updated patch 03/21 with changes in the handling of -static
according to feedback. Pinged the whole series.
* GCC upstream validation:
- reported a couple of regressions
* Infra
- [stalled] working on adding binutils regression testing to round-robin jobs
- cleanup
- handling some problems with boards upgrades and crashes
== Next ==
FDPIC:
- GCC: handle feedback
UBSAN/bare-metal: look at how to make it easier to use on CPUs that
lack sync primivites (eg cortex-m0)
== This Week ==
* PR88837 (9/10)
- Tweaked patch to handle few more special cases with suggestions from
Richard.
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing tasks
o LLVM
* 8.0.1-rc1 Started Binaries build.
* Buildbots babysitting:
- Two fixes committed upstream
* Machine outliner:
- Liveness informations are not accurate after FrameLowering,
investigation on-going.
o Misc
* Various meetings and discussions.
[VIRT-343 # ARMv8.5-RNG, Random Number Generator ]
Posted v7 and v8. I think this is now ready for merge,
but I said that last week as well. :-P
[VIRT-327 # Richard's upstream QEMU work ]
More gvec work, some of which applies to target/arm,
and some to tcg/aarch64/, but all of which is in support
of David's target/s390x work. Should be coming to a
close on that soon.
Posted v7 of my do_syscall split.
Reviewed v13 of the RX target, adjusted it slightly for
my tlb_fill changes. I think this now ready to merge.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ finally managed to complete review of Damien's reset handling rework
+ rolled v2 of patchset to support booting large kernel images
+ sent a cleanup patchset to rename arm.h to boot.h
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ working on making the CPU model configurable without FPU or DSP,
so that we can correctly model the Musca-A and MPS2-AN521 boards as
not having FPU or DSP on CPU #0.
thanks
-- PMM
== Progress ==
* FDPIC
- GCC: sent updated patch series (v5). Received feedback about -static
support vs dynamic-linkker need. Discussing options.
* GCC upstream validation:
- reported a couple of regressions
- found a bug in qemu while testing v4.0.0, preparing a reproducer
* Infra
- [stalled] working on adding binutils regression testing to round-robin jobs
- cleanup
== Next ==
FDPIC:
- GCC: handle feedback
UBSAN/bare-metal: look at how to make it easier to use on CPUs that
lack sync primivites (eg cortex-m0)
== Progress ==
* [GlobalISel] Add support for integers > 32 bits wide [LLVM-310]
- While looking into this I found and fixed a bug in the generic
part of IRTranslator, which reduced the number of fallbacks on the ARM
test-suite by about 20%
- Currently working on lowering function calls etc for 64-bit types
* [GlobalISel] Refactor CallLowering [LLVM-568]
- The CallLowering interface really needs a cleanup before I
continue with LLVM-310
- This has been discussed upstream in the past and would benefit all
targets, so I'm going to give it a shot
* SVE2 code reviews
== Plan ==
* More of the same
* Out of office 29 May - 10 June
