All,
During Connect the suggestion was made that each working group should have
its own IRC Channel for discussions and topics relating to the group in
particular (as opposed to #linaro which is 'generic' Linaro conversations).
Therefore I have just set up #linaro-tcwg on Freenode for the Toolchain
Working Group.
This channel is public and open to anyone who wants to talk with the TCWG
group about anything toolchain related.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
QEMU Device and Machine Models ([QEMU-418])
===========================================
- posted [kvm-unit-tests PATCH v1 0/4] enable LPI and ITS for TCG
Message-Id: <20210428101844.22656-1-alex.bennee(a)linaro.org>
[QEMU-418] <https://projects.linaro.org/browse/QEMU-418>
QEMU Upstream Work ([UM-2])
===========================
- updated [testing/next branch] we some more fixes
[UM-2] <https://projects.linaro.org/browse/UM-2>
[testing/next branch]
<https://github.com/stsquad/qemu/tree/testing/next>
Other
=====
- Spent more time on blog post for [LBO-99]
[LBO-99] <https://projects.linaro.org/browse/LBO-99>
Completed Reviews [3/3]
=======================
[PATCH v3 0/2] tests/docker: tests/tcg/ppc64le: Newer toolchain to build tests for PowerISA v3.1 instructions
Message-Id: <20210423205757.1752480-1-matheus.ferst(a)eldorado.org.br>
[PATCH 0/2] plugins: Freeing allocated values in hash tables.
Message-Id: <20210421140934.7561-1-ma.mandourr(a)gmail.com>
[PATCH v4 00/12] qtests: Check accelerator available at runtime via QMP 'query-accels'
Message-Id: <20210415163304.4120052-1-philmd(a)redhat.com>
[PATCH v2 0/8] GICv3 LPI and ITS feature implementation
Message-Id: <20210401024152.203896-1-shashi.mallela(a)linaro.org>
Absences
========
- Bank Holiday on Monday
Current Review Queue
====================
TODO [PATCH v4 00/12] qtests: Check accelerator available at runtime via QMP 'query-accels'
Message-Id: <20210415163304.4120052-1-philmd(a)redhat.com>
===================================================================================================================================================
TODO [RFC PATCH v2 0/6] hw/arm/virt: Introduce cpu topology support
Message-Id: <20210413080745.33004-1-wangyanan55(a)huawei.com>
==============================================================================================================================
TODO [PATCH v2 00/12] virtio-gpu: Add support for Blob resources feature
Message-Id: <20210420065347.2685768-1-vivek.kasireddy(a)intel.com>
========================================================================================================================================
TODO [RFC v14 00/80] arm cleanup experiment for kvm-only build
Message-Id: <20210416162824.25131-1-cfontana(a)suse.de>
===================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
- release work: rc5 Monday, and then 6.0 final release on Thursday.
- sent a pullreq with some accumulated arm patches now 6.1 is open
- fixed a trivial bug where WFI in the usermode emulator crashed
* QEMU-406 [QEMU support for MVE (M-profile Vector Extension; Helium)]
- Implemented more instructions: logic ops, VCLS, VCLZ, VREV, VMVN,
VABS, VNEG, VADD, VDUP, VSUB, VMULH, and widening VLDR.
(These are all simple "always call an out-of-line helper" versions.
We'll want an optimised "we know we have no predication" version
for many of them, but I plan to do that afterwards.)
- Worked through the v8M Arm ARM identifying which insns we must
implement. There are 210 insn patterns in total, of which I have
currently implemented 23, so we can produce a rough-and-ready
progress meter: 23/210 (11%)
(There is of course work to do beyond just the insns, but they
form the bulk of it, so the meter has some utility.)
-- PMM
QEMU Support for Xen ([STR-20])
===============================
- continued reviewing [RFC v12 00/65] arm cleanup experiment for
kvm-only build Message-Id: <20210326193701.5981-1-cfontana(a)suse.de>
- this is looking pretty solid now
- cut new version of [arm build clean-ups based on Claudio's series]
- testing reveals some breakage to track down next week
[STR-20] <https://projects.linaro.org/browse/STR-20>
[arm build clean-ups based on Claudio's series]
<https://github.com/stsquad/qemu/tree/xen/arm-build-cleanups-v3>
QEMU Upstream Work ([UM-2])
===========================
- posted [PULL 00/11] rc2 fixes (check-tcg, gitlab, gdbstub)
Message-Id: <20210406150041.28753-1-alex.bennee(a)linaro.org>
- some time trying to debug last weeks PR, eventually merged
- posted [PATCH for post 6.0 v1 00/25] testing/next
(hexagon/tricore/test cc) Message-Id:
<20210419145435.14083-1-alex.bennee(a)linaro.org>
- posted [RFC PATCH] tests/tcg: add a multiarch signals test to stress
test signal delivery Message-Id:
<20210421132931.11127-1-alex.bennee(a)linaro.org>
- hunting for RC failure in s390x
- posted [PATCH] target/s390x: fix s390_probe_access to check
PAGE_WRITE_ORG for writeability Message-Id:
<20210422154427.13038-1-alex.bennee(a)linaro.org>
[UM-2] <https://projects.linaro.org/browse/UM-2>
GSoC/Intern Mentoring
=====================
GSoC 2021 proposal initiation for AGL
Message-Id: <CAC+yH-Z_KZKuQ0nmAgk-+B+HW88sNjztObtWwazof+cAGJGuuQ(a)mail.gmail.com>
GSoC: cache modelling plugin inquiry
Message-Id: <CAD-LL6hLk1XAB5VWwHgMOWQV=bT1+FCnf8f-q9MVw5e5A4RMqg(a)mail.gmail.com>
GSoC - QEMU Ideas
Message-Id: <CALpwMJz0kb2BDreTWBbt945FR+sLX=sKzHSv8pMb5LkLwXqEJA(a)mail.gmail.com>
Synced up with potential AGL Jailhouse/VirtIO GSoC applicant
Other
=====
- bit more write-up of blog post for [LBO-99]
[LBO-99] <https://projects.linaro.org/browse/LBO-99>
Completed Reviews [8/8]
=======================
[PATCH RESEND] docs: clarify absence of set_features in vhost-user
Message-Id: <20210325144846.17520-1-hi(a)alyssa.is>
[PATCH] docs: Add a QEMU Code of Conduct and Conflict Resolution Policy document
Message-Id: <72bc8020-2028-82db-219c-a6ae311e26df(a)redhat.com>
[PATCH v4 00/12] target/arm mte fixes
Message-Id: <20210406174031.64299-4-richard.henderson(a)linaro.org>
[PATCH 0/4] Acceptance Tests: update assets location and cancel tests if missing
Message-Id: <20200907042000.415931-1-crosa(a)redhat.com>
Added: <2020-09-07 Mon>
[RFC PATCH 0/3] tests/tcg/ppc64le: paddi tests
Message-Id: <20210415214138.563795-1-matheus.ferst(a)eldorado.org.br>
[RFC PATCH 00/15] gitlab-ci: Allow forks to use different pipelines than mainstream
Message-Id: <20210418233448.1267991-11-f4bug(a)amsat.org>
[PATCH 0/2] gdbstub: implement support for blocking interrupts on single stepping
Message-Id: <20210401144152.1031282-1-mlevitsk(a)redhat.com>
[PATCH v2 0/7] linux-user: sigaction fixes/cleanups
Message-Id: <20210422230227.314751-1-richard.henderson(a)linaro.org>
testing/next - hexagon toolchain update
Message-Id: <BN7PR02MB4194DF5752EF3BADE858018DB8799(a)BN7PR02MB4194.namprd02.prod.outlook.com>
[PATCH] tests/tcg: Run tests on arch variants again
Message-Id: <20210312152105.1836543-1-f4bug(a)amsat.org>
[PATCH 0/1] libbpf dependecy for docker containers.
Message-Id: <20210406082947.672708-1-andrew(a)daynix.com>
[PATCH v3 00/15] tests/tcg: Add TriCore tests
Message-Id: <20210305170045.869437-1-kbastian(a)mail.uni-paderborn.de>
Absences
========
Current Review Queue
====================
TODO [RFC PATCH v2 0/6] hw/arm/virt: Introduce cpu topology support
Message-Id: <20210413080745.33004-1-wangyanan55(a)huawei.com>
==============================================================================================================================
TODO [PATCH v2 00/12] virtio-gpu: Add support for Blob resources feature
Message-Id: <20210420065347.2685768-1-vivek.kasireddy(a)intel.com>
========================================================================================================================================
TODO [RFC v14 00/80] arm cleanup experiment for kvm-only build
Message-Id: <20210416162824.25131-1-cfontana(a)suse.de>
===================================================================================================================
TODO [PATCH v2 0/8] GICv3 LPI and ITS feature implementation
Message-Id: <20210401024152.203896-1-shashi.mallela(a)linaro.org>
===========================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
- code review:
+ Shashi's ITS emulation patchset
+ RTH's remaining fixes for MTE
+ RTH's patchset to implement alignment checking
- release work: sadly we found a pretty nasty crasher bug at the last
minute, so we'll release rc5 on Monday and final release Thursday
(with luck)
* QEMU-406 [QEMU support for MVE (M-profile Vector Extension; Helium)]
- useful discussions with RTH about how to implement MVE and in
particular how to handle its various flavours of insn predication
- some progress in writing code to implement the first insn (VLDR)
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- Reported a few regressions
* GCC
- committed further fix for testcase for PR96770
- sent a few testsuite improvement patches
- resumed work on MVE/auto-vectorization. Added support for vcmp.f16.
Checking fp16 support in previous patches.
* Misc
- scripts patch reviews
== Next ==
* MVE auto-vectorization/intrinsics improvements
* GCC/cortex-M testing improvements & fixes
== Progress ==
* GCC upstream validation:
- Reported a few regressions
- Reduced build frequency on release branches, now same as trunk:
daily bump and arm/aarch64 "interesting" commits
* GCC
- pinged further fix for testcase for PR96770
- preparing cortex-m55 validation setup
- looking at cmse tests vs qemu
- Linaro BZ 5755/upstream 100049
* GDB
- uploaded cleaned up last known-to-work branch to sourceware so that
maintainers can have a look at it
- uploaded latest wip based on 8.2 branch too
* Misc
- scripts patch reviews
== Next ==
* MVE auto-vectorization/intrinsics improvements
* GCC/cortex-M testing improvements & fixes
Progress:
* UM-2 [QEMU upstream maintainership]
- Finished and posted patches implementing remap support for AN524
- Release work for rc3
- Sent a set of refactoring patches that split out some files we
were previously #including into translate.c so they are separate
compilation units.
- Thought a bit more about reset handling (in the course of writing
the AN524 remap patches I again ran into some of the deficiencies
of our current reset implementation; I really must take some time
this release cycle to try to improve things here...)
- Fixed bug where our AN547 board model accidentally disabled the FPU
on the Cortex-M55...
- ...and one where we were accidentally giving it an M33 rather than
an M55 !
- Respun and extended some patches from Paolo which fix our use of
QEMU and system headers in the 2 C++ files in the codebase (which
were broken by a change in new versions of glib)
- started looking at some of the for-6.1 patch review queue, which I
had been postponing in favour of for-6.0 stuff
* QEMU-406 [QEMU support for MVE (M-profile Vector Extension; Helium)]
- re-read the MVE portions of the v8M Arm ARM, sketched out a plan
of where to start with the QEMU implementation
thanks
-- PMM
https://gitlab.com/rth7680/qemu/-/commits/tgt-arm-bf16
It isn't a large extension, so all done. I added aarch64 simd, aarch32 neon,
and sve support all at once. I've tested it via risu vs FVP.
I've based this on my SVE2 branch, since there are some cleanups that made that
easier. I'll post patches to qemu-devel next week.
r~
