On Thu, Jun 20, 2013 at 2:41 PM, Thomas Petazzoni
<thomas.petazzoni(a)free-electrons.com> wrote:
> Hello,
>
> I'm facing a bizarre problem with an armeb toolchain built by
> Buildroot. I'm also posting this to the crossgcc@ list since there are
> some gcc/binutils experts out there.
>
> First, a little bit of background. ARM Big Endian comes into two
> variants:
>
> * BE32, which was used up to ARMv5, where both the instructions and
> the data are Big Endian.
>
> * BE8, which is used since ARMv6, where the instructions remain
> little-endian and only the data are big-endian.
>
> See
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0338g/ch06s0…
> for some details about this.
>
> So, I've built an ARMv7 Cortex-A8 toolchain, with the armeb
> architecture selected. The CROSS-gcc -v shows that it was configured as
> follows:
>
> --target=armeb-buildroot-linux-uclibcgnueabi
> --with-abi=aapcs-linux
> --with-arch=armv7-a
> --with-tune=cortex-a8
>
> Then, I wrote a simple program that contains some data and
> instructions, built it under several conditions, and observed with
> hexdump whether the data and code was little-endian or big-endian.
>
> And the results are somewhat surprising: when I explicitly pass
> -mbig-endian, I get the proper behavior (BE8 code with code in little
> endian and data in big endian), but when I don't pass any flags to the
> compiler, I get an incorrect behavior: both the code and data are big
> endian, as if the BE8 wasn't used (and readelf confirms that it wasn't
> used). See below the detailed results.
>
> Note that the compiler is supposed to automatically use BE8 on
> ARMv6/ARMv7 and BE32 on ARMv5 and earlier cores.
>
> The data is DEADBEEF, and the instruction is E52DB004.
>
> Flags used Observed data Observed code Comment
> ======================= =============== =============== =========================================
>
> -mlittle-endian EFBEADDE 04B02DE5 Code and data in LE -> OK
> -mbig-endian DEADBEEF 04B02DE5 Code LE, data BE, binary marked BE8 -> OK
> no flags DEADBEEF E52DB004 Data BE (ok!), code BE (*NOT* ok) -> NOK
> -march=armv5t -mbig-endian DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
> -march=armv5t DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
>
> As can be seen in this table:
>
> (*) On ARMv5, regardless of whether -mbig-endian is passed or not, the
> code produced is correct (both code and data are big endian, which is
> correct for ARMv5 where the big endian mode is BE32)
>
> (*) On ARMv7 however, the code is different whether -mbig-endian is
> passed or not, even though an "armeb-linux" compiler is supposed to
> generate big endian code by default. When no flags is passed, both the
> data *and* code are big-endian (so it's BE32 like on ARMv5), but
> passing -mbig-endian makes the thing behave properly (code is
> little-endian, data is big-endian).
>
> I'm using binutils 2.23.2 and gcc 4.7.3.
>
> Any ideas?
Hi Thomas,
I added linaro-toolchain to CC as there may be someone there who knows
the answer.
I got an app to compile fine for v8 FM with gcc, but I notice that
seg-faults hang the simulator. Using raise() properly exits FM,
but I can't seem to trap the seg-fault with signal() or do anything
intelligent to know about the seg-fault. Normal execution works well.
int
main(int argc, char *argv[])
{
* (unsigned int *) (0) = 0; // seg-fault hangs FM
return(0);
}
thanks,
Rory
-----Original Message-----
From: linaro-toolchain-boun...(a)lists.linaro.org
[mailto:linaro-toolchain-boun...@lists.linaro.org] On Behalf Of Matthew
Gretton-Dann
Sent: Sunday, May 19, 2013 2:47 PM
To: Padgett Don-B43265
Cc: linaro-toolchain(a)lists.linaro.org
Subject: Re: Semi-hosting on v8 Foundation Model using gnu tools
Don,
On 17/05/13 20:57, Padgett Don-B43265 wrote:
> The v8 Foundation Model User Guide has a bare metal hello world example
> that uses semi-hosting. The Makefile uses ARM tools, however. Is there
> equivalent support for this example using a bare metal version of the
> gnu tools, such as
> gcc-linaro-aarch64-none-elf-4.8-2013.04-20130422_linux.tar.xz? I took
> a look, but didn't see a way to do this.
It is possible but not necessarily easy.
Using the binary tools you've downloaded you will want to do something like the
following:
aarch64-none-elf-gcc -specs=elf-aem-ve.specs ...
The -specs option has to be on all your invocations of GCC and G++. You should
also invoke the linker through GCC with this option.
Then you need to invoke the model, given an image called foo.axf:
Foundation_v8 --image foo.axf --semi-host="foo.axf OPT1 OPT2" --quiet
Note that the first option to --semi-host is the name of the image again.
Thanks,
Matt
You'll have better luck sending bug reports to the linaro-toolchain
mailing list.
On 18 June 2013 11:50, Bernhard Rosenkränzer
<bernhard.rosenkranzer(a)linaro.org> wrote:
> Hi,
> the 4.8-2013.06 tarball built without version overrides reports itself as:
> 4.8-2013.06-0~dev
> Looks like the release flag isn't set in the tarball.
>
> ttyl
> bero
--
Mans Rullgard / mru
== Progress ==
* Merges for linaro-4.8-2013.06:
- investigated why the cross-validation lack libpthread and libdl.
- fixed cbuild to make these libs available in the same dir as ld-linux.so
- not sure why it wasn't necessary several weeks ago when I first
spawn libsanitizer tests: we changed the prebuilt tarball since then,
but the libs are still at the same place; the binutils version changed
though.
* Re-spawned a merge request for libsanitizer, using the updated
cbuild (libpthread/libdl support, qemu flags updated) and the updated
gcc-4.8 (with my patch to cope with qemu's output of /proc/self/maps)
* Merges for linaro-4.8-2013.07: updated list
* Aarch64 frame growing downward: started.
* Disable-peeling: restarting looking at vectorizer.
== Next ==
* Merges for linaro-4.[78]-2013.07: update list
* disable peeling: see how to make the vectorizer less aggressive
* Aarch64 frame growing downward.
* Neon intrinsics/vuzip/veor: resume work
* Book hotel/flight for Connect
== Issues ==
* None.
== Progress ==
* Releases merge reviews:
- Finished reviews for releases.
* Launchpad bug #1187247:
- Closed as invalid since the issue was on an
attempt to access at an invalid address.
* Cbuild Babysitting:
- Fixed 4.8 repository update on toolchain64.
- Recreate ancestors tarballs and re-spawned jobs
- Re-started Calxedas...
* LRA on ARM and AArch64:
- Resumed the task.
- Investigation of AArch64 failure on-going.
== Plan ==
* Mainly LRA
== Progress ==
* libssp support for AArch64
Libssp support needed AArch64 frame to grow downward. But it is
currently defined as growing upward.
This work is currently in hold. Needed frame layout changes before
restarting. Waiting for feedback from Matt.
* AAarch64 testing
Drilling down Boot strap failure with GCC 4.9 trunk on open embedded
image with V8 model. Fails at time xg++ is linking. Not much progress.
Set up Cross build and test in V8 model for GCC testsuites.
Also looking at increasing timeout for individual tests.
* AArch64 LTO and PGO support.
Started on understanding PGO and LTO runs with AArch64.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* Continue LTO and PGO runs for AArch64
== Progress ==
* Investigated gdb.dwarf2 unsupported issues wrote two new patches for
gdb.dwarf2 testsuite.
* Read some background on dwarf2 to translate test written in x86
assembly into arm assembly.
* Got refusal of visa from Irish embassy. Ran after visa consultants
for issues related to visa application.
* Calls with Irish consulate officers for appeal process and causes of refusal.
== Plan ==
* Submit ready patches for dwarf2 untested/unsupported problems.
* Translate dwarf2 tests written in x86 to arm asm.
* Chromebook os update on a faster sd card. (Still pending)
* Add JIRA cards for gdb features missing on arm. (Still pending)
* Prepare documentation for future visa applications.
== Issues ==
* None
== Progress ==
* Investigate conditional compare RTL representation.
- Expand conditional compare to cmp_and/cmp_ior.
- Test is ongoing
* Investigate lp: 1189445. Patch is in testing.
* Identify the root cause for lp: 1189448. FSF4.8 does not have the
buggy code. Linaro 2013.06 and trunk have fixed it.
== Plan ==
* Continue on conditional compare.
== Public Holiday ==
* Monday, 10 June (4 day week)
== Progress ==
* VRP based zero/sign extension
- Pinged the patch.
* Generate a single call to divmod
- Builtin based implementation bootstrapped and passes regression.
- posted patch and initiated discussion
(http://gcc.gnu.org/ml/gcc/2013-06/msg00100.html)
- long long is not handled now
* Better end of loop counter optimisation
- Dropped md patch
- Verified that Bin Cheng's RTL change noop_move_p fixes this.
== Plan ==
* Respond to patch review
* Set-up X86 benchmarking locally for Spec2k
== Progress ==
* Did QEMU testing for the release by running several images on a
few platforms.
* Did the GCC 4.7-2013.06 release.
* Did the GCC 4.8-2013.06 release.
* Did a spin of the GCC 4.7-2013.06 release.
* Updated benchmark parsing scripts, downloaded historical
benchmark data and data from the release testing.
* Updated SQL query and gnuplot scripts to work with new data.
* Produced some benchmark graphs.
* Finally figured out how to spawn remote Cbuildv1 tests and
benchmarks.
== Plan ==
* Focus on performance and regression test graphs.
* Do builds of FSF GCC branches to compare with Linaro branches.
* Continue improving Cbuildv2 as use it to do all these builds and
testing.
- rob -
