== This Week ==
* GNU-659 (calculix LTO regression)
- Gathered perf stats for various opt levels and posted on ML
* LLVM-611 (tune blx lowering heuristic)
- Dave Green committed my patch which had to be reverted due
to build-bot failure with expensive checks turned on.
- Posted analysis of the issue upstream
* Misc
- Committed patch to add --strict option to bmk-scripts/spec2xxx-config.
== Next Week ==
- Continue ongoing tasks
Progress: (short week, three days)
* VIRT-65 [QEMU upstream maintainership]
+ sent patches to remove QEMU's support for KVM on AArch32 hosts
(which we deprecated when the kernel removed its end of the support)
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ fp16 work is now in master
+ sent patches to add support for mps2-an386 and mps2-an500
boards (Cortex-M4 and Cortex-M7 setups similar to the existing
mps2-an385 Cortex-M3 board model)
thanks
-- PMM
== This Week ==
* GNU-659 (LTO calculix regression)
- Started upstream discussion
* LLVM-611 (Tune lowering heuristic to blx for code size)
- Addressing upstream feedback for patch to fold tLDRpci, tBLx -> tBL
in foldMemoryOperand hook
- Added new heuristic to ISel, for follow up patch.
* LLVM-639 (Better idiom for comparing 32-bit values on arm)
- Started working on patch
== Next Week ==
- Continue ongoing tasks
1 day off
== Progress ==
* GCC upstream validation:
- reported several regressions
- committed testcase fixes
* GCC
- patch for PR94758 (-mpurecode and cortex-m23) applied to
thunk/gcc-10/gcc-9. Bug closed, but opened several others to track
performance improvements with -mpurecode
- PR96768: switch tables for thumb-1 with -mpure-code. Patch sent,
discussion on-going
- PR96769: WIP
- PR71233: missing ACLE intrinsics. I will first have to update the list
* benchmarking:
- Scripts to run coremark on stm32 now merged, working on using them
in production
* misc:
- infra patches/reviews
- internal support, leading to GCC testsuite cleanups for cortex-m
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ Just the usual code review and pull request work.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ I have all fp16 insns (both VFP and Neon) implemented now, and the
VFP patches have been reviewed. Just need to track down a few last
test failures and then I can send the Neon patches out for review.
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- reported several regressions
- committed testcase fixes
* GCC
- sent patch for PR94758 (-mpurecode and cortex-m23)
* benchmarking:
- Scripts to run coremark on stm32 now merged, working on using them
in production
* misc:
- infra patches/reviews
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
Progress (short week, 2 days):
* VIRT-65 [QEMU upstream maintainership]
+ We got 5.1 out the door. I think this is the first release
in the many years I've been handling them where we managed to
avoid needing an rc4.
+ Spent a fair amount of time helping Paolo to debug his conversion
of the QEMU build system to Meson. We managed to land that today.
+ First of the KVM Forum programme committee meetings
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ More progress with fp16 support work; another handful of insns done.
thanks
-- PMM
[VIRT-327 # Richard's upstream QEMU work ]
Patch review, all over the place.
Patches for pauth impdef algorithm.
Patches for mte WnR bit.
Patches for crypto/cipher cleanup.
[VIRT-349 # QEMU SVE2 Support ]
Split out 20 patches from the SVE2 patch set.
r~
- 2 half days off
== Progress ==
* GCC upstream validation:
- reported several regressions (trunk and release branches)
- committed 2 testcase fixes
* GCC
- resumed work on PR94758 (-mpurecode and cortex-m23). Patch almost ready
* benchmarking:
- Scripts to run coremark on stm32 now merged, working on using them
in production
* misc:
- infra patches/reviews
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
VirtIO RPMB ([STR-5])
=====================
- got program_key and get_write_counter implemented
- finally making progress, the rest "should" be easy ;-)
[STR-5] <https://projects.linaro.org/browse/STR-5>
[testing kernel]
<http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/test…>
[qemu tree] <https://github.com/stsquad/qemu/tree/virtio/vhost-user-rpmb>
VirtIO Portability Demo ([STR-13])
==================================
- spent some time getting the MachiatoBin up and running
- system now working with latest 5.8 kernel and KVM support confirmed
- still debugging Xen setup, will return to this when back from
holidays
- currently no graphics available - need to perform [minor surgery] on
the PCI bus
[STR-13] <https://projects.linaro.org/browse/STR-13>
[minor surgery]
<http://wiki.macchiatobin.net/tiki-index.php?page=MACCHIATObin+%28up+to+rev+…>
Upstream Work ([QEMU-109])
==========================
- posted [PATCH v4 00/40] testing/next (vm, gitlab, fixes) Message-Id:
<20200701135652.1366-1-alex.bennee(a)linaro.org> : done
- posted [PULL 00/16] various fixes for rc2 (semihosting, tcg, docker,
tests/vm) Message-Id:
<20200727122357.31263-1-alex.bennee(a)linaro.org>
- a little leadership committee review
[QEMU-109] <https://projects.linaro.org/browse/QEMU-109>
Completed Reviews [2/2]
=======================
[PATCH RFC 00/10] fix some comment spelling errors
Message-Id: <20200812101500.2066-1-zhaolichang(a)huawei.com>
[PATCH 0/2] target/arm: Implement an IMPDEF pauth algorithm
Message-Id: <2219f3f9-7894-f898-0cad-43eccaa2a70d(a)linaro.org>
Absences
========
- short week
- holiday 13th-28th Aug - see you in September
Current Review Queue
====================
* [PATCH] plugins: new syscalls plugin
Message-Id: <20200812115816.4454-1-matthias(a)weckbecker.name>
Added: <2020-08-12 Wed>
* [PATCH v2 00/14] Reverse debugging
Message-Id: <159714365354.18946.2967871683340522027.stgit@pasha-ThinkPad-X280>
Added: <2020-08-11 Tue>
* [PATCH 00/11] Run cross-compilation build tests in the gitlab-CI
Message-Id: <20200804170055.2851-1-thuth(a)redhat.com>
Added: <2020-08-04 Tue>
* [RFC v3 0/8] QEMU cpus.c refactoring part2
Message-Id: <20200803090533.7410-1-cfontana(a)suse.de>
Added: <2020-08-03 Mon>
--
Alex Bennée
== Progress ==
* GCC upstream validation:
- reported a few regressions / minor testcase fix
* benchmarking:
- Created the Jenkins job to run coremark on stm32 (added/updated
scripts for that)
* misc:
- infra patches/reviews
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
I got an email and an irc ping for
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/6924
My change has no relation to the test failure.
Flaky bots aren't allowed to send email or ping, so either make it
non-flaky or make it not send stuff.
Thanks,
Nico
[VIRT-327 # Richard's upstream QEMU work ]
Patch review -- lots of riscv vector stuff.
Fix for PAUTH error indication.
Diagnosed an MTE KASAN problem
-- my theory is a guest os thread error.
Investigation into PAUTH slowdown.
r~
Realised I missed last week so bumper update.
VirtIO Initiative ([STR-9])
===========================
- Inter-VM device emulation (call on Mon 20th July 2020) Message-Id:
<20200715112342.GD18817(a)stefanha-x1.localdomain>
- posted [RFC PATCH v1 0/3] put arm64 kvm_config on a diet Message-Id:
<20200804124417.27102-1-alex.bennee(a)linaro.org>
- EGL Call
- saw an interesting breakdown from other team doing vhost-user
- OpenSynergy
- got a good idea of where they are heading and the various players
[STR-9] <https://projects.linaro.org/browse/STR-9>
VirtIO RPMB ([STR-5])
=====================
- got the return path working
- re-based my [testing kernel] and made more spec conforming tweaks
[STR-5] <https://projects.linaro.org/browse/STR-5>
[simplified testing branch]
<http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/revi…>
[kernel]
<http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/revi…>
[testing kernel]
<http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/test…>
VirtIO Portability Demo ([STR-13])
==================================
- spent some time getting the MachiatoBin up and running
[STR-13] <https://projects.linaro.org/browse/STR-13>
Upstream Work ([QEMU-109])
==========================
- posted [PATCH v4 00/40] testing/next (vm, gitlab, fixes) Message-Id:
<20200701135652.1366-1-alex.bennee(a)linaro.org> : done
- Debugging a failure on m68k with pgd_find_hole_fallback
- seems 4.17+ with no /proc leave mmap_min_addr = 0 and NOREPLACE
hits it
- rth pondering a fix, may get back to it on Monday
- More debugging of icount bug, looks like -icount sleep=off interacts
with [bug 1859021]
- posted [PULL 00/16] various fixes for rc2 (semihosting, tcg, docker,
tests/vm) Message-Id:
<20200727122357.31263-1-alex.bennee(a)linaro.org>
[QEMU-109] <https://projects.linaro.org/browse/QEMU-109>
[bug 1859021] <https://bugs.launchpad.net/qemu/+bug/1859021>
Completed Reviews [6/6]
=======================
[PATCH v2 0/2] linux-user: fix clock_nanosleep()
Message-Id: <20200722174612.2917566-1-laurent(a)vivier.eu>
- CLOSING NOTE [2020-07-24 Fri 21:47]
Queued to my tree
Added: <2020-07-22 Wed>
[PATCH v1 0/3] python/qemu: follow-up changes for ConsoleSocket
Message-Id: <20200717203041.9867-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-07-24 Fri 21:47]
Queued to my tree
Added: <2020-07-18 Sat>
[virtio-dev] [PATCH v5 00/10] introduce virtio vhost-user backend device type
Message-Id: <20200518203721.7625-1-ndragazis(a)arrikto.com>
- CLOSING NOTE [2020-07-24 Fri 21:48]
Interesting stuff, sent a few terminology fixes
Added: <2020-07-15 Wed>
[PATCH v2] cputlb: Make store_helper less fragile to compiler optimizations
Message-Id: <20200724195128.2373212-1-scw(a)google.com>
[PATCH 0/4] Refactor get_fpstatus_ptr() ready for AArch32 fp16
Message-Id: <20200806104453.30393-1-peter.maydell(a)linaro.org>
[DRAFT PATCH 000/143] Meson integration for 5.2
Message-Id: <1596741379-12902-1-git-send-email-pbonzini(a)redhat.com>
Absences
========
- 2 days off sick
- "holiday" 13th-25th Aug
Current Review Queue
====================
* [PATCH 00/11] Run cross-compilation build tests in the gitlab-CI
Message-Id: <20200804170055.2851-1-thuth(a)redhat.com>
Added: <2020-08-04 Tue>
* [RFC v3 0/8] QEMU cpus.c refactoring part2
Message-Id: <20200803090533.7410-1-cfontana(a)suse.de>
Added: <2020-08-03 Mon>
* [PATCH 0/2] accel/tcg: remove implied BQL from cpu_handle_interrupt/exception path
Message-Id: <20200731125127.30866-1-robert.foley(a)linaro.org>
Added: <2020-07-31 Fri>
* [PATCH 0/3] float16 APIs and alternative sNaN handling
Message-Id: <1596102747-20226-1-git-send-email-chihmin.chao(a)sifive.com>
Added: <2020-07-30 Thu>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ rc3 sent out. Optimistically hoping for release next week.
+ rebased the patchset converting QAPI doc-comments to rST
+ Fixed a bug in syndrome register values for copro insns trapped
from AArch32 to AArch64
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ Finished and sent out the patchset that cleans up the coproc
insn decode and corrects the NOCP handling
+ With assistance from RTH, figured out how to use gvec helpers
to implement fp16 for various Neon insns. Added fp16 support to
20 or so insns; still have 15 or so to go.
thanks
-- PMM
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ More release herding...
+ Sent fixes for some bugs:
- assertion in the imx_epit timer device when guest soft-reset it
- netduino2/netduinoplus2 forgot to configure system clock scale so
using SysTick in "run at CPU frequency" mode would hang
- most M-profile boards failed to make AIRCR.SYSRESETREQ actually
reset the system
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ More progress with fp16: all the VFP insns now handled, including
the new-for-fp16 ones. Still to do: all of Neon...
+ Spent some time working through the details of NOCP vs UNDEF
in the M-profile coprocessor space for the various revisions
of the architecture. v8.1M adjusts things a bit in this area
and I want to clean up this bit of QEMU's current code and
get the v8.1M bits right.
Fact: next Monday (3rd August) will be the 10th anniversary
of my secondment into Linaro!
-- PMM
[VIRT-327 # Richard's upstream QEMU work ]
Misc patch review.
- Largest bit is half of riscv 0.9 vector patch set.
Fix arm E2 bug in ptw_translate.
Fix arm E3 buts in direct kernel startup.
Fix linux-user chroot failure.
r~
[VIRT-327 # Richard's upstream QEMU work ]
Misc patch review.
[GCC]
I looked into Adhemerval's libgomp-scalability patch set. The code looks good,
and I can't see anything wrong.
The cancel-parallel-2 test that's reported to regress, does, sometimes. It
never fails for me on qemu-test (aarch64, tx1). It *only* fails under the
dejagnu test harness on x86_64 and ppc64le. When run by hand it succeeds,
always. I cannot explain that at all. I've run the testsuite with
OMP_DEBUG_ENV=verbose and see that the dejagnu environment is as expected.
Anyway, I can't make forward progress because I can't reproduce the problem
under controlled conditions.
r~
VirtIO Related Work ([STR-9])
=============================
- putting together a demo system with a MacchiatoBin - idea here
Message-Id: <871rlkmzbs.fsf(a)linaro.org>
- posted On doorbells (queue notifications) Message-Id:
<87r1tdydpz.fsf(a)linaro.org> for discussion on RTT
- posted Enhancing virtio-mmio for MSI (new card required?)
Message-Id:
<alpine.DEB.2.21.2007151407190.4124@sstabellini-ThinkPad-T480s>
- started reviewing [virtio-dev] [PATCH v5 00/10] introduce virtio
vhost-user backend device type Message-Id:
<20200518203721.7625-3-ndragazis(a)arrikto.com>
- VIRTIO Sync-up call
- mainly discussing reducing traps MMIO vs PCIe
- need some better figures to justify adding MSI to MMIO
[STR-9] <https://projects.linaro.org/browse/STR-9>
VirtIO RPMB ([STR-5])
- realised the virtio driver in the [kernel] sent extra frames I
wasn't expecting
[STR-5] <https://projects.linaro.org/browse/STR-5>
[kernel]
<http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/revi…>
Upstream Work ([QEMU-109])
==========================
- posted [PATCH v4 00/40] testing/next (vm, gitlab, fixes) Message-Id:
<20200701135652.1366-1-alex.bennee(a)linaro.org> : done
- posted [PATCH v2 00/11] misc fixes for rc0 (docker, plugins,
softfloat) Message-Id:
<20200713200415.26214-1-alex.bennee(a)linaro.org>
- posted [PULL 0/9] final misc fixes for 5.1-rc0 Message-Id:
<20200714095247.19573-1-alex.bennee(a)linaro.org>
- took a couple of Message-Id:
<20200715105542.14428-1-alex.bennee(a)linaro.org> attempt to finally
get merged Message-Id:
<20200715111455.19237-1-alex.bennee(a)linaro.org>
- posted [PATCH v1 0/5] candidate fixes for 5.1-rc1 (shippable,
semihosting, OOM tcg) Message-Id:
<20200717105139.25293-1-alex.bennee(a)linaro.org>
[QEMU-109] <https://projects.linaro.org/browse/QEMU-109>
Blog Post ([LBO-34])
====================
- finished writing the [evolution of the translator] blogpost, should
go up next week
[LBO-34] <https://projects.linaro.org/browse/LBO-34>
[evolution of the translator]
<https://docs.google.com/document/d/190BlYjSTt-nZSR8dNdOxptt-swOZiGnASndEuXo…>
Completed Reviews [4/4]
=======================
[PATCH for-5.1 0/4] Document virt and a few other Arm boards
Message-Id: <20200713175746.5936-1-peter.maydell(a)linaro.org>
[PATCH 0/2] python/qemu: follow-up changes for ConsoleSocket
Message-Id: <20200715204814.2630-1-robert.foley(a)linaro.org>
[PATCH 00/13] Reverse debugging
Message-Id: <159316678008.10508.6615172353109944370.stgit@pasha-ThinkPad-X280>
Lost patience with more merge failures.
[PATCH 0/5] linux-user: Support extended clone(CLONE_VM)
Message-Id: <87h7vbyowf.fsf(a)linaro.org>
Current Review Queue
====================
* [virtio-dev] [PATCH v5 00/10] introduce virtio vhost-user backend device type
Message-Id: <20200518203721.7625-1-ndragazis(a)arrikto.com>
Added: <2020-07-15 Wed>
* [PATCH v4 00/22] target/xtensa: implement double precision FPU
Message-Id: <20200711110655.20287-1-jcmvbkbc(a)gmail.com>
Added: <2020-07-13 Mon>
* [PATCH v3 00/19] mailmap: Add more entries to sanitize 'git log' output
Message-Id: <20200702173818.14651-1-f4bug(a)amsat.org>
Added: <2020-07-02 Thu>
* [PATCH v3 0/9] memory: assert and define MemoryRegionOps callbacks
Message-Id: <20200630122710.1119158-1-ppandit(a)redhat.com>
Added: <2020-06-30 Tue>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ More wrangling of release stuff and unreliable infrastructure.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ Managed to find a few days to put in some more work pushing fp16
handling forwards. I now have implementations of fp16 for most of
the VFP insns (still todo: VCVT, VSEL, VMAXNM/VMINNM, VRINT*; then
the few insns that are new-for-fp16. Then all of Neon, which is larger.)
thanks
-- PMM
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ softfreeze this week, so a lot of handling of pull requests,
reviewing various patchsets, sorting through newly reported
Coverity issues, etc etc.
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- reported a few regressions / minor testcase fix
- enabled gcc-testresults for release branches, which will send even more emails
* benchmarking:
- added HAL support for the stm32 board we have in the Lab. Will start
testing once the board is actually connected to a builder
* misc:
- infra patches/reviews
== Next ==
* Holidays next two weeks, back on July 28th
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
== Progress ==
* Uploaded binaries for llvm 10.0.1 rc3 and rc4
* More work on Morello (including docs)
== Plan ==
* More Morello
* On vacation between July 20 - 31
4 day week.
[VIRT-327 # Richard's upstream QEMU work ]
Bug hunting vs aa32 ldrex/strex. I had hoped it would be relatively easy to
reproduce -- just run something from the .NET testsuite -- but even getting
that far wasn't obvious. So I put that aside; let's see if Peter's request for
an actual reproducer gets results.
Bug hunting vs aa64 gcc sync-4.c as reported by clyon. I determined that it's
not the fault of the null-pointer dereference, and that something goes wrong
somewhere in libgcc's exception unwind prior to the c++ throw. But it doesn't
fail all of the time. And worse, the problem vanishes when randomize_va_space
is disabled. So I can neither get a "good" vs "bad" trace without needless
differences nor produce a failure under gdb. I should try again with rr and
see if that works...
r~
Linaro folks - why is this buildbot sending mail when it's already red
(looks like this buildbot has been red for a while, at least 11187
seems to be red for the same reason that 11188 is red - so the people
on this blame list aren't relevant)? That adds noise to the buildbot
results & makes it harder for developers to find actionable email.
On Mon, Jul 6, 2020 at 9:30 PM <llvm.buildmaster(a)lab.llvm.org> wrote:
>
> The Buildbot has detected a new failure on builder clang-cmake-armv7-full while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/11188
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-tk1-08
>
> Build Reason: scheduler
> Build Source Stamp: [branch master] 0c6b6e28e70c06a3cb4704d2d8f90829a689e230
> Blamelist: Amara Emerson <amara(a)apple.com>,Amy Kwan <amy.kwan1(a)ibm.com>,Biplob Mishra <biplmish(a)in.ibm.com>,David Blaikie <dblaikie(a)gmail.com>,Eric Christopher <echristo(a)gmail.com>,Jordan Rupprecht <rupprecht(a)google.com>,LLVM GN Syncbot <llvmgnsyncbot(a)gmail.com>,Nico Weber <thakis(a)chromium.org>,Sanjay Patel <spatel(a)rotateright.com>,Wolfgang Pieb <wolfgang_pieb(a)playstation.sony.com>,Yuanfang Chen <yuanfang.chen(a)sony.com>
>
> BUILD FAILED: failed build stage 2
>
> sincerely,
> -The Buildbot
>
>
>
== Progress ==
* GCC upstream validation:
- reported a few regressions
- added fortran to arm-none-eabi configs
- enabled gcc-testresults for most configurations, which now sends a
lot of emails
* GCC:
- PR94743 (IRQ handler and Neon registers): patch committed.
* benchmarking:
- cleanup of hal lib to run benchmarks on stm32, the board we have in
TCWG is different from the ones we used in ST, I'll have to update the
hal settings accordingly.
* misc:
- switch tcwg_gnu job to use our gcc-compare-results script, to be
able to ignore some tests with random results (especially under qemu)
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Lots of work here, finally merging MTE system support.
[VIRT-349 # QEMU SVE2 Support ]
Posted v2, all 100 patches.
[VIRT-327 # Richard's upstream QEMU work ]
A fair amount of patch review.
Merged the decodetree exclusive groups feature.
r~
== This Week ==
* GCC
- GNU-659 (LTO regressing calculix): Running and analysing benchmarks
with different configs.
* LLVM
- LVM-611 (heuristic to lower calls to blx for armv6-m): Addressing
upstream suggestions.
- LLVM-612 (code-gen for imm8 args for Thumb1): Posted patch upstream,
waiting for feedback.
* Validation
- Prototype script for metric based comparison
== Next Week ==
- Continue ongoing tasks
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ respun the QEMU side of the "fix 32-bit-guest readdir of
ext4 filesystems on a 64-bit host" work to match Linus Walleij's
most recent kernel patch.
+ code review (actually emptied my queue for the first time in forever):
- patchset adding some missing devices to MPS2 boards
- another round of RTH's MTE patchset (now fully reviewed and ready to go in)
- SMMUv3.2 range-invalidation support patchset from RedHat
- RTH's implementation of the kernel MTE ABI for QEMU linux-user
+ had a look at some of the lurking Coverity issues
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ fp16 support: started by working out risu patterns for all the
affected instructions so we have a means for testing the changes.
+ implemented a handful of fp16 insns; plan to back-burner this for
a little while as it's not going to be complete before we freeze
for QEMU 5.1, so work like reviewing the MTE patchset and other
for-5.1 efforts will take priority.
NB: on holiday next week
thanks
-- PMM
VirtIO Related Work ([VIRT-366])
================================
- posted [PATCH v2 0/5] some tweaks to the document build process
Message-Id: <20200619204959.7877-1-alex.bennee(a)linaro.org>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v2] docs/devel: add some notes on tcg-icount for
developers Message-Id:
<20200619170930.11704-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [7/7]
=======================
[RFC v5 0/4] QEMU cpus.c refactoring
Message-Id: <20200615180346.3992-1-cfontana(a)suse.de>
[PATCH v1 1/2] semihosting: defer connect_chardevs a little more to use serialx
Message-Id: <1592215252-26742-1-git-send-email-frederic.konrad(a)adacore.com>
- CLOSING NOTE [2020-06-16 Tue 16:14]
A little confused as to the purpose of patch 1/2.
Added: <2020-06-15 Mon>
[PATCH 0/5] linux-user: Support extended clone(CLONE_VM)
Message-Id: <20200612014606.147691-1-jkz(a)google.com>
- CLOSING NOTE [2020-06-16 Tue 17:08]
This is super hairy stuff. Would like to know the use case for all
this additional complexity.
Added: <2020-06-12 Fri>
[PATCH v2 00/15] tests/tcg: Add TriCore tests
Message-Id: <20200604085441.103087-1-kbastian(a)mail.uni-paderborn.de>
- CLOSING NOTE [2020-06-16 Tue 18:29]
A few minor comments, v2 should be mergable.
Added: <2020-06-04 Thu>
[PATCH 0/3] Add Scripts for Finding Top 25 Executed Functions
Message-Id: <20200616231204.8850-1-ahmedkhaledkaraman(a)gmail.com>
[RFC] ivshmem v2: Shared memory device specification
Message-Id: <f109fe5a-92eb-e5a5-bb83-ada42b3a9b61(a)siemens.com>
- CLOSING NOTE [2020-06-17 Wed 16:49]
Finally got round to making some comments. All in all looks pretty
sane.
Added: <2020-05-25 Mon>
[PATCH v9 0/9] tests/vm: Add support for aarch64 VMs
Message-Id: <20200601211421.1277-1-robert.foley(a)linaro.org>
Absences
========
- Home-schooling in mornings
Current Review Queue
====================
* [RFC][PATCH v2 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1578407802.git.jan.kiszka(a)siemens.com>
Added: <2020-04-09 Thu>
* [PATCH v7 00/42] target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20200603011317.473934-1-richard.henderson(a)linaro.org>
Added: <2020-06-18 Thu>
* [PATCH RFC 00/22] Support of Virtual CPU Hotplug for ARMv8 Arch
Message-Id: <20200613213629.21984-1-salil.mehta(a)huawei.com>
Added: <2020-06-13 Sat>
* [PATCH v8 0/4] vhost-user block device backend implementation
Message-Id: <20200604233538.256325-1-coiby.xu(a)gmail.com>
Added: <2020-06-12 Fri>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- a fix for an A9 global timer device bug
- imx_fec ethernet bugfixes/cleanups
- SD card emulation bugfixes/cleanups (including a CVE fix)
- sm501 graphics card minor fixes
- implementation of qemu_init_exec_dir() for OSX
- patchset adding some missing devices to MPS2 boards
- RTH's v7 MemTag emulation series (this was a big one, took most of
a couple of days to work through)
+ sent docs patch deprecating our tilegx port
+ discussion about what exactly target code has to do
for icount support; wrote some patches to remove some 'gen_io_end()'
calls that turn out to be no-longer-necessary
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ completed the neon decodetree conversion and sent the last batch
of patches out for review; plan to start on fp16 support next
NB: have recorded my maintainership work under the old VIRT-65
for now; not yet clear when/which jira issue to use in the new UM-*
hierarchy.
thanks
-- PMM
* Training all week
== Progress ==
* GCC upstream validation:
- reported a few regressions
- enabled sending of some validation results to gcc-testresults mailing-list
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- cleanup of hal lib to run benchmarks on stm32
== Next ==
* PR94743
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
* FDPIC GDB
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ Good progress with the neon decodetree conversion this week -- now feels
like it's nearly done. Wrote and sent out another couple of patchsets for
review. The only remaining insns to convert are the 2-reg-misc grouping.
Have made a start on that; hope to get the final part of the conversion
out for review next week.
thanks
-- PMM
(0.5 day off)
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup for cortex-m33 with qemu-system-mode
- investigated a random error with a C++ testcase under qemu-aarch64
since I upgraded to qemu-5.0.
- reported a few regressions
- fixed cross-build of GCC after C++11 upgrade, looked at fixing
native builds (different problem), but someone had already posted the
same fix during the week-end
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses. Updated docker images to
include openocd and checked I could connect to the board from a docker
container.
- helping test Dejagnu new master branch in preparation for next stable release
== Next ==
* training next week
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v7 of system mode
Posted v2 of user mode vs in-progress kernel abi.
Some bug fixing for Stephen and Szabolcs.
[VIRT-349 # QEMU SVE2 Support ]
Started reviewing Stephen's sve2 risu patches.
[VIRT-327 # Richard's upstream QEMU work ]
A fair amount of patch review
New version of decodetree exclusive groups.
Some work on clang 10 werrors.
r~
Short week (1.5 day off)
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup for cortex-m33 with qemu-system-mode
- reported a few regressions
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, at last able to run
coremark stm32 board
== Next ==
* GCC validation
- switch to qemu-system-mode for cortex-m33, in order to run the cmse tests
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
== Progress ==
* GCC upstream validation:
- scripts updates and cleanup
- new scheme for arm-eabi now in production (cortex-a7 in arm and
thumb modes, cortex-m[0347,33]
- upgraded to qemu-5.0
- reported a few regressions
* GCC:
- PR94743 (IRQ handler and Neon registers): No feedback yet.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, at last able to run a
sample code on my small stm32 board
- internal meetings / paperwork
== Next ==
* GCC validation
- switch to qemu-system-mode for cortex-m33, in order to run the cmse tests
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Updated to match the latest kernel for-next/bti-user branch; I hope this is
going to be merged for 5.7.
Posted v9 for review.
[VIRT-349 # QEMU SVE2 Supprt ]
More RISU work to improve support for SVE. Stephen Long has posted some sve2
risu patterns that need reviewing, and I plan to test all of that next week vs
ArmIE.
I had a start on rebasing my current sve2 patch set on master, with lots of
prereqs merged. But stopped in the middle because I realized that I wanted to
get all of the RISU work done first, so that I can test each patch as it is
updated.
r~
PS: Out all next week on holiday.
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Various bits of code review; put together and sent another
arm pullreq.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Fixed up the 2-reg-shift/1-reg-imm patchset as per code review
comments and sent a v2
thanks
-- PMM
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Some prerequisites merged upstream.
[VIRT-349 # QEMU SVE2 Support ]
Some prerequisites merged upstream.
Work on risu to compress sve output files.
Split out the crypto conversion to gvec.
[VIRT-327 # Richard's upstream QEMU work ]
Posted some softfloat cleanups.
Some patch review.
Support non-overlapping regions for decodetree.
r~
VirtIO Related Work ([VIRT-366])
================================
VirtiIO blogpost ([LBO-2])
- finished final version of draft with future work and call to action
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v1 0/8] plugins/next (cleanup, cpu_index and lockstep)
Message-Id: <20200513173200.11830-1-alex.bennee(a)linaro.org>
- posted [PATCH v1 00/10] testing and tcg tweaks Message-Id:
<20200513175134.19619-1-alex.bennee(a)linaro.org>
- posted [PULL v2 00/13] testing, tcg and plugin updates Message-Id:
<20200515144405.20580-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [9/9]
=======================
[PATCH 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005010034560.30535(a)digraph.polyomino.org.uk>
[PATCH v2 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005042332380.22972(a)digraph.polyomino.org.uk>
- CLOSING NOTE [2020-05-11 Mon 08:16]
rth already pulled into his tree
Added: <2020-05-05 Tue>
[PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-11 Mon 10:22]
Generally looks ok but awaiting v11 to deal with re-base conflicts
to fully test.
Added: <2020-03-27 Fri>
[PATCH v8 00/74] per-CPU locks
Message-Id: <20200326193156.4322-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-12 Tue 19:39]
A few minor comments but looking good. Ran stress testing.
Added: <2020-03-27 Fri>
[PATCH 0/3] plugins: Move declarations around and rename 'hwaddr' argument
Message-Id: <20200510171119.20827-1-f4bug(a)amsat.org>
- CLOSING NOTE [2020-05-12 Tue 19:45]
Queued to my tree
Added: <2020-05-10 Sun>
[PATCH 3/3] plugins: avoid failing plugin when CPU is inited several times
Message-Id: <CAEme+7FPF+inSJSXQPmuv8Up3Eam0N7fT03zqM-RvcvKsxjfVQ(a)mail.gmail.com>
- didn't apply but found bug in cpu_index code
[PATCH 0/5] docs/system: Document some arm board models
Message-Id: <20200507151819.28444-1-peter.maydell(a)linaro.org>
[PATCH v6 0/9] tests/vm: Add support for aarch64 VMs
Message-Id: <20200512193340.265-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2020-05-15 Fri 18:31]
Ran into problems testing on my Gentoo box, sent some patches to
rf-fw
Added: <2020-05-12 Tue>
[PATCH 0/5] target/i386: fxtract, fscale fixes
Message-Id: <alpine.DEB.2.21.2005070038550.18350(a)digraph.polyomino.org.uk>
- CLOSING NOTE [2020-05-15 Fri 18:32]
Testing bit looks ok, leaving the x86 side to people that understand
it.
Added: <2020-05-15 Fri>
--
Alex Bennée
== Progress ==
* GCC upstream validation:
- reported a couple of regressions
- sent an email to discussed the preferred combinations when running
the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): iterating. Sent updated
patch to emit a warning. Cleanup patches merged. Sent WIP patch that
saves FP regs for discussion.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, issues with openocd
== Next ==
* GCC validation matrix updates
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Some patch review/pullreq handling. Notably, the patchset to
allow AArch64 KVM hosts to report host memory errors to guests
is now in master.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Sent out v2 of the neon-decodetree conversion patches (covering
the 3-reg-same grouping); this is based on RTH's vector cleanup
patchset. Got this reviewed and into master.
- Sent out a conversion patchset for 2-reg-and-shift and
1-reg-and-immediate insn groups.
thanks
-- PMM
== Progress ==
* Out of office tomorrow (Friday)
* Morello - looking into some unrelated failures after a merge from upstream
* Morello - updating aadwarf spec
== Plan ==
* Out of office next Thursday and Friday
... and apologies for tomorrow's meeting.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Updated the branch, both system and user.
There's a report of an assertion failure in system mode, but no testcase to go
with it. I need to ping for a devel branch with which to play.
[VIRT-349 # QEMU SVE2 Support ]
Some prerequisites merged upstream.
[VIRT-327 # Richard's upstream QEMU work ]
Review of risc-v risu patches.
r~
VirtIO Related Work ([VIRT-366])
================================
- virtio sync-up call see minutes Message-Id:
<87a72j64gt.fsf(a)linaro.org>
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
VirtIO RPMB ([VIRT-371])
- continued work on my vhost-user-rpmb daemon
- vhost-user-rpmb plumbed in with QEMU and virtio-pci transport
- detected in lspci and comms established \\o/
- started experimenting with front-ends from ACRN linux port
- currently blows up on feature negotiation
- asked for clarification of divergence between ACRN and OASIS
spec Message-Id: <87sgga4daf.fsf(a)linaro.org>
[VIRT-371] <https://projects.linaro.org/browse/VIRT-371>
[vhost-user backend for rpmb]
<https://github.com/stsquad/qemu/tree/vhost-user-rpmb>
[VIRT-402] <https://projects.linaro.org/browse/VIRT-402>
VirtiIO blogpost ([LBO-2])
- still TODO new work and architectures
- bit of writers block on last couple of paragraphs
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
Upstream Work ([VIRT-109])
==========================
- posted [PULL 00/14] testing and gdbstub updates Message-Id:
<20200506120529.18974-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [1/1]
=======================
[PATCH 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005010034560.30535(a)digraph.polyomino.org.uk>
--
Alex Bennée
(Short week, 4 days.)
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Added brief documentation of some of the QEMU models of Arm
devboards, now we have a better place for this info to live
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Fixed https://bugs.launchpad.net/bugs/1877136 (we were not using
the right gdb XML feature for M-profile CPUs, which meant that
stack backtraces across an exception stack frame didn't work and
we didn't report the XPSR to gdb correctly)
- Started working through code review responses from rth to the
first lot of neon-decodetree patches
thanks
-- PMM
Short week (4 days)
== Progress ==
* GCC upstream validation:
- Added gcc-10 branch
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): iterating. Refining patch
that emits a warning (testsuite refinements...), Need to update
additional patch that actually saves the FP regs so that it takes the
D16/D32 versions into account.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, issues with openocd
== Next ==
* GCC validation matrix updates
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
Hi, Chris, and Linaro Toolchain team,
Recently I found an issue of SVE intrinsics (svld1_f64, svld1_vnum_f64)
when using gcc -O0 (gcc 10.0.1 debian nightly build, optimization level 0).
Would you please help me to reach out to people who can fix it?
svld1_f64() is a function defined in Arm intrinsics for SVE (scalable
vector extensions) [2].
Changing -O0 to -O1 makes the issue disappear.
svld1_vnum_f64() has the same problem.
To show the issue, I wrote this simple test program, see test1.c in [1]. A
full issue report and gcc version string can be found in the attached pdf
file.
[1] My test program:
https://github.com/docularxu/sve-code-test/tree/working-svld1_f64
[2] Arm SVE intrinsics: https://developer.arm.com/docs/100987/latest
Feel free to contact me if you need more details.
Best regards,
-Guodong Xu
[VIRT-349 # QEMU SVE2 Support ]
More progress on insn implementation; just about done with all of the indexed
multiply. Perhaps 10 insns remaining.
Assad mentioned on irc that he has fixed the Armie bug that prevented RISU from
running properly, so I hope to start doing some testing soon.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed Peter's decodetree conversion. Posted some extracts from my sve2
branch that may be relevant and helpful.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ rth's v3 patchset for 'sve load/store improvements'
+ Paolo's improvements to my run-coverity-scan script
- tagged QEMU 5.0 and pushed it out of the door; put together and
sent out the first target-arm pullreq for the 5.1 cycle
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Neon decodetree progressing nicely (though it is a bigger
job than I had anticipated when I started it...) Sent out a
first part patchset that covers the v8.0-and-later extensions,
the loads-and-stores, and the 3-reg-same part of the dp insns.
NB: UK bank holiday next Friday...
thanks
-- PMM
Hi,
You are receiving this email because you are listed as the owner for at least one LLVM build slave on http://lab.llvm.org:8011/buildslaves <http://lab.llvm.org:8011/buildslaves>.
This message is a heads up concerning the upcoming upgrade of CMake discussed here: http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html <http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html>. As discussed on that thread, LLVM will require CMake 3.13.4 in order to build after the release branch for LLVM 11.0.0 is created. Using an older CMake will be an error.
In order to keep things running smoothly, we would greatly appreciate if you could upgrade CMake on your builder(s) to at least CMake 3.13.4 before the next release branch is created. Please reply privately to this email when you've done so -- this will allow keeping track of who has and has not upgraded.
Thank you and have a wonderful day,
Louis
Short week (4 days)
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
- still looking at improving MVE tests to avoid failures in several
non-supported configurations. No satisfactory solution so far (there
are always combinations of GCC configure option and validation-time
options that are incompatible and produce failures instead of
unsupported)
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): sent a patch to emit a
warning. More ambitious patches would be too intrusive for stage 4.
* FDPIC/GDB:
- no progress this week
* misc:
- infra fixes / troubleshooting / reviews
- started looking at cortex-m benchmarking harnesses
== Next ==
* FDPIC GDB
* GCC/cortex-M
* cortex-m benchmarking
== Progress ==
* Morello
- Finished capability formatting
- Got a couple cosmetic patches in review
- Also reviewing needed ptrace support
== Plan ==
* More Morello
[VIRT-349 # QEMU SVE2 Support ]
More progress on insn implementation.
More patches from Stephen Long merged.
More good review from Laurent Desnogues.
Down to perhaps 30 insns remaining, and then figuring out some miscomparisons
reported by Laurent, but not diagnosed.
[VIRT-344 # ARMv8.5-MemTag ]
Fixed an exception return bug vs PSTATE.TCO.
[VIRT-327 # Richard's upstream QEMU work ]
Posted some tcg patch sets for 5.1.
Worked on the sparc regression Alex reported vs TEMP_CONST. I've set that
aside for now; I need to come up with a new scheme to debug that one.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
- We needed an rc4 (which I wasn't very surprised about), so more
release wrangling again.
- Noticed some bugs in how we set ID registers for the AArch64 'max' CPU;
sent patches (one of which seemed worth getting into rc4)
- There's been a long-standing problem where a linux-user QEMU running
on a 64-bit host and emulating a 32-bit guest can't deal with the
64-bit hash 'offsets' from ext4 getdents, which causes guests using
newer glibc to fail. Linus Walleij wrote a kernel patch which allows
QEMU to request that the kernel gives it hash values that will fit
into 32 bits. I wrote an RFC QEMU patch that would use this and tested
that this does indeed solve the problem. Discussion is continuing on
the kernel size about what the correct API for this is, but the
principle that the kernel should change seems to be accepted.
- A bug was raised that BKPT for arm linux-user wasn't causing SIGTRAP;
sent patches fixing that and some other issues I noticed in that
bit of the code while I was fixing it.
- code review:
+ a patch adding proper FIFO emulation to the PL011 UART model
+ rth's patchset improving codegen of neon integer-compare-vs-0 insns
+ xilinx patchset to disable unsupported FDT firmware nodes
+ patchset adding kaslr-seed properties to the virt board dtb
(mostly useful for OP-TEE)
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Progress with neon decodetree conversion. I've now completed all
the 3-reg-same insn grouping, which is a large enough amount that
I'm planning to send out a patchset with what I have so far.
Need to refactor/tidy up some bits of the code first, now I can
see what the completed conversion looks like.
thanks
-- PMM
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- Committed a few fixes to MVE/CDE tests to avoid failures on
arm-linux-gnueabi toolchains
- Sent a few more testcases fixes
- PR94538 (pure-code/M23): Let Wilco handle it since he has more testcases
- Looked at Linaro bug #5614, and forwarded it for upstream discussion
as PR94743 (IRQ handler and Neon registers)
* FDPIC/GDB:
- rebased gdbserver patches, it still crashes at runtime. Code size
bigger than my last attempt with gdb-8.x.
- tried to link it statically, but that fails because of multiple defs
in uclibc.
* misc:
- infra fixes / troubleshooting / reviews
- lots of disruptions
== Next ==
* FDPIC GDB
* GCC/cortex-M
Looks like there might be something wrong with this buildbot? (none of the
commits seem to have changed lnt - or maybe lnt isn't monitored/blamed in
the buildbot config?)
On Tue, Apr 21, 2020 at 12:16 AM <llvm.buildmaster(a)lab.llvm.org> wrote:
> The Buildbot has detected a new failure on builder clang-cmake-armv8-lld
> while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv8-lld/builds/3875
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-armv8-01-arm-lld
>
> Build Reason: scheduler
> Build Source Stamp: [branch master]
> c2d86e1f3044abb295796c8267c7b9057f54a067
> Blamelist: Alexander Shaposhnikov <alexshap(a)fb.com>,Chris Bieneman <
> chris.bieneman(a)me.com>,Dan Liew <dan(a)su-root.co.uk>,David Blaikie <
> dblaikie(a)gmail.com>,Johannes Doerfert <johannes(a)jdoerfert.de>,Mircea
> Trofin <mtrofin(a)google.com>,Pavel Iliin <Pavel.Iliin(a)arm.com>,Sam Kerner <
> skerner(a)chromium.org>,Shengchen Kan <shengchen.kan(a)intel.com>,Sriraman
> Tallam <tmsriram(a)google.com>
>
> BUILD FAILED: failed setup lit
>
> sincerely,
> -The Buildbot
>
>
>
>
Short weeks around Easter.
[VIRT-349 # QEMU SVE2 Support ]
Lots of progress on insn implementation.
Several patches from Stephen Long merged. He's coming up to speed nicely.
Some good review from Laurent Desnogues.
Spent some time writing a version of strspn for Arm optimized-routines, as a
way of testing the NMATCH instruction. Found bugs in the tcg optimizer
instead. Still in the process of rebasing the branch upon those fixes, and
upon patch review from Peter.
[VIRT-327 # Richard's upstream QEMU work ]
Couple of patches for 5.0.
[GCC]
Posted v4 of aarch64 cmpti patch set.
r~
VirtIO Related Work ([VIRT-366])
================================
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
VirtIO RPMB ([VIRT-371])
- started work on [vhost-user backend for rpmb]
- have the basic vhost-user loop created, still need to plumb into
QEMU
- will be able to experiment with [VIRT-402] minimal profile once
running
[VIRT-371] <https://projects.linaro.org/browse/VIRT-371>
[vhost-user backend for rpmb]
<https://github.com/stsquad/qemu/tree/vhost-user-rpmb>
[VIRT-402] <https://projects.linaro.org/browse/VIRT-402>
VirtiIO blogpost ([LBO-2])
- wrote up history of VirtIO up to standardisation
- still TODO new work and architectures
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
slides with virtio architectures for Victor
Upstream Work ([VIRT-109])
==========================
- posted [PULL for 5.0-rc3 0/8] a few small fixes (docker, user, pie
and gdbstub) Message-Id:
<20200415104211.9388-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Other
=====
- preparation work and GSoC candidate interviews
[my QEMU developer guide]
<https://people.linaro.org/~alex.bennee/org/presentations/qemu-developer-gui…>
Absences
========
- Home-schooling in mornings
Current Review Queue
====================
* [RFC][PATCH v2 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1578407802.git.jan.kiszka(a)siemens.com>
Added: <2020-04-09 Thu>
* [PATCH v6 00/36] Initial support for multi-process qemu
Message-Id: <cover.1586165555.git.elena.ufimtseva(a)oracle.com>
Added: <2020-04-06 Mon>
* [PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
--
Alex Bennée
(short week, 3 days)
Progress:
* VIRT-65 [QEMU upstream maintainership]
- getting rc3 out of the door, including sorting out some last
minute bug fixes. As usual, we hope not to need an rc4 but I
expect we will.
- code review; a two-day blitz has got my to-review queue down
to a slightly more manageable size...
+ rth's series refactoring SVE load/store implementation
+ Guenter's i.MX watchdog support series
+ brief pass over raspi USB host controller emulation series
+ patch adding /secure-chosen/kaslr-seed to the virt dtb
+ the Greensocs/Xilinx clock framework patchset
[including doing an editing pass on the docs]
thanks
-- PMM
Hello!
I know, this is probably a very stupid question, but I couldn't find an
answer for it. On the page
https://releases.linaro.org/components/toolchain/binaries/latest-5/arm-linu…
there are 3 major download components: gcc/sysroot/runtime.
I download 'gcc', add 'gcc-linaro-.../bin' to my PATH and cross compile my
apps.
On my target system, I need 'libc', and it is present in the
'sysroot-linaro-...'. Do I need to copy all of the contents of
'sysroot-linaro-...' folder to my target? 'linaro-sysroot' folder is kinda
big. 'libc.so' library is 13MB. If there is a way to decrease its size, if
I want to use Linaro compiled programs on an embedded target?
And what is a purpose of 'runtime-linaro-..." component?
Hello!
I know, this is probably a very stupid question, but I couldn't find an answer for it. On the page https://releases.linaro.org/components/toolchain/binaries/latest-5/arm-linu… there are 3 major download components: gcc/sysroot/runtime.
I download 'gcc', add 'gcc-linaro-.../bin' to my PATH and cross compile my apps.
On my target system, I need 'libc', and it is present in the 'sysroot-linaro-...'. Do I need to copy all of the contents of 'sysroot-linaro-...' folder to my target? 'linaro-sysroot' folder is kinda big. 'libc.so' library is 13MB. If there is a way to decrease its size, if I want to use Linaro compiled programs on an embedded target?
And what is a purpose of 'runtime-linaro-..." component?
== This Week ==
* LLVM-611 (tune heuristic to lower blx): Working on feedback.
* GNU-659: Doing benchmarking experiments
* Public holiday
- One day off
== Next Week ==
- Continue with LLVM-611 and GNU-659
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- comparing testsuite results for cortex-m3 and cortex-m33 with
cortex-a9 to check what cortex-M problem there are. Updated cmse-15.c test.
Analyzing / bisecting other failures.
- Sent fixes to MVE tests to avoid failures on arm-linux-gnueabi toolchains
- Updated a few bugzilla entries about cortex-m issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC GDB
* GCC/cortex-M
Hi,
clang-cmake-armv7-full fails with "No space left on device", e.g.:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/9808/steps/…
> The Buildbot has detected a new failure on builder clang-cmake-armv7-
full while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/9808
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-tk1-06
>
> Build Reason: scheduler
> Build Source Stamp: [branch master]
3bc439bdff8bb5518098bd9ef52c56ac071276bc
> Blamelist: Ilya Leoshkevich <iii(a)linux.ibm.com>
>
> BUILD FAILED: failed Checkout test-suite
>
> sincerely,
> -The Buildbot
Could someone please take a look?
Best regards,
Ilya
VirtIO Related Work ([VIRT-366])
================================
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
slides with virtio architectures for Victor
an overview blogpost for Ebba
- started drafting a blog post
Upstream Work ([VIRT-109])
==========================
- posted [PULL for 5.0-rc2 00/13] various fixes Message-Id:
<20200407155118.20139-1-alex.bennee(a)linaro.org>
- a bit of launchpad triage for release
- posted [PATCH for 5.0-rc3 v1 00/11] more random fixes Message-Id:
<20200409211529.5269-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Other
=====
- updated [my QEMU developer guide] for team workshop
[my QEMU developer guide]
<https://people.linaro.org/~alex.bennee/org/presentations/qemu-developer-gui…>
Absences
========
- Easter Weekend (bank holidays)
Current Review Queue
====================
* [RFC][PATCH v2 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1578407802.git.jan.kiszka(a)siemens.com>
Added: <2020-04-09 Thu>
* [PATCH v6 00/36] Initial support for multi-process qemu
Message-Id: <cover.1586165555.git.elena.ufimtseva(a)oracle.com>
Added: <2020-04-06 Mon>
* [PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
* [PATCH v8 00/74] per-CPU locks
Message-Id: <20200326193156.4322-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
--
Alex Bennée
(short week, 4 days)
Progress:
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Still working through the Neon decoder refactoring. Finished
loads-and-stores and am now on the 2000-line function that handles
data-processing insns...
thanks
-- PMM
Hi,
It looks like several bots assigned to you started failing after e6a39f00e8d0 was committed:
http://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv8-linux-no…http://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv8-linuxhttp://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-aarch64-linuxhttp://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-aarch64-linux-…
They all fail on the test libcxx/test/libcxx/modules/stds_include.sh.cpp with the following error:
<...>/libcxx/test/libcxx/modules/stds_include.sh.cpp:28:2: fatal error: file '<...>/libcxx/include/type_traits' has been modified since the module file '<TMP>/ModuleCache/1E92AHT/std-1V9DLRO.pcm' was built
#include <vector>
^
<...>/libcxx/test/libcxx/modules/stds_include.sh.cpp:28:2: note: please rebuild precompiled header '<TMP>/ModuleCache/1E92AHT/std-1V9DLRO.pcm'
1 error generated.
Our other bots are not failing, so I very strongly suspect this is not because of the change itself, but rather some weirdness in your bot configuration. For that reason, I will *not* revert the change (that would likely not improve the situation anyway). Can you please collaborate with us to understand and fix the issue?
Thanks,
Louis
Hi,
It looks like the following bots assigned to you started failing recently:
http://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv7-linuxhttp://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv7-linux-no…
The failing tests are all filesystem tests:
FAIL: libc++::assign.pass.cpp
FAIL: libc++::path.pass.cpp
FAIL: libc++::replace_filename.pass.cpp
FAIL: libc++::refresh.pass.cpp
FAIL: libc++::file_size.pass.cpp
FAIL: libc++::file_type_obs.pass.cpp
FAIL: libc++::hard_link_count.pass.cpp
FAIL: libc++::last_write_time.pass.cpp
FAIL: libc++::ctor.pass.cpp
FAIL: libc++::ctor.pass.cpp
FAIL: libc++::increment.pass.cpp
FAIL: libc++::exists.pass.cpp
FAIL: libc++::is_block_file.pass.cpp
FAIL: libc++::is_character_file.pass.cpp
FAIL: libc++::is_directory.pass.cpp
FAIL: libc++::is_empty.pass.cpp
FAIL: libc++::is_fifo.pass.cpp
FAIL: libc++::is_other.pass.cpp
FAIL: libc++::is_regular_file.pass.cpp
FAIL: libc++::is_socket.pass.cpp
Having seen some of these issues before, I strongly suspect this is due to the fact that your builder is running as root. Libc++'s filesystem tests are known to fail when run as root, because some of them need to check for failure to access some files for which there's no permission. This doesn't seem to work when run as root.
Can you work with us to resolve this issue?
Thanks,
Louis
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- comparing testsuite results for cortex-m3 and cortex-m33 with
cortex-a9 to check what cortex-M problem there are.
Spent a long time isolating a regression in CMSE tests. Filed
PR94445 which was then quickly fixed by upstream in ICF optimization.
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC GDB
* GCC/cortex-M
[VIRT-349 # QEMU SVE2 Support ]
Met with Qualcomm on Friday to discuss sharing the development work, and help
start bringing their new-hire, Stephen Long, up to speed on qemu.
Gave Stephen generic qemu development pointers, and a simple set of SVE2
instruction on which to wet his feet.
[VIRT-327 # Richard's upstream QEMU work ]
Better constant propagation and allocation for TCG.
Worked on probe_guest_base as a follow-up to some of the work Alex was doing
wrt init_guest_space.
Misc patch review for 5.0.
[GCC]
Posted v3 of aarch64 cmpti patch set.
r~
== This Week ==
* LLVM
- LLVM-611 (Tune heuristic for blx): Posted upstream.
- LLVM-612 (Redundant reg moves for 8-bit immediates): WIP patch
* Public Holiday
- one day off
== Next Week ==
- Continue with LLVM tasks
- Start looking at GNU-659
VirtIO Related Work ([VIRT-366])
================================
- minor planning work
- need a few slides with virtio architectures for Victor
- a overview blogpost for Ebba
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
Upstream Work ([VIRT-109])
==========================
- GSoC feedback on proposals
- we have 3 students putting forward proposals for TCG cache plugin
- posted [PATCH] hw/core: properly terminate loading .hex on EOF
record Message-Id: <20200401193849.14017-1-alex.bennee(a)linaro.org>
- posted [PATCH] target/arm: don't expose "ieee_half" via gdbstub
Message-Id: <20200402143913.24005-1-alex.bennee(a)linaro.org>
- posted [PATCH for 5.0 v2 00/10] A selection of sanitiser fixes
Message-Id: <20200401094759.5835-1-alex.bennee(a)linaro.org>
- the linux-user guest map is better targeted at next week
- posted [PATCH v3 for 5.0-rc2 00/12] a selection of random fixes
Message-Id: <20200403191150.863-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [1/1]
=======================
[PATCH for-5.0 v3 0/7] configure: Improve PIE and other linkage
Message-Id: <20200327220353.27233-1-richard.henderson(a)linaro.org>
Absences
========
- Splitting time between work and home-schooling
Current Review Queue
====================
* [PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
* [PATCH v8 00/74] per-CPU locks
Message-Id: <20200326193156.4322-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
* [virtio-dev] [RFC PATCH] virtio-iommu: Add PAGE_SIZE_MASK property
Message-Id: <20200323133831.2110014-1-jean-philippe(a)linaro.org>
Added: <2020-03-27 Fri>
* [virtio-dev] [PATCH v2 00/10] virtio-mem: paravirtualized memory
Message-Id: <20200311171422.10484-1-david(a)redhat.com>
Added: <2020-03-27 Fri>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- More freeze related wrangling...
* VIRT-241 [QEMU ISA Support for A-profile]
- pushed the ARMv8.2-TTS2UXN patchset out to the mailing list
- found and fixed a bug in our PAN support where we were making
PSTATE.PAN forbid execute access, not just data access
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Started on some preliminary refactoring that we'll need so we can
more conveniently modify the decoder for v8.1M: converting the
A32/T32 Neon decoder to use decodetree. I've done the "post-v8.0
extensions" instructions, and started on the loads-and-stores.
thanks
-- PMM
Hi,
We are having some serious problems after we upgraded from C++14 to C++17
on an Jetson TX2 ARM device. Our system tests started to behave differently
and fail.
It seems that when our application uses a library (also developed by us)
some data gets corrupted when delivered to a class constructor. For
example, the .second of and std::pair<float> appears to be the .first and
the .second is garbage. This is deterministic, but different tests are
failing depending on the combination: library C++17/C++14 <-> application
C++14/C++17.
This is on Ubuntu 18.04 and gcc version 7.5.0 (Ubuntu 7.5.0-3ubuntu1~18.04).
Nothing like this happens on Intel.
So:
ARM, C++14: OK
Intel, C++14: OK
ARM, C++17: FAIL
Intel, C++17: OK
Any ideas what could cause this? I know this is a bit vague, but this a
commercial, closed-source application so I cannot yet give any other
information.
BR,
Jussi Lind
[VIRT-349 # QEMU SVE2 Support ]
Posted the first incremental patch set
for review, as requested by Qualcomm.
[VIRT-327 # Richard's upstream QEMU work ]
Patch review, much of it 5.0 related,
but also v6 of the riscv vector patch set.
Revise the PIE and linkage patch set.
r~
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- comparing testsuite results for cortex-m3 and cortex-m33 with
cortex-a9 to check what cortex-M problem there are. Fixed a few
testcases. Managed to use qemu-system-arm to run cortex-m33 code with
CMSE features. (Thanks to Peter Maydell for the help!)
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC GDB
* GCC/cortex-M
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Softfreeze this week, so a lot of pull request handling, and
one last small arm pullreq to put together and send out
- Our Coverity Scan setup was broken (the person who usually does
the builds updated his machine to a newer Fedora which broke the tool).
I pulled up an old patchset I had from a year ago which scripts things
so you can do a build-and-upload automatically via Docker so that
we're not dependent on one person for this. This took longer than I
expected as there were a bunch of things that needed fixing both in
the scripting and in bits of the codebase that the tools warned about.
Patch series sent.
- When we did get a Coverity run through, it reported 112 new issues;
spent some time going through and triaging them (lots of false positives
but also lots of real bugs) and submitting patches for some of them.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- sketched out the work required and created some 'story' level
cards to go under the epic. Still open questions:
+ should we model Cortex-M55 or a more generic 'max' CPU?
+ what board model do we want to use?
+ does LITE have any guest code using v8.1M features for testing?
Random notes:
* my new desk chair and standing desk arrived this week
(the latter still needs assembling...) so I am gradually
improving the rough edges of my WFH setup.
thanks
-- PMM
== Progress ==
* Out of office 1 day
* More Morello
- Patch set for the 'disassemble' command in review
- Working on the final part of the capability formatting
== Plan ==
* More Morello
Progress:
[VIRT-349 # QEMU SVE2 Support ]
10 of N insn groups implemented.
Annoyingly, there doesn't seem to be a summary of new insns, so confirming that
all of the insns have been implemented.
[VIRT-327 # Richard's upstream QEMU work ]
Patch review. Mostly Phil's arm --disable-tcg set.
Cleanup for some of the new Coverity reports.
Flush tcg patch queue.
[GCC]
Two revisions improving TImode comparisons for aarch64 (PR94174).
https://gcc.gnu.org/pipermail/gcc-patches/2020-March/542447.html
[Kernel]
Follow-up on a discussion a few weeks ago re __range_ok. The gcc cmpti patch
set is in support of that, but I also found a much better solution for constant
sized checks.
http://lists.infradead.org/pipermail/linux-arm-kernel/2020-March/719754.html
r~