== This Week ==
* GCC
- PR92554: Spent some time triaging the issue, but gave up after
Richard posted better fix.
- PR89007: Addressing upstream suggestions.
- PR92608: Committed fix to trunk.
- GNU-583: Looking thru Kugan's patch and upstream discussion.
* Validation
- Submitted patch to add --gcc_patch_file option to abe.
- Submitted patch to remove --interactive from abe.
== Next Week ==
- Continue ongoing tasks
== Progress ==
* GCC:
- -mpure-code on v6m: sent an updated patch, waiting for approval.
* BFD Linker:
- non-contiguous memory support: partial prototype working on the
use-case, but causes regressions.
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* GCC: pure-code/v6m, handle feedback
* Binutils: support non-contiguous memory regions in linker
QEMU Tooling ([VIRT-252])
=========================
Extend gdbstub for SVE ([VIRT-281])
- worked on [v2 rebase addressing comments]
[VIRT-281] https://projects.linaro.org/browse/VIRT-281
[v2 rebase addressing comments]
https://github.com/stsquad/qemu/tree/gdbstub/sve-registers-v2
Upstream Work ([VIRT-109])
==========================
- general poking around and stress testing on the run up to release
- documented some outstanding issues [on the planning page]
- posted {PULL for rc3 0/5} a few doc and testing tweaks Message-Id:
<20191120105801.2735-1-alex.bennee(a)linaro.org>
- posted {PATCH for 4.2 v1 0/3} some tests/vm fixes Message-Id:
<20191122112231.18431-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[on the planning page] https://wiki.qemu.org/Planning/4.2
Other Activities
================
- finalising [draft of KVM Forum conference report]
- will publish on Monday once Beata adds the last note
[draft of KVM Forum conference report]
https://collaborate.linaro.org/pages/resumedraft.action?draftId=128647720
Completed Reviews [3/3]
=======================
{PATCH v2 0/6} Make the qemu_logfile handle thread safe.
Message-Id: <20191115131040.2834-1-robert.foley(a)linaro.org>
- CLOSING NOTE [2019-11-22 Fri 17:15]
Ad of v3 this is ready to go, just awaiting the tree to open again
Added: <2019-11-15 Fri>
{PATCH v3 0/6} Make the qemu_logfile handle thread safe.
Message-Id: <20191118211528.3221-1-robert.foley(a)linaro.org>
{PATCH 0/6} Enable Travis builds on arm64, ppc64le and s390x
Message-Id: <20191119170822.45649-1-thuth(a)redhat.com>
Current Review Queue
====================
* {PATCH 0/1} tests/vm: Allow to set path to qemu-img
Message-Id: <20191114134246.12073-1-wainersm(a)redhat.com>
Added: <2019-11-14 Thu>
* {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test
Message-Id: <20191104151323.9883-1-crosa(a)redhat.com>
Added: <2019-11-04 Mon>
* {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case
Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com>
Added: <2019-10-25 Fri>
* {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org>
Added: <2019-10-11 Fri>
--
Alex Bennée
[Morello]
- LLD finished pre-review refactoring and splitting up into reviewable chunks
- Implemented range-extension and interworking thunks to test
interaction with aligning .text to comply with Cheri Concentrate
- Answered some questions from Linaro tech-leads about Morello
Plans
- Rebase once CUCL merge has been completed and submit for review.
Planned Absences:
Christmas Holiday 16th December - 3rd January inclusive
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ Marc-Andre's series trying to get rid of QOM pointer properties
+ various minor bits for rc2
- unsuccessfully tried to work out why one of QEMU's test
cases asserts on BSD hosts only
- some time consumed by office-move
thanks
-- PMM
== Progress ==
* Triaging check-lldb failures on AArch64 [LLVM-512]
- Opened 4 bug reports
- One of them got a lot of attention so I was asked to upload more
logs/try various things
- Still have a couple of test failures to look into
* Morello
- First contact with the team
- Started looking at the internal docs
- Trying to build the existing toolchain
== Plan ==
* Figure out the current state of LLDB for Morello and what needs to be done
* Continue triaging LLDB failures
Dear Linaro,
Dear Linaro I'm using arm cortex A53 (mt6735 [part number]). But I do not know which tool-chain I have to use. I found your website https://www.linaro.org/downloads/ on internet. and my guess is aarch64-linux-gnu. can you please guide me through selecting a proper tool-chain.
Regards,
Saeed Djamali
# Progress #
o Upstream GDB
* More patch reviewing and answering questions.
o GDB:
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Managed to track this down all the way to the aarch64
single-stepping infrastructure in the kernel. Created reproduction steps
and sent an e-mail to linux-arm-kernel
- Also noticed a difference in the order in which SIGCHLD's are
delivered between x86_64 and aarch64. This confused GDB, which expects
the ordering it sees on x86_64. Working on a fix.
* Tweaked QEMU setup a little for SVE testing
* GNU-645 - gdbserver is not using SVE register descriptions properly
- Tracked down why gdbserver is not sending SVE register data back
to GDB. Working on a fix.
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- On hold for now.
# Plan #
o GDB
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Continue working on a fix.
* GNU-645 - gdbserver is not using SVE register descriptions properly
- Continue working on a fix.
[VIRT-262 # ARMv8.1-PAN Privileged Access Never]
Started, based on VHE patch set due to mmu_idx reorg therein.
Needs some minor re-work to handle Secure EL1.
[VIRT-273 # ARMv8.2-ATS1E1, AT S1E1R and AT S1E1W instruction variants ]
Started.
[VIRT-327 # Richard's upstream QEMU work ]
Some soft-freeze bug fixing of stuff that I broke this cycle.
Some patch review.
[Kernel]
Posted v7 of the ARMv8.5-RNG patch set. There's some significant
mis-communication going on between me and Mark Rutland; I have no
idea what he wants at this point...
[GCC]
Committed the base asm-flags patch set. Posted a follow-up
to un-break thumb1, and add tests for it.
r~
== This Week ==
* GCC
- PR89007: Posted patch upstream.
- GNU-583: Worked with Kugan, to reproduce LTO failure and verified
his patch fixes it.
- Bug 5479: Investigated with Maxim, most likely a glibc issue.
* Validation:
- Posted abe patch to add --gcc_patch_file option.
== Next Week ==
- Continue ongoing tasks.
Monday off
== Progress ==
* GCC:
- -mpure-code on v6m: answered questions about my patch. Almost OK
* Linker:
- started looking at implementing non-contiguous memory support
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* GCC: pure-code/v6m, handle feedback
* Binutils: support non-contiguous memory regions in linker
[Morello]
- Dynamic linking implementation complete and tests written based on
GNU ld output.
- Good progress on refactoring the work prior to breaking it down into
reviewable chunks. Have got a good idea of what I'd like the
implementation to look like.
TODO:
- Finish refactoring patches.
- Rebase into reviewable patches.
- Document the design decisions.
- Test on more than just the examples in the toolchain.
- Rebase on top of latest CUCL drop when merge is finished.
[Other]
LLVM-MC upstream review for the Linux Kernel.
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- feature now merged in 4.2
- closed out a bunch of related JIRA cards
- API version now merged and this card is closed
Extend gdbstub for SVE ([VIRT-281])
- posted {RFC PATCH 00/11} gdbstub re-factor and SVE support
Message-Id: <20191115173000.21891-1-alex.bennee(a)linaro.org>
[VIRT-281] https://projects.linaro.org/browse/VIRT-281
[working prototype]
https://github.com/stsquad/qemu/tree/gdbstub/sve-registers
Upstream Work ([VIRT-109])
==========================
- posted {PULL 0/8} testing and tcg plugin api ver Message-Id:
<CAFEAcA_9AwoTE9zaKbiF6DkpN+O8LaEKGOct-m5S3yvFBHGK1g(a)mail.gmail.com>
- posted {PATCH for 4.2-rc2 v1 0/5} misc doc and testing fixes
Message-Id: <20191113115952.775-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH} scripts/tap-driver: report "slow" tests (HACK)
Message-Id: <20191113142101.30280-1-alex.bennee(a)linaro.org>
Other Activities
================
- wrote [draft of KVM Forum conference report]
[draft of KVM Forum conference report]
https://collaborate.linaro.org/pages/resumedraft.action?draftId=128647720
Completed Reviews [5/5]
=======================
{PATCH 0/2} replace sysconf(_SC_PAGESIZE) with qemu_real_host_page_size
Message-Id: <20191015031350.4345-2-richardw.yang(a)linux.intel.com>
{PATCH v2 0/4} arm/aspeed: Watchdog and SDRAM fixes
Message-Id: <20191113005201.19005-1-joel(a)jms.id.au>
{kvm-unit-test PATCH 0/5} Improvements for the Travis CI
Message-Id: <20191113112649.14322-6-thuth(a)redhat.com>
{PATCH} target/arm: Clean up arm_cpu_vq_map_next_smaller asserts
Message-Id: <20191115131623.322-1-richard.henderson(a)linaro.org>
{PATCH v1 0/5} Make the qemu_logfile handle thread safe.
Message-Id: <20191112150105.2498-1-robert.foley(a)linaro.org>
Current Review Queue
====================
* {PATCH v2 0/6} Make the qemu_logfile handle thread safe.
Message-Id: <20191115131040.2834-1-robert.foley(a)linaro.org>
Added: <2019-11-15 Fri>
* {PATCH 0/1} tests/vm: Allow to set path to qemu-img
Message-Id: <20191114134246.12073-1-wainersm(a)redhat.com>
Added: <2019-11-14 Thu>
* {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test
Message-Id: <20191104151323.9883-1-crosa(a)redhat.com>
Added: <2019-11-04 Mon>
* {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case
Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com>
Added: <2019-10-25 Fri>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- wrote up first draft of requirements for the better CI setup for
testing pull request merge builds
(https://wiki.qemu.org/Requirements/GatingCI)
- wrote up version of the QEMU Summit minutes that includes enough
context to make sense to people who weren't present; plan to
send to qemu-devel next Friday
- got 4.2 rc1 out of the door; this release seems to be pleasantly
quiet for a change.
thanks
-- PMM
== Progress ==
* Committed SVE-related fix for InstCombine
* Started triaging check-lldb failures on AArch64 [LLVM-512]
- Committed a trivial fix for one of the tests
- Still looking into the other failures
* Received and setup laptop for Morello work
- Awaiting further instructions
== Plan ==
* Start working on Morello
* Keep triaging check-lldb failures
* If time permits, look into SVE asserts some more
# Progress #
o Annual Review
* Concluded
o Upstream GDB
* Patch reviews on gerrit and answering questions.
* Fixed PR25124 - [ARM] regression: thumb-bx-pc.exp
(https://sourceware.org/bugzilla/show_bug.cgi?id=25124)
* Investigated an odd failure in gdb.base/step-over-syscall.exp and
ended up finding some odd stepping behavior that may or may not be
kernel related. Still investigating under GNU-644
(https://projects.linaro.org/browse/GNU-644)
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- On hold for now. It would be nice to be able to use a NOP instead
of a dummy label + jump.
* Setup QEMU for running SVE bits and reproduced some SVE hiccups in
gdbserver that Alex mentioned.
* Misc discussions about SVE and the GDB implementation in general.
# Plan #
o Upstream GDB
* More patch reviewing and answering questions.
o GDB:
* GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures
- Continue investigating
* Tweak QEMU setup a little for SVE testing
== Progress ==
* GCC:
- -mpure-code on v6m: no feedback yet
* Linker:
- started looking at implementing non-contiguous memory support
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* GCC: pure-code/v6m, handle feedback
* Binutils: support non-contiguous memory regions in linker
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Reworked the timer redirection. Now the EL2 and EL0 redirection
is unified, which is a bit easier to understand. Still no joy
working out where the unwanted interrupt is coming from. As far
as I can tell everything is plumbed correctly...
I'll shelve this until PMM is not swamped with release work.
It must wait for 5.0 for merging anyway.
[VIRT-327 # Richard's upstream QEMU work ]
Assorted patch review.
[Kernel]
Posted two more rounds of ARMv8.5-RNG for review. Seems I'd
misunderstood one of Mark's previous suggestions, and Ard changed
his mind about how RNDR vs RNDRRS should be used in the context
of the shared resource across host*CORES + virt*VCPUS.
[GCC]
Posted an implementation of asm-flag-output for AArch32+AArch64.
I should have done this years ago. There are two potential users
within the kernel, and one is access_ok() which has thousands
of uses. (Oh, and RNG, which has like 3 uses. :-P)
Reviewed some arm simd patches that caught my eye.
r~
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- feature now merged in 4.2
- closed out a bunch of related JIRA cards
- posted {PATCH} tcg plugins: expose an API version concept
Message-Id: <20191104131836.12566-1-alex.bennee(a)linaro.org>
- requested by Peter before hardfreeze
Extend gdbstub for SVE ([VIRT-281])
- got a [working prototype]
- probably need a little core gdbstub re-factor before posting RFC
[VIRT-281] https://projects.linaro.org/browse/VIRT-281
[working prototype]
https://github.com/stsquad/qemu/tree/gdbstub/sve-registers
Upstream Work ([VIRT-109])
==========================
- posted {PULL v3 00/15} testing updates Message-Id:
<20191025193709.28783-1-alex.bennee(a)linaro.org>
- had to drop NetBSD autobuild (again)
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[branch]
https://github.com/stsquad/qemu/tree/testing/docker-multiarch-refactor
[testing/next] https://github.com/stsquad/qemu/tree/testing/next
Other Activities
================
- Presented at KVM Forum
- went down well, made a number of contacts who are interested
- A bunch of discussion on Hexagon
- More detailed write-up to follow
Completed Reviews [4/4]
=======================
{PATCH 0/5} travis.yml improvements: Update libraries, build with arm64
Message-Id: <20191009170701.14756-1-thuth(a)redhat.com>
- CLOSING NOTE [2019-10-18 Fri 19:04]
Pulled some bits into testing/next
Added: <2019-10-09 Wed>
{PATCH} Semihost SYS_READC implementation (v4)
Message-Id: <20191024224622.12371-1-keithp(a)keithp.com>
{PATCH v2 0/4} target/arm: Support for Data Cache Clean up to PoP
Message-Id: <CADSWDztHetgmbUOp4WyRAkR0daAG6kkwhUTcyKWiCTWHQ1XB=w(a)mail.gmail.com>
{PATCH 0/4} Make the qemu_logfile handle thread safe.
Message-Id: <20191107142613.2379-1-robert.foley(a)linaro.org>
Absences
========
- KVM Forum Oct 29th-Nov 1st
Current Review Queue
====================
* {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test
Message-Id: <20191104151323.9883-1-crosa(a)redhat.com>
Added: <2019-11-04 Mon>
* {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case
Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com>
Added: <2019-10-25 Fri>
* {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org>
Added: <2019-10-11 Fri>
* {PATCH v4 0/9} target/arm/kvm: enable SVE in guests
Message-Id: <20190924113105.19076-1-drjones(a)redhat.com>
Added: <2019-09-24 Tue>
--
Alex Bennée
Morello
- Started to document the LLD implementation.
- Implemented CHERI concentrate alignment for the important sections.
- Dynamic linking is feature complete, but not finished yet, still Todo:
-- More test cases for the various different combinations.
-- Refactor to clean up the implementation.
-- Rebase all the patches to remove the false starts.
-- Update the documentation I've just started as it is already out of date.
-- Not looked at ifunc or TLS yet.
llvm-mc
Some review on MC patch to allow limited symbolic computation when
evaluating .if
Progress / KVM Forum trip report:
* As usual, we held the QEMU Summit at the same time as the forum;
this is an hour-or-two invitation only meeting of the top 20 or
so maintainers/submaintainers, discussing process and other project
issues. A proper summary/writeup of the minutes will be posted to
qemu-devel later, but IMHO this year the most interesting topics were:
- Spreading the load of managing pull request merges; currently
I do this with the aid of some hand-hacked scripts. To be able
to spread this work among more people we need to replace that
with a more maintained and standardized CI/testing setup. RedHat
have agreed to provide some people to work on at least the initial
setup part of this, and we got some consensus that the approach to
take was to use Gitlab with some custom 'runners' to handle the
'build/test on aarch64/ppc/s390x/etc' parts.
- We talked about the project's general stance on 'plugin' interfaces;
which can be controversial both because they commit us to maintaining
a stable API/ABI and because they have the potential to be used to
work around the GPL (eg proprietary device models). We plan to
write up some guidelines here (mostly just writing down the
existing consensus).
- We also talked (again) about our handling of security issues and
CVEs. My impression is that there are some parts of this that
people aren't hugely happy with but that nobody has the time/effort to
try to improve things (eg better documentation/tracking of issues,
more prompt upstream point releases with security fixes), so things
are likely to stay about as they are now.
* Interesting talks (videos are being uploaded to:
https://www.youtube.com/channel/UCRCSQmAOh7yzgheq-emy1xA ):
- 'The Hype Around the RISC-V Hypervisor' : the RISC-V architecture's
hypervisor extension isn't completely finalized yet, but it's far
enough advanced that KVM support and also QEMU emulation of it have
been written. An amusing sign of the architecture's academic
underpinnings is that this first version doesn't have any hardware
acceleration of the interrupt controller, but does have full
nested-virtualization support.
- 'ZERO: Next Generation Virtualization Platform for Huawei Cloud':
Huawei describe hardware for a cloud environment which offloads
as much as possible of the hypervisor work to custom I/O cards
and a custom silicon cloud-control device, in a general approach
that's probably familiar to anybody who watched the Amazon Nitro
presentation from the other year.
- 'What's Going On? Taking Advantage of TCG's Total System Awareness':
Alex Bennée's talk on the introspection plugin work we've been doing
in Linaro (and which will be in QEMU 4.2).
- 'Playing Lego with Virtualization Components':
description of the Rust 'rust-vmm' set of libraries intended to
provide useful building blocks for putting together virtual machine
managers (like Firecracker, crosvm). Basically similar content to
a presentation they did for Cambridge University earlier this year,
but this talk's been recorded so is good if you weren't in the audience
the first time around.
* And as always the in-person networking is valuable:
- Oracle have a "split device emulation into separate processes" idea
that's alarmingly invasive of the source code, but Stefan came up
with an approach that might let them do what they need without making
the source code harder to work with for the rest of us.
- Met the RedHat person who's going to do the CI-for-pullreqs work
(see QEMU Summit item earlier) : getting this unstalled was probably
the most useful concrete outcome of the conference
- Finally met Aurelien Jarno (a longstanding hobbyist contributor
to QEMU who usually can't attend these conferences)
* While at the conference Drew and I managed to finally get the
SVE support for KVM guests into master (the last hurdle was an awkward
test failure on the aarch32-compat-on-aarch64-kernel setup I happen
to use as one of my build test environments; we don't care about whether
KVM really works in this setup but we need 'make check' to not fail)
* Also managed to fit in some wrangling of pull requests; the timing
of the 4.2 release unfortunately put softfreeze on the Tuesday
before the conference and rc0 on the Tuesday afterwards; rc0
ended up being postponed a couple of days as a consequence.
thanks
-- PMM
Linaro
- On buildbot monitoring duty, relatively quiet week with just a
couple of fairly simple to diagnose problems to report.
Morello
- Dynamic linking progressing albeit slowly.
-- Trying to work out the requirements from existing documents and
implementation.
-- Have some simple cases doing mostly the right thing and have
written some tests.
-- Will need to rewrite to move calculations earlier in the link-step.
-- Morello is quite different from Cheri in this regard so I have had
to diverge much more from the implementation.
Tree:
https://github.com/rth7680/qemu.git tgt-arm-vhe-5
Testcase:
qemu-test:~rth/linux/initramfs-min.cpio.gz
The host kernel could be anything, but I've been using
the same Image.gz that is inside the cpio archive.
./aarch64-softmmu/qemu-system-aarch64 -m 4G \
-M virt,virtualization=on,gic-version=max -cpu max \
-kernel Image.gz -initrd initramfs-min.cpio.gz
At the shell prompt, ./test will run a guest kernel with kvm.
As momentarily discussed with PMM in the hallway:
As soon as the guest kernel enables interrupts,
arch_timer_starting_cpu
enable_percpu_irq
irq_percpu_enable
gic_unmask_irq
-- Incorrect exception delivery.
the GTIMER_PHYS interrupt is delivered to EL2 (seems to be ok), the host kernel
does something (haven't dug into what exactly, bug presumably setting bits that
are supposed to pass the virq to the guest), and immediately another interrupt
is delivered to EL2. Repeat.
Whether this is incorrect routing of the virq interrupt, or incorrect
masking/acking of the hard irq interrupt at EL2, I do not yet know.
PMM: I don't know the answer to either (a) or (b) as asked on hangouts. I
think (b) is correct, but I can't be sure. I'm trying to understand how (a) is
supposed to work now. In particular, I can't find any code that sets
HCR_EL2.{VI,VF}, only tests them.
r~
# Progress #
o Ramp up
* Concluded.
o Annual Review
* Attended discussions.
o Upstream GDB
* Patch reviews on gerrit.
* Answered questions.
* The state of ARM/AArch64 GDB upstream seems to be reasonable, with
a few failures here and there. Numerous failures on problematic racy
tests (gdb.threads).
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Spent some more time on this and improve the patch further,
covering most problematic cases for "for", "while" and "do/while" loops.
* Read some documentation on setting up Fast Models for testing MVE
(Helium).
* Inspected various aspects of ARM support in GDB, like SVE, PAC and
ACLE.
# Plan #
o Annual Review
* Conclude.
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Discuss with gcc@ a bit more about my proposed solution.
* Attempt to setup system QEMU and/or Fast Model for testing ACLE SVE
and, maybe, MVE.
== Progress ==
* Out of office 1 day
* Buildbot monitoring
- Moved the buildbots to pull from github
* Trying to setup a build environment on ex40-01
- Gave up on the tcwg-sq-01/2 boards because they seemed too unstable
* Still no access to Morello docs
* Playing with lldb python scripting
- Got a script that intercepts all calls to
VectorType::getNumElements that don't come from a getElementCount
(since that likely means that they won't be preserving the 'scalable'
property)
- This should help figure out problems spotted by the fuzzer
- Likely needs a bit more refining
== Plan ==
* More of the same
* Out of office on Friday (1 November)
== Progress ==
* GCC:
- -mpure-code on v6m: no feedback yet
* FDPIC/GDB
- problems with the board I used, it hangs shortly after or during
boot. None of the workaround/fixes suggested to me worked. Having an
stm32 qemu config would help.
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
- sent 2 small qemu patches (fix vmrs support for m-profile, and add cortex-m7)
- confirmed that gcc LTO profiled bootstrap works on arm with recent
trunk, although it takes ages. Will need to try on a more powerful
board
== Next ==
* Holidays next week, back Nov 4th
* FDPIC: resume work on GDB: check the various qemu forks with stm32
board support.
Add FDPIC configuration in the GCC trunk validation.
* GCC: pure-code/v6m, handle feedback
* Binutils: support non-contiguous memory regions in linker
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ lots of wrangling of patches and pulls since I'm away
next week and it's also going to be softfreeze
+ preparation for KVM Forum next week
thanks
-- PMM
Progress:
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Updates for user-only.
Merge bug fixes from eugeni.stepanov(a)gmail.com.
[VIRT-349 # QEMU SVE2 Supprt ]
Convert neon pmul helpers to a form that will be usable for sve2.
[VIRT-327 # Richard's upstream QEMU work ]
Pull for tcg-next.
Review plugins v5.
Update for capstone submodule.
Started reviewing multi-phase reset v5.
[Kernel]
Hacked up a patch for ARMv8.5-RNG.
r~
# Progress #
o Ramp up
* Credentials, machine access and LDAP updates done.
o Qualcomm Landing Team sunsetting
* Returned Qualcomm's Laptop.
o Upstream GDB
* Ramping up on reviews.
* Gathering data on the current state of GDB on ARM.
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Came up with a little hack/proof-of-concept to get this fixed.
Though ugly, it seems fixing this in the front-end may make more sense,
as the information i need (source line) is easily accessible in there.
- Discussion ongoing with gcc@. GDB clearly needs the compiler to
provide more information.
* Created JIRA cards for all known pending ARM tasks for GDB, based
on Alan's and Joey's input. TODO-ed all of them for the time being.
# Plan #
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Continue pursuing a fix.
* Prioritize GDB JIRA cards and start work on them.
[Morello]
- Got static linking support to the point that I can successfully link
with LLD the coremark, dhrystone and EEMBC from the arran-toolchain.
Not got any outstanding failures to investigate.
- Altered LLD so a linker script is no longer necessary for newlib.
- Started the process of rebasing and adding tests for all the
fixes/hacks I needed to make to the linker work.
- Aligned the base and limit of capabilities according to the incoming
CHERI concentrate scheme. Interesting question of what should a linker
do when alignment requirements on the base and limit cross section
boundaries, and what are the responsibilities for an object producer
when creating a section when the length of the capability is known at
compile time.
Planned absences:
Holiday Thursday, Friday (24th, 25th October)
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ finishing off the ptimer API transition work
+ review of rth's "speed up calculation of tbflags" patchset
+ put together and sent an arm pullreq
* VIRT-350 [Update Arm KVM support in QEMU]
+ the patchset for hotpluggable RAM support is now upstream
thanks
-- PMM
== Progress ==
* GCC:
- Work on -mpure-code on v6m. Patches sent for upstream review.
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC: resume work on GDB
* GCC: pure-code/v6m
* Binutils: support non-contiguous memory regions in linker
== Progress ==
* clang-tidy workshop (and associated prep)
- I think this went really well, we got good feedback from some of
the participants
* Trying to setup a build environment on tcwg-sq-02.tcwglab
- Mostly so I can deploy the SVE fuzzer there, but maybe for other things too
- All the compilers that I've tried so far are ICE-ing at some point
or another while building llvm
- Still looking into it but I'm starting to suspect there's
something fishy about this board
* Still no access to Morello docs
* Read a bit more about LLDB
* Finished annual review
== Plan ==
* Maybe THIS time I'll get access to the Morello docs next week
* If not, more SVE fuzzer
* One day off
o LLVM:
* Buildbots babysitting:
- Various breakage on the bots and in the kernel build
* Machine Outliner:
- preparing upstream submission
o Misc
* Various meetings and discussions.
== Progress ==
* GCC:
- Work on -mpure-code on v6m
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
- watched a couple of GNU Cauldron presentations
== Next ==
* FDPIC: resume work on GDB
* GCC: pure-code/v6m
* Binutils: support non-contiguous memory regions in linker
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Still need to think of more test cases...
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v5 of the system-only patch set,
with testing help from Alex.
[VIRT-327 # Richard's upstream QEMU work ]
Catching up on patch review
- arm semihosting
- tcg profiler
- ptimer transactions
- s390 mvcl interrupt
- started on v2 of dave martin's bti kernel patch set.
Posted v6 of my arm hflags patch set.
r~
== Progress ==
* Support Morello fat pointers in LLDB [LLVM-597]
- Read an intro to Cheri (research project that Morello is based on)
- Read more LLDB docs
* Started writing annual review
* Setup VM for a clang-tidy workshop that I'm co-organizing as part of
the Stockholm LLVM socials
== Plan ==
* Hopefully will get access to Morello docs next week so I can start actual work
* Rebase and play more with the SVE IR fuzzer [LLVM-586]
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Lots of work with Alex trying to produce a reduced test case.
We are now unit testing entry and exit from EL0 (EL2&0),
EL1 and EL0-in-EL1 (EL1&0).
Next would be to test the various memory access faults.
[VIRT-327 # Richard's upstream QEMU work ]
Patch review for SVE in KVM, S390 interrupt handling during MVCL.
r~
Short week (2 days off)
== Progress ==
* GCC:
- looked at what's needed to enable -mexecute-only on v6m
* GCC upstream validation:
- reported a couple of issues.
* misc:
- infra fixes / troubleshooting / reviews
- catching up after Connect (internal debrief, ...)
- started looking at GNU Cauldron presentations
== Next ==
* FDPIC: resume work on GDB
* GCC: execute-only/v6m
* Binutils: support non-contiguous memory regions in linker
Slightly overlong this time as it covers pre&post connect weeks.
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- sporadic work on the [v5 branch]
- posted {PATCH v6 0/6} semihosting cleanups (plus minor tests/tcg
tweak) Message-Id: <20190913151845.12582-1-alex.bennee(a)linaro.org>
- now merged - delta down a little ;-)
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[v5 branch] https://github.com/stsquad/qemu/tree/plugins/plugins-v5
GSoC Mentoring Afermath ([VIRT-348])
- more work preparing [subset for final list review]
- stats, CONFIG_PROFILER and perf integration
- dropped coverset and dot diagram as a bit too rough
- however should form a good basis going forward
[VIRT-348] https://projects.linaro.org/browse/VIRT-384
[subset for final list review]
https://github.com/stsquad/qemu/tree/tcg/tbstats-and-perf
ARMv8.1 VHE Extensions ([VIRT-263])
===================================
- worked with rth to get a minimal testcase
- very messy [wip branch]
[VIRT-263] https://projects.linaro.org/browse/VIRT-263
[wip branch] https://github.com/rth7680/qemu/tree/test-vhe
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v3 00/33} testing/next (docker,tcg, alpha ;-)
Message-Id: <20190924210106.27117-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH} configure: deprecate 32 bit build hosts
Message-Id: <20190925233013.6449-1-alex.bennee(a)linaro.org> mostly to
stimulate discussion of our modest proposal
- posted {PULL 00/28} testing updates (docker,podman,tcg,alpha)
Message-Id: <20190926183553.13895-1-alex.bennee(a)linaro.org>
- posted {PATCH} accel/kvm: ensure ret always set Message-Id:
<20191002102212.6100-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Activities
================
- More Connect travel administrava (airport transfer booked now)
- Connect itself
- many interesting talks
- discussions with bemi w.r.t migration and command line opts
- discussions with rth w.r.t 64/32, VHE and PR process
- discussions with FutureWei w.r.t scaling QEMU emulation
- KVM Forum administrava
Completed Reviews [2/2]
=======================
{PATCH} configure: Remove s390 (31-bit mode) from the list of supported CPUs
Message-Id: <20190928190334.6897-1-thuth(a)redhat.com>
{PATCH v2} s390x/tcg: MVCL: Exit to main loop if requested
Message-Id: <20191002082636.7739-1-david(a)redhat.com>
Absences
========
- KVM Forum Oct 29th-Nov 1st
Current Review Queue
====================
* {PATCH v2 00/15} target/arm: Implement semihosting v2.0
Message-Id: <20190916141544.17540-1-peter.maydell(a)linaro.org>
Added: <2019-10-03 Thu>
* {PATCH 00/19} hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
Message-Id: <20190926173428.10713-1-f4bug(a)amsat.org>
Added: <2019-09-27 Fri>
* {PATCH RFC} docker: automatic dependencies for dockerfiles
Message-Id: <20190920001823.23279-1-jsnow(a)redhat.com>
Added: <2019-09-24 Tue>
* {PATCH v4 0/9} target/arm/kvm: enable SVE in guests
Message-Id: <20190924113105.19076-1-drjones(a)redhat.com>
Added: <2019-09-24 Tue>
--
Alex Bennée
On buildbot duty
- Several buildbot failures to investigate along with one linux kernel
regression
- Didn't manage to get the libcxx buildbot failures resolved on time.
I think the community are still trying to fix it (Script needs to be
Python2/Python3
Started work on LLD support for Morello
- Getting familiar with the toolchain
- First target is sufficient support to statically link the Howdy
"hello world" equivalent.
- Made the first couple of local patches to implement the easiest set
of static relocations.
Some upstream LLD patch review.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated the cause of a hang when using single-threaded TCG
+ sent RFC patchset proposing a rework of the ptimer API/implementation
which will fix LP:1777777. Unfortunately we'll need to update all
the devices using ptimers. I started in on that process of conversion,
which turns out to be a little more awkward than I had expected;
I ran into at least one corner case I hadn't thought about.
thanks
-- PMM
== Progress ==
* Out of office on Monday
* Catching up after Connect
* Minor buildbot fix
* IR SVE Reviews [LLVM-545]
- Another round on the size queries patch
* SVE IR fuzzer [LLVM-586]
- Waiting for the size queries patch to get merged so I can give it a spin
* Support Arran fat pointers in LLDB [LLVM-597]
- Built lldb
- Looked a bit through the docs
== Plan ==
* Play more with lldb, read more docs
* A bit of globalisel maintenance
o LLVM:
* Buildbots babysitting:
- Troubleshot ARMv8 selfhosted bots issue
* Machine Outliner:
- Experiment outlining with -mexecute-only
- Tried to find a testcase which exhibits issues with unwinding
without much success.
o Misc
* Various meetings and discussions.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ identified cause of LP:1844597 and sent patch fixing it (we broke
direct-booting kernels when the emulated system has an AArch32 EL3)
+ tracked down the cause of LP:1777777 to a race condition that's
inherent to the current design of QEMU's 'ptimer' countdown timers;
fixing this will require us to rethink when we call the callback
when a ptimer hits 0. Posted some ideas to mailing list, for feedback
on whether I missed a better way to rework them.
+ usual upstream maintainer stuff; managed one way or another to
get a few of the most obstinately sticky patchsets off my to-review list
thanks
-- PMM
== Progress ==
* GCC:
- FDPIC: Whole series now committed. Reverted one patch (aiming at
cortex-M, caused problems in ARM mode, investigating)
* GCC upstream validation:
- reported a couple of issues. Helped with testing.
- getting ready to add cortex-m33 validation with qemu
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started yet.
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
Linaro Connect San Diego
== Progress ==
* Out of office on Friday
* Use newer perf for benchmarking [TCWG-1512]
- Switched benchmarking to use bionic containers, with perf 4.18.0;
seems to work
* Investigate running benchmarks in containers [TCWG-1513]
- Done
* Uploaded LLVM 9.0.0-rc5 and rc6
* SVE IR fuzzer [LLVM-586]
- Unblocked my work on this, need to give it a serious spin
== Plan ==
* Buildbot babysitting this week
* LLVM-586
* Try to build LLDB
[VIRT-327 # Richard's upstream QEMU work ]
Convert notdirty and rom handling to cputlb; lots of cleanup around
that area. Version 3 is the first version that worked; two previous
RFCs took quite a bit of effort to work out why they didn't work.
[GCC]
Committed the lse out-of-line patch set.
Posted patches for two follow-on bugs affecting aarch64-elf.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent v2 of the semihosting v2 API implementation patchset
+ sent patch to fix a Makefile bug I introduced that broke in-tree builds
+ code review etc
thanks
-- PMM
[VIRT-327 # Richard's upstream QEMU work ]
Posted v2 of fixing tlb bswap.
Fixed a regression in arm SMLAL*
Reviewed v2 of risc-v vector extension (ugh).
Created pull for Sven's target/hppa fixes.
[GNU Cauldron]
* Project Ranger: New extensible representation for value ranges.
* Lightning talks, a new gdbserver.
- too short to have enough details to be useful.
- incomplete enough that no demo possible.
- maybe look back at this when it's more developed.
* Register allocation BOF
* ARM BOF
- MTE is alive! In that there are now RFC patches for glibc and gcc.
It's probably time to revive my MTE patch set, at least for system mode.
I spent quite a long time talking with Richard Earnshaw about the
current state of affairs. I'm hoping that we can get the kernel folk
to agree on some fundamentals of the userland ABI, even perhaps before
the final support is in the kernel, so that we can implement the
linux-user side, which would probably be most helpful for glibc+gcc work.
* GCC Steering Committee
* Rethinking GCC development process + continuous testing
* Truly interprocedural IPA-SRA
* Lightning talks,
- EmBench
- Combined elimination for -Os.
* RISC-V BOF
r~
o LLVM:
* Buildbots babysitting:
- Reported a kernel build issue after clang handling of
-march/-mfpu and crypto option was changed.
* Machine Outliner:
- Disabling Thumb1 outlining until we find a better way to handle tailcalls
- Working on Connect slides
o Misc
* Various meetings and discussions.
== Progress ==
* GCC:
- FDPIC: Committed the whole series, expect for one testsuite patch,
pending final review.
* GCC upstream validation:
- reported a couple of issues. Helped with testing.
- getting ready to add cortex-m33 validation with qemu
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started yet.
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
- binutils/linker support for non-contiguous memory regions
- FDPIC: work on gdb
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
LLVM-579 Implement -fix-cortex-a8 in LLD. Keeping up with review
comments, I think this is getting close now.
Connect slides moving forwards. Now have 2 out of 3 presenters done.
Rest of the week taken up by investigations and LLD reviews.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ implemented and sent patchset for semihosting v2 API
+ target-arm pullreq, patch review, etc
+ got the QEMU Summit invite list finalised and sent invites
+ some internal meetings
thanks
-- PMM
== Progress ==
* Investigate running benchmarks in containers [TCWG-1513]
- Finally merged, after a few more iterations and testing!
- Doesn't work for AArch32 yet but I think I have a fix
* Use newer perf for benchmarking [TCWG-1512]
- Tried 4.15.0-62 generic on the TK1, doesn't seem to work; investigating
* SVE IR fuzzer [LLVM-586]
- Didn't get to work much on it
* Uploaded LLVM 9.0.0-rc4
== Plan ==
* Fix AArch32 benchmarking
* TCWG-1512 and LLVM-586
o LLVM:
* Buildbots babysitting
* Machine Outliner:
- Experiments on Zephyr exposed some issues w/r to unwinding and
relocation overflow, working on these.
o Misc
* Various meetings and discussions.
Hi guys. Due to unfortunate baggage handling, I don't have my laptop and
won't be able to log in Monday. I should be back online Tuesday, all going
well.
r~
Progress:
+ usual upstream maintainership stuff
+ notably, finished review of RTH's decodetree conversion patchset,
got it into master
+ started on implementing semihosting v2 API (the most interesting
new feature of which is support for AArch32 binaries exiting with
a specified exit status)
thanks
-- PMM
== Progress ==
* GCC:
- FDPIC: almost OK. Found minor issues with testcases
* GCC upstream validation:
- reported a couple of issues. Helped with testing.
- getting ready to add cortex-m33 validation with qemu
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started yet.
* misc:
- infra fixes / troubleshooting / reviews
- a bit of Jira
== Next ==
GCC:
- commit FDPIC patches after final validation
- binutils/linker support for non-contiguous memory regions
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
== Progress ==
* Investigate running benchmarks in containers [TCWG-1513]
- Addressed review comments, merged changes to dockerfiles
- Fixed mcf on AArch64; also managed to run on armv7 but with some failures
* SVE IR fuzzer [LLVM-586]
- Didn't get to work much on it, but rebuilt it with debug info
* Uploaded LLVM 9.0.0-rc3
== Plan ==
* Investigate armv7 failures in docker
* Iterate on benchmarking patches
* Figure out why the fuzzer almost never introduces new code
* 2 vacation days left this month
[VIRT-327 # Richard's upstream QEMU work ]
Fix two ppc fp launchpad bugs.
Resurect patches for openrisc v1.3
Once-over review of risc-v vector extension.
Posted v3 of a32 coversion to decodetree.
Started poking at neon conversion to decodetree,
as a prerequisite to a32 support for fp16.
Some cleanups to watchpoints. Generic stuff now queued to tcg-next.
DavidH is taking care of target/s390x updates, but there are some
changes wanted within target/arm SVE code.
r~
== Progress ==
* GCC:
- FDPIC: sent updated patches, already got feedback on them. almost OK
* GCC upstream validation:
- reported a couple of issues. Helped with testing.
- getting ready to add cortex-m33 validation with qemu
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started yet.
* misc:
- infra fixes / troubleshooting / reviews
- a bit of Jira
== Next ==
GCC:
- handle feedback on FDPIC patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
== This Week ==
* GCC:
(i) PR86753 - Addressing upstream suggestions, pivoted to another approach.
(ii) PR91272 - Patch fixes issue but not correct approach, need to rework it.
(iii) PR78736 - Submitted patch upstream.
== Next Week ==
- Continue ongoing tasks.
== Progress ==
* Investigate running benchmarks in containers [TCWG-1513]
- Cleaned and uploaded scripts for comments
- mcf still hangs, but only when run with clang; investigating root cause
* SVE IR fuzzer [LLVM-586]
- Made some progress with the prototype but it still needs work
* Re-running 8.0.1 release on AArch64 since the archive on
llvm.org/releases seems to be broken
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Reorg ARMMMUIdx again; this time, do not overlap
EL1&0 and EL2&0 mmu_idx. This makes debugging a
bit easier.
Fix one more bug in EL2&0 selection. This was not
the last, because a nested kernel does not yet boot.
[VIRT-327 # Richard's upstream QEMU work ]
Another round of aa32 decodetree patches.
Another round of arm hflags patches.
Review of and some patches for cpu watchpoints.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent fix for LP:1840922 (incorrect handling of branches to
M-profile exception-return magic addresses in linux-user mode)
+ some more work on requirements for JIRA KVM related issues
+ started reviewing RTH's monster decodetree conversion patchset
(and made it nearly halfway through it)
thanks
-- PMM
== Progress ==
* GCC:
- FDPIC: handling feedback.
* GCC upstream validation:
- no issue to report this week.
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started yet.
* misc:
- infra fixes / troubleshooting
- qemu-4.1 confirmed OK for GCC validations
- trying validations for cortex-m33, found a few issues in GCC and a
small one in QEMU
- a bit of Jira
== Next ==
GCC:
- handle feedback on FDPIC patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
- Reorganised buildbots to remove some of the duplication between v7
and v8 AArch32 to free up more v7 hardware.
- Got final code-size information and wrote my slides for Linaro Connect
- Track down an AArch64 specific LLD problem due to a recent change,
now resolved.
- Wrote worst case thunk/veneer convergence patch to help move through
an iterative symbol assignment algorithm.
UK Bank Holiday Monday
== This Week ==
* GCC :
(i) PR83756: Addressing feedback from upstream.
(ii) PR90724: Committed to trunk.
(iii) PR91272: Started working on patch.
(iv) PR88839: Merged fix from sve-acle-branch to trunk.
* Validation
(i) Patch to separate build and test steps in tcwg_gnu.
(ii) SVE validation
== Next Week ==
- Continue ongoing tasks
== Progress ==
* Investigate running benchmarks in containers [TCWG-1513]
- Discussed the noise levels with the team and we decided to
continue with this
- mcf hangs, need to investigate the cause
- WIP: cleaning up the scripts so I can send a sensible patch for review
* IR SVE reviews [LLVM-545]
- Looked at some patches but didn't have much to add to what other people said
* SVE IR fuzzer [LLVM-586]
- Started prototyping
- The fuzzer relies a lot on inserting constants, and since we can't
produce SVE constants yet I'll have to dig in and get it to also use
function parameters
- Need to add operation descriptions for SVE
* Buildbot babysitting
- Reported an issue
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ unfortunately a late-breaking security-bug meant we needed an rc5, but
we put out the final 4.1.0 release on Thursday
+ code review:
- RTH's set of minor cleanups to the 32-bit arm codegen
+ sent out patches which fix our emulation of ATS instructions so
they cause exceptions when the spec says they should (a cleanup
of a change I'd half-implemented a year or so ago)
+ put together and sent the first target-arm pullreq for 4.2
* booked travel/hotel for KVM Forum; did some other prep like working
out a preliminary list of QEMU Summit invitees, and emailing people
whose GPG keys I need to sign to find out if they're going.
thanks
-- PMM
* Thursday off
== Progress ==
* GCC:
- FDPIC: handling feedback.
- noinit attribute: committed (ld patch too)
* GNU-583 (Fix Linux kernel built for Thumb-2 with GCC using LTO)
- no progress this week
* GCC upstream validation:
- a few issues reported this week.
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started
yet.
* misc:
- infra fixes / troubleshooting
== Next ==
GCC:
- handle feedback on FDPIC patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- continued working through v4 comments on [next version branch]
- did some benchmarking to justify no fast path in translator_ld
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[next version branch]
https://github.com/stsquad/qemu/tree/plugins/plugins-v5
GSoC Mentoring ([VIRT-348])
- spent some time reviewing the current state and experimenting
[VIRT-348] https://projects.linaro.org/browse/VIRT-384
Upstream Work ([VIRT-109])
==========================
- more work on [my docker fixup branch]
- now can run make docker-test-build on qemu-test
- posted {PATCH v3 00/13} softfloat updates (include tweaks, rm LIT64)
Message-Id: <20190813124946.25322-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[my docker fixup branch]
https://github.com/stsquad/qemu/tree/testing/docker-def-and-buster-fixes
Completed Reviews [6/6]
=======================
{Qemu-devel} {PATCH v5 00/10} Measure Tiny Code Generation Quality
Message-Id: <20190815021857.19526-1-vandersonmr2(a)gmail.com>
- CLOSING NOTE [2019-08-15 Thu 20:45]
Looks pretty good but some racy crashes need to be fixed.
{Qemu-devel} {PATCH v1 0/2} Integrating qemu to Linux Perf
Message-Id: <20190815023725.2659-1-vandersonmr2(a)gmail.com>
- CLOSING NOTE [2019-08-15 Thu 20:46]
Needs a v2 with compile fixes
Absences
========
- Moving house & office ~20th/21st Aug
Current Review Queue
====================
* {PATCH v3 00/34} target/arm: Implement ARMv8.1-VHE
Message-Id: <20190803184800.8221-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v4 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20190307170440.3113-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH} Implement qemu_thread_yield for posix, use it in mttcg to handle EXCP_YIELD
Message-Id: <20190717054655.14104-1-npiggin(a)gmail.com>
* {PATCH v3 0/6} tests/docker: add podman support
Message-Id: <20190713143311.17620-1-marcandre.lureau(a)redhat.com>
* {PATCH 0/2} tests/acceptance: Add test of NeXTcube framebuffer using OCR
Message-Id: <20190629150056.9071-1-f4bug(a)amsat.org>
* {Qemu-devel} {PATCH 0/4} Introduce the microvm machine type
Message-Id: <20190628115349.60293-1-slp(a)redhat.com>
--
Alex Bennée
- Fixed LLD segfault when exceptions.
- Implement large code model TLSLD relocations in LLD.
- More thoughts on MOVK prel relocations in the ABI as there looks to
be a use case for them in HWASAN that isn't covered by the existing
relocations.
- Some thoughts on how TCWG LLVM Jira initiatives could be worded and
how we may want to word them in the next cycle.
- Initial thoughts written down on Connect presentation, need to flesh
out more this week.
- Upgraded machine to 18.04, almost managed to break it in the process
but luckily it was recoverable. Will likely have some teething
problems.
o LLVM:
* Machine Outliner:
- Improved stack fixup handling (remove cnadidates when it is not
bebeficial)
- Fixing an issue related to R12 usage.
o Misc
* Various meetings and discussions.
[VIRT-327 # Richard's upstream QEMU work ]
Posted v4 of arm hflags reorg.
Split out 3 minor patch sets from the larger aa32 decodetree set.
Reviewed v6 of invert-endian tlb patch set.
Reviewed ajb's fpu header reorg.
Posted an RFC vs Andrew Jones' SVE-in-KVM patch set.
r~
QEMU Tooling ([VIRT-252])
=========================
- working through v4 comments on [next version branch]
[next version branch]
https://github.com/stsquad/qemu/tree/plugins/plugins-v5
Upstream Work ([VIRT-109])
==========================
- spent some more time looking at TCG EL2 behaviour
- there is something not working properly even without the VHE
patches
- need to do some tooling work to be able to properly debug HYP code
- posted {PATCH v1 0/7} softfloat header cleanups Message-Id:
<20190808164117.23348-1-alex.bennee(a)linaro.org>
- posted {PATCH v2 0/7} softfloat includes cleanup Message-Id:
<20190809091940.1223-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/2} docker DEF_TARGET_LIST cleanup Message-Id:
<20190809155047.24526-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Completed Reviews [6/6]
=======================
{Qemu-arm} {PATCH 0/2} target/arm: Fix routing of singlestep exceptions
Message-Id: <20190805130952.4415-1-peter.maydell(a)linaro.org>
- CLOSING NOTE [2019-08-07 Wed 11:47]
Looks good, would be nice to integrate a better testcase
{PATCH} gdbstub: Fix handling of '!' packet with new infra
Message-Id: <20190805190901.14072-1-ramiro.polla(a)gmail.com>
- CLOSING NOTE [2019-08-07 Wed 11:59]
Queued to my tree
{PATCH 0/3} tests/tcg: disentangle makefiles
Message-Id: <20190730123759.21723-1-pbonzini(a)redhat.com>
{Qemu-devel} {PATCH v2 00/29} Tame a few "touch this, recompile the world" headers
Message-Id: <20190806151435.10740-1-armbru(a)redhat.com>
- CLOSING NOTE [2019-08-07 Wed 17:32]
Looks OK but breaks a lot of cross compiles. More subtly to fix.
{Qemu-devel} {PATCH untested for-4.2} memory: fix race between TCG and accesses to dirty bitmap
Message-Id: <20190729214717.6616-1-pbonzini(a)redhat.com>
{PATCH v3 00/29} Tame a few "touch this, recompile the world" headers
Message-Id: <87k1bmpn7y.fsf(a)dusky.pond.sub.org>
Current Review Queue
====================
* {PATCH v3 00/34} target/arm: Implement ARMv8.1-VHE
Message-Id: <20190803184800.8221-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v4 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20190307170440.3113-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH} Implement qemu_thread_yield for posix, use it in mttcg to handle EXCP_YIELD
Message-Id: <20190717054655.14104-1-npiggin(a)gmail.com>
* {PATCH v3 0/6} tests/docker: add podman support
Message-Id: <20190713143311.17620-1-marcandre.lureau(a)redhat.com>
* {PATCH 0/2} tests/acceptance: Add test of NeXTcube framebuffer using OCR
Message-Id: <20190629150056.9071-1-f4bug(a)amsat.org>
* {Qemu-devel} {PATCH 0/4} Introduce the microvm machine type
Message-Id: <20190628115349.60293-1-slp(a)redhat.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ we needed an rc4 for 4.1.0 (predictably), so herded the necessary
fixes into it
+ bug fixing:
- LP:1838913 : single-step exceptions were always being taken to EL1,
even if the guest configured debug exceptions to go to EL2 or EL3
- LP:1815423 : x86 TCG bug where we were giving the wrong result for
SSE float-to-int conversions that raised the 'invalid' exception
- LP:1796520 and LP:1839325 : started investigating some sh4 linux-user bugs
+ code review:
- patch to implement aspeed SD controller model
- Eric Auger's patchset of minor SMMUv3 fixes
- Aspeed GPIO controller model
- v3 of the GreenSocs reset-handling refactoring
- RTH's preliminary cleanup of handling of PC in arm decoder
thanks
-- PMM
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Posted a couple of revisions. Good feedback between this
and MemTag, both of which need to adjust the set of TLBs.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted v7.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Rebased upon current VHE+BTI work. Updated from beta manuals
to the ARM ARM issue E.a manual.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed v1 x86 gen_sse rewrite.
Reviewed Alex's v4 plugin patchset.
r~
o LLVM:
* Bots babysitting
* Machine Outliner:
- Rebased branch on upstream
- Working on stack fixup limits test cases
o Misc
* Various meetings and discussions.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ QEMU 4.1.0 rc3 sent out. As usual, we've found some last minute
bugs and we'll need an rc4 next week...
+ patch review:
- series from Philippe making some cleanups to use object_initialize_child()
and friends
- Alex's patch "generate a custom MIDR for -cpu max"
- made a start on reviewing RTH's 32-bit arm decodetree conversion
+ bug fixing:
- LP:1838277 : we were taking exceptions caused by BRK instructions at
EL2 to EL1, rather than to EL2; sent a patch fixing this
- LP:1838475 : FPU register stacking in M-profile CPUs without the
Security Extensions was incorrectly failing an NSACR check and
taking a bogus exception: sent a patch to fix
+ wrote a patchset that converts the sparc target away from the
deprecated and broken do_unassigned_access hook to use the new-in-2017
do_transaction_failure hook instead; one step closer to being able
to remove the old hook entirely...
+ did the same for the mips target
thanks
-- PMM
== This Week ==
* PR86753
- Working on approach suggested by Richard.
* PR90724
- Pinged upstream.
* Validation
- Merged patch to jenkins-scripts to add testsuite comparison to tcwg_gnu.
- Submitted patch for separating build and test steps in tcwg_gnu.
== Next Week ==
- Continue ongoing tasks.
== Progress ==
* LLVM 9.0.0 rc1 binaries uploaded
- Ran into one cross-platform issue (x86, AArch64, ARM etc)
- Opened a bug for libfuzzer tests on AArch64
* Use ninja in release job [LLVM-536]
- Done
* Investigate running benchmarks in containers [TCWG-1513]
- Seems to work, except for mcf which errors out; will investigate next week
* IR SVE reviews [LLVM-545]
- Another round of feedback to D53137
== Plan ==
* Review D47770
* Upcoming vacation: 6 - 13 August
* Friday off
== Progress ==
* GCC:
- FDPIC: started taking feedback into account. Changes under test.
- noinit attribute: posted a new version
* GNU-583 (Fix Linux kernel built for Thumb-2 with GCC using LTO)
- no progress this week
* GCC upstream validation:
- no new issue this week.
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started
yet. Received a few "warnings" as feedback.
* misc:
- infra fixes / troubleshooting
== Next ==
GCC:
- handle feedback on FDPIC and noinit patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
== Holidays ==
Aug 2-11 (next week)
[PR42719] BasicAA UnitTest failure on AArch64 when compiled with GCC
- Patch submitted upstream
[PR42853] LLD support for TPREL_G0 relocations
- In theory a simple change, but llvm-mc seems to be deliberately
doing something strange with MOVZ encodings fixMOVZ and I haven't
worked out why it is needed.
Investigations with respect to inline assembler constraints.
- Some patch review comments for my ABE (Linaro GCC build system)
patch for GCC RM multilibs
- LLD review for smaller AArch64 images.
- Wrote a summary of what TCWG do for the upstream community, may turn
into a Linaro blogpost
- Raised GCC PR91299 to cover incorrect weak definition inlining in
GCC LTO in presence of non-weak definition.
On holiday Friday 2nd August, back in the office on Monday.