[VIRT-327 # Richard's upstream QEMU work ]
Fix TranslationBlock overflow, launchpad 1824853.
Investigated launchpad 1824768, i386 emulation on arm32.
But works-for-me.
A bunch of work on new gvec primitives. Primarily to
support David Hildebrand's target/s390 conversion, but
it does enable more vectorization in target/arm as well.
r~
== Progress ==
* FDPIC
- Troubleshooting with stm32f469-disco. Trouble connecting via
cross-gdb over openocd. Updated GNU-411 and discussing with Omair.
Created GNU-606 to investigate if gdbserver memory consumption
increased since release 7.5.
* GCC upstream validation:
- little activity this week, close to e/o stage 4
* GCC
- ubsan on bare-metal toolchain: discussed with Peter, I will send an
email to llvm-dev list.
* Infra
- several boards crashed, increasing Jenkins build queue
- working on adding binutils regression testing to round-robin jobs
== Next ==
More of the on-going tasks
== Progress ==
* Short week (Out of office 18 - 19 April)
* LLVM 7.1.0 Release for ARM & AArch64 [LLVM-546]
- Uploaded binaries for both ARM & AArch64
* [GlobalISel] Better support for small types [LLVM-553]
- Still in progress (currently investigating a bug)
* Catching up on Connect
== Plan ==
* Back at work on Thursday, April 25th
Progress: (very short week, 2 days)
* VIRT-65 [QEMU upstream maintainership]
+ QEMU release work: flurry of last minute stuff for rc3. I hoped
we would not need an rc4, but as usual a release-critical issue
was found, so we will be having one.
+ code review
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ worked through some final bug fixes
+ sent out v1 of the FP support patchset for review
thanks
-- PMM
(Previous week was Connect.)
Progress: (short week, 3 days)
* VIRT-65 [QEMU upstream maintainership]
+ QEMU release work: flurry of last minute stuff for rc3.
I hoped we would not need an rc4, but as usual a release-critical
issue was found, so we will be having one.
+ code review
thanks
-- PMM
== Progress ==
* FDPIC
- Experimenting with stm32f469-disco. It seems recent gdbserver is now
too large to load (issues when trying to map libstdc++.so while
attempting to load a simple hello.c)
* GCC upstream validation:
- little activity this week, close to e/o stage 4
* GCC
- ubsan on bare-metal toolchain: experimenting with multlibs
* Infra
- improved reporting of some jobs, improved error handling
== Next ==
More of the on-going tasks
== Progress ==
* LLVM 7.1.0 Release for ARM & AArch64 [LLVM-546]
- Final candidate build in progress
* [GlobalISel] Map and select G_FCONSTANT [LLVM-552]
- Committed upstream
* [GlobalISel] Better support for small types [LLVM-553]
- In progress
== Plan ==
* LLVM-546, LLVM-553
[Conferences]
Linaro connect and EuroLLVM. Please see trip reports already posted. A
bit of a gruelling week of Travel going from Bangkok straight to
Brussels, with just a short half a day in between at home in
Cambridge.
[Activity]
- A number of reviews whilst away
- Started looking at how to build an embedded toolchain with Linaro's
ABE and work out how to fit it into their infrastructure.
Planned Absences
Holiday 12- 16th, back on Wednesday.
== Progress ==
* FDPIC
- Experimenting with stm32f469-disco
* GCC upstream validation:
- reported a few regressions
* GCC
- ubsan on bare-metal toolchain: enabling more multilibs triggered an
assert in the linker.
* Infra
- improved reporting of some jobs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs update
== Progress ==
* LLVM 7.1.0 Release for ARM & AArch64 [LLVM-546]
- Uploaded RC1 for both ARM & AArch64
* [GlobalISel] Support debug info [LLVM-549]
- Added support for DBG_VALUE, seems to be enough for now
* [GlobalISel] Map and select G_FCONSTANT [LLVM-552]
- In progress
* IR SVE Reviews [LLVM-545]
- More reading, discussions etc
== Plan ==
* More of the same
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
More progress, but still crashing early. Crashes on first
memory access after swapping ttbr1. Debugging kernel on
guest and qemu on host simultaneously. So far, all the
numbers look right but still boom.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted a v4 using the PT_NOTE, but still RFC-ish due to
missing abi for new mmap flag.
[VIRT-327 # Richard's upstream QEMU work ]
Posted v1+v2 of CPUNegativeOffsetState.
Posted v1 of a cleanup of target/riscv wrt decodetree.
[Other]
Upgraded the laptop from fedora 27 (out of support now),
to ubuntu 18.04 lts.
r~
[Activity]
[LLVM-542] Compiling zephyr with clang
- Prepared for presentation/discussion with colleagues at Connect next week.
- Made the installation process a bit more repeatable
- Added support for -Oz
[Intel-CET] patches to LLD (similar to BTI)
- Code-owner has redesigned the patches and they look a lot better and
more likely to go in. Shouldn't be too difficult to build BTI on top
of.
[LLVM-523] .ARM.exidx redesign
- Now committed, and has stuck for at least a day without needing to
be reverted.
Linaro Connect
- Preparations for hack room
- Gave dry run of presentation for Doughnuts. Will need to cut out
some material to get through in time.
Next week:
At Linaro Connect
Then at EuroLLVM
Then most likely on holiday for remainder of that week.
== Progress ==
* FDPIC
- Discovered that my stm32f429-disc1 board is not suitable for recent
Linux kernels (too large). Will experiment with stm32f469-disco
* GCC upstream validation:
- reported a few regressions
* misc (conf-calls, meetings, emails, ....)
- reviewed infra script patches
- fixed small issues after adding QEMU as a toolchain component in ABE
- added jobs to monitor Jenkins slaves
- fixed issues in benchmarking scripts
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs update
== Progress ==
* LLVM 7.1.0 Release for ARM & AArch64 [LLVM-546]
- Fixed our infra scripts to work for 7.1.0 (looks like it's the
first ever minor release since the new numbering scheme was
introduced)
- AArch64 is ready and green, ARM still in progress
* [Thumb GlobalISel] Bugfixes [LLVM-544]
- Committed the patch for alignment issues and 2 other patches for
1-bit value handling
- Selfhosted clang now passes check-all
* IR SVE Reviews [LLVM-545]
- More reading, installed armie etc
== Plan ==
* More of the same
Hi,
I am trying to cross-compile QEMU for aarch64 target using the below toolchain http://releases.linaro.org/components/toolchain/binaries/4.9-2016.02/aarch6…
../configure --target-list=aarch64-softmmu --enable-kvm --enable-vhost-net --cross-prefix=~/Downloads/gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-
ERROR: pkg-config binary '/home/rokhanna/Downloads/gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-pkg-config' not found
QEMU - https://github.com/qemu/qemu
Any pointers on where I can find pkg-config? Thanks in advance.
Thanks
Rohit
-----------------------------------------------------------------------------------
This email message is for the sole use of the intended recipient(s) and may contain
confidential information. Any unauthorized review, use, disclosure or distribution
is prohibited. If you are not the intended recipient, please contact the sender by
reply email and destroy all copies of the original message.
-----------------------------------------------------------------------------------
Thanks Wookey and Richard.
I was able to resolve the pkg-config issue after installing it with -
apt install pkg-config-aarch64-linux-gnu
I modified my configure command to below -
./configure --target-list=aarch64-softmmu --enable-kvm --enable-vhost-net --cross-prefix=aarch64-linux-gnu-
Now I am running into dependency issue on glib-2.4 and gthread-2.0.
rokhanna@rokhanna-dev ~/dev/qemu.git $ ./configure --target-list=aarch64-softmmu --enable-kvm --enable-vhost-net --cross-prefix=aarch64-linux-gnu-
ERROR: glib-2.40 gthread-2.0 is required to compile QEMU
Thanks
Rohit
________________________________
From: Richard Henderson <richard.henderson(a)linaro.org>
Sent: Thursday, March 21, 2019 9:31 PM
To: Rohit Khanna; linaro-toolchain(a)lists.linaro.org
Cc: Santosh Shukla
Subject: Re: Cross compiling QEMU for aarch64
On 3/21/19 4:45 PM, Rohit Khanna wrote:
> Hi,
>
> I am trying to cross-compile QEMU for aarch64 target using the below toolchain http://releases.linaro.org/components/toolchain/binaries/4.9-2016.02/aarch6…
>
>
> ../configure --target-list=aarch64-softmmu --enable-kvm --enable-vhost-net --cross-prefix=~/Downloads/gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-
>
> ERROR: pkg-config binary '/home/rokhanna/Downloads/gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-pkg-config' not found
First, "--cross-prefix=aarch64-linux-gnu-".
It is a prefix, not a path. You should have
"$HOME/Downloads/gcc-linaro-4.9-2016.02-x86_64_aarch64-linux-gnu/bin" in your
path in order to use that compiler.
Second, pkg-config is not part of a toolchain, but part of an entire OS
distribution. If your host is debian or ubuntu, they ship a version configured
for aarch64 cross-compilation. Which is helpful because...
Third, you're going to need a *lot* of aarch64 libraries in order to build
QEMU. This is where OS support for cross-toolchains is key.
r~
-----------------------------------------------------------------------------------
This email message is for the sole use of the intended recipient(s) and may contain
confidential information. Any unauthorized review, use, disclosure or distribution
is prohibited. If you are not the intended recipient, please contact the sender by
reply email and destroy all copies of the original message.
-----------------------------------------------------------------------------------
Progress: (short week, 3 days)
* VIRT-65 [QEMU upstream maintainership]
+ reviewed a few patchsets that had been lurking in my queue too long
+ trawled through the QEMU bug system for bugs we'd already fixed and
forgotten to close, bugs which need more info from the submitter,
and bugs which were very easy to fix
+ various other release related work
* Preparation for Connect next week
thanks
-- PMM
Linaro connect preparation:
- Finished Linaro Connect presentation on cross compilation with clang
-- Hoping to do a dry-run at Doughnuts this week assuming we can
resolve a potential clash with the IPG hands-on.
- Draft agenda for the hack-room produced.
[LLVM-523] ARM.exidx redesign
- Got approval, committed and then reverted my exceptions redesign due
some build-bot failures. Found another potential problem with
--emit-relocs that may be a bit more difficult to fix.
[BTI]
Continuing to review and make suggestions for Intel CET patch
(pre-requisite for BTI due to common use of .note.gnu.property
sections)
Some more communication with Linux Kernel port to Arm with respect to
assembler problems.
o LLVM
* Machine outliner:
- Debugging issue in LLVM bootstrap.
- Preparing BKK19 Hacking session presentation.
o Misc
* Various meetings and discussions.
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Picked up my partial patch set and started on it again.
It is improved by having done the pauth/bti/mte work.
But still a work in progress.
[VIRT-327 # Richard's upstream QEMU work ]
Version 3 of tcg/ppc vector instructions.
Reviewed target/rx v4.
Fixed thread=single expansion of casp after Alex did all the
hard work tracking down the kernel failure, and writing me a
test case.
Looking into the size of the softmmu tlb expansion. Current
thinking is to move tlb out of CPUArchState into a new struct
that precedes env, so that the tlb is at small negative offsets
from env, so that {mask, table} is loadable with LDP/LDRD.
r~
Upstream Work ([VIRT-109])
==========================
- posted some CI clean-ups for next 4.0-rc
- posted {PATCH v1 0/3 for 4.0} reduce timeouts on Travis
Message-Id: <20190319124800.7454-1-alex.bennee(a)linaro.org>
- posted {PATCH} .travis.yml: reduce number of targets built while
disabling things Message-Id:
<20190321124857.28132-1-alex.bennee(a)linaro.org>
- will send PR on Monday
- while testing {Qemu-devel} {PATCH 3/4} memory: introduce
memory_global_after_dirty_log_sync Message-Id:
<20180209104546.29401-4-pbonzini(a)redhat.com>
- discovered regression -cpu max -accel tcg,thread=single with
ARM64_LSE_ATOMICS kernel breaks
- this is likely due to different code paths for non-MTTCG atomics
- however attempts [to reproduce in linux-user] have so far drawn
a blank
- have notified rth who can hopefully find the problem
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[to reproduce in linux-user]
https://github.com/stsquad/qemu/tree/for-4.0/mttcg-and-lse-atomics
Other
=====
- more work on Connect presentation
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {Qemu-devel} {multiprocess RFC PATCH 00/37} Initial support of multi-process qemu
Message-Id: <20190307072025.8041-1-elena.ufimtseva(a)oracle.com>
* {Qemu-devel} {PATCH 0/6} Refine exec
Message-Id: <20190321082555.21118-1-richardw.yang(a)linux.intel.com>
* {PATCH v5 00/26} KVM: arm64: SVE guest support
Message-Id: <1553017938-710-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH v4 00/19} Acceptance Tests: target architecture support
Message-Id: <20190312121150.8638-1-crosa(a)redhat.com>
* {PATCH 0/5} travis-ci: Build EDK2 roms
Message-Id: <20190311003052.13778-1-philmd(a)redhat.com>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ tagged rc0 for QEMU 4.0.0; various other release-ish work
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ more progress with FP support: lazy state saving and the vlldm/vlstm
insns now implemented. FP support is now feature-complete, though
some bugs likely remain to be fixed.
* A day or so taken up by move to a new desktop machine (but
builds should go faster now!)
NB: I'm not working on Wednesday or Friday next week.
thanks
-- PMM
== Progress ==
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- LLVM 8.0.0 is out!
* [Thumb GlobalISel] Bugfixes [LLVM-544]
- Patch for alignment issues ready to commit next week
- With the patch, we can build clang successfully, but it fails some
of its tests
- Investigated one of the tests, it's failing because we end up
representing 'true' as '-1'. Going to prepare a patch for that next
week
* IR SVE Reviews [LLVM-545]
- Reviewed D32530 - Scalable Vector IR Type
* Buildbot babysitting
- Reported some failures upstream
- Complained about non-deterministic libfuzzer tests
== Plan ==
* LLVM-544, LLVM-545
== Progress ==
* FDPIC
- Setting up new stm32f429-disc1 board. Still not working with recent kernel
* GCC upstream validation:
- reported a few regressions
* GCC:
- (GNU-99) ubsan / bare-metal. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing infra script patches
- added qemu as a toolchain component supported by ABE.
- merged tcwg_bmk branch into master
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs update
[LLVM-542] Compiling zephyr with clang
- Shared patches with Zephyr team lead, who has integrated them into a
private branch and has locally fixed some of the
incompatibilities/warnings
- Went through the Zephyr samples to get build instructions for the
ones compatible with Arm dev-boards.
[Intel-CET] patches to LLD (similar to BTI)
- Reviewed patches and made suggestion for an alternative design. Will
need to re-review the follow up this week.
[LLVM-523] .ARM.exidx redesign
- Responded to review comments, will need to ping again this week.
Linaro Connect
- Preparations for hack room
- Started on Presentation on cross compilation, need to finish slides this week.
[VIRT-343 # ARMv8.5-RNG, Random Number Generator ]
Three versions posted, with good review on the crypto side.
Generalized our existing infrastructure to use crypto quality
numbers by default, and decent deterministic numbers when
given the -seed command-line argument. Converted our existing
hw random number devices; implemented the AA64 registers;
filled in the PPC64 stubs; implemented the X86 tcg insns.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed and revised some target/hppa patches from Sven.
Final pull request for hppa for 4.0.
Final pull request for decodetree.
Revised the tcg extract2 patch set; delay this for 4.1.
r~
== This Week ==
* PR88839 (8/10)
- Addressing suggestions by Richard.
- Patch works for all cases except for VNx2DI/VNx2DF modes. I have a
workaround for those two cases but investigating for a better
approach.
* Validation (1/10)
- Submitted patches to merge tcwg_gnu branch into master for jenkins-scripts/
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing tasks
Upstream Work ([VIRT-109])
==========================
- posted {PATCH} scripts/qemugdb: re-license timers.py to GPLv2 or
later Message-Id: <20190311165538.6623-1-alex.bennee(a)linaro.org>
- started discussion on the state of QEMU CI Message-Id:
<6D897F0B-D7A6-4A16-93E0-3F68FF53B0BE(a)euphon.net>
- looked at GitLab's runners as an CI scaling option
- looks like [arm64 support has somewhat stalled]
- spammed Peter with PRs for Tuesday's softfreeze
- posted {PULL 00/26} final testing updates for 4.0 Message-Id:
<20190312170931.25013-1-alex.bennee(a)linaro.org>
- including {PATCH v2 0/7} testing/next for softfreeze Message-Id:
<20190312105547.4755-1-alex.bennee(a)linaro.org>
- and {PATCH v4 00/21} final tcg tests for 4.0 Message-Id:
<20190312155947.14918-1-alex.bennee(a)linaro.org>
- posted {PULL 0/5} gitdm updates for 4.0 Message-Id:
<20190312193458.9171-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[arm64 support has somewhat stalled]
https://gitlab.com/gitlab-org/gitlab-runner/merge_requests/725
Other
=====
- more work on Connect presentation
Completed Reviews [1/1]
=======================
{Qemu-devel} {PATCH} ci: store Patchew configuration in the tree
Message-Id: <20190315091941.23669-1-pbonzini(a)redhat.com>
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {PATCH v4 00/19} Acceptance Tests: target architecture support
Message-Id: <20190312121150.8638-1-crosa(a)redhat.com>
* {PATCH 0/5} travis-ci: Build EDK2 roms
Message-Id: <20190311003052.13778-1-philmd(a)redhat.com>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {PATCH+RFC 0/6} target/arm: Define cortex-a{73,75,76}
Message-Id: <20190223023957.18865-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH 0/9} tcg: Add tcg_gen_extract2_{i32,i64}
Message-Id: <20190307144126.31847-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH 0/6} pc: Support firmware configuration with -blockdev
Message-Id: <20190225183757.27378-1-armbru(a)redhat.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ lots of code review and other work for softfreeze
+ tracked down the bug that caused regressions running UEFI in a
KVM guest with commit 823e1b3818f9b1, and sent out a fix
thanks
-- PMM
== Progress ==
* FDPIC
- Setting up new stm32f429-disc1 board. Boots OK with buildroot's
default 4.11 kernel. Boot seems to fail starting with 4.13 (recent
kernel needed to have FDPIC support)
* GCC upstream validation:
- reported a few regressions
* GCC:
- (GNU-99) ubsan / bare-metal. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing infra script patches
- adding qemu as a toolchain component supported by ABE. A bit
convoluted because of manifest handling.
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs
- add QEMU to list of components built by ABE
== Progress ==
* Out of office 1 day (Thursday)
* [Thumb GlobalISel] Bugfixes [LLVM-544]
- The test-suite compiles and executes without failures (with
fallback to DAG ISel)
- We get some bus errors in the selfhost, which are due to unaligned
64-bit stores. Apparently when alignment checks were introduced in the
legalizer, they were only used for types < 32 bits. Currently testing
a patch to fix this oversight.
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- rc5 looks good on AArch64, ARM is still in progress (waited for LSS-570)
== Plan ==
* Wrap up LLVM-544
* Upload rc5 when ARM is ready
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v4, with system mode only.
[VIRT-298 # ARMv8.4-CondM, Condition flag manipulation ]
[VIRT-329 # ARMv8.5-CondM, Condition flag manipulation ]
[VIRT-337 # ARMv8.0-SB, Speculation Barrier ]
[VIRT-338 # ARMv8.0-PredInv, Prediction Invalidation ]
[VIRT-330 # ARMv8.5-FRINT, Floating-point to integer ]
All upstream.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed s390x vector patch set 3.
Reviewed renesas rx patch set 3.
Posted some patches and thoughts for
https://bugs.linaro.org/show_bug.cgi?id=4274
Implemented extract2 as a tcg opcode.
Minor hppa bug fixes.
Lots more work on decodetree and A32+T32+T16 conversion.
r~
- Intel CET review (Related to BTI support in LLD), raised issue of
multiple PT_NOTE sections one per alignment
https://reviews.llvm.org/D59120 , commented on command line options.
- LLVM-523 redesigned the LLD handling of ARM exidx sections to
centralise more of the Arm specific implementation details in one
place. Hope to post upstream to get some movement on the review to add
missing .ARM.exidx sections for chrome OS team.
- LLVM-542 Managed to build most of the Zephyr examples for clang,
shared patches to do so with zephyr tech lead.
- Some research for some ABI topics.
- Some thoughts for Linaro connect activities, started team calendar.
Next week:
- Start on my connect presentation
o LLVM
* Machine outliner:
- Stack alignment and refactoring.
- Start to prepare BKK19 talk
* Bots babysitting
* Built 8.0.0-rc4 binaries for x86 and ARM, got issues to start the job on D05
o Misc
* Completed BKK19 and EuroLLVM trips.
* Various meetings and discussions.
== Progress ==
* FDPIC
- (GNU-411) GDB: debugging problems with FDPIC support. Working on
setup of an stm32 board.
* GCC upstream validation:
- reported a few regressions
* GCC:
- (GNU-99) ubsan / bare-metal. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing infra script patches
- debugging new benchmarking round-robin jobs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs
- add QEMU to list of components built by ABE
Reply
Forward
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review
- add watchdog device to stellaris boards
- bcm2836 "local timer" device
- RTH's rolled-up patchset for SB, PredInv, CondM, FRINT extensions
- Eric's patchset to allow the 'virt' board to have more than 255GB of RAM
- a patchset to add a "generic nommu" board for NiosII
+ assembled a target-arm pull request for softfreeze
+ fixed some minor issues with the "build sphinx docs" patches,
and got them into master (and then fixed some more minor issues...)
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ progress on M-profile floating point:
- finished first draft of changes to exception handling code
- this is now on hold as we are into softfreeze for QEMU 4.0 and other
work for that release will take priority for the next few weeks
thanks
-- PMM
== This Week ==
* PR88839 - Poor implementation of blend like permutes (4/10)
- Addressing suggestions by Richard on patch
* GCC vectorizer (2/10)
- Background reading
* Validation (1/10)
- Added more bootstrap configs for tcwg_gnu job
- Committed patch to abe to enable bootstrap implicitly when buildconfig is set.
- Started tracking for tcwg_gnu ci job (init_configuration == false).
* Public holiday (2/10)
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing tasks
o LLVM
* Back to machine outliner after vacation
- Rebased on upstream master branch
- Working on stack alignment and refactoring.
o Misc
* Preparing BKK19 and EuroLLVM trips.
* Various meetings and discussions.
* PR88838
- I have a patch which solves this.
* adds iv in Pmode but compare_type in 32bit
- It exposes a latent bug in fwprop in regression testing
- Looking into it
== Plan ==
* Complete above PRs
* Look at GDB BZ #21221 - gdb hangs while stepping an empty loop
Progress:
[VIRT-274 # ARMv8.2-FHM, Floating-point multiplication variant ]
Now upstream.
[VIRT-298 # ARMv8.4-CondM, Condition flag manipulation ]
[VIRT-329 # ARMv8.5-CondM, Condition flag manipulation ]
[VIRT-337 # ARMv8.0-SB, Speculation Barrier ]
[VIRT-338 # ARMv8.0-PredInv, Prediction Invalidation ]
[VIRT-330 # ARMv8.5-FRINT, Floating-point to integer ]
Posted an omnibus of SB+PredInv+CondM+FRINT that I have
labeled "v3", as 3 > any individual revision previously used.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed s390x vector patch set v2.
Implemented pattern groups in decodetree.
Prototyped A32 conversion to decodetree;
started a second revision that incorporates T32.
Started looking at
https://bugs.linaro.org/show_bug.cgi?id=4274
I can swizzle things around by changing the group name from
"cp_regs" to the predefined "system", but somehow those regs
are *also* registered with "general". Which means the
undesired behaviour by which "info regs" prints all of the
system registers still exists.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ upstream code review and pull request handling
+ respin of patchset to enable building our Sphinx RST documentation
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ progress on M-profile floating point:
- have written code to handle the smaller parts of the feature
(insn decode, registers, etc)
- started on changes to exception handling
- lazy save/restore still to do after that
* a lot of admin/meeting stuff this week
* softfreeze now less than two weeks away, need to
focus on what needs to be done before then...
thanks
-- PMM
[LLVM-494] LLD is now turned on for clang linux kernel defconfig builds
[LLVM-542] Worked out how to get Zephyr (Linaro's choice of IoT
embedded OS) compiling with clang. Looks like it is going to be
difficult to get linking with clang/lld so I've used the gcc/ld.bfd
for now.
Linux kernel sent a draft patch to try and alleviate some object
ordering problems that arise when linking the linux kernel with LTO.
[Misc]
Intel patch to add CET to LLD https://reviews.llvm.org/D58102
I mention this as this is related to BTI and CFI and
.note.gnu.property sections. There has been some pushback to the use
of .note.gnu.property sections, and in Intel's case their 2 level PLT
scheme although it seems like as this has been mitigated by the
presence of this option in gcc for some time. I have noticed that we
tend to do design of a feature in one community (LLVM, GNU) and then
attempt to win over the other one with leverage that the other
community supports it. We may need to cast our early feedback net a
bit wider to mitigate the chance that one of the communities blocks
one of our features.
There was an interesting RFC on a linker feature for improving
code-size for mobile phones
http://lists.llvm.org/pipermail/llvm-dev/2019-February/130583.html in
essence an application is developed with loadable features implemented
in DSOs loaded by dlopen. The entry points of the DSO are recorded,
then all the input objects are given to the static linker which then
performs LTO and creates stripped down DSOs that must be loaded at a
specific offset from the application (shrinking them but losing the
shared part of DSO).
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- posted {PATCH v3 0/3} softmmu demacro Message-Id:
<20190215143115.28777-1-alex.bennee(a)linaro.org>
- looks like there is still a bug on x86 TCG Message-Id:
<20190219182528.GA19925@flamenco>
- started v4 re-base, but realised we need better testing so
- posted {PATCH v2 00/16} Enabling tcg/tests for cris and system
mode xtensa & arm Message-Id:
<c3a65d4b-8720-2957-1394-032823a78760(a)redhat.com>
- started writing an i386 test case (x86 exercises more of the
softmmu edge cases)
- started reviewing v3 of plugin patches
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v5} hw/block: better reporting on pflash backing file
mismatch Message-Id: <20190227111347.15063-1-alex.bennee(a)linaro.org>
- tested the possible ahci/migrate fix Message-Id:
<20190227121052.GD2602@work-vm> for hang identified last week
- posted {PULL 0/7} softfloat updates, mostly for s390x Message-Id:
<20190226141201.16999-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/6} current state of gitdm/next Message-Id:
<20190226164656.mhasc4xxfjf34hns@function>
- and follow-up {PATCH v2 0/5} gitdm/next updates Message-Id:
<20190301100310.22345-4-alex.bennee(a)linaro.org>
- added some stats to VIRT-26/VIRT-326 for possible KPI use
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other
=====
- more drafting of Connect talk
Completed Reviews [1/1]
=======================
{PATCH v2 00/11} pflash: Fixes and cleanups
Message-Id: <20190226193408.23862-5-armbru(a)redhat.com>
- CLOSING NOTE [2019-03-01 Fri 16:59]
Looks like a good cleanup
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {Qemu-devel} {PATCH 00/23} tests/tcg/xtensa: conditionalize xtensa tests
Message-Id: <20190219061111.10231-1-jcmvbkbc(a)gmail.com>
* {PATCH 00/10} Rework debug exception handling code
Message-Id: <20190301132809.24653-7-will.deacon(a)arm.com>
* {PATCH v2 00/11} Enable build and install of our rST docs
Message-Id: <20190228145624.24885-1-peter.maydell(a)linaro.org>
* {PATCH+RFC 0/6} target/arm: Define cortex-a{73,75,76}
Message-Id: <20190223023957.18865-1-richard.henderson(a)linaro.org>
* {PATCH v3 00/20} Acceptance Tests: target architecture support
Message-Id: <20190221005753.27955-1-crosa(a)redhat.com>
--
Alex Bennée
== Progress ==
* [Thumb GlobalISel] Support global variables [LLVM-540]
- Committed upstream
* [Thumb GlobalISel] Support G_CTLZ [LLVM-543]
- Committed upstream
- We now have the same level of support for Thumb2 and ARM mode
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- Tested and uploaded rc3
== Plan ==
* Out of office between 4 - 8 March (i.e. next week)
* GlobalISel bugfixing and cleanup (both ARM and Thumb2)
== Progress ==
* PR88836
- I have a patch (for backend and CSE) which now passes bootstrap and
regression except for one testcase failure (which looks like a pattern
issue). Looking into it.
* Look at GDB BZ #21221 - gdb hangs while stepping an empty loop
- Not convinced that it is a gcc issue. Looking into the dwarf specification.
* PR88838
- Looking at it.
- Also familiarising with auto-vectorisation of SVE
== Plan ==
* Complete above PRs
* Look at GDB BZ #21221 - gdb hangs while stepping an empty loop
[LLVM-158] Monitor and maintain buildbots
- Some work to track down a faulty msan test on AArch64 that was
intermittently failing.
- Spent some time trying to reproduce an intermittent failure in libfuzzer.
[LLVM-523] Synthesise EXIDX_CANTUNWIND entries for sections without tables.
- Not getting much response from upstream beyond a vague suggestion to
rewrite the whole of .ARM.exidx handling as a single custom section. I
may have to go down this path to get the feature accepted, even if it
is to show that it is a bad idea.
[LLVM-496] LLD in linux kernel
- Submitted patch to ignore -p (--no-pipeline-knowledge) which is used
by the AArch32 linux kernel.
- Submitted patch to integrate LLD in TCWG kernel regression test.
- Learned, the hard way, about how the linux kernel build system works
and how to pass extra flags.
Reviews:
Spent an awful long time looking at how clang passes options to GNU as
to try and match the existing clang defaults. I'm not sure I've seen
anything much more confusing than tracing through target features from
clang to llvm and back again.
re-essayer de flash le kernel sur la board (mais est-ce possible vu
qu'il semble plus gros que la flash?)
$ openocd -f /usr/share/openocd/scripts/board/stm32f429discovery.cfg
-f flash-kernel.cfg
[...]
Info : device id = 0x20016419
Info : flash size = 2048kbytes
Info : Dual Bank 2048 kiB STM32F42x/43x/469/479 found
Warn : no flash bank found for address 0
wrote 0 bytes from file
/home/lyon/src/kernel/linux/arch/arm/boot/xipImage in 0.007352s (0.000
KiB/s)
** Programming Finished **
demander de l'aide aux gens de ST?
re-essayer avec un openocd plus recent
== Progress ==
* FDPIC
- (GNU-411) GDB: debugging problems with FDPIC support. Trying to
setup a stm32 board to avoid problems with unsupported configurations
mix between kernel and qemu.
* GCC upstream validation:
- reported a few regressions
* GCC:
- (GNU-99) ubsan / bare-metal. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing infra script patches
- debugging new benchmarking round-robin jobs
== Next ==
Holidays, back on March 4th
== Next-next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
- complete board setup
Infra:
- benchmarking jobs
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ patch review: RTH's JSConv/FHM patchset
+ sent another arm pull request
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ Implemented and wired up the SSE-200 Message Handling Units
+ Implemented the mechanism by which a guest can power up CPU 1
+ Sent out patches for these; this can run the Zephyr MHU/dualcore testcase
+ Started looking at implementing floating point support for M profile
thanks
-- PMM
== Progress ==
* [Thumb GlobalISel] Support control flow [LLVM-530]
- Committed upstream
* [Thumb GlobalISel] Support accessing the stack [LLVM-527]
- Committed upstream
* [Thumb GlobalISel] Support floating point [LLVM-531]
- Committed upstream
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- Investigated the release blocker from rc1, turned out to be an
issue with the filesystem used in the container on the APMs
- Changed the release job to run on the D05 instead, where we use a
different container [LLVM-539]
- Testing still in progress
== Plan ==
* [Thumb GlobalISel] Support global variables [LLVM-540]
* Out of office between 4 - 8 March
== Progress ==
* PR88834:
* Have a patch for ivopt and backend that generates the required
addressing mode and code. Still need cleanup and some improvements.
* PR88836
Made the required changes to the backend.
CSE is still not happening. Looked at CSE in detail and made few
changes but still need more work. The issues are:
- Parallel rtx with one setting a register and other using it will
be immediately invalidated as the invalidation happens after
processing both.
- If CSE is such that one instruction is with one constant operand
and other with constant in a register, it will not be detected
- VEC_DUPLICATE is not handled.
- Not sure any other pass like GCSE is a better option
== Plan ==
* Complete above PRs
* Look at GDB BZ #21221 - gdb hangs while stepping an empty loop
[VIRT-68 # QEMU should implement tagged pointer support ]
Closed. We merged these patches on Feb 5.
[VIRT-242 # ARMv8.3-JSCVT ]
Sent v4.
[VIRT-274 # ARMv8.2-FHM, Floating-point multiplication variant ]
Sent v2.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Sent v3 vs 00eac6.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed s390 floating point extension feature.
Fixed AT_PLATFORM for arm-linux-user and aarch64_be-linux-user.
Implemented missing float_round_to_odd functionality.
r~
QEMU Tooling ([VIRT-252])
=========================
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- posted {PATCH v3 0/3} softmmu demacro Message-Id:
<20190215143115.28777-1-alex.bennee(a)linaro.org>
- awaiting v3 of plugin patches :todo
Upstream Work ([VIRT-109])
==========================
- posted {PULL 00/18} testing updates: travis/cirrus/vm-test/binfmt
Message-Id: <20190211130507.8710-1-alex.bennee(a)linaro.org>
- posted {PATCH v2 0/6} HWCAP_CPUID registers for aarch64 Message-Id:
<20190205190224.2198-1-alex.bennee(a)linaro.org>
- fixes pulled into target-arm.next
- test case held back due to compiler version needed, need to respin
- posted {PATCH v2} hw/block: report when pflash backing file isn't
aligned Message-Id: <20190215122808.22301-1-alex.bennee(a)linaro.org>
- prompted further discussion on best solution as -pflash fails in
ways -bios doesn't
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other
=====
- Spent time building cross-tools for Debian/ARM64
- sent {PATCH} binutils: enable s390x/ppc64el on arm64 hosts
Message-Id: <20190212140851.22478-1-alex.bennee(a)linaro.org>
- Discussion on [Debian #921458] (buster apt source qemu)
- upstream consensus seems to be it is acceptable
- apt-get build-dep --arch-only qemu
[Debian #921458]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=921458
Completed Reviews [1/1]
=======================
{RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
- CLOSING NOTE [2019-02-13 Wed 16:30]
Looks fine, although we still need to keep squashing single-step
while debug is on
Absences
========
- 15-18th Feb (long w/e)
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {PATCH 0/4} target/arm: Reduce overhead of cpu_get_tb_cpu_state
Message-Id: <20190214040652.4811-1-richard.henderson(a)linaro.org>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {Qemu-devel} {PATCH v6 00/49} linux-user: Split do_syscall
Message-Id: <20190118213122.22865-1-richard.henderson(a)linaro.org>
* {PATCH 0/5} target/mips: Add MSA ASE tests
Message-Id: <1550001205-7883-1-git-send-email-aleksandar.markovic(a)rt-rk.com>
* {Qemu-arm} {PATCH 00/25} Kconfig dependencies for ARM machines
Message-Id: <1549694366-1284-1-git-send-email-thuth(a)redhat.com>
* {RFC QEMU v2 0/2} arm/virt: Account for guest pause time
Message-Id: <1543352837-21529-1-git-send-email-bijan.mottahedeh(a)oracle.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ usual code review/maintainer work
+ Coverity Scan is back up; triaged the issues that it found
+ updated OSX "handle Mojave" patchset to actually wire
up events correctly; sent v2
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ Finished, tested and sent out the initial Musca board model
patches for review
+ Fixed a handful of random bugs identified in the course
of doing this and testing it with various guests
+ Investigated why tip-of-trunk ARM-TFM stopped working on
the mps2-an521 model; turned out to be a QEMU bug which I have
sent out a patch for
thanks
-- PMM
== Progress ==
* [Thumb GlobalISel] Support G_SELECT [LLVM-529]
- Committed upstream
* [Thumb GlobalISel] Support control flow [LLVM-530]
- Committed support for branches
- Support for PHI in progress
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- rc2 uploaded, no changes from rc1 on our side
* Use new version of GCC on buildbots [LLVM-515]
- Restarted the buildbots, they are running GCC 7 now
* Buildbot babysitting [LLVM-158]
- Reproduced a couple of failures, ran a pre-commit for one of them
== Plan ==
* Continue LLVM-526 and LLVM-530
== This Week ==
* SVE ACLE (4/10)
- Committed svlsl patch to branch
* SVE (3/10)
- Studying GCC's vectorizer
- Started looking at PR88839
* Validation (2/10)
- GNU-156: Working on tcwg_gnu CI job.
* Misc (1/10)
- Meetings
- Filed PR89332 in GCC bugzilla.
== Next Week ==
- Continue ongoing tasks
[VIRT-242 # ARMv8.3-JSCVT ]
Posted v1 & v2.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted v3.
[VIRT-327 # Richard's upstream QEMU work ]
Posted v3 of arm tcg vector improvements. Now uses ssadd & usadd tcg opcodes
from AdvSIMD and not just SVE. This would have made it easier to find a bug in
my previous tcg backend patches.
Found the last two bugs in a conversion of target/hppa to decodetree, and
posted the patch set. Sent pull request for some other queued hppa patches.
Fix a minor RISU bug wrt SVE.
[LoAAS]
Travel to/from Cambridge for 2 days of Linux on ARM Summit.
r~
== Progress ==
* FDPIC
- (GNU-411) GDB: debugging problems with FDPIC support.
* GCC upstream validation:
- reported a few regressions, helping test patches
- dealing with some random results, still
* GCC:
- (GNU-99) rebased ubsan / bare-metal patches. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- debugging new benchmarking round-robin jobs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Infra:
- benchmarking jobs
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- re-based [ldst demacro to v3]
- recollect stats to see if slowdown still there :todo
- awaiting v3 of plugin patches
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[ldst demacro to v3]
https://github.com/stsquad/qemu/tree/ldst/demacrofy-v3
Upstream Work ([VIRT-109])
==========================
- need to finish the re-work of [system test and misc arch] tests
:todo
- will be useful for test cases for plugins
- also more test cases queued up for system tests
- debugged an occasional failure in pauth-1 test case
- expected given PAuth architecture, test needs tightening up
- posted {PATCH v1 0/4} HWCAP_CPUID registers for aarch64 Message-Id:
<20190128173940.25813-1-alex.bennee(a)linaro.org>
- posted {PATCH v2 0/6} HWCAP_CPUID registers for aarch64 Message-Id:
<20190205190224.2198-1-alex.bennee(a)linaro.org>
- posted {PATCH v2 00/16} current testing/next queue (with build
fixes) Message-Id: <20190207183744.5054-1-alex.bennee(a)linaro.org>
- this fixes regression of check-tcg but also
- discovered the Debian Buster's QEMU arm64 packaging is broken
- spent time trying to able to join #debian's IRC channels (aws
hosts banned!)
- tried to revive the cross-tools packaging I'd started with Wookey
last Connect
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[the linux-user multiarch but it is not ready yet]
https://github.com/stsquad/qemu/tree/testing/next-with-linux-user
[system test and misc arch]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
Other
=====
- Connect talk has been accepted, Friday 8.30 slot
Completed Reviews [1/1]
=======================
{Qemu-arm} {PATCH v6 00/73} per-CPU locks
Message-Id: <20190130004811.27372-1-cota(a)braap.org>
- CLOSING NOTE [2019-02-08 Fri 17:19]
Looks good, improves MTTCG scalability to 10-12 core now ;-)
Absences
========
- 15-18th Feb (long w/e)
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {RFC QEMU v2 0/2} arm/virt: Account for guest pause time
Message-Id: <1543352837-21529-1-git-send-email-bijan.mottahedeh(a)oracle.com>
* {PATCH v12 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <154935478086.7509.4349987292919289245.stgit@pasha-VirtualBox>
* {PATCH v2 00/18} OpenBSD: Enable qtesting
Message-Id: <20190129175403.18017-1-philmd(a)redhat.com>
* {PATCH v11 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <20190131131520.23264.75724.stgit@pasha-VirtualBox>
--
Alex Bennée
Fosdem:
- Presented on LLD performance at LLVM devroom
https://fosdem.org/2019/schedule/track/llvm/
- Other interesting presentations from the devroom include:
-- Compiling the Linux kernel with LLVM tools
-- Lessons in TableGen
LLVM-523 LLD should synthesise .cantunwind .ARM.exidx sections for
sections without them
- Implementation and regression tests done. Will do a bit more testing
and post upstream on Monday.
LLVM-521 Taking the address of an ifunc in LLD
- Spent some time reviewing upstream patch that should fix the
remaining LLD ifunc address equivalence problems for all Targets.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ reviewed RTH's patchsets for BTI and MemTag support
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ Implemented a first pass at a Musca board model, which
has the PPC and MPC infrastructure, plus RAM, and ROM for
the flash; need to add at least the UARTs and do some testing
* misc
+ sorting out travel arrangements, visa, etc for Connect
+ kicked off a discussion on whether there are aspects of
QEMU's role as the userspace component of a KVM VM that
Linaro should be putting more effort/attention into
thanks
-- PMM
== Progress ==
* Out of office on Monday
* [Thumb GlobalISel] Support G_GEP [LLVM-532]
- Committed upstream
* [Thumb GlobalISel] Support G_ICMP [LLVM-528]
- Committed upstream
* [Thumb GlobalISel] Support G_SELECT [LLVM-529]
- Almost ready to commit
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- rc2 in progress
* Minor changes to Jenkins jobs [LLVM-533]
- TCWG Regression Detection job: launch LLVM 7.0.0 release on xenial
containers (as opposed to 6.0.0 on trusty)
- Release job: forced parallelism to 3 on the TK1s, to reduce some
of the swapping; also posted a patch upstream to allow us to use
ninja, so we can limit only the number of link jobs (like we do on the
buildbots)
== Plan ==
* Continue LLVM-526 and LLVM-529
* Use new version of GCC on buildbots [LLVM-515]
- Restart the buildbots so they begin using GCC 7
Hi,
I found that the bare-metal toolchains for aarch64 from Linaro could not seem
to link objects to generate executable files successfully.
====================
Toolchain:
https://releases.linaro.org/components/toolchain/binaries/7.3-2018.05/aarch…
====================
Testcase:
> cat test.c
#include <stdio.h>
int main(int argc, char* argv[])
{
printf("Hello World!\n");
return 0;
}
> aarch64-elf-gcc -o test test.c
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/crt0.o: In function `_start':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/libgloss/aarch64/crt0.S:148: undefined reference to `initialise_monitor_handles'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-exit.o): In function `exit':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/stdlib/exit.c:70: undefined reference to `_exit'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-sbrkr.o): In function `_sbrk_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/sbrkr.c:58: undefined reference to `_sbrk'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-writer.o): In function `_write_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/writer.c:58: undefined reference to `_write'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-closer.o): In function `_close_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/closer.c:53: undefined reference to `_close'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-lseekr.o): In function `_lseek_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/lseekr.c:58: undefined reference to `_lseek'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-readr.o): In function `_read_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/readr.c:58: undefined reference to `_read'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-fstatr.o): In function `_fstat_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/fstatr.c:62: undefined reference to `_fstat'
.../gcc-linaro-7.3.1-2018.05-x86_64_aarch64-elf/bin/../aarch64-elf/libc/usr/lib/libc.a(lib_a-isattyr.o): In function `_isatty_r':
/home/tcwg-buildslave/workspace/tcwg-make-release/builder_arch/amd64/label/tcwg-x86_64-build/target/aarch64-elf/snapshots/newlib.git~linaro-local~linaro-newlib-2_5_0/newlib/libc/reent/isattyr.c:58: undefined reference to `_isatty'
collect2: error: ld returned 1 exit status
In addition, there was the same bug in 7.4.1-2019.02 version, but not in arm-eabi
or armeb-eabi.
Is there anyone fixing this?
Thanks,
Junling
== Progress ==
* Short week
- Annual Leave 2 days
- Public Holiday 1 day (Australia day)
*SVE ACLE
- Revised remaining ACLE patches
- svbic revised and reviewed
* Auto Vectorizer
- Looking at auto vectorisation SVE
== Plan ==
* SVE ACLE
* Look at PR88834
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Fixed HCR/SCR enablement of API/APK.
Posted v2 of the prctl.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted v2.
[VIRT-327 # Richard's upstream QEMU work ]
Implemented variable-length decoding in scripts/decodetree.py.
Lots of fiddling about with the RX ISA to understand what was
actually needed within decodetree.
Pull request for vector extensions and dynamic tlb sizing.
Finished MPS review.
r~
Upstream Work ([VIRT-109])
==========================
- need to finish the re-work of [system test and misc arch] tests
:todo
- will be useful for test cases for plugins
- also more test cases queued up for system tests
- posted userspace CPUID access patches Message-Id:
<20190128173940.25813-1-alex.bennee(a)linaro.org>
- spent some time debugging PAuth kernel boot regression
- rth posted a fix for the regression Message-Id:
<20190129143511.12311-1-richard.henderson(a)linaro.org>
Other Tasks
===========
- rebuilt Zen after the /home SSD failed
- fortunately the backup drive had all the work in progress source
code
- moved to Debian Buster while I'm at it
- need to regenerate my images and foundation/FVP setup
- and realise quite how many tweaks I had baked into the old system
Completed Reviews [2/2]
=======================
{Qemu-devel} {PATCH 00/11} Enable build and install of our rST docs
Message-Id: <20190201145035.22739-1-peter.maydell(a)linaro.org>
{RFC PATCH 0/3} lm32: convert to new common tcg infrastructure
Message-Id: <20190131215611.29341-1-michael(a)walle.cc>
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {PATCH v2 00/18} OpenBSD: Enable qtesting
Message-Id: <20190129175403.18017-1-philmd(a)redhat.com>
* {PATCH v11 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <20190131131520.23264.75724.stgit@pasha-VirtualBox>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH v3 0/4} tcg: support heterogenous CPU clusters
Message-Id: <20190121152218.9592-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH RFC 00/11} Add Renesas RX archtecture
Message-Id: <20190121131602.55003-1-ysato(a)users.sourceforge.jp>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ got the "use Sphinx for documentation" patchset to a point where I
think we could plausibly commit it to master; sent out for review
+ two arm pull requests
+ sent patches fixing decode errors for FCMLA
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ AN521 model is now in upstream QEMU
thanks
-- PMM
== Progress ==
* FDPIC
- (GNU-411) GDB: debugging problems with FDPIC support.
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, still
- qemu-3.1: switched to it this week
* GCC:
- (GNU-99) rebased ubsan / bare-metal patches. No progress.
- minor testsuite fixes
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- debugging new benchmarking round-robin jobs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Infra:
- benchmarking jobs
== Progress ==
* Out of office on Friday
* [Thumb GlobalISel] Support divisions [LLVM-516]
- Committed upstream
* [Thumb GlobalISel] Support G_GEP [LLVM-532]
- Ready to commit next week
* LLVM 8.0.0 Release for ARM & AArch64 [LLVM-526]
- Posted binaries for rc1
- Created a bug report for a MSan failure on AArch64
* Use new version of GCC on buildbots [LLVM-515]
- Ready to use in production
== Plan ==
* More GlobalISel
* Patch up the Jenkins release job [LLVM-533]
== Progress ==
* FDPIC
- (GNU-411) GDB: debugging problems with FDPIC support.
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, still
- qemu-3.1: plan to switch to it this week
* GCC:
- (GNU-99) rebased ubsan / bare-metal patches. No progress.
- minor testsuite fixes
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- experimenting with new build servers
- started looking at new benchmarking round-robin jobs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
== This Week ==
* SVE ACLE (8/10)
- WIP patch for svlsl
* Validation (1/10)
- Upsteam monitoring job based on round-robin.
- abe bug with make install
* Meetings (1/10)
== Next Week ==
- Continue ongoing tasks.
== Progress ==
* SVE ACLE
- Revised and reviewed svbic main briant svbic_z for bool
* Fixing uninit warning suppression from tree-ch pass
- Implemented a patch to handle this and regression test is fine.
Will post for review once stage 1 opens
* tree-reassoc improvements
- Looking at possible data structures to best represent
== Plan ==
* Continue with SVE ACLE
* Continue with tree-reassoc
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Finished up the linux-user emulation, and posted.
Reviewed a patch set from Huawei also touching PAuth.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed riscv decodetree v4 patchset.
Partial review of new target/rx patchset. It is confusing enough
to make me want to tackle the variable-length decodetree problem.
Reviewed softtlb resize v7 patchset; ported that to the remaining
tcg backends.
Part way through reviewing Peter's MPS2 patch set.
r~
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- started reviewing {RFC v2 00/38} Plugin support Message-Id:
<20181209193749.12277-1-cota(a)braap.org>
- some bitrot when applied to current tree :/
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
Upstream Work ([VIRT-109])
==========================
- respin {PATCH v3 0/5} support reading some CPUID/CNT registers from
user-space Message-Id:
<20180625160009.17437-1-alex.bennee(a)linaro.org>
- re-based [v3 branch] - I think the id reg stuff is now addressed
by rth's fixes
- still need to address other review comments
- posted {RFC PATCH 0/3} vmbuild tweaks for BSD targets Message-Id:
<20190121171543.32422-1-alex.bennee(a)linaro.org>
- posted {PATCH v3 00/11} current fpu/next queue (tests & build fix)
Message-Id: <20190122215016.18697-12-alex.bennee(a)linaro.org>
- finally solved the weird endianess issue
- merged in {PULL v2 00/11} check-softfloat, fp-bench and clang
compile fixes Message-Id:
<20190123114220.16972-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 00/14} testing/next (binfmt_misc, vm-build and BSD
CI) Message-Id: <20190125140017.6092-1-alex.bennee(a)linaro.org>
- also did some work on [the linux-user multiarch but it is not
ready yet]
- need to finish the re-work of [system test and misc arch] tests
:todo
- will be useful for test cases for plugins
- also more test cases queued up for system tests
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v3 branch]
https://github.com/stsquad/qemu/tree/misc/cnt-and-misc-reg-fixes-v3
[the linux-user multiarch but it is not ready yet]
https://github.com/stsquad/qemu/tree/testing/next-with-linux-user
[system test and misc arch]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
Completed Reviews [2/2]
=======================
{PATCH 00/18} Acceptance Tests: target architecture support
Message-Id: <20190117185628.21862-1-crosa(a)redhat.com>
- CLOSING NOTE [2019-01-25 Fri 19:33]
Still a few edge cases to work out
{PATCH 0/2} contrib: gitdm: Some updates
Message-Id: <1547807155-4526-1-git-send-email-aleksandar.markovic(a)rt-rk.com>
- CLOSING NOTE [2019-01-25 Fri 19:33]
Queued to my tree
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH v3 0/4} tcg: support heterogenous CPU clusters
Message-Id: <20190121152218.9592-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH RFC 00/11} Add Renesas RX archtecture
Message-Id: <20190121131602.55003-1-ysato(a)users.sourceforge.jp>
* {Qemu-devel} {PATCH 00/11} target/arm: Implement ARMv8.5-BTI
Message-Id: <20190110121736.23448-1-richard.henderson(a)linaro.org>
* {PATCH v5 00/73} per-CPU locks
Message-Id: <20181213050453.9677-1-cota(a)braap.org>
--
Alex Bennée
Majority of the week spent preparing for Fosdem talk on LLD:
- Built Chrome for Arm and AArch64 to investigate link time
performance on non-X86 platforms
-- Both gold and bfd take a considerable amount of time to produce
stubs/veneers/errata fixes
-- AArch64 link time is comparable to X86
- LLD gets more usage out of multithreading than gold
- Studied Gold and BFD structure to compare to LLD
- About half of slides written.
Some minor involvement with some investigations for ClangBuiltLinux.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- 'SBSA reference' model (now quite close to being in shape to go in)
- RTH's BTI patchset
- RTH's patchset adding TBI support to user-mode emulation
+ sent patches fixing the last lot of clang
-Waddress-of-packed-member warnings
+ had another look at the prototype work I did to use Sphinx
for QEMU's documentation -- updated the patchset and started
looking at how to tie it into our makefiles.
+ sent patches fixing a handful of underdecodings in our A64 decoder,
where we should have UNDEFed but did not
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ sent out v1 of the patchset implementing the SSE-200 and MPS2 AN521 model
+ read through the Musca-B1 docs to confirm what we can easily
put into an initial implementation of a model
thanks
-- PMM
== Progress ==
* Out of office on Monday
* [Thumb GlobalISel] Support G_SHL, G_ASHR, G_LSHR [LLVM-517]
- Committed upstream
* [Thumb GlobalISel] Support G_SDIV and G_UDIV [LLVM-516]
- Most of the work done, ready to commit next week
* LLVM 8.0 Release for ARM & AArch64 [LLVM-526]
- Started a few jobs, but ran into some trouble with our containers
- Will look more into it next week
* Use new version of GCC on buildbots [LLVM-515]
- Got it to work and committed patch; we have 2 silent bots running with GCC-7
- Will keep monitoring the bots and if they seem stable we can merge
to tcwg-llvmprod next week
== Plan ==
* Test LLVM 8.0.0 RC1
* Commit LLVM-516
* More GlobalISel
* Out of office on Friday
Hi Martin and Linaro-toolchain team,
We want to use 4.8.5 cross compile toolchain to build ko.
But we can't find such version on the release site[1].
Is there a 4.8.5 cross compile toolchain?
[1] https://releases.linaro.org/components/toolchain/gcc-linaro/
Best,
Xinliang
== Progress ==
* SVE ACLE
- Committed patches for
* svabs, svneg, svnot and svsqrt series
* svdiv series
* svmulh series
* svand, svorr, and sveor series
* svdot series
- Working on svbic and svbic_b variants
* Others
- Looking into tree-reassoc improvements for next stage1
- Looked into kernel plugin issue for arm
== Plan ==
* Continue with SVE ACLE
* Continue with tree-reassoc
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v1.
[VIRT-327 # Richard's upstream QEMU work ]
Posted v6 of linux-user split. Based on Laurent's feedback,
I'm running LTP myself this time, at least for a few guests.
r~
Upstream Work ([VIRT-109])
==========================
- posted {PULL 0/5} gitdm updates with final 2018 stats Message-Id:
<20190114160956.7513-1-alex.bennee(a)linaro.org>
- posted {PULL 00/21} misc testing fixes for Travis and docker
Message-Id: <20190114150129.1013-1-alex.bennee(a)linaro.org>
- we have gone green again
- posted {PULL 0/7} check-softfloat, fp-bench and clang compile fixes
Message-Id: <20190117132703.17790-1-alex.bennee(a)linaro.org>
- some alt-OS issues and a weird failure on s390x
- spent some time getting a working s390x setup to investigate
- posted {PATCH} target/s390x: define TCG_GUEST_DEFAULT_MO for MTTCG
Message-Id: <20190118171848.27332-1-alex.bennee(a)linaro.org>
- need to investigate why s390x breaks so weirdly
- messed around with a little [CONFIG_TCG type cleanups]
- need to finish the re-work of [system test and misc arch] tests
:todo
- will be useful for test cases for plugins
- also more test cases queued up for system tests
- respin {PATCH v3 0/5} support reading some CPUID/CNT registers from
user-space Message-Id:
<20180625160009.17437-1-alex.bennee(a)linaro.org> :todo
- in branch [v3 branch]
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[CONFIG_TCG type cleanups]
https://github.com/stsquad/qemu/tree/misc/config-tcg-cleanups
[system test and misc arch]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
[v3 branch]
https://github.com/stsquad/qemu/tree/misc/cnt-and-misc-reg-fixes-v3
Other Tasks
===========
- wrote up and submitted abstract for Connect
- I still hope to the history of TCG for TCWG room as well
Completed Reviews [4/4]
=======================
{Qemu-devel} {PATCH} .cirrus.yml: basic compile and test for FreeBSD
Message-Id: <CAPyFy2Dw2F3ks_5f8cvWjrsOTS0_Ybr5kELUpyHQmOQWUaeuFg(a)mail.gmail.com>
- CLOSING NOTE [2019-01-16 Wed 15:01]
Adds FreeBSD testing, yet another CI system
{PATCH v2} softfloat: enforce softfloat if the host's FMA is broken
Message-Id: <20181225070305.18221-1-cota(a)braap.org>
- CLOSING NOTE [2019-01-16 Wed 15:03]
Queued to my tree
{PATCH v6 0/3} Dynamic TLB sizing
Message-Id: <20190114165017.27298-1-cota(a)braap.org>
- CLOSING NOTE [2019-01-17 Thu 10:53]
Found a few issues.
{PATCH v7 0/3} Dynamic TLB sizing
Message-Id: <20190116170114.26802-1-cota(a)braap.org>
- CLOSING NOTE [2019-01-18 Fri 16:54]
Looks good to me now.
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {PATCH 0/2} contrib: gitdm: Some updates
Message-Id: <1547807155-4526-1-git-send-email-aleksandar.markovic(a)rt-rk.com>
* {PATCH 00/18} Acceptance Tests: target architecture support
Message-Id: <20190117185628.21862-1-crosa(a)redhat.com>
* {Qemu-devel} {PATCH 00/11} target/arm: Implement ARMv8.5-BTI
Message-Id: <20190110121736.23448-1-richard.henderson(a)linaro.org>
* {PATCH v5 00/73} per-CPU locks
Message-Id: <20181213050453.9677-1-cota(a)braap.org>
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
--
Alex Bennée
[LLVM-521] LLD and taking the address of an ifunc
Went through the possible combinations (pic, pie, non-pic, exec,
shared,...) found one relocation that gcc uses that clang doesn't,
hence mc and LLD don't support. Raised upstream pr. Also found that
clang's code-sequence for -fpie doesn't seem to guarantee ifunc
pointer equivalence when linking -fpie (non-got generating sequence
used when ifunc is in same translation unit). Will need some further
investigation to confirm.
[LLVM-499] Support for linking the linux kernel
Committed -pic-veneer support and associated overflow fix, now merged
to 8.0 branch.
Other:
- Started work on Fosdem presentation on LLD performance. Studying
ld.bfd and ld.gold source code to look for structural differences
between them and LLD.
- Submitted presentation for next Linaro Connect
- Review for comdat group and unused section elimination.
- On buildbot duty.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ some code review, and another arm pull-request (including
RTH's pointer auth work)
+ sent patch fixing a bug in the gdbstub memory access path that
meant it was always making accesses as NonSecure even if the
guest CPU was currently Secure
+ sent patch fixing checkpatch to not wrongly complain about
block comments starting "/**"
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ I have a model of the SSE-200 subsystem used by the Musca board,
and a model of the MPS2 AN521 FPGA image which uses it. (Since it is
basically "our existing MPS2 AN505 model, but with SSE-200 rather than
IoTKit" it's a useful stepping stone to the Musca board.) There are
still some bugs and missing features, but it seems to mostly be
functional (it can run the ARM Trusted Firmware M test binary.)
thanks
-- PMM