== Progress ==
* FDPIC
- GCC: send v3 patches, got some feedback: will need another iteration
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
* GCC:
- looking at bug report on aarch64 about misaligned accesses. Need
more details to reproduce the problem
* Newlib
- got a few small patches accepted
* misc (conf-calls, meetings, emails, ....)
== Next ==
FDPIC:
- GCC: handle v3 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
=== Work done during this past week ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ continued cleaning up code and painfully rebased it on recent trunk
* GNU-296 / GCC PR85434 / CVE-2018-12886:
+ fixed changes to routines for PIC access to use specified register
+ fixed 2 more issues in stack protector new instruction patterns
+ testing for arm and thumb2, now starting over due to one of the above issues
* GNU-580 / PR86968: in progress
+ investigate, try 2 approaches, need to start looking into 3rd approach
* Line management.
=== Plan for week 42 ===
* GNU-296 / GCC PR85434 / CVE-2018-12886:
+ finish testing, and submit new stack protector patch for upstream review
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ finish cleaning up the code
* GNU-580 / PR86968: in progress
+ attempt 3rd approach
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management:
+ continue progress on rotations
+ start preparing first AFDS
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel
Build with clang)
- Needed some revision to handle linker emulation. Patch in upstream review
[TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or
-fno-integrated-as) and certain kinds of inline assembly
- Committed upstream.
[TCWG-1424] Code-size investigations with PGO
- Marking functions for size optimisation at the earliest possible
stage improves code-size for little loss in performance. The main
beneficiary is that loops are not unrolled in size optimised functions
and inline thresholds are lower.
- LTO with instrumented profiling still sees large increase in size.
Originally thought my changes weren't working with LTO but I think
that something else is happening.
-- Found out that the profiling information isn't being sent to the
LTO code-generator (although it should be present as IR annotations
from the objects.
-- There is an option to pass the sample profile through to the LTO
code-generator but not an instrumented profile file.
-- It seems like the LTO plugin doesn't use the new pass manager
unless a separate option is passed through to the code-generator.
-- It seems like Thin-LTO is where most of upstream development is
these days and there is a slightly different pass pipeline, and some
interaction with profiling. Worth some more experiments.
First draft made of incorporating YVR18 Jira discussion into
Confluence https://collaborate.linaro.org/display/TCWG/JIRA+Usage+and+Best+Practices
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ Xilinx Versal SoC support
- investigated problem with a "suppress this warning patch" which
gcc 8 didn't like. It turns out that _Pragma() in GCC is a bit
of a disaster area; fortunately we only need to suppress a
warning here for clang, so we can just avoid using _Pragma() with GCC.
(cf GCC bugs 85153, 69558, 82335, 66099, 55578, 69543.
clang is not flawless here either: cf clang bugs 31999, 15129, 35154.
The clang false-positive warning we're working around is bug 39113.)
* VIRT-164 [improve Cortex-M emulation]
- stack-limit emulation patches have now gone into master, so this
epic can be closed out. Some v8M work will continue under
VIRT-268 (notably FP emulation); bugfixing and similar
small work will go under the general VIRT-65 maintainership epic.
* VIRT-215 ["run microvisors", aka support AArch32 Hyp mode]
- working through some of the HCR bits we don't implement, to see
if any of them are the cause of the failures I see with AArch32
hypervisors. (Sadly they don't seem to be.) Sent out patches
implementing HCR.{FB,DC,VI,VF,PTW} and fixing some syndrome
reporting corner cases where AArch32 differs from AArch64.
thanks
-- PMM
[VIRT-249 # SVE System Mode ]
Posted v3 (and hopefully final) patch set for system mode.
[Upstream]
Fixed a problem with softfloat division; 3 versions + pull posted.
Posted v3 of a cleanup to 128-bit atomics.
[GCC]
V2 of the -matomic-ool patch set posted.
r~
o LLVM
* Machine Outliner on ARM prototype:
- Fixed some Thumb2 issues
- Implemented Thumb1 support
- Debugging Thumb1 issues in Spec2K6
* Bots babysitting
o Misc
* Various meetings and discussions.
=== Work done during this past week ===
* One day annual leave
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ started cleaning up code and continued adding support for last syntax tweaks
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ After more testing committed fix for register allocator and
reverted following regression
+ fall back to workaround as register allocator lack information to
decide whether it's safe to not reload an address
+ start testing workaround more extensively
* TCWG-1470 / PR87374: upstream review
+ add missing documentation, improve related code slightly, submit
for external review again
Misc:
+ bits of line management
+ Doughnut session on OSS strategy
+ discussion around JIRA use in TCWG
=== Plan for week 41 ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886:
+ finish testing, and submit new stack protector patch for upstream review
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ finish change to support last syntax changes
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ start cleaning up the code
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
[TCWG-1473] Fix -fno-integrated-as and -mbig-endian (Linux Kernel
Build with clang)
- Patch in upstream review
[TCWG-1474] Fix out of range branch (CBZ) when -fimplicit-it (or
-fno-integrated-as) and certain kinds of inline assembly
- Patch in upstream review
[TCWG-1424] Code-size investigations with PGO
- Reworked the clang command line options and pass manager interface
so I could insert the pass prior to inlining.
- Benchmarks running over the weekend.
SVE Support ([VIRT-198])
========================
SVE Reviews
- reviewed and tested {PATCH v2 0/4} softfloat: Fix division
Message-Id: <20181003180711.19335-5-richard.henderson(a)linaro.org>
and v3
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- following discussion with team started adding plugin hooks to
[tracepoint clean-up]
- I think I need to resurrect and expand the cputlb de-macro stuff
to cleanly add memory tracing
- written hotblocks and tlbstats tools
- posted {RFC PATCH 00/21} Trace updates and plugin RFC Message-Id:
<20181005154910.3099-1-alex.bennee(a)linaro.org>
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[tracepoint clean-up]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Kernel Debug via gdbstub
- There was some discussion about improving debug experience with
kernel debugging
- for example while in KVM a single-step usually goes to the
exception table
- in TCG this isn't always the case (maybe time accounting is
better?)
- follow-up on x86 and kgdb experience :todo
- worth creating a STORY for this work? :todo
Upstream Work ([VIRT-109])
==========================
- started looking at {PATCH 0/7} Acceptance Tests: basic architecture
support Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
- get the upstream CI back on track :todo
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Started drafting the QEMU Keynote/Status report for KVM Forum 2018
Completed Reviews [6/6]
=======================
{PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-28 Fri 19:40]
I'm happy with this
{PATCH v2 0/4} softfloat: Fix division
Message-Id: <20181003180711.19335-5-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-10-04 Thu 10:37]
some failures on emilio's tests
{Qemu-devel} {RFC PATCH v2 0/3} acceptance tests: Test firmware checking debug console output
Message-Id: <20181003183036.6716-1-philmd(a)redhat.com>
- CLOSING NOTE [2018-10-04 Thu 15:07]
Still broken for multiarch
{PATCH v2 0/4} per-TLB lock
Message-Id: <20181003200454.18384-1-cota(a)braap.org>
- CLOSING NOTE [2018-10-04 Thu 15:07]
Baring a few compile fixes it looks pretty stable in the soak tests.
{PATCH} fpu/softfloat: Replace countLeadingZeros32/64 with clz32/64
Message-Id: <1538118095-7003-1-git-send-email-thuth(a)redhat.com>
- CLOSING NOTE [2018-10-04 Thu 15:09]
Simple clean-up
{PATCH v3 0/4} softfloat: Fix division
Message-Id: <20181004175700.20847-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-10-05 Fri 16:59]
Looks good
Absences
========
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 0/7} Acceptance Tests: basic architecture support
Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
* {Qemu-arm} {PATCH 00/13} target/arm: Implement v8M stack limit checks
Message-Id: <20181002163556.10279-1-peter.maydell(a)linaro.org>
* {Qemu-arm} {PATCH v2 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20181001115704.701-1-luc.michel(a)greensocs.com>
* {Qemu-devel} {PATCH v2 0/9} target/arm: Rely on id regs instead of features
Message-Id: <20180927211322.16118-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v2 00/15} target/arm: sve system mode patches
Message-Id: <20180926192323.12659-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH v2 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20181001115704.701-1-luc.michel(a)greensocs.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ bug fixes for aarch64 KVM debug support
+ various patches to avoid deprecated sysbus:init API
+ SVE system emulation support
- investigated a bug where system reset requested by a device
model was sometimes not firing -- seems to be a race condition
* VIRT-164 [improve Cortex-M emulation]
- picked up the half-finished patches for stack-limit emulation that
I'd written before going off on holiday, and completed them.
Sent the patchset out for review.
- sent patches for a couple of other minor bugs noticed in the process
thanks
-- PMM
== Progress ==
* FDPIC
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
- discussing collaboration with kernel-ci
* Linaro gcc-7 release
- backported fixes for bug #4007
* Newlib
- sent a few small patches to remove warnings when building for Arm and Aarch64
* misc (conf-calls, meetings, emails, ....)
- (internal) Wrote report about GNU Cauldron 2018
== Next ==
FDPIC:
- GCC: send v3 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
Progress:
[VIRT-214 # SVE System Registers ]
Posted v2 patch set for eliminating redundancy between
feature bits and id registers.
[VIRT-249 # SVE System Mode ]
Posted v2 patch set, without the system registers included.
[Upstream]
First 3.1 tcg-next pull request.
Spent a day working on Emilo's suggestion to out-line the entire softmmu
load/store operation. I've placed a shed load of small code segments
within the tcg "prologue", which is within a direct call of the entire
code_gen_buffer. Emilio got some performance numbers from that which
look promising. Need to clean up the patch to work with 32-bit and win64.
[GCC]
V1 of my SUSE+ARM inspired -matomic-ool patch set posted. Includes some
significant improvements to atomic operations in the aarch64 backend.
Got some good feedback and am working my way through those.
r~
* Recovery from Cauldron, then from Connect
== Progress ==
* FDPIC
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, again
* Linaro gcc-7 release
- backported fixes for bug #4007
* Newlib
- checked warnings emitted by GCC during newlib build, will send small patches
* misc (conf-calls, meetings, emails, ....)
- Attended Linaro Connect YVR18, contributed to report
== Next ==
FDPIC:
- GCC: handle v2 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
- look at how to use Linux kernel atomics
o LLVM
* Machine Outliner on ARM prototype:
- Improved stack fixup handling
- Completed Thumb2 support
- Fixed an issue in Thumb and ARM related to conditional execution
* Bots babysitting
o Misc
* Various meetings and discussions.
SVE Support ([VIRT-198])
========================
- generated a [narrow test case for fdiv_64 rounding error]
- doesn't hit much code but I possibly misunderstanding [the code]
AFAICT inc = ((frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 :
0); seems reasonable
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[narrow test case for fdiv_64 rounding error]
https://github.com/stsquad/qemu/tree/testing/generic-op-tester
[the code]
https://github.com/stsquad/qemu/blob/testing/generic-op-tester/fpu/softfloa…
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- following discussion with team started adding plugin hooks to
[tracepoint clean-up]
- I think I need to resurrect and expand the cputlb de-macro stuff
to cleanly add memory tracing
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[tracepoint clean-up]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 0/4} fixes for kvm/arm64 guest debug Message-Id:
<20180926112048.17778-1-alex.bennee(a)linaro.org>
- posted {PATCH} cpus: fix TCG kick timer leak Message-Id:
<20180927171724.30128-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Administrava
- sorted out expenses for Connect
- organising travel/accommodation for KVM Forum 2018
Completed Reviews [1/1]
=======================
{PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-28 Fri 19:40]
I'm happy with this
Absences
========
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {RFC PATCH 00/13} target/arm: Derive cpu id regs from features
Message-Id: <20180915161738.25257-1-richard.henderson(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {RFC PATCH v2 00/23} KVM: arm64: Initial support for SVE guests
Message-Id: <1538141967-15375-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH 00/35} exec: drop BQL from interrupt handling
Message-Id: <20180917163103.6113-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
--
Alex Bennée
[Connect]
Wrote up Connect Report with notes of presentations and hack-rooms,
for better or worse we have 20 pages of notes.
Wrote up Jira discussion
[TCWG-1468]
Made an example of how to use cmake, clang, newlib and a gcc-embedded
toolchain to build an example and run it on qemu.
[TCWG-1473] Linux kernel big-endian builds
Nearly have a fix that I'm happy with ready to submit.
[TCWG-1471] Fix the Armv6 Linux kernel build
Committed upstream today.
=== Work done during these past 3 weeks ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ all my tests pass, started to implement further minor changes to the syntax
* PR87374: external review
+ investigate bug, write patch, test it and send for external review
* GCC PR85434 / CVE-2018-12886: rework needed
+ Approved upstream but found when doing last minute testing after rebase
+ Testing on a wide number of targets a patch to register allocator
to properly ignore some operand when told to
* Linaro Connect Vancouver 2018
+ prepare talk, attend event and write up reports
* Regression testing of LLVM release:
+ extend script to do a LLVM release to be able to build from an
arbitrary branch
+ make weekly regression build from trunk
+ fix here-doc in regression job to test release when scripts it use change
Misc:
+ bits of line management
+ catching up on emails
=== Plan for week 40 ===
* GCC PR85434 / CVE-2018-12886:
+ finish testing, and get both register allocator fix and stack
protector fix committed
* PR87374: external review
+ add documentation and send back for external review
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ finish change to suport last syntax changes
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ start cleaning up the code
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
Progress:
* Post-travel/holiday catchup (email, expenses claims, code review,
team meetings etc)
(this was the lion's share of the time)
* VIRT-65 [QEMU upstream maintainership]
- some patches to fix clang warnings about taking the
address of a field in a packed struct
- make the compatibility "virt-2.10" machine really behave like the 2.10
QEMU's virt board: don't generate external aborts for accesses to bad
physical addresses. (It turns out a few misconfigured Linux
kernels do this.)
- noticed that we only have another 40 or so devices to convert
to be able to complete an API transition (sysbus init methods):
wrote this up for the list to nudge people into doing some conversions
thanks
-- PMM
Progress:
This week was Linaro Connect (Vancouver). Recordings are
online for most sessions I think; some may still be in the
process of being uploaded. For other presentations see:
https://connect.linaro.org/resources/yvr18/
Interesting presentations:
* "My other Machine is Virtual"
-- Alex's talk summarising QEMU's current tracing/debug facilities:
https://connect.linaro.org/resources/yvr18/yvr18-118/
* "SBSA QEMU"
-- Summary of work on an "enterprise" model in QEMU intended for use
as a development platform for firmware and other lower-level code.
https://connect.linaro.org/resources/yvr18/yvr18-511/
* "How to build a C++ processing tool using the clang libraries"
-- Peter Smith doing a fast pass through the clang library APIs
you can use for refactoring-type tools that operate on C++ source.
Watch the talk to figure out if this is something you want to
do at all; read the slides separately for the fine detail and
links to where to find more info, if the answer is "yes"...
https://connect.linaro.org/resources/yvr18/yvr18-223/
* "Diary of a drive-by coder: tips and tricks for working with upstream"
-- James Bottomley talks about successes and failures in upstreaming
one-off patches if you're not a member of the community. I also
asked in the Q&A about what communities can do to make life
easier for such contributors (answer mostly revolved around
better and clearer communication about the chances of a change
being accepted)
https://connect.linaro.org/resources/yvr18/yvr18-503/
* "An open source developer and a lawyer walk into a bar..."
-- Jilayne Lovejoy's keynote
(Personal takeaway: try to reduce my use of "IANAL, but...".)
https://connect.linaro.org/resources/yvr18/yvr18-200k2/
* Fujitsu's keynote on their new A64FX CPU:
https://connect.linaro.org/resources/yvr18/yvr18-400k1/
* Arm Architecture Enhancements in 2018
Matt Gretton-Dann's presentation of ARM v8A 8.5 features.
I was particularly encouraged to see that Arm have been able
to make public the system register and ISA XML on the same day
they announce the new features publicly.
https://connect.linaro.org/resources/yvr18/yvr18-104/
Useful meetings:
* discussion with RTH about handling CPU ID register fields
vs internal QEMU "enable this feature" bits (we have a bit of
an ugly mix of specifying the same thing in both places, and
also overriding ID reg fields from feature bits in some cases;
we'd like to achieve a bit more consistency in what we do...)
* discussion with RTH/Alex on instrumentation plugin APIs. I hope
we're now more or less on the same page about the general principles.
* QEMU roadmap sync with Alex/RTH/Maxim:
- finish v8M work
- heterogenous CPU support (for Musca board emulation)
- finish SVE
- fill in other v8.x missing emulation support
- instrumentation work
Other:
* Greensocs have sent out some QEMU patches to do with
modelling clock trees, which also touch a bit on reset.
QEMU's modelling of reset at the moment is pretty terrible,
so I had a think about how we might manage to do it better.
(Notably we currently only model power-on reset, and we don't
have a good answer for "device A in reset wants to assert a
signal that connects to device B, but there's no guarantee
about what order A and B will reset in". Does anybody know of
any good existing treatments of modelling device reset ?)
thanks
-- PMM
o LLVM
* Buildbots babysitting:
- Investigating armv7 bots failures, having hard time to reproduce the issue
* Machine Outliner on ARM prototype:
- worked on LTO integration
- more stack fixups to handle
o Misc
* Various meetings and discussions.
QEMU Tooling ([VIRT-252])
=========================
- thoughts after reviewing {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary
instrumentation prototype Message-Id:
<152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- we want rich tooling but don't want to leak internals to plugins
- the proposed helper per insn is pretty limited/hacky
- I think we could expand exiting trace support with plugins
- plugin hook to trace points
- plugin either filters trace points or does in-situ analysis
- existing trace infrastructure used to export data
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
Upstream Work ([VIRT-109])
==========================
- investigating CI failure in master:
- The [Travis builds have been broken for a while]
- meanwhile it looks like [atomic_8 issues have broken 32 bit
builds]
- reviewed {PATCH 0/6} i386 + x86_64 mttcg Message-Id:
<20180903171831.15446-1-cota(a)braap.org>
- posted {RFC PATCH 0/4} Add Nios II cross-compiler and enable
tests/tcg Message-Id:
<8346c1bb-9cb6-4c08-66a2-b5e5a31903d4(a)vivier.eu>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[Travis builds have been broken for a while]
https://travis-ci.org/qemu/qemu/builds
[atomic_8 issues have broken 32 bit builds]
https://app.shippable.com/github/qemu/qemu/dashboard
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- finished main talk, iterating and practising now
- also made a few [fixes and enhacements for tlb tracking]
- Administrava
- caught up with expense claims for SynQuacer
- organising for KVM Forum 2018
- organising/travel to Connect
[fixes and enhacements for tlb tracking]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Completed Reviews [4/4]
=======================
{PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-09-07 Fri 16:36]
Already in target-arm.next
{Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 17:41]
Already merged
{PATCH 0/6} i386 + x86_64 mttcg
Message-Id: <20180903171831.15446-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 10:18]
Quick pass, looks OK but a question about __thread w.r.t tcg globals
{PATCH v2 0/2} softfloat tests based on berkeley's testfloat
Message-Id: <20180908191735.22861-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-10 Mon 12:27]
Looks like an improvement on IBM test suite but needs a few more
tweaks.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v3 0/3} softfloat tests based on berkeley's testfloat
Message-Id: <20180913213910.28189-1-cota(a)braap.org>
* {PATCH v3 00/13} i386 + x86_64 mttcg
Message-Id: <20180911202823.21657-1-cota(a)braap.org>
* {PATCH v6 00/25} Fixing record/replay and adding reverse debugging
Message-Id: <20180912081747.3228.21861.stgit@pasha-VirtualBox>
* {Qemu-devel} {PATCH v2 00/11} convert CPU list to RCU
Message-Id: <374f82bc-1680-a59d-aa71-31e88e4936a2(a)redhat.com>
* {Qemu-arm} {PATCH 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20180901124639.19735-1-luc.michel(a)greensocs.com>
* {Qemu-devel} {PATCH v4 0/5} Acceptance/functional tests
Message-Id: <20180530184156.15634-1-crosa(a)redhat.com>
--
Alex Bennée
Last week:
Holiday.
3 days at GNU Cauldron. Highlights:
* Talked with arm folk re the sve simd abi,
* Talked with arm folk re valgrind support for sve,
* Talked with riscv folk re their nascent vector extension,
* Peter Sewell's memory object semantics for defacto c.
This week:
Caught up on email backlog.
Queued a few patch sets for first 3.1 tcg-next pull.
Posted an rfc for adjusting arm id system regs vs feature bits.
r~
Hi Mathias,
I am not able to reproduce error in
https://objectstorage.prodstack4-5.canonical.com/v1/AUTH_77e2ada1e7a84929a7…
Do you have any instructions for reproducing it locally.
This is what I have done:
Downloaded https://www.python.org/ftp/python/2.7.4/Python-2.7.4.tgz
Applied following patch to build for aarch64:
diff -r 84cef4f1999a -r 05e8999a3901 Modules/_ctypes/libffi/fficonfig.py.in
--- a/Modules/_ctypes/libffi/fficonfig.py.in Mon Apr 29 16:09:39 2013 -0400
+++ b/Modules/_ctypes/libffi/fficonfig.py.in Tue Apr 30 01:00:34 2013 +0200
@@ -28,6 +28,7 @@
'PA': ['src/pa/linux.S', 'src/pa/ffi.c'],
'PA_LINUX': ['src/pa/linux.S', 'src/pa/ffi.c'],
'PA_HPUX': ['src/pa/hpux32.S', 'src/pa/ffi.c'],
+ 'AARCH64' : ['src/aarch64/ffi.c', 'src/aarch64/sysv.S'],
}
ffi_sources += ffi_platforms['@TARGET@']
./configure
Also tried ./configure --enable-pydebug and --disable-optimization
Also tried changing to -O0 manually in the make file
make
./python Lib/test/regrtest.py -v test_ctypes
Used gcc version 8.2.1 20180907 (GCC)
Results are OK.
Thanks,
Kugan
o LLVM
* Buildbots babysitting
* LLVM Kernel CI babysitting
* Machine Outliner on ARM prototype still on-going
o Misc
* More Jira gardening
* Various meetings and discussions.
Upstream Work ([VIRT-109])
==========================
- reviewed {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation
prototype Message-Id:
<152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- reviewed {PATCH 0/6} qht improvements for 3.1 Message-Id:
<20180817232923.28899-1-cota(a)braap.org>
- investigating CI failure in master:
- The [Travis builds have been broken for a while]
- meanwhile it looks like [atomic_8 issues have broken 32 bit
builds]
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[Travis builds have been broken for a while]
https://travis-ci.org/qemu/qemu/builds
[atomic_8 issues have broken 32 bit builds]
https://app.shippable.com/github/qemu/qemu/dashboard
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- finished main talk, iterating and practising now
- also made a few [fixes and enhacements for tlb tracking]
- Administrava
- caught up with expense claims for SynQuacer
- organising for KVM Forum 2018
[fixes and enhacements for tlb tracking]
https://github.com/stsquad/qemu/tree/misc/dfilter-and-trace-tweaks-v2
Completed Reviews [2/2]
=======================
{Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
- CLOSING NOTE [2018-09-07 Fri 15:40]
Some interesting ideas but I think the interface needs to be a bit
richer and expose the tcg code generation to the plugins.
{PATCH 0/6} qht improvements for 3.1
Message-Id: <20180817232923.28899-1-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 16:35]
Good improvements to test coverage, one minor tweak needed
{PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-09-07 Fri 16:36]
Already in target-arm.next
{Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
- CLOSING NOTE [2018-09-07 Fri 17:41]
Already merged
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-arm} {PATCH 00/15} gdbstub: support for the multiprocess extension
Message-Id: <20180901124639.19735-1-luc.michel(a)greensocs.com>
* {PATCH 0/6} i386 + x86_64 mttcg
Message-Id: <20180903171831.15446-1-cota(a)braap.org>
* {Qemu-devel} {PATCH v4 0/5} Acceptance/functional tests
Message-Id: <20180530184156.15634-1-crosa(a)redhat.com>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
[Linaro Connect]
- Wrote my presentation for the official track (on using Clang
libtooling and ASTMatchers)
- Started working on hackroom presentation on profile guided
optimisation in LLVM.
In both cases writing a presentation on something you don't know much
about forces you do a lot of learning.
Plans for next week:
- Finish hackroom presentation.
Spare time will be spent on reviews and llvm/clang bugs
=== Work done during this 3-day week ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ continue to rework patch, feature complete and most testcase pass
+ sent another external email to hammer a few details
* Arm new starter welcome and related faff
* GNU Tools Cauldron + travel from Thursday to Sunday
=== Plan for week 37 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ fix last bugs, start testing and cleanup
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* One day off
o LLVM
* Machine Outliner on ARM prototype:
- fixup and testcases work still on-going
- first benchmark results
* Buildbots babysitting
o Misc
* More Jira gardening
* Various meetings and discussions.
Other Tasks
===========
- Continued working on "My Other Machine is Virtual" talk for YVR18
- got working heatmaps for coverage
- writing up TCG memory tracing
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 0/6} qht improvements for 3.1
Message-Id: <20180817232923.28899-1-cota(a)braap.org>
* {Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
* {PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
* very short week: off Monday/Tuesday
== Progress ==
* FDPIC
- uClibc-ng: patches committed upstream
- GCC: handling feedback on v2 patches
* GCC upstream validation:
- trunk build broken for a while on RHEL6 (gcc-4.4.7)
- fixed upstream just before I reported the problem
- my scripts now use gcc-5.4.0
* misc (conf-calls, meetings, emails, ....)
- book hotel/plane for GNU Cauldron and Connect
== Next ==
FDPIC:
- GCC: handle v2 patches feedback
- uclibc-ng: look at how to test fdpic mode with openadk
- Connect: prepare hacking room presentation
- GNU Cauldron 2018
=== Work done during this week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ finished testing and submitted for external review
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* Regression testing of LLVM release process:
+ Add support to build from a branch (incl. trunk)
+ Make weekly regression testing from trunk
+ start enabling regression testing of Linaro LLVM release process
when scripts it use change
* Prepare for becoming a line manager next week
=== Plan for week 36 ===
* Welcome new starter
* Finish enabling regression testing of Linaro LLVM release process
when scripts it use change
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
[VIRT-249 # SVE system mode emulation ]
Fixed a bug in last week's reorg, reported by Laurent.
Fixed a bug in our risu scripts for generating sve memory ops;
I was able to replicate Laurent's failure in risu, finally, and
then fix it. Still need to clean up the risu patch for submission.
[Upstream]
Reviewed mips mxu tcg patch set.
Reviewed s390 afp tcg patch set.
r~
== This Week ==
* TCWG-1234: Hoisting and register pressure (4/10)
- Came up with another heuristic to avoid spill
- Verified it does not regress other test-cases (testsuite + private benchmarks)
* TCWG-319: Use vrecpe / vrecps to implement division (1/10)
- Rebased patch and validated it
- Seems like the issue of bad data alignment is also now seen with
armhf. Investigating
it further.
* PR83661 (2/10)
- Finished with patch prototype
* Public Holiday (2/10)
* Misc (1/10)
- Committed a typo fix in r263819
- Meetings
== Next Week ==
- Continue ongoing tasks
o LLVM
* Machine Outliner on ARM prototype:
- stack fixup support on-going
- test coverage in machine IR
* Buildbots babysitting
o Misc
* Jira gardening
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Adjusted patch set based on Peter's review and upstreaming.
We talked about a method to initialize cpu config registers.
[Upstream]
Review:
nanomips round 11, now mostly pushed to master.
MPS2 patch set
raspi frame buffer patch set
Partway through a round 6 of the do_syscall split.
r~
Investigated yet another sanitizer related buildbot failure. This time
it looks like latent problems in the compiler-rt/cfi implementation
and tests provoked by the introduction of the Arm LLD bot.
- cfi requires LTO so it requires a bot using LLD or a bot configured
to run gold with the LTO plugin. Raised upstream PR on cfi.
[Linaro Connect]
Made some more progress on a clang-tool example to use for my
presentation on how to build a clang tool. Learned quite a bit more
about ast-matchers and the clang-ast.
[LLD]
Committed support for Armv5 and Armv6 in LLD.
[Miscellaneous]
Quite a heavy patch review week.
Planned absences:
On holiday on Tuesday
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ put some reviewed MPS device patches into master, did a v2 of the
rest and sent them out again; these are now in master
+ ditto with patches for missing AArch32-Hyp features
+ code review:
- rth's patchset fixing float/int-with-scaling conversion
- rth's patchset adding system mode support for SVE
- linux-user: netlink fixes
+ sent out a patchset that wires up the GICv2 virtualization
memory regions and IRQs on the remaining boards that need it;
got this into master
thanks
-- PMM
Note: annual leave tomorrow and Friday, as per my calendar
=== Work done during 3-day week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ fix 2 more issues with retesting each time
* More knowledge transfer within Arm (writing a script to automate manual
task in GNU Arm Embedded Toolchain release to allow others to do it)
* TCWG-1428 / DSGHACK-25 (Support arithmetic on FileCheck regex variable):
address comments
+ continue to rework patch
* Enable weekly regression testing of LLVM release process jenkins job
* 2 days off annual leave
=== Plan for week 35 ===
* Enable regression testing of Linaro LLVM release process when scripts it
use change
* TCWG-1428 / DSGHACK-25 (Support arithmetic on FileCheck regex variable):
address comments
+ continue to rework patch
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ submit for external review
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a double-rounding bug affecting scaled conversion
from integer to float.
[Upstream]
Posted a proposed fix for 128-bit atomic detection.
Posted v4 of linux-user syscall split.
Review of nanomips, round 9.
r~
* One day off
o GNU
* Committed Linaro version string and macros patch in ARM GCC 8 vendor branch
o LLVM
* libcxxabi exception address alignment test failure:
- Committed in trunk and merged into 7.0 branch
* Machine Outliner on ARM prototype:
- LR saving and stack fixup support on-going
* Buildbots babysitting
o Misc
* Jira gardening
* Various meetings and discussions.
Note: I'll be on holidays Thursday and Friday next week.
=== Work done during 3-day week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ heavy testing
* TCWG-1337 / LLVM PR34170: get backport to LLVM 7 branch
* create design review for -mfpu=auto option in GAS
-> https://confluence.arm.com/display/CTP/Auto+FPU+for+GNU+as
* Knowledge transfer within Arm
* Misc:
+ GCC Linaro sync
* 2 days off taking care of my feverish child
=== Plan for week 34 ===
* Enable regression testing of Linaro release process
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address
comments
+ continue to rework patch
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ investigate aarch64 glibc regression
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
4 day week, out on holiday Wednesday.
[TCWG Jira]
- Recommendations made on what to do with outstanding epics.
- Will be making the changes on Monday.
[Linaro Connect]
- Research for presentation on libtooling.
- Outline of presentation written and made a start on the first of the examples.
- Will be doing a further presentation in the hack-room on LLVM
profiling and code-size
Involved in more than the usual amount of reviews.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ got 3.0 release out of the door!
+ code review:
- lots of Cortex-M0 and micro:bit patches
- model of Freescale i.MX6 UltraLite 14x14 EVK Board
- hw/arm: make bitbanded IO optional on ARMv7-M
- imx_spi: Unset XCH when TX FIFO becomes empty
- hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj()
- imx_serial: Generate interrupt on receive data ready if enabled
- target/arm: Fix crash on conditional instr in it block
- supporting migration of pending-SError state in KVM
+ sent a patchset deleting the now-obsolete MMIO request_ptr APIs
+ some tidyup of JIRA issues
+ trying to add a SPARC box back into our build-and-test set
thanks
-- PMM
Hi, dear toolchain team
I'm working on a Cavium ThunderX and want to install the latest Linaro binary release 7.3.1, but it seems no aarch64 native binaries in https://releases.linaro.org/components/toolchain/binaries/latest/aarch64-li…
Can you help on this, thanks very much!
Best Regards, Yi
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
SVE Support ([VIRT-198])
========================
- looked at re-factoring fcvt tests to add tests for rth's recent
fixes
- see [my initial test branch]
- the idea is to make adding a new op test case minimal effort
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[my initial test branch]
https://github.com/stsquad/qemu/tree/testing/generic-op-tester
Other Tasks
===========
- Started working on "My Other Machine is Virtual" talk for YVR18
- use-case: find hot-block in pure CPU code
- use-case: trace disk activity on system boot
- Added another story to the [Instrumentation EPIC]
[Instrumentation EPIC] https://projects.linaro.org/browse/TCWG-1457
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH 0/3} synchronization profiler
Message-Id: <20180813171132.21939-3-cota(a)braap.org>
* {PATCH 0/6} target/arm: More sve-ish fixes
Message-Id: <20180810193129.1556-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH 00/10} target/arm: Some pieces of support for 32-bit Hyp mode
Message-Id: <20180814124254.5229-1-peter.maydell(a)linaro.org>
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
--
Alex Bennée
o GNU
* Submitted Linaro version string and macros patch for ARM GCC 8 vendor branch
o LLVM
* Built LLVM 7.0.0 RC1 ARM and AArch64 binaries
* Investigate infra issues with release builds
* libcxxabi exception address alignment test failure:
- Added some comments to help the review
* Machine Outliner on ARM prototype:
- Implemented saving LR in a register support
o Misc
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a dozen-ish bugs pointed out by Laurent in direct email.
Reorganized the patch set, squashing !fixup; posted everything.
r~
[TCWG-1424] Investigation into profile guided information for code size
- Wrote script to process all the data from all the runs and correlate
it with code size.
- Now have some visualisations of some of the data that I can use to
make sense of the output.
- Next step is to prepare a presentation for the Connect hacking room
on the output.
- Jira sweep for TCWG LLVM epics in preparation for upcoming connect.
- Presentation for Linaro connect on Clang Tooling accepted, a
bittersweet moment as I've got to write it now.
SVE Support ([VIRT-198])
========================
- continued looking into Nils's SVE enabled Test_simd from Grid
failure
- __attribute__((noinline)) makes it go away, so subtle code
difference
- looking through side-by-side traces to find where it went wrong
- posted {RFC PATCH 0/4} add hand-rolled fallback when capstone
fails Message-Id: <20180808123934.17450-1-alex.bennee(a)linaro.org>
- finally fixed after Laurent's review comments - see [rth's latest
branch]
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[rth's latest branch]
https://github.com/stsquad/qemu/tree/testing/tgt-arm-sve-c
SVE Reviews
- reviewed {PATCH 00/11} target/arm: sve linux-user patches
Message-Id: <20180809034033.10579-1-richard.henderson(a)linaro.org>
- started reviewing {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
Upstream Work ([VIRT-109])
==========================
- posted {RFC PATCH 0/3} Tweaks to linux-user -dfilter Message-Id:
<20180809175553.18479-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH 0/3} tweaks for QEMU's C standard Message-Id:
<0180810171102.16451-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Tasks
===========
- Submitted "My Other Machine is Virtual" abstract for YVR18
- this talk has been accepted
- Drafted the [Instrumentation EPIC]
- started added stories for various use-cases
[Instrumentation EPIC] https://projects.linaro.org/browse/TCWG-1457
Completed Reviews [1/1]
=======================
{PATCH 00/11} target/arm: sve linux-user patches
Message-Id: <20180809034033.10579-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-08-09 Thu 12:44]
Looks good, tested on a bunch of stuff
Absences
========
- Holiday (16th-28th August 2018)
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 00/20} target/arm: sve system mode patches
Message-Id: <20180809042206.15726-1-richard.henderson(a)linaro.org>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ found and fixed a last minute couple of bugs with VM migration
for Arm guests, one in the GICv3 and one for M-profile CPUs
+ triaging and applying fixes for last few rc4 bugs
+ sent a patch to make our checkpatch script catch multiline comment
style issues
+ LP:1777672: investigating reported bug in raspi framebuffer emulation
* VIRT-164 [improve Cortex-M emulation]
+ finished, tested, and sent patchset that implements the Master Security
Controller and adds the PL081 DMA and MSCs to the MPS2 AN505 board
+ wrote patches that add the PL022 SPI controllers to the AN505
(fixing some PL022 bugs in the process)
* finished sorting out last bits of travel for Connect and KVM Forum
* various JIRA ticket scrub/fettling
thanks
-- PMM
=== Work done during this week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ fix issues seen on x86_64 and start a bigger round of testing
* TCWG-1337 / LLVM PR34170: last patch committed to trunk
+ address review comments and commit it once approved, then request
backport to LLVM 7 branch
* Submit and commit patch to clarify what tm.texi needs copying when
tm.texi.in is updated in source tree
* Misc:
+ Linaro syncs
+ 2 days and a half of Linaro JIRA gardening
=== Plan for week 33 ===
* Enable regression testing of Linaro release process
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* GCC PR85434 / CVE-2018-12886: rework needed
+ confirm all regressions are fixed
+ finish testing and submit for review
* Try to reproduce perf issue mentioned in week #30s weekly report on
latest perf
=== Work done during this week ===
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: rework needed
+ commit and revert due to regression on x86 and in glibc for aarch64
-> seems there is at least 2 issues, *sigh*
* TCWG-1337 / LLVM PR34170:
+ track down and fix issue that patch 2/3 uncovered, then reapply 2/3
+ investigate regression from patch 1/3, fixed by patch 3/3
fortunately and believe this is the right fix
* Continue work on TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ start rework patch to follow new syntax and accept numeric
expressions with several variables
* Linaro PR3943:
+ investigate issue, propose several workarounds to customer and
raise need for GCC release with combined multilib
* Misc:
+ Linaro syncs
+ bits of Linaro JIRA gardening
+ new ask question button and typo fix on developer.arm.com's GNU RM page
+ prepare Linaro Connect
=== Plan for week 32 ===
* Summarize state of GNU EPIC in JIRA
* Enable regression testing of Linaro release process
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): address comments
+ continue to rework patch
* GCC PR85434 / CVE-2018-12886: rework needed
+ investigate regressions
* Try to reproduce perf issue mentioned in last weekly report on latest perf
*very short week (1 day) *
== Progress ==
* FDPIC
- uClibc-ng: posted v2 patches
* GCC upstream validation:
- looking at some random noise in testing
- reported a couple of regressions
* Infrastructure:
- misc cleanups
* misc (conf-calls, meetings, emails, ....)
== Next ==
Holidays: back on Aug 29th
o LLVM
* Machine Outliner on ARM prototype:
- Working on saving LR in a register support
- Working on stack fixups mechanism
* libcxxabi exception address alignment test failure:
- Fix submitted upstream
o Misc
* Various meetings and discussions.
== Progress ==
* FDPIC
- uClibc-ng: investigated regression in non-FDPIC code, preparing v2 patches
* GCC upstream validation:
- looking at some random noise in testing
- reported a couple of regressions
* Infrastructure:
- misc cleanups
* misc (conf-calls, meetings, emails, ....)
== Next ==
1-day week, the holidays. Back on Aug 29th
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed 4 bugs pointed out by Laurent on list.
Dump sve state with -d fpu.
[VIRT-249 # SVE System Mode ]
Clear sve state on vector length change on EL change.
[Upstream]
Finished v5 review of nanomips.
Fixed 4 sparc clone bugs.
Fixed a ppc fp load/store bug I introduced in June.
[Glibc]
Adjusted _dl_runtime_resolve and friends for the new ARM vector ABI;
posted for comment. ARM folk pointed out that I'd have to save even
more state than that, and really the compiler needs fixing to avoid
the PLT completely. The right people are talking about the problem.
r~
SVE Support ([VIRT-198])
========================
- traced the svetest failure from Naoki @ Naist to SVE ABI issue with
dynamic linker
- rth has posted [a fix for glibc] and a bug raised for armclang
w.r.t. noplt
- looking into Nils's SVE enabled Test_simd from Grid failure
- __attribute__((noinline)) makes it go away, so subtle code
difference
- looking through side-by-side traces to find where it went wrong
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[a fix for glibc]
https://sourceware.org/ml/libc-alpha/2018-08/msg00017.html
SVE Reviews
- reviewed {Qemu-devel} {PATCH 0/4} target/arm sve fixes Message-Id:
<20180801123111.3595-1-richard.henderson(a)linaro.org>
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- had a [quick run at VHE] which crystallised some of the issues with
register aliasing
- obviously need to sit and think about a design for this
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
[quick run at VHE] https://github.com/stsquad/qemu/tree/add-vhe-rfc
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 for 3.0 0/2} fix for bug 1783362 Message-Id:
<20180726132947.28538-1-alex.bennee(a)linaro.org>
- started reviewing {PATCH v5 00/24} Fixing record/replay and adding
reverse debugging Message-Id:
<20180725121311.12867.21729.stgit@pasha-VirtualBox>
- number of build issues need to be resolved
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Completed Reviews [3/3]
=======================
{PATCH 0/3} linux-user/sparc: Fixes for clone
Message-Id: <20180730201553.32423-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-08-01 Wed 14:35]
Still some issues with the tests
{PATCH v5 00/24} Fixing record/replay and adding reverse debugging
Message-Id: <20180725121311.12867.21729.stgit@pasha-VirtualBox>
- CLOSING NOTE [2018-08-01 Wed 14:36]
Bunch of build failures... gave up.
{Qemu-devel} {PATCH 0/4} target/arm sve fixes
Message-Id: <20180801123111.3595-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-08-02 Thu 10:28]
Looks good, but hasn't solved all remaining problems.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
* {PATCH 0/4} tests/vm: various trivial fixes
Message-Id: <20180628153535.1411-1-f4bug(a)amsat.org>
--
Alex Bennée
[TCWG-1450] Support for Tag_ABI_VFP_args in LLD
Needed by FreeBSD in order to switch to LLD for Arm.
[TCWG-1451] Support for v5 and v6 Arm in LLD
Tidied up and submitted patches for v5/v6 (branch encoding and
compatible thunks), in upstream review.
[TCWG]
- Started doing some Jira gardening in preparation for status report
- Went back to libfuzzer hang on AArch64 buildbot. Looks like failure
to converge on -O2 and above, from the logs and code-generation I
suspect that it isn't handling the CINC instruction well (not
increasing coverage when the condition passes).
Progres:s
* VIRT-65 [QEMU upstream maintainership]
+ some time spent getting testing on BSD VMs working again (the box I
use for this was replaced with new hardware, which seemed like a good
time to shift to the support for this we have in upstream QEMU)
+ pre-Connect scrub of Linaro JIRA tasks to check they're up to date
+ sent some more "convert devices away from old_mmio API" patches
+ usual release work
* VIRT-164 [improve Cortex-M emulation]
+ finished, tested and sent patchset implementing MPS2 FPGAIO counters
and the CMSDK dual-timer device
+ implemented model of CMSDK watchdog timer
+ implemented minimal version of IoTKit system control element registers
+ started on modelling the Master Security Controller (which gates
transactions from bus master peripherals like DMA controllers)
thanks
-- PMM
=== Work done during this 4day week ===
* Continued looking into MCF branch prediction overload due to too
many consecutive branches:
+ managed to get reproducible results
-> was missing --buildid-dir option when invoking perf
-> above flag seems ignored if a binary with same path exists
where the initial binary was built
+ rerun again sampling only one event to confirm I get # of samples
* sampling freq = run time
-> conclusion: LLVM as good as GCC for SPEC2006 MCF, profile
different because LLVM inlines one of the hot functions
* GCC PR85434 / CVE-2018-12886: upstream review
+ finish testing and submit for external review
* LLVM PR34170:
+ address comments and commit once approved
-> most build bot failed to run the test the commit added, got
reverted before I could
+ investigate test failure -> does not fail when LLVM compiled with
GCC or in Debug mode
* Continue work on DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ hammer out syntax based on upstream feedback about what would be
desirable as FileCheck expressions
* Misc:
+ Linaro LLVM buildbot babysitting
+ upstream code review
* One day off on Friday
=== Plan for week 31 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address comments
+ rework patch once syntax is agreed
* Track down what causes testcase added for patch 2/3 for LLVM PR34170
* Try to reproduce perf issue mentioned above on latest perf
o Back from vacation Thu 24th
o LLVM Machine Outliner on ARM
* Caught up with upstream developments
* Rebased prototype on upstream
* Committed patch to assert when liveness tracking is not accurate
o Misc
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Added sve-max-vq cpu property to adjust the sve vector length
from the qemu command-line, a-la "-cpu max,sve-max-vq=N".
[VIRT-249 # SVE System Mode ]
Reorganized all of the load/store helpers to handle bi-endian,
and pass in TCGMemOpIdx for use by softmmu.
[Upstream]
Round 3 of nanomips review.
Other review of -rc3 and 3.1 patches.
r~
4 day week.
[TCWG-1424] Investigate profile feedback on codesize
Have now got all the data I need, started the process of tidying up
scripts to analyse whether it is worth posting upstream and what the
best default parameters are.
[Misc]
Track down problem on AArch64 build-bot to a likely code-gen problem
in Clang 3.8 for AArch64 only. Wrote a patch to use clang 6.0 on all
the Linaro buildbots rather than just the libcxx builder. Will
hopefully get deployed next week.
[LLD] Work on adding support for EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT
Needed to unblock freebsd from moving onto trunk
Mostly done, just need to finish adding tests. Might be a good jumping
off point to implement full build attributes support.
SVE Support ([VIRT-198])
========================
- posted {PATCH} tcg/aarch64: limit mul_vec size Message-Id:
<20180719154248.29669-1-alex.bennee(a)linaro.org> : done
- finished preparing [talk for HPC workshop on 26th]
- delivered it Thursday evening, recording will go online in due
course
- blog post is now [live on linaro.org]
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[talk for HPC workshop on 26th]
https://docs.google.com/presentation/d/1Jz9ePpJ_YGd3vPXMj090VwRwPfBSYWHlSiz…
[live on linaro.org] https://www.linaro.org/blog/sve-in-qemu-linux-user/
Write and submit Connect abstract
- submitted abstract: My other machine is virtual for YVR18
SVE Reviews
- finished reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- had a [quick run at VHE] which crystallised some of the issues with
register aliasing
- obviously need to sit and think about a design for this
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
[quick run at VHE] https://github.com/stsquad/qemu/tree/add-vhe-rfc
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 for 3.0 0/2} fix for bug 1783362 Message-Id:
<20180726132947.28538-1-alex.bennee(a)linaro.org>
- started reviewing {PATCH v5 00/24} Fixing record/replay and adding
reverse debugging Message-Id:
<20180725121311.12867.21729.stgit@pasha-VirtualBox>
- number of build issues need to be resolved
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v2 of docker fixes]
https://github.com/stsquad/qemu/tree/testing/docker-fixes-for-3.0-v2
[debootstrap master]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=903657
Testing and CI
==============
- finish converting the CI RISU jobs to submit via qa-reports :todo
- got a Packet.net machine for QEMU/Docker testing
- posted {PATCH RFC 00/10} docker on non-x86 hosts Message-Id:
<20180718100505.7546-1-alex.bennee(a)linaro.org>
QEMU CI Loop ([VIRT-187])
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Submitted "My Other Machine is Virtual" abstract for YVR18
- Create an Instrumentation EPIC :todo
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [2/2]
=======================
{RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
- CLOSING NOTE [2018-07-26 Thu 11:18]
Did about 2/3rds of series, drew did the top few - re-spin on it's
way.
{PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
- CLOSING NOTE [2018-07-26 Thu 15:06]
v5 posted
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v5 00/24} Fixing record/replay and adding reverse debugging
Message-Id: <20180725121311.12867.21729.stgit@pasha-VirtualBox>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated required work for implementing HCR_EL2.TGE (the "trap
general exceptions" bit); identified what we've already implemented,
wrote patches for the other parts, and sent them out for review
+ sent patch to fix GICv3 emulation bug where we checked the wrong
HCR_EL2 bit when deciding whether to route IRQs to EL2
+ usual release-cycle related work
* VIRT-164 [improve Cortex-M emulation]
+ sent patch to fix a bug where we could escalate to the wrong HardFault
when AIRCR.BFHFNMINS is set
+ fixed bug where we had miswired the IoTKit timer1 IRQ line
+ fixed bug preventing VM state save/load for the NVIC with Security
extensions enabled
+ fixed "use of uninitialized memory" bug in the TZ-MPC model
+ had another look at the requirements for v8M stack-limit checking
+ implemented missing support for MPS2 FPGAIO up/down counter registers
+ started on a model of the CMSDK "dual-timer" module (as part of
looking at what remaining devices in the MPS2 are easy/worth
modelling so we can close out VIRT-182)
thanks
-- PMM
Following on from last weeks discussion here is an alternative abstract
which instead of looking to the future with where QEMU can go would
concentrate on what you can do with QEMU now. What do you think?
_____________________________
MY OTHER MACHINE IS VIRTUAL
Alex Bennée
_____________________________
YVR18
When working with new architectures there is often a scramble for
getting access to hardware. However hardware comes with it's own
problems - especially when it's new. It's hard to upgrade, hard to poke
around inside and hard to experiment with.
This is an area where QEMU can help. Thanks to it cross-architecture
emulation and ability to run full-system emulation it provides a
platform for experimentation without the potential consequences of
turning your new board into a inanimate brick.
This talk will start with an overview of QEMU and how various
configurations can be setup. We'll then examine various features
available that allow us to examine the run time behaviour of code inside
QEMU as well as discuss some of its limitations. Finally we'll look at
some experiments that would be hard to do with real hardware and what
they can tell us about the code we are running.
--
Alex Bennée
[Upstream]
Spent several days working with Alex and his docker testing bits.
Reproduced the reported ppc32 test failure. Wrote a patch to
implement the swapcontext syscall, which has now been merged.
Round 3 review of nanoMIPS submission.
Fixed a tricky issue wrt call-clobbered vector registers.
[VIRT-198 # QEMU: SVE Emulation Support ]
Some back and forth with Nils Meyer wrt SVE vs Grid.
TODO: Let the SVE vector length be selectable from the command-line.
r~
=== Work done during this 4.5day week ===
* TCWG-1062 (MCF branch prediction overload due to too many
consecutive branches):
+ rework reproduction steps around an existing script that does all
the steps of downloading and installing the benchmark and run it under
perf
+ gather what was observed that triggered the ticket I'm working on
-> narrowed down to 2/3 functions to be on the lookout
+ benchmark GCC and LLVM and compare the profile for these functions
-> bingo, I can see a branch issue
+ try to get assembly files to add nop and test performance again
-> code in assembly file is different from output of perf report,
need to rerun benchmark again to make sure I didn't fail there (sigh)
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: upstream review
+ reply to upstream review comments
+ start to test tightening predicate for new instruction pattern
-> weird build error when trying to bootstrap unrelated to my
changes (missing header issues in stage 1 libgcc build)
* TCWG-1337 / LLVM PR34170:
+ respond to upstream review comments
* Continue work on TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ hammer out syntax based on upstream feedback about what would be
desirable as FileCheck expressions
* Misc:
+ Linaro LLVM buildbot babysitting
+ Arm internal presentation
* Half a day off on Friday
=== Plan for week 30 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address comments
+ rework patch once syntax is agreed
* TCWG-1062 (MCF branch prediction overload due to too many
consecutive branches):
+ find out why assembly file from -save-temps is different from perf
report output
+ check performance when adding padding
+ start to investigate a solution
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review
- another pass of the GICv2 virt support
- IMX6UL SoC support
- more patches for v6M support in core and NVIC
- PMU emulation improvements
+ rolled another 3.0 release candidate
* VIRT-164 [improve Cortex-M emulation]
+ implemented and sent a patchset for doing tailchaining of pending
exceptions during exception return
thanks
-- PMM
SVE Support ([VIRT-198])
========================
- converted [post on SVE development] to jekyl blog format
- a little fighting with the tooling but [draft on staging]
- trying to get compilers set-up to debug failing Grid Test_simd
testcase
- now have full 1yr armclang license for me and rth
- Test_simd passes with fresh build and current master
- not sure old binary fails - but Nils happy with current state
- fixed vector multiply bug on aarch64 backend
- posted {PATCH} tcg/aarch64: limit mul_vec size Message-Id:
<20180719154248.29669-1-alex.bennee(a)linaro.org>
- drafting [talk for HPC workshop on 26th]
- currently 11 minutes talking, need to expand
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[post on SVE development]
https://docs.google.com/document/d/15v1asqk-6de2RtA7ZWdIQ29PkY92gl3nlwG7_Se…
[draft on staging]
https://staging.linaro.org/blog/sve-in-qemu-linux-user/
[talk for HPC workshop on 26th]
https://docs.google.com/presentation/d/1Jz9ePpJ_YGd3vPXMj090VwRwPfBSYWHlSiz…
Write and submit Connect abstract
- "How-to use QEMU to test my software on no-silicon hardware"? :todo
- amalgamate HPC talk and blog post
SVE Reviews
- finish reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com> :todo
- stalled this week due to other activities
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- had a [quick run at VHE] which crystallised some of the issues with
register aliasing
- obviously need to sit and think about a design for this
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
[quick run at VHE] https://github.com/stsquad/qemu/tree/add-vhe-rfc
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v3 for 3.0 00/18} docker fixes (and one tcg test
tweak) Message-Id: <20180717195553.9111-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v2 of docker fixes]
https://github.com/stsquad/qemu/tree/testing/docker-fixes-for-3.0-v2
[debootstrap master]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=903657
Testing and CI
==============
- started looking at converting the CI RISU jobs to submit via
qa-reports
- got a Packet.net machine for QEMU/Docker testing
- posted {PATCH RFC 00/10} docker on non-x86 hosts Message-Id:
<20180718100505.7546-1-alex.bennee(a)linaro.org>
QEMU CI Loop ([VIRT-187])
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Create an Instrumentation EPIC :todo
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [6/6]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
{PATCH 0/8} Docker improvements
Message-Id: <20180628164643.9668-1-f4bug(a)amsat.org>
- CLOSING NOTE [2018-06-29 Fri 21:38]
Grabbed some patches, commented on others
{Qemu-arm} {PATCH v6 00/35} target/arm SVE patches
Message-Id: <20180627043328.11531-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looks good
{Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looking good, stopped to move to v6
{PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
- CLOSING NOTE [2018-06-29 Fri 21:40]
Seems sane to me.
{Qemu-arm} {PATCH v3-a 00/27} target/arm: Scalable Vector Extension
Message-Id: <20180516223007.10256-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-07-13 Fri 20:02]
Already merged
Absences
========
- Friday 20th July
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
--
Alex Bennée
[TCWG-1424] Using profile feedback to investigate code size
- Have most of the information I need to draw some conclusions. Should
have the remaining runs I need over the weekend.
- Next step is to analyse the data a bit more formally and write up.
- Discuss next steps. It may be worth polishing up the pass and
posting upstream as an RFC.
- Would like to wrap the investigation up by the end of July
On holiday on Friday 20th July and Monday 23rd July, back in the
office on Tuesday 24th.
[Upstream]
Fixed an arm32 host linux-user bug affecting shmat.
Added a ppc guest linux-user missing syscall, swapcontext.
Patch review for hardfreeze.
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a LD1W (scalar plus vector) typo.
De-macro-ising sve_helper.c to aid debugging.
r~
SVE Support ([VIRT-198])
========================
- wrote up abstract for HPC workshop on 26th July
- started on presentation for workshop
- convert [post on SVE development] to jekly blog format and re-check
steps :todo
- trying to get compilers set-up to debug failing Grid Test_simd
testcase
- now have full 1yr armclang license for me and rth
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[post on SVE development]
https://docs.google.com/document/d/15v1asqk-6de2RtA7ZWdIQ29PkY92gl3nlwG7_Se…
SVE Reviews
- finish reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com> :todo
- stalled this week due to other activities
Upstream Work ([VIRT-109])
==========================
- posted {PATCH for 3.0 00/10} various docker fixes Message-Id:
<20180709152117.21585-1-alex.bennee(a)linaro.org>
- worked on [v2 of docker fixes]
- fixed recent regression in [debootstrap master] which we use
- and then fixed our scripts so we don't *always* use master
- posted {PATCH v2 for 3.0 00/16} various docker fixes Message-Id:
<20180713121741.19262-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v2 of docker fixes]
https://github.com/stsquad/qemu/tree/testing/docker-fixes-for-3.0-v2
[debootstrap master]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=903657
Testing and CI
==============
- started looking at converting the CI RISU jobs to submit via
qa-reports
- applied for packet.net bare metal machine for docker/kvm testing
QEMU CI Loop ([VIRT-187])
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Create an Instrumentation EPIC :todo
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [6/6]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
{PATCH 0/8} Docker improvements
Message-Id: <20180628164643.9668-1-f4bug(a)amsat.org>
- CLOSING NOTE [2018-06-29 Fri 21:38]
Grabbed some patches, commented on others
{Qemu-arm} {PATCH v6 00/35} target/arm SVE patches
Message-Id: <20180627043328.11531-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looks good
{Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looking good, stopped to move to v6
{PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
- CLOSING NOTE [2018-06-29 Fri 21:40]
Seems sane to me.
{Qemu-arm} {PATCH v3-a 00/27} target/arm: Scalable Vector Extension
Message-Id: <20180516223007.10256-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-07-13 Fri 20:02]
Already merged
Absences
========
- Two days out due to illness
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
--
Alex Bennée
4 day week, on holiday monday
Submitted a Linaro Connect presentation.
[TCWG-1424] Investigate profile feedback for code-size
Frustrating week trying to plug profile feedback into builds and
benchmarks and get sensible results
- First attempt was to use clang 2 stage pgo build
-- New pass manager has a bug that prevents clang from linking when I
enable clang instrumented profiling (local ref into discarded comdat
group containing counters)
-- Sample based profiling requires building create_llvm_prof from
Google's autofdo repository. Does not build out of the box after it
switched to using git submodules for its dependencies, managed to fix
up makefile to get it built.
-- Tried a sample profiling run but with perf's sampling rate and
clang's running time mean that the number of samples is too small to
give meaningful results.
-- The version of perf on my machine doesn't support incremental
profiling so I can't accumulate data from multiple runs.
-- Inlining before my pass to mark functions for size optimisation
accounts for majority of code size increase.
- Second attempt was integrating clang/llvm profiling into spec
-- Spent way longer than I'd expected working out how to write a
config file that handles sample and instrumentation based profile
runs. Both forms require the profile generated from perf or an
instrumented build to be post-processed before being used as an input
for the next stage. The sample profiling also needs the path to the
training executable which isn't obvious how to do.
-- Got SpecInt running with all the various combinations that I want
to run, haven't had time to do full runs to get results yet
== Progress ==
* FDPIC
- GCC: posted patch series v2.
* GCC upstream validation:
- looking at some random noise in testing
- reported a couple of regressions
* Infrastructure:
- prototyped native toolchain build job
- misc cleanups
* misc (conf-calls, meetings, emails, ....)
== Next ==
Holidays for 2 weeks, back on July 30th
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ tracked down and sent fix for bug in MPU handling of exception
frame unstacking that broke a Zephyr test case
+ sent some patches for minor GICv2 bugs
+ code review:
- large series adding virtualization support to GICv2
* VIRT-164 [improve Cortex-M emulation]
+ completed patchset that implements execution from small MPU regions
and MMIO regions, and sent it out for review
+ found and fixed a few bugs in the code I was modifying in the process
thanks
-- PMM
=== Work done during this week ===
* Continue work on TCWG-1428 (Support arithmetic on FileCheck regex
variable): external review
+ finish adding comments
+ add documentation and testcase
+ respond to feedback and send email to llvm-dev to discuss best
syntax for new feature
* Started looking into TCWG-1062 (MCF branch prediction overload due
to too many consecutive branches):
+ figure out what machines to run spec on, where to find spec and
how to use Linaro scripts to install/configure and run it (thanks to
Christophe Lyon)
+ try to build a native clang toolchain but throw it away since
clang does not link (perhaps due to lack of memory (4G machine))
+ learn how to build a cross LLVM toolchain (thanks to Peter Smith)
+ figure out how to get the right privilege to run perf (thanks to
Christophe Lyon)
* Misc:
+ LLVM buildbot babysitting with Peter Smith
+ attend presentation about Windows on Arm
+ start a full reorganization of my workflow
+ finish handover of my Arm tickets
=== Plan for week 28 ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): address comments
+ rework patch once syntax is agreed
* Continue looking into MCF branch prediction overload due to too many
consecutive branches:
+ reproduce/confirm issue
+ start to investigate a solution
[VIRT-198 # QEMU: SVE Emulation Support ]
Fixed a couple of bugs uncovered by Alex's VQ16 traces.
[VIRT-249 # SVE System Mode ]
Tracked a phantom kernel crash for a while before it
magically went away with a qemu from-scratch rebuild.
(Plus other stuff, maybe? I tried a lot of things.)
Wrote a version of helper_sve_ldff1_bb_r that works
on pages, and works with softmmu.
time ./bld/tests/test-strlen
softmmu: 0m5.467s
linux-user (old): 0m2.016s
linux-user (new): 0m1.853s
Still need to generalize this to the other first-fault/
no-fault helpers. And possibly write some synthetic test
cases for them. Certainly they've not been tested so
far by anything.
[QEMU Upstream]
* tcg-next pull request.
* Review of some ppc fpu patches went too many rounds
before I broke down and wrote some patches myself.
* More nanomips review.
[GCC Upstream]
Fixed some problems with, and committed, the movprfx patches.
r~
[TCWG-1368] Tracked down libfuzzer buildbot failures on aarch64 and raised PR
[TCWG-1424] Use profile information for size optimisation
- Decided to use clang's 2-stage PGO build as next experiment with
compile times on the full test suite as the performance benchmarks
- Spent rather too much time trying to inject an extra c-flag into the
right stage of the bootstrap builds. As a consolation I know a little
bit more about the bootstrap builds.
- Just measuring code size the profile guided feedback builds of clang
are roughly 33% larger than standard clang, with cold functions
optimised for size this drops to 25% larger. Still waiting for
performance figures for all runs. It is looking like in its current
formulation the size optimisation might offer most of the benefits of
PGO but with a lower code size impact. It misses the original goal of
keeping the performance of non-PGO optimisation but lower overall
size.
[Misc] Tracked down a LLD static build failure with a recent glibc.
Looks like it won't affect Arm and AArch64 as it is related to X86
relaxed got relocations to ifunc resolvers.
Planned absences
- Holiday Monday 9th July
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ softfreeze-related maintenance work
+ investigating reported bug with CMSDK timer device model:
couldn't reproduce hangs, but sent patches which fix
various issues
+ code review:
- various patches by the Outreachy/GSoC interns for
the v6M/microbit work
- a few OSX UI bugfix patches
+ scrub through some recently filed bugs to see what might be
worth investigating before the release
+ first pass through KVM Forum talk submissions
thanks
-- PMM
=== Work done during this week ===
* PR85434 / CVE-2018-12886 / TCWG-1379 (stack-protector failure on GCC
ARM): external review
+ finish testing and patch clean up (comments + changelog) and
submit for external review
* Continue work on TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ finish implementation, fix compile issues and debug errors found
on simple testcase
+ run regression testsuite and fix another issue
+ start cleaning up patch
* Misc improvement to jenkins infrastructure
* Misc:
+ gave presentation on stack protector bug
https://docs.google.com/presentation/d/1ksqK-eTYjYhFXlTyVaPA2VIvCTsxwO5Xw-G…
+ Future of microprocessors presentation by Sophie Wilson
=== Plan for week 28 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable): submit
for external review
+ finish adding comments
+ add documentation and testcase
* Start looking into MCF branch prediction overload due to too many
consecutive branches
SVE Support ([VIRT-198])
========================
- wrote up [post on SVE development] with QEMU for for Linaro Blog
- originally planned to publish on QEMU 3.0 release
- HPC team would like it published before their workshop on 26th
July
- write up a abstract for HPC workshop and plan remote time :todo
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[post on SVE development]
https://docs.google.com/document/d/15v1asqk-6de2RtA7ZWdIQ29PkY92gl3nlwG7_Se…
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-07-06 Fri 12:37]
Changes merged upstream. Ticket closed.
- generated more traces at different VQ's
- VQ3 (found one error, actually x86 SIGFPE issue)
- VQ16 (found 2 errors in ptrue)
- initial run included errors in whilelo, whilels, wrffr, zip[12]
which went away
- I've parked the tests from ASL work pending legal feedback
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~~~~~~~~~
- started reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- added remaining v8.1 stories to JIRA and re-organised under
- [ARMv8.1 Mandatory Features] and [ARMv8.1 optional features]
- pondering how much effort to do VHE
- it's mostly conditional re-direction of EL1/EL2 registers so
host kernel can pretend it's in EL1 when really in EL2
- some EL2 registers present slightly different formats when VHE
bit is set
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v3 00/20} Travis, Code Coverage and Cross Build
updates Message-Id: <20180702143021.18864-1-alex.bennee(a)linaro.org>
- posted {PULL 00/20} Travis, Code Coverage and Cross Build updates
Message-Id: <20180703101444.23778-12-alex.bennee(a)linaro.org>
- with a follow-up of {PULL v2 00/20} Travis, Code Coverage and
Cross Build updates Message-Id:
<20180704090642.3469-1-alex.bennee(a)linaro.org>
- and {PULL v3 00/20} Travis, Code Coverage and Cross Build updates
Message-Id: <20180705160329.30386-1-alex.bennee(a)linaro.org>
- now merged \o/
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Testing and CI
==============
- spoke with LAVA team about build status and build button
- now have a qa-reports account to submit LAVA jobs via
QEMU CI Loop ([VIRT-187])
~~~~~~~~~~~~~~~~~~~~~~~~~
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
~~~~~~~~~~~~~~~~~~~~~~
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
~~~~~~~~~~~~~~~~~~~~~~~
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Spoke to Ilias Apalodimas (LEDGE SIG) about VM networking
- options for zero copy guest to guest networking
- experiments with userspace networking stacks
- lightweight VM+containers
- [Kata Containers] - follow on from Clear Containers work
- Crostini/[CrosVM] work, ChromeOS VM+Docker approach
- Create an Instrumentation EPIC :todo
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [5/5]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
{PATCH 0/8} Docker improvements
Message-Id: <20180628164643.9668-1-f4bug(a)amsat.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:38]
Grabbed some patches, commented on others
{Qemu-arm} {PATCH v6 00/35} target/arm SVE patches
Message-Id: <20180627043328.11531-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looks good
{Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looking good, stopped to move to v6
{PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:40]
Seems sane to me.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH 0/4} tests/vm: various trivial fixes
Message-Id: <20180628153535.1411-1-f4bug(a)amsat.org>
* {PATCH 0/6} docker: Port to Python 3
Message-Id: <20180627021423.18404-1-ehabkost(a)redhat.com>
--
Alex Bennée
== Progress ==
* FDPIC
- GCC patch series: updating patches.
- uclibc-ng: discussing problem with lib symbols not being weak.
It's not a blocker for FDPIC anyway. Continued to update/clean the
patch series before submission.
* GCC upstream validation:
- looking at some random noise in testing
- reported a couple of regressions
* Infrastructure:
- patch reviews
- cleanup/improvements
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC: uclibc-ng, GCC
* GCC upstream validation
o One day off
o LLVM bots
* Troubleshot sanitizers regressions on ARM
o LLVM Machine Outliner on ARM
* Rebased prototype on upstream developments
* Reviewing upstream patch on intra-procedure-call
scratch register handling.
* Investigating potential issues w/r to pass ordering
o Misc
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Full aarch64-linux-user patch set merged.
[VIRT-214 # SVE System Registers ]
Implemented ID_AA64PFR0_EL1, ID_AA64ZFR0_EL1.
[VIRT-249 # SVE System Mode ]
Fixed sve disabled exception routing.
A booted kernel recognizes sve is present, according to /proc/cpuinfo.
However, the kernel crashes as soon as the first sve insn is executed.
Task for next week is to find out why.
r~
SVE Support ([VIRT-198])
========================
- posted {PATCH v3 0/5} support reading some CPUID/CNT registers from
user-space Message-Id:
<20180625160009.17437-1-alex.bennee(a)linaro.org>
- needed for the HPC guys in their test setups
- pm has grabbed the CNT patches, the rest need rework, not this
cycle
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- posted {RISU PATCH v4 00/22} ARM SVE support for RISU Message-Id:
<20180622141205.16306-1-alex.bennee(a)linaro.org>
- support load/store memory instructions from ASL :todo
- awaiting legal clearance from ARM to publish script
- generated more traces at different VQ's
- VQ3 (found one error, actually x86 SIGFPE issue)
- VQ16 (still generating :-/)
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
[iteration of SVE series]
https://github.com/stsquad/risu/tree/add-sve-support-v3
SVE Reviews
~~~~~~~~~~~
- reviewed {Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 00/10} Travis updates and code coverage tweaks
Message-Id: <20180625111935.26108-1-alex.bennee(a)linaro.org>
- spent some time looking at getting xtensa system test stuff done
- posted {PATCH v2 00/21} Travis, Code Coverage and Cross Build
updates Message-Id: <20180629205232.27190-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[hacky fix]
https://github.com/stsquad/qemu/commit/a15577f8a6629f9924d2671a82f0b9801351…
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
- spoke with LAVA team about build status and build button
- now have a qa-reports account to submit LAVA jobs via
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===========
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
Completed Reviews [1/1]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
{PATCH 0/8} Docker improvements
Message-Id: <20180628164643.9668-1-f4bug(a)amsat.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:38]
Grabbed some patches, commented on others
{Qemu-arm} {PATCH v6 00/35} target/arm SVE patches
Message-Id: <20180627043328.11531-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looks good
{Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looking good, stopped to move to v6
{PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-29 Fri 21:40]
Seems sane to me.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH 0/4} tests/vm: various trivial fixes
Message-Id: <20180628153535.1411-1-f4bug(a)amsat.org>
* {PATCH 0/6} docker: Port to Python 3
Message-Id: <20180627021423.18404-1-ehabkost(a)redhat.com>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
--
Alex Bennée
[TCWG-1424] Investigation into profile and size optimisations
- Completed the pass and got it working on both the old and new pass managers
- Spent quite a bit of time trying to understand how llvm classifies
hot and cold functions, a lot of the details are not documented well
or at all.
- Found another problem with --pgo and lnt when the exec-multisample
option is used. I've applied a local fix to stop the extra runs from
triggering profile collection
- Upstream lnt doesn't seem to collect code size information for a
benchmarks-only run, wrote a script to measure and inject it back.
- Got some benchmark figures on the pass. Difficult to interpret as I
suspect that too many of the benchmarks are too small to give useful
results. There seemed to be some huge regressions when a critical
function stopped getting inlined, but overall performance was
comparable. I need to find some better benchmarks and learn how to
make sense of results.
[TCWG-1368] Buildbot failure investigation
Decided to take a look as an exercise in using the packet.net machines.
Some libfuzzer tests are hanging or taking an extremely long time to
run on aarch64. Reproduced on one of TCWGs packet.net machines. At
early stage of investigation right now as there doesn't seem to be any
obvious answers or easily available diagnostics.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review in preparation for 3.0 softfreeze next week:
- PMU emulation improvements
- last round of SVE patches
- i.mx minor code cleanups
- put 'address' annotations into DTB node names
- virtualization extension support in GICv2 emulation
+ sent two target-arm pull requests
+ bug investigation: the small-MPU-regions patchset had a bug which
broke an m68k test image
+ handling lots of pull requests from everybody else
thanks
-- PMM
=== Work done during this 2.5day week ===
* 2.5 day off to take care of my sick son
* stack-protector failure on GCC ARM: more testing needed
+ submitted CVE ID request -> will be known as CVE-2018-12886 once published
+ start testing
* Continue work on DSGHACK-25 (Support arithmetic on FileCheck regex variable)
* Misc improvement to Linaro TCWG infrastructure
=== Plan for week 27 ===
* finish testing of stack protector bug fix and submit patch for review
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): finish patch
o GNU releases
* 6.4 and 7.3 2018.05 deployed
o LLVM
* First prototype implemented for ARM mode
* Working on more cases to handle
* Investigating potential issues w/r to pass ordering
o Misc
* Various meetings and discussions.
[VIRT-198 # QEMU: SVE Emulation Support ]
Implemented FCADD, FCMLA, SDOT, UDOT.
Posted v5 patch set.
[VIRT-210 # SVE first-fault and no-fault loads ]
Implemented for user-only.
Posted an RFC for using a rwlock instead of a mutex to
protect from mmap changes. Emilio Cota wants perf numbers.
Rebased previous glibc sve string patches to align with
the cortex-strings work reviewed by Richard Sandiford.
Found that strrchr fails with glibc's testsuite even though
it didn't work cortex-strings' testsuite.
Found that it would *really* help to have a gdb that understands
the new sve registers, especially predicates. Found that some
sve support is now upstream in gdb. Added some support to the
qemu gdbstub, but so far it just crashes gdb.
[Upstream]
Patch review; the big tickets being SVE RISU and nanoMIPS.
r~
SVE Support ([VIRT-198])
========================
- spin next version of CNT{VCT|FRQ}_EL0 from user-space Message-Id:
<20180518114424.18054-1-alex.bennee(a)linaro.org> with ID regs :todo
- the HPC guys hit this in their test setups
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- Investigated some weirdness in SVE traces
- didn't figure out what was happening :-/
- but did generate a new "clean" set of tests that pass repeat runs
- posted {RISU PATCH v4 00/22} ARM SVE support for RISU Message-Id:
<20180622141205.16306-1-alex.bennee(a)linaro.org>
- support load/store memory instructions from ASL :todo
- awaiting legal clearance from ARM to publish script
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~~~~~~~~~
Upstream Work ([VIRT-109])
==========================
- posted {RFC PATCH 0/5} Tweak code coverage reporting Message-Id:
<20180620132032.12952-1-alex.bennee(a)linaro.org>
- found a bug with gcov + linux-user
- build a [hacky fix] will include in next patch series
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[hacky fix]
https://github.com/stsquad/qemu/commit/a15577f8a6629f9924d2671a82f0b9801351…
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- sent {PULL 00/56} add check-tcg and associated machinery Message-Id:
<20180619154435.18898-1-alex.bennee(a)linaro.org>
- sent {PULL v2 00/57} add check-tcg and associated machinery
Message-Id: <20180621062605.941-1-alex.bennee(a)linaro.org>
- spent some time digging into build failures in pm215's merge tests
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
- spoke with LAVA team about build status and build button
- now have a qa-reports account to submit LAVA jobs via
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Completed Reviews [1/1]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ lots of code review (including patchsets supporting up to
512 CPUs and lots of PCI devices for KVM virt)
+ put together another target-arm pullreq
* VIRT-164 [improve Cortex-M emulation]
+ Got small-MPU-regions working for read/write; patches sent for review
+ MPC support patchset is now in master
Lots of meetings this week; clearly the stars have aligned.
thanks
-- PMM
[TCWG-1424] Profile guided information code size investigation.
- Wrote up initial findings in Jira
- Have written a pass that works with both the new and old pass
manager that I can use to selectively add size optimisation attributes
to functions.
- Spent way too much time trying to work out where to put the pass in
both the old and new pass manager.
-- I now understand why the new pass manager is required to get the
most benefits of profile feedback.
-- I now understand a bit better some of the frustrations of the old
pass manager.
-- I can see why the new pass manager isn't quite ready yet.
- Fixed up, I think, -fprofile-instr-generate in the new pass manager.
I didn't realise that were two separate instrumentation methods as
-fprofile-generate is subtly different.
Misc:
- Updated state of sanitizer tests on Arm and AArch64 to enable a PR
to be closed.
=== Work done during this week ===
* stack-protector failure on GCC ARM: more testing needed
+ rework to introduce new standard pattern including guard's address
computation and make pattern opaque until after register allocation
+ fill in form for new CVE ID and ask feedback on CVE description
* Resume work on extending FileCheck to allow variable with arithmetic
expression
+ created TCWG-1428 to track this work
* Tried to fix LD_LIBRARY_PATH issue with depot build of GNU Arm
Embedded Toolchain
-> need to talk to someone who know better depot module recipes
* Misc:
+ Arm meetings
+ Linaro syncs
+ 1.5 day spent on IT issue (personal investigation to help IT,
blocked on broken system after some IT attempts to solve it)
-> issue finally fully resolved
=== Plan for Linaro week 26 ===
* Do extended testing of stack protector bug fix
* TCWG-1428 (Support arithmetic on FileCheck regex variable): finish patch