- linaro-toolchain - lists.linaro.org

[ACTIVITY] 5-9 December 2016

by Christophe Lyon

== Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup - looking at abe bug 757: add support to run newlib's make check * GCC - reported a few regressions on trunk - bug #78253: waiting for feedback * misc (conf-calls, meetings, emails, ....) == Next == * ABE & Jenkins jobs patches reviews and bug fixes * GCC: cleanup on AdvSIMD intrinsics

8 years, 5 months

1
0
0 0

[ACTIVITY] 5 - 9 Dec 2016

by Prathamesh Kulkarni

* TCWG-971 (6/10) - Resolved ICE's in couple of cases. - Got stuck on the case when split_point->entry_bb has phi whose one of the arguments is defined outside split region. This caused ICE for isl_schedule_node.c. For now, the patch refuses to split in this case, which "fixes" the ICE. Need to think more about this case. - Working through other failures with bootstrap :/ * GCC bugs (3/10) - TCWG-701: Patch iteration based on upstream reviews by Jakub. * Misc (1/10) - Meetings == This Week == - TCWG-701 - Holidays till 2nd Jan 2017.

8 years, 5 months

1
1
0 0

[ACTIVITY] 5 - 9 December 2016

by Diana Picus

== Progress == * [ARM GlobalISel] Use CC support for lowering args/return [TCWG-946] [2/10] - Committed patch extracting target-independent functionality from AArch64 GlobalISel - Submitted patch using that functionality to lower any number of i32 arguments - Refactored [ARM GlobalISel] Select add instructions [TCWG-925] to also use the extracted functionality * [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] [4/10] - Support for lowering i8 and i16 arguments / returns through registers is ready, including the ABI signext / zeroext - Currently brushing up i1 * Rewrite llvm-projs in Python [TCWG-833] [2/10] - Refactored patch a bit based on feedback from reviews, still have some refactoring left to do - Fixed a bug related to worktree detection * Misc [2/10] - Meetings, mailing lists, code reviews == Plan == * Ping / rebase upstream patches * [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] - Finish i1 through registers - Implement i1, i8, i16 through the stack * Rewrite llvm-projs in Python [TCWG-833] - Finish refactoring

8 years, 5 months

1
0
0 0

[ACTIVITY] Dec 5 -- Dec 9

by Yao Qi

~ Progress ~ * TCWG-979, Use code cache in prologue analyzer. [3/10]. Done. Prologue analyser improvement patches are pushed in. Performance improvement is measured on both ARM and AArch64 with and without -fstack-protector. Wall time is reduced from 34s to 10s in one case! * TCWG-984, Handle exception/error in disassembly. [5/10] Need to fixed it before 7.12.1 release (Jan 2017). Find other issues during the investigation, and fixed them. PR 20953, PR 20954, PR 20955. Two opcodes patches are posted to binutils. Write a unit test for disassembly on memory error. Exposes some issues in opcodes. Whether upstream needs this unit test depends on the decision on how to fix foreign frame problem in disassembly. * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. No progress. * upstream patches review. [1/10] * Misc, meeting, [1/10] ~ Plan ~ * TCWG-984, Post the RFC and list three approaches fixing this problem. * TCWG-333 -- Yao Qi

8 years, 5 months

1
0
0 0

[ACTIVITY] 28 Nov to 2 Dec 2016

by Peter Smith

-- Progress -- TCWG-829 IFunc support I have a downstream implementation of ifunc using synthetic sections that handles x86_64, ARM and AArch64. I think it may be a bit too complex to upstream in its current form but I think it is illustrative enough to post upstream for comment. TCWG-828 Static TLS support Implemented using new GOT structure and successfully upstreamed. Took up an opportunity to get involved with progressing some AArch64 documentation back at ARM. -- Plans -- Will post current state of TCWG-829 (ifunc) for feedback on whether the design is right. - Write more tests for TCWG-829. - Work on TCWG-911 eglibc insists on .ARM.attributes section for dlopen to work and TCWG-919 Thunks to undefined symbols for shared libraries that call back to the application. - Spend some time reviewing and updating AArch64 documents back at ARM.

8 years, 5 months

1
0
0 0

[ACTIVITY] Week 48

by Yvan Roux

== Progress == o Linaro GCC/Validation (7/10) * [TCWG-936] Regression detection: - a bit of work on the job and discussing improvement. * [TCWG-955] Re-association: - learning middle-end internals - some testing and debug o Misc (3/10) * Various meetings and discussions. == Plan == same as last week: o Improve regression detection job o Improve linaro gcc integration validation o Continue re-association learning

8 years, 5 months

1
0
0 0

[ACTIVITY] November 28th-December 2nd 2016

by Christophe Lyon

== Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup - looking at abe bug 757: add support to run newlib's make check * GCC - reported a few regressions on trunk - bug #78253: new patch sent upstream * misc (conf-calls, meetings, emails, ....) - updated arm-neon-tests repo: add the possibility to avoid that the compiler computes the results of some of the intrinsics (clang/llvm does some optimisations, but does not model the Neon Q flag) == Next == * ABE & Jenkins jobs patches reviews and bug fixes * GCC bug #78253

8 years, 5 months

1
0
0 0

[ACTIVITY] 28 Nov to 2 Dec 2016

by Prathamesh Kulkarni

== This Week == * TCWG-971 (4/10) - Prototype patch can handle simple cases * GCC bugs (5/10) a) PR78529 - Cannot reproduce after several tries :( b) PR78599 - Submitted patch upstream to bail out of bits prop if param type is not integral or pointer type, but a better fix would be to obtain type from jump_function. I can use that approach once Kugan's patch to add param_type to jump_function gets committed. c) TCWG-963 - Patch iteration based on upstream feedback. d) PR78629 - Committed fix r243125 to trunk. * Misc (1/10) - GCC ubsan builds - Meetings == Next Week == - TCWG-971 - GCC bugs - Single vs Balanced partition benchmarking

8 years, 5 months

1
0
0 0

[ACTIVITY] 28 Nov -- 02 Dec

by Yao Qi

~ Progress ~ * TCWG-965, Investigate doing unit tests in GDB. [3/10] Done. The first unit test to AArch64 prologue analyser is pushed. The unit test is running on GDB buildbot on different hosts (x86, s390, etc). The patch review takes a while because it is my first patch written in C++11. Need some unit tests to ARM prologue analyser too. * TCWG-416, Improve GDB performance in remote debugging. [4/10] Use code cache in AAarch64 prologue analysis, and it is improved from 10s to 3s! * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [1/10] Preparatory patches are committed. Think about the next step. I have to change expression evaluation in GDB. * Misc, [2/10] ** Upstream patches review. Reviewed OpenRISC and FreeBSD/mips patches. ** GDB linux kernel awareness discussion. GDB is unable to access kernel memory when program stops in user space (by ctrl-c). Discussed some ways to avoid teaching GDB setting MMU. ** Some input and discussion on SVE. ~ Plan ~ * TCWG-964, more unit tests on ARM prologue analyser, * TCWG-416, measure performance improvement with -fstack-protector on ARM (with both -marm and -mthumb). * TCWG-333, -- Yao Qi

8 years, 5 months

1
0
0 0

[ACTIVITY] 21-25 November 2016

by kugan

== Progress == - Posted a revised patch for PR78365 - Fixed ICE and Spec2006 benchmarked type promotion pass * There are couple of mis-compares that needs fixing - Setup perf in r1-a12 and analyzing for type promotion and lto - Documented tasks within reassoc == Plan == - Perf analysis of LTO - Type promotion pass - Work on upstream bugs

8 years, 5 months

1
0
0 0

[ACTIVITY] Week 47

by Yvan Roux

== Progress == o Linaro GCC/Validation (6/10) * Created regression detection job [TCWG-936] * Fought with infrastructure / jenkins plugins issues * Start to look at re-association [TCWG-955] o Misc (4/10) * Various meetings and discussions. == Plan == o Improve regression detection job o Improve linaro gcc integration validation o Continue re-association learning

8 years, 5 months

1
0
0 0

[ACTIVITY] 21 - 25 Nov

by Yao Qi

# Progress # * TCWG-923, Use regcache instead of frame in software_single_step. [1/20] Patches are pushed in. Done. * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [3/10] Another three preparatory patches are approved. Ongoing. * TCWG-416 Improve GDB performance in remote debugging. [3/10] Prologue analysis performance on arm-linux is improved a lot (from 39s to 12s in one case), but no change on aarch64-linux. Looks GDB doesn't recognise "str x19, [sp, #-48]!" as part of the prologue. * TCWG-965 Unit test in GDB. [2/10] Investigate how to do unit test to prologue analysis in GDB, to address the bug above. We can embed some test code in GDB, and invoke them by a special command. It is a little big ugly, but better than nothing. Need some refactor to aarch64 backend for unit test. * Patches review, [1/10] ** Reviewed two new GDB ports, RISC-V and OpenRISC. ** Chat with Antoine on ptrace atomicity, and insist that he should refactor 'struct tracepoint' before add arm-linux tracepoint support. # Plan # * TCWG-333 * TCWG-416 * TCWG-965 -- Yao Qi

8 years, 5 months

1
0
0 0

[ACTIVITY] 21-25 November 2016

by Christophe Lyon

== Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup * GCC - reported a few regressions on trunk - bug #78253 * misc (conf-calls, meetings, emails, ....) == Next == * ABE & Jenkins jobs patches reviews and bug fixes * GCC bug #78253

8 years, 5 months

1
0
0 0

[ACTIVITY] 21-25 Nov 2016

by Prathamesh Kulkarni

== This Week == * GCC bugs (6/10) a) PR78154: Fix committed to trunk. b) PR78153: Fix committed to trunk. c) PR78501: Committed to trunk, which fixes ada bootstrap but didn't fix profiledbootstrap. d) TCWG-957: Submitted patch upstream, Richard rejected the transform to be done in copyprop. Looking at handling this in VRP instead. e) TCWG-963: Submitted patch upstream, reviews by Richard and Jeff. * GCC cleanup patches (1/10) - Committed r242888 to move initialization of ptrdiff_type_node to middle-end. * TCWG-971 (2/10) - Working on prototype patch to re-materialize local variables in the split function that were derived from arguments. * Misc (1/10) - Meetings == Next Week == - ipa-bits-propagation: save types in jump fn instead - TCWG-971 - GCC bugs

8 years, 5 months

1
0
0 0

[ANNOUNCE] Linaro Binary Toolchain Release GCC 6.2-2016.11

by Ryan Arnold

The Linaro Binary Toolchain ============================ The Linaro GCC 6.2-2016.11 Release is now available. The GCC 6 Release series has significant changes from the GCC 5 release series. For an explanation of the changes please see the following website: https://gcc.gnu.org/gcc-6/changes.html For help in porting to GCC 6 please see the following explanation: https://gcc.gnu.org/gcc-6/porting_to.html Download release packages from: http://releases.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/ http://releases.linaro.org/components/toolchain/binaries/6.2-2016.11/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 6.2-2016.11 Linaro glibc 2.23 (linaro/2.23/master) https://www.sourceware.org/ml/libc-alpha/2016-08/msg00212.html Linaro newlib 2.4-2016.03 (linaro_2.4-branch) Linaro binutils 2.27 (linaro_binutils-2_27-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… Linaro GDB 7.12 (gdb-7.12-branch) https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search NEWS for Linaro GCC 6.2-2016.11 ================================ * Host binaries for x86_64 linux hosts now have symbols and debug information stripped in order to reduce the size of the toolchain binary archives. This reduces the archive size from 1.5G to 600M for aarch64-linux-gnu target with the gcc-6-branch. * Removed GCC patch for revision 239561 as it was causing an upstream regression commit 03850689f4c165e88cec81696d9d722e76a86c85 Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Nov 9 21:56:21 2016 +0100 Revert backport from trunk r239561. This reverts commit 11879870dc041028bcb8d078d9ddbd7e400dd03f. * The GDB version was upgraded from GDB 7.11 in the 6.1-2016.08 release to GDB 7.12 in 6.2-2016.11. * The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2 and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes merged from FSF GCC 6.2. * Basic tuning support for the Qualcomm qdf24xx was added to the Linaro GCC 6.2-2016.10 snapshot and will appear in this release. * IFUNC was disabled for baremetal targets, as it was causing test-suite failures, and is presently a Linux only feature. * The gold linker was added to this binary release. * Backported malloc_lock fix into Linaro newlib 2.4. commit 022bd2995640626d9efb6a839884c5e1c7c5e133 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:11:50 2016 +0200 Re-enable malloc_lock for newlib-nano * Backported rawmemchr patch into Linaro newlib 2.4. commit 5357441171f2409fb759112bc6a00d3e672374d9 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:09:51 2016 +0200 Add rawmemchr * Backported strlen fix when using Thumb-2 and -Os -marm into Linaro newlib 2.4. commit f194ff4d5e1e304ac2a8d438d7abcbffd2dba757 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:05:23 2016 +0200 Fix strlen using Thumb-2 with -Os -marm * Backported fix for semihosting ARM when heapinfo not provided by debugger into Linaro newlib 2.4. commit bda499cb9d2b97075f74df9bfb38b23ff4d12ac2 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 13:59:52 2016 +0200 Fixed semihosting for ARM when heapinfo not provided by debugger. * Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23. * Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch. commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Tue May 17 10:16:39 2016 -0300 Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463) * Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23 branch. commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 19:01:10 2016 -0300 Remove __ASSUME_SET_ROBUST_LIST * Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23 branch. commit e48b4e7fed0de06dd7832ead48bea8ebc813a204 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 10:35:25 2016 -0300 Remove __ASSUME_FUTEX_LOCK_PI * Merged latest FSF binutils-2_27-branch into linaro_binutils-2_27-branch. * The libwinpthread DLL is now copied into the host bin directory to satisfy mingw package dependencies. * Backported GNU Linker fix. commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59 Author: Nick Clifton <nickc(a)redhat.com> Date: Tue Aug 23 09:45:11 2016 +0100 Fix seg-fault in ARM linker when trying to parse a binary file. * Backported GNU Assembler fix for PR 20364 commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd Author: Nick Clifton <nickc(a)redhat.com> Date: Fri Aug 5 10:37:57 2016 +0100 Fix the generation of alignment frags in code sections for AArch64. https://sourceware.org/bugzilla/show_bug.cgi?id=20364 * Performance related backports from Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC 6.1-2016.08, Linaro GCC 6.2-2016.09, and Linaro GCC 6.2-2016.10 have been included. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Ryan S. Arnold | Linaro Toolchain Engineering Manager ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net

8 years, 5 months

1
0
0 0

[ACTIVITY] 21 - 25 November 2016

by Diana Picus

== Progress == * [ARM GlobalISel] Use CC support for lowering args/return [TCWG-946] [5/10] - Sent a patch upstream for extracting some target-independent functionality from the AArch64 GlobalISel - Working on lowering i32 args for non-vararg functions (most of the functionality is ready, currently adding more tests) * Rewrite llvm-projs in Python [TCWG-833] [2/10] - Added more tests, brushed it up and sent it for review * Misc [3/10] - Meetings, mailing lists - Rebasing [ARM GlobalISel] Select add instructions [TCWG-925] - OOO on Monday == Plan == * OOO on Wednesday through Friday * [ARM GlobalISel] Use CC support for lowering args/return [TCWG-946] - Brush up patch for more complex lowering of i32 args (vararg) * Follow up on TCWG-925 and TCWG-833 if necessary

8 years, 5 months

1
0
0 0

[ACTIVITY] 20 - 25 November 2016

by Peter Smith

Progress: [TCWG-940] LLD test failures on libcxx and libcxxabi - Reported bug upstream. Upstreamed a patch to LLD to add a sentinel value. This will mean that lld linked executables won't trigger the bug. [TCWG-901] Investigate LLD as a system linker on ARM - All the llvm and lld test failures were down to me forgetting to initialise a single bitfield member that I'd added. I can now confidently say lld can link itself and the other llvm executables from a clean build. - Closed out the investigation to concentrate on upstreaming my changes. [TCWG-829] Ifunc support - ARM does ifunc differently to all the other Targets (uses .got and .rel.dyn instead of .got.plt and .rel.plt) I have an old downstream patch that is essentially if (ARM) do this else do that; which is far too messy. - LLD has now been refactored a bit to make its linker generated sections more flexible. I'm currently trying to rework the design to use these. Not yet found an approach I'm happy with. Plans: Upstreaming priority: [TCWG-829] Ifunc support [TCWG-828] Static TLS support I've got downstream patches for these but I need to extend lld and rewrite them in a more general way to get them accepted upstream. [TCWG-919] Thunks to undefined symbols, such as when a Shared Object is dlopened and calls back to the executable (not yet posted upstream).

8 years, 5 months

1
0
0 0

[ACTIVITY] 14 - 18 November 2016

by Peter Smith

Progress: [TCWG-940] LLD test failures on libcxx and libcxxabi I think this is a latent bug in libunwind's .ARM.exidx table entry search that happens to be exposed by lld. Will try and make a reproducer using ld.bfd and report upstream if I'm correct. [TCWG-901] Investigate LLD as a system linker on ARM - Found 6 test failures in libcxxabi and 41 test failures in libcxx tests. I think these are likely to be all related to TCWG-940 - I cannot build working llvm tools from clean using LLD as the linker. Everything links but the resulting binaries are unstable, llvm-tablegen is the first to fall over, giving incorrect results. Other tools segfault when run on certain inputs. Much rebasing of downstream patches to account for refactoring. Refactoring will soon be at a point that I can start rewriting the downstream patches. Wrote a python script that can glue together the output of llvm-objdump, llvm-readobj to give me a better view of the plt, got and exception tables. Plans for next week: - Close out TCWG-940, find out what is wrong that is preventing lld from linking the llvm-tools. - Rewrite some of my downstream patches using the refactored framework.

8 years, 5 months

1
0
0 0

[ACTIVITY] Week 46

by Yvan Roux

== Progress == o Linaro GCC/Validation (4/10) * Merged FSF GCC 6 branch into Linaro one * BZ #2575: Revert offending backport (fix committed in trunk, will re-backport the 2 commits) * Released Linaro 2016.11 GCC sources * Deal with validation/infra issues. o Misc (6/10) * Lot of meetings and discussions this week. == Plan == o Focus on validation regression plan.

8 years, 5 months

1
0
0 0

[ACTIVITY] 14-18 November 2016

by Christophe Lyon

== Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup * GCC - reported a few regressions on trunk - looked at "fixing" libstdc++ failure reports on arm-none-eabi by using CXXFLAGS_FOR_TARGET=-fno-threadsafe-statics, works well enough, but 2 testcases need fixing (wip). - now using binutils-2.27 * misc (conf-calls, meetings, emails, ....) == Next == * ABE & Jenkins jobs patches reviews and bug fixes * GCC bug #78253

8 years, 5 months

1
0
0 0

[ANNOUNCE] Linaro GCC 6 2016.11 snapshot

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2016.11 snapshot of the Linaro GCC 6 source package. This monthly snapshot[1] is based on FSF GCC 6.2+svn242371 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2017.02 stable[2] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 6.2+svn242371 * Linaro BZ #2575: Revert backport from trunk r239561. Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed. [2]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed.

8 years, 5 months

1
0
0 0

[ACTIVITY] 14 - 18 November 2016

by Prathamesh Kulkarni

== This Week == * PR78319 (2/10) - After some investigation, it seems issue is with uninit pass rather than r241915. - Committed patch to XFAIL the offending test on arm-none-eabi, after approval from Richard * PR78154 (2/10) - Patch iterations based on upstream review. * PR78153 (2/10) - Created patch - Investigating regression for strlenopt-3.c. * LTO bootstrap error (1/10) - Trying to reproduce miscompare, but bootstrap fails for me in stage-2 :( * Public Holiday (2/10) * Misc (1/10) - Meetings == Next Week == - Investigate LTO bootstrap issue - Benchmark single-partition vs balanced partition LTO for section-anchors - GCC bugs - ipa-split pass

8 years, 5 months

1
0
0 0

[ACTIVITY] 14 - 18 November 2016

by Diana Picus

== Progress == * Rewrite llvm-projs in Python [TCWG-833] [2/10] - Reorganized the repo and sent a draft for review to get early feedback * [ARM GlobalISel] Select add instructions [TCWG-925] [3/10] - Patch in upstream review * [ARM GlobalISel] Use CC support for lowering args/return [TCWG-946] [2/10] - Started investigating the existing support for lowering arguments and return values for various calling conventions * Misc [3/10] - Meetings, mailing lists, buildbot monitoring - Provided some backtraces and other info for PR30735 (tests hanging on Xenial) - Another round of review on TCWG-783 (worktree support in tcwg-release-tools) == Plan == * [ARM GlobalISel] Use CC support for lowering args/return [TCWG-946] * [ARM GlobalISel] Select add instructions [TCWG-925] * Rewrite llvm-projs in Python [TCWG-833]

8 years, 5 months

1
0
0 0

[ANNOUNCE] Linaro Binary Toolchain Release-Candidate GCC 6.2-2016.11-rc2

by Ryan Arnold

The Linaro Binary Toolchain ============================ The Linaro GCC 6.2-2016.11-rc2 Release-Candidate is now available. The GCC 6 Release series has significant changes from the GCC 5 release series. For an explanation of the changes please see the following website: https://gcc.gnu.org/gcc-6/changes.html For help in porting to GCC 6 please see the following explanation: https://gcc.gnu.org/gcc-6/porting_to.html Download release-candidate packages from: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11-rc2/ http://snapshots.linaro.org/components/toolchain/binaries/6.2-2016.11-rc2/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 6.2-2016.11-rc2 Linaro glibc 2.23 (linaro/2.23/master) https://www.sourceware.org/ml/libc-alpha/2016-08/msg00212.html Linaro newlib 2.4-2016.03 (linaro_2.4-branch) Linaro binutils 2.27 (linaro_binutils-2_27-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… Linaro GDB 7.12 (gdb-7.12-branch) https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search NEWS for Linaro GCC 6.2-2016.11-rc2 ==================================== * Host binaries for x86_64 linux hosts now have symbols and debug information stripped in order to reduce the size of the toolchain binary archives. This reduces the archive size from 1.5G to 600M for aarch64-linux-gnu target with the gcc-6-branch. https://review.linaro.org/#/c/15504/ * Removed GCC patch for revision 239561 as it was causing an upstream regression commit 03850689f4c165e88cec81696d9d722e76a86c85 Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Nov 9 21:56:21 2016 +0100 Revert backport from trunk r239561. This reverts commit 11879870dc041028bcb8d078d9ddbd7e400dd03f. * Updated GDB from GDB 7.11 to GDB 7.12. * The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2 and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes merged from FSF GCC 6.2. * Basic tuning support for the Qualcomm qdf24xx was added to the Linaro GCC 6.2-2016.10 snapshot and will appear in this release. * IFUNC was disabled for baremetal targets, as it was causing test-suite failures, and is presently a Linux only feature. * The gold linker was added to this binary release. * Backported malloc_lock fix into Linaro newlib 2.4. commit 022bd2995640626d9efb6a839884c5e1c7c5e133 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:11:50 2016 +0200 Re-enable malloc_lock for newlib-nano * Backported rawmemchr patch into Linaro newlib 2.4. commit 5357441171f2409fb759112bc6a00d3e672374d9 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:09:51 2016 +0200 Add rawmemchr * Backported strlen fix when using Thumb-2 and -Os -marm into Linaro newlib 2.4. commit f194ff4d5e1e304ac2a8d438d7abcbffd2dba757 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:05:23 2016 +0200 Fix strlen using Thumb-2 with -Os -marm * Backported fix for semihosting ARM when heapinfo not provided by debugger into Linaro newlib 2.4. commit bda499cb9d2b97075f74df9bfb38b23ff4d12ac2 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 13:59:52 2016 +0200 Fixed semihosting for ARM when heapinfo not provided by debugger. * Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23. * Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch. commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Tue May 17 10:16:39 2016 -0300 Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463) * Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23 branch. commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 19:01:10 2016 -0300 Remove __ASSUME_SET_ROBUST_LIST * Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23 branch. commit e48b4e7fed0de06dd7832ead48bea8ebc813a204 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 10:35:25 2016 -0300 Remove __ASSUME_FUTEX_LOCK_PI * Merged latest FSF binutils-2_27-branch into linaro_binutils-2_27-branch. * Copy the libwinpthread DLL into the bin directories so it gets into the tmp directory before tar is run. * Backported GNU Linker fix. commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59 Author: Nick Clifton <nickc(a)redhat.com> Date: Tue Aug 23 09:45:11 2016 +0100 Fix seg-fault in ARM linker when trying to parse a binary file. https://review.linaro.org/#/c/13723/ * Backported GNU Assembler fix for PR 20364 commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd Author: Nick Clifton <nickc(a)redhat.com> Date: Fri Aug 5 10:37:57 2016 +0100 Fix the generation of alignment frags in code sections for AArch64. https://sourceware.org/bugzilla/show_bug.cgi?id=20364 * Performance related backports from Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC 6.1-2016.08, Linaro GCC 6.2-2016.09, and Linaro GCC 6.2-2016.10 have been included. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Ryan S. Arnold | Linaro Toolchain Engineering Manager ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net

8 years, 5 months

1
0
0 0

[ACTIVITY] 7-11 November 2016

by Christophe Lyon

* 1 day off == Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup * GCC - bug #2562 (PR78253). GCC behaviour wrt weak handling changed on arm/aarch64 between 4.9 and 5. Proposed a patch upstream but it needs more work/justification. * misc (conf-calls, meetings, emails, ....) == Next == * (try to) handle backlog of GCC trunk regressions * ABE & Jenkins jobs patches reviews and bug fixes * backports/reviews

8 years, 6 months

1
0
0 0

[ACTIVITY] Week 45

by Yvan Roux

o 1 day off (2/10) == Progress == o Linaro GCC/Validation (4/10) * ABE and validation jobs reviews * Binary tarballs size reduction: - more tests and investigation (mingw in particular) - investigating compressed debug sections * BZ #2575: - Bugfix proposed upstream by Jakub - Validate it o Misc (4/10) * Various meetings and discussions. * office network issues == Plan == o Branch merge and snaphsot release o release binaries size reduction

8 years, 6 months

1
0
0 0

[ACTIVITY] 07 - 11 Nov 2016

by Prathamesh Kulkarni

== This Week == * PR35691 (2/10) - Fix committed to trunk for case when LOGICAL_OP_NON_SHORT_CIRCUIT is true. - Fixed PR78256, caused by the commit. * PR78335 (2/10) - Created patch * PR35503 (1/10) - Rebased and committed to trunk after validation * PR78139 (1/10) - Caused due to r241915 which fixes PR35691 - Perhaps this is a latent issue in uninit pass triggered by the commit, but I need to investigate further to confirm that. * ipa-split pass (2/10) - Working on patch to pass variables defined in header block to split function via arguments. * Misc (2/10) - GCC Bugzilla list - Meetings == Next Week == - Benchmark LTO for section-anchors - GCC bugs: PR78154, PR78139, PR78335 - ipa-split pass

8 years, 6 months

1
0
0 0

[ACTIVITY] 7-11 November 2016

by Peter Smith

TCWG-901 Investigate lld as a system linker - Installed lld as the system linker on my Chromebook and attempted to build and run things to see what breaks - Only one unknown concrete problem found so far, thunks to undefined symbols with PLT entries don't work. This seems to be common in python C extensions that are dlopened from python, and call back to the interpreter. -- I have a downstream fix (TCWG-919), with this fixed the test-suite can run with lld as the linker through the pip install (SQLAlchemy has C extensions). - As thought previously, clang is too big to link without thunks. - Attempted to make a simple add thunks to all branches to see if I could get clang to link. Sadly this won't work as lld only permits one thunk per symbol and this might be out of range of the caller as well. - Some thoughts and experiments on how much of llvm, compiler-rt, clang and libc++ can be linked with lld. I'm currently thinking of altering my lld driver to automatically switch to ld.bfd after a relocation out of range link error. I want to try and get a lld linked clang + compiler-rt +libc++ system running. TCWG-683 lld support for branches to unresolved weak references - Now upstream Also: - A lot of rebasing of downstream patches as some refactoring is going on to make lld more flexible. - Some inconclusive investigation into weak reference behaviour in GNU ld. The ARM and AArch64 ld.bfd linkers will put a dynamic relocation on a got slot generated by for an unresolved weak reference. The x86 linkers do not, they statically resolve the got slot to 0. - Some inconclusive investigations into trying to work out what packages to build to test lld. With the exception of very large programs ld seems to successfully complete the link for all programs. Whether it has done so correctly or not is another matter. -- Currently thinking about whether I can build a BSD make world on a raspberry pi. Plans for next week: - Bring TCWG-901 to a close and work out what to work on next.

8 years, 6 months

1
0
0 0

[ACTIVITY] 7-11 November 2016

by Diana Picus

== Progress == * Rewrite llvm-projs in Python [TCWG-833] [2/10] - Investigated clitest for testing the scripts - It seems to be a bit unwieldy for our purposes, so in the end it's probably a better idea to abuse Python's unittest module even for higher level tests (they'll be in a different directory though) * [ARM GlobalISel] Select add instructions [TCWG-925] [6/10] - Committed a patch upstream with all the plumbing necessary for enabling GlobalISel for ARM - Working towards selecting an add instruction on i32 types - currently have some naive support for lowering arguments and selecting return and copy instructions * Misc [2/10] - Meetings, mailing lists, buildbot monitoring - Python trainings == Plan == * [ARM GlobalISel] Select add instructions [TCWG-925] - Brush it up and send it upstream * Rewrite llvm-projs in Python [TCWG-833] - Start a discussion on the interface / repo layout etc

8 years, 6 months

1
0
0 0

[ACTIVITY] 07 Nov -- 11 Nov

by Yao Qi

# Progress # * TCWG-547. Change software_single_step interface to return a vector of address Patches are pushed in. Done. [1/10] * TCWG-923, Use regcache instead of frame in software_single_step. [3/10] Patches are finished. Tests are needed. * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10] Clean up val_print, remove one redundant parameter. Patches are committed. Deep diving in the gdb value objects. Much cleanup work should be done first. Ongoing. * More patches review, [2/10] ** C++ 11 patches, and learn C++ 11 in parallel, ** Review arm tracepoint patches. Insist that they (Ericsson) have to fix underlining bugs (intermittent fails) before getting patches in, ** Discuss on MIPS reconfigurable FP registers. Proposed two ways in public gdb mail list, MIPS people think the first one is a little better ** Hold Intel's fortran patch until a bug we found in gfortran is confirmed. # Plan # * TCWG-923, * Training from Tue to Friday. -- Yao Qi

8 years, 6 months

1
0
0 0

[ACTIVITY] Week 44

by Yvan Roux

o 1 day off (2/10) == Progress == o Linaro GCC/Validation (3/10) * ABE and validation jobs reviews * Binary tarballs size reduction: - testing patch * BZ #2575: - Investigate and open bug upstream (PR78201) - Testing current fix and investigating bugzilla feedbacks o Misc (3/10) * Various meetings and discussions. == Plan == o Continue on tarball size reduction and BZ

8 years, 6 months

1
0
0 0

[ACTIVITY] 2-4 November 2016

by Christophe Lyon

* short week (2 days off) == Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation - abe cleanup * GCC - reported a few regressions on trunk - "deprecated IT blocks" patch: rebased, trunk no longer ICEs when compiling spec2006. Benchmark results not stable enough yet - bug #2562. GCC behaviour wrt weak handling changed on arm/aarch64 between 4.9 and 5. Checking if it's intended. * misc (conf-calls, meetings, emails, ....) == Next == * (try to) handle backlog of GCC trunk regressions * ABE & Jenkins jobs patches reviews and bug fixes * backports/reviews * GCC: "deprecated IT blocks" patch

8 years, 6 months

1
0
0 0

[ACTIVITY] 31st Oct - 4 Nov 2016

by Prathamesh Kulkarni

== This Week == * ipa mod/ref analysis (2/10) - Prototype patch now detects modifications to reference parameters - Working on mod/ref analysis of global variables. * PR35691 (2/10) - Patch iterations based on upstream review * PR35503 (2/10) - Patch approved by Jason - Building kernel with patch resulted in two warnings. * Public Holidays (4/10) == Next Week == - IPA mod/ref prototype - Bugs

8 years, 6 months

1
0
0 0

[ACTIVITY] 31 Oct -- 04 Nov

by Peter Smith

-- Activity -- [TCWG-683] Branch to undefined weak on aarch64 and arm Fix in upstream review, looks pretty close to being accepted. [TCWG-828] TLS support for static linking In upstream review but no comments as yet [TCWG-829] IFunc support In upstream review, but will probably need to be rewritten after some upstream refactoring has finished [TCWG-911] eglibc requires a SHT_ARM_ATTRIBUTES section for dlopen to work I have a quick hack to work round this on my Chromebook but a full fix will take some time as lld doesn't understand build attributes right now. [TCWG-901] Investigate lld as a system linker With downstream fixes, using lld as the system linker on a Chromebook I can : - Build llvm, lld and run the regression tests successfully - Use lld as the linker in the lnt tests successfully - Using lld to build the shared objects used by lnt's python C extensions was less successful. I have some interesting debugging to do. -- Plan -- Debug the python extension problems Respond to upstream review comments More use of lld as system linker

8 years, 6 months

2
1
0 0

[ACTIVITY] 31 October - 4 November 2016

by Diana Picus

== Progress == * [ARM] Investigate switching from itineraries to schedule models [TCWG-824] [4/10] - Looked at the sched model as well as the old instruction itinerary interfaces - There aren't many tests that are specifically testing the scheduler, but lots of tests break if you make enough changes to it (it's unclear which of these are breaking intentionally and which are just poorly written) - First step is probably to try and complete the sched model (TCWG-543), then hunt down any differences between what we get using itineraries and what we get with the new model * Rewrite llvm-projs in Python [TCWG-833] [3/10] - Reorganized the repo so we can have a separate tests directory - Added support for parsing command line options - Almost ready for review * Misc [2/10] - Catching up after vacation - LLVM GitHub move survey == Plan == * Wrap up TCWG-833 * Migrate scripts to Python 3 (TCWG-896) * Maybe start TCWG-543 as the first step in TCWG-824

8 years, 6 months

1
0
0 0

[ACTIVITY] 31 Oct -- 04 Nov

by Yao Qi

# Progress # * TCWG-547, Change software_single_step interface to return a vector of address. [3/10] Patches are reviewed. V2 are posted and committed. Follow-up patches are being tested. * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [3/10] Clean up val_print, remove one redundant parameter. Patches are being tested. * Maintain upstream GDB, patches review, [2/10] * OpenOCD. [2/10] Various IRC chats with maintainer about ** multi-thread support in RTOS, and multi-thread debugging, ** Release 0.10.0 and aarch64 patches merging, ** Understand aarch64 OpenOCD reads DSPSR (32-bit), so don't have to update GDB target description now. * Short chat with Peter Griffin on thread ids in linux-kthread. # Plan # TCWG-547, TCWG-333. -- Yao Qi

8 years, 6 months

1
1
0 0

[ACTIVITY] 17-31 October 2016

by Christophe Lyon

* 4 days off == Progress == * Validation - patches & reviews (jenkins jobs, abe) - improving abe validation * GCC - reported a few regressions on trunk - "deprecated IT blocks" patch: rebased, trunk no longer ICEs when compiling spec2006. Benchmark results not stable enough yet * misc (conf-calls, meetings, emails, ....) == Next == * (try to) handle backlog of GCC trunk regressions * ABE & Jenkins jobs patches reviews and bug fixes * backports/reviews * GCC: "deprecated IT blocks" patch

8 years, 6 months

1
0
0 0

[ACTIVITY] 24 - 28 Oct

by Yao Qi

# Progress # * Fix GDBserver build on aarch64_be. [1/10] Done. Patch is pushed in to master and 7.12 branch. * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10] Get anther patch and fix all regressions. In the discussion with ppc64 and mips people on my approach. * TCWG-518, Range stepping in arm-linux. Done. [1/10] After pending for several months, patches are approved. Pushed them in! * Reproduce the GCC dwarf generation regression. [1/10] Reported to GCC and Jakub fixed it. * Sort out the license issue of new OCaml debugging support in gdb. Help to clarify a little bit. [1/10] * Discuss with OpenOCD people on supporting thread awareness for RTOS. [1/10] * Misc, meeting. [1/10] # Plan # * TCWG-333, TCWG-547 * Add new aarch64 target description for 64-bit xPSR. -- Yao Qi

8 years, 6 months

3
2
0 0

[ACTIVITY] Week 43

by Yvan Roux

o 2 days off (4/10) == Progress == o Linaro GCC/Validation (4/10) * ABE and validation jobs reviews * Investigating binary tarballs size reduction o Misc (2/10) * Various meetings and discussions. == Plan == o Continue on validation o Complete 4.9 branch merge

8 years, 6 months

1
0
0 0

[ACTIVITY] 24 - 28 Oct 2016

by Prathamesh Kulkarni

* TCWG-72 (2/10) - Committed to trunk finally! * ipa mod/ref analysis (6/10) - Prototype in progress based on Muchnik's text * Misc (2/10) - Committed a trivial patch to use VAR_P in arm.c. - Background reading on paper about virtual-ssa. - Meetings == Next Week == - Continue with mod/ref analysis - TCWG-319 - Ping patch for GCC PR35503.

8 years, 6 months

1
0
0 0

[ACTIVITY] 24 - 28 Oct

by Peter Smith

# Progress # TCWG-845 Static linking missing linker defined symbols - Now upstream TCWG-829 Support for ifunc - Patch sent upstream for review, no feedback yet. This is a bit messy as ARM is different to other architectures so I expect this to need reworking several times. TCWG-828 Static linking and TLS - Downstream patch implemented and tested, will send upstream after ifunc TCWG-683 Support for branches to undefined weak references - Downstream patch implemented and tested Other: - Downloaded and built Mozilla and Chromium so I can use them as performance tests for lld (initially for x86_64). - Wrote some scripts to make using lld in place of gnu ld a bit more convenient. # Plan # - Upstream static linking changes - Work some infrastructure to test lld more widely on ARM.

8 years, 6 months

1
0
0 0

[ACTIVITY] Week 42

by Yvan Roux

o 2 days off (4/10) == Progress == o Linaro GCC/Validation (4/10) * Completed GCC 5 and 6 branch merges * Released source 2016.10 snapshots o Upstream GCC (1/10) * Investigate PR #78020 (vzip, vuzp implementation). o Misc (1/10) * Various meetings and discussions. == Plan == o Two more days off o Back on 4.9 branch merge and validation.

8 years, 6 months

1
0
0 0

[ANNOUNCE] Linaro Binary Toolchain Release-Candidate GCC 6.2-2016.11-rc1

by Ryan Arnold

The Linaro Binary Toolchain ============================ The Linaro GCC 6.2-2016.11-rc1 Release-Candidate is now available. The GCC 6 Release series has significant changes from the GCC 5 release series. For an explanation of the changes please see the following website: https://gcc.gnu.org/gcc-6/changes.html For help in porting to GCC 6 please see the following explanation: https://gcc.gnu.org/gcc-6/porting_to.html Download release-candidate packages from: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11-rc1/ http://snapshots.linaro.org/components/toolchain/binaries/6.2-2016.11-rc1/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 6.2-2016.11-rc1 Linaro glibc 2.23 (linaro/2.23/master) https://www.sourceware.org/ml/libc-alpha/2016-08/msg00212.html Linaro newlib 2.4-2016.03 (linaro_2.4-branch) Linaro binutils 2.27 (linaro_binutils-2_27-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… Linaro GDB 7.12 (gdb-7.12-branch) https://sourceware.org/ml/gdb/2016-08/msg00000.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search NEWS for Linaro GCC 6.2-2016.11-rc1 ==================================== * The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2 and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes merged from FSF GCC 6.2. * Basic tuning support for the Qualcomm qdf24xx was added to the Linaro GCC 6.2-2016.10 snapshot and will appear in this release. * IFUNC was disabled for baremetal targets, as it was causing test-suite failures, and is presently a Linux only feature. * The gold linker was also added to this binary releases (for linux targets). * Backported malloc_lock fix into Linaro newlib 2.4. commit 022bd2995640626d9efb6a839884c5e1c7c5e133 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:11:50 2016 +0200 Re-enable malloc_lock for newlib-nano * Backported rawmemchr patch into Linaro newlib 2.4. commit 5357441171f2409fb759112bc6a00d3e672374d9 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:09:51 2016 +0200 Add rawmemchr * Backported strlen fix when using Thumb-2 and -Os -marm into Linaro newlib 2.4. commit f194ff4d5e1e304ac2a8d438d7abcbffd2dba757 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 14:05:23 2016 +0200 Fix strlen using Thumb-2 with -Os -marm * Backported fix for semihosting ARM when heapinfo not provided by debugger into Linaro newlib 2.4. commit bda499cb9d2b97075f74df9bfb38b23ff4d12ac2 Author: Christophe Lyon <christophe.lyon(a)linaro.org> Date: Wed Oct 19 13:59:52 2016 +0200 Fixed semihosting for ARM when heapinfo not provided by debugger. * Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23. * Added __ASSUME_REQUEUE_PI support to Linaro glibc 2.23 branch. commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Tue May 17 10:16:39 2016 -0300 Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463) * Added __ASSUME_SET_ROBUST_LIST support to Linaro glibc 2.23 branch. commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 19:01:10 2016 -0300 Remove __ASSUME_SET_ROBUST_LIST * Added __ASSUME_FUTEX_LOCK_PI support to Linaro glibc 2.23 branch. commit e48b4e7fed0de06dd7832ead48bea8ebc813a204 Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> Date: Mon May 16 10:35:25 2016 -0300 Remove __ASSUME_FUTEX_LOCK_PI * Merged latest FSF binutils-2_27-branch into linaro_binutils-2_27-branch. * Include GNU Linker fix. commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59 Author: Nick Clifton <nickc(a)redhat.com> Date: Tue Aug 23 09:45:11 2016 +0100 Fix seg-fault in ARM linker when trying to parse a binary file. * Copy the libwinpthread DLL into the bin directories so it gets into the tmp directory before tar is run. https://review.linaro.org/#/c/13723/ * Include GNU Assembler fix for PR 20364 commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd Author: Nick Clifton <nickc(a)redhat.com> Date: Fri Aug 5 10:37:57 2016 +0100 Fix the generation of alignment frags in code sections for AArch64. https://sourceware.org/bugzilla/show_bug.cgi?id=20364 * Performance related backports from Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC 6.1-2016.08, Linaro GCC 6.2-2016.09, and Linaro GCC 6.2-2016.10 have been included. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org -- Ryan S. Arnold | Linaro Toolchain Engineering Manager ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net

8 years, 6 months

1
0
0 0

[ACTIVITY] 17- 21 October 2016

by kugan

== Progress == LTO/IPA - Committed propagation of nonnull attribute and optimizations - Committed patch to infer noonull from ADDR_EXPR - Working on a patch to improve ipa-cp unary expressions pass through jump-function * LTO bootstrap is failing in streaming but normal bootstrap working * Looking into it == Next == - Commit pending patches - Start LTO benchmarking and analysis

8 years, 6 months

1
0
0 0

[ACTIVITY] 17- 21 October 2016

by Prathamesh Kulkarni

== This Week == * TCWG-72 (2/10) - Updated patch based on Jeff's suggestions. * Folding optimizations (2/10) a) PR53979 - fix committed to trunk b) PR71636 - fix committed to trunk * TCWG-665 (2/10) - Rebased patch and done few modifications - Trying to look for a better solution to workaround a memory leak issue with patch with -ffat-lto-objects * PR35503 (1/10) - Rebased patch on top of Marek's changes to c-common.c and pinged upstream. * Validation (1/10) - Added spec2k and spec2k6 to tcwg-buildapp - Fixed abe bug 1439 * Misc (2/10) - Reading up on mod/ref analysis. - Meetings == Next Week == - TCWG-72, TCWG-665, TCWG-125 - Look into changing user to "benchmark" for tcwg-buildapp job.

8 years, 6 months

1
0
0 0

[ACTIVITY] 17 - 21 Oct

by Peter Smith

== Progress == TCWG-610 ARM Exceptions support Now fully committed upstream. We should now have support for exceptions in Shared Objects and Executables. I've diagnosed problems when static linking after staring at a disassembly for most of a day. With some hacks I've managed to get a static link working using a recent Linaro sysroot. Next task is to resolve these in a more principled way. TCWG-845 Static linking missing linker defined symbols - lld doesn't use a built in linker script so we need to add in symbols that libc.a is expecting the default linker script to generate. - lld is defining __tls_get_addr as it expects all TLS to be relaxed, this isn't the case for ARM or Mips so we need to not define it. TCWG-829 Support for ifunc For some annoying reason that I can't work out why, ARM requires the R_ARM_IRELATIVE relocations to be in the .rel.dyn and not .rel.plt like all the other targets that lld supports including AArch64 TCWG-828 Static linking and TLS When static linking the TLS dynamic relocations in the .got must be resolved statically. - The other architectures that lld supports have the thread control block (tcb) after the data so the initial-exec relocations don't need to add the tcb size to the value put into the .got. - The module index dynamic relocation needs to be 1 and not 0 (LLD assumes general dynamic is relaxed away at static link-time). TCWG-683 Support for branches to undefined weak references LLD doesn't resolve these to the next instruction so they just hang at runtime. Some feedback and review for Linaro LLVM team processes. == Plans == Work out a proper solution for TCWG-828 then start upstreaming. TCWG-683 can be worked around by providing an empty definition of the function, all the others need to be fixed to get a static libc to link.

8 years, 6 months

1
0
0 0

[ACTIVITY] 17 - 21 Oct

by Yao Qi

# Progress # * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10] Get review comments and suggestions. Tried to do what they suggested, but it doesn't work well due to some reasons. Preparing the the reply to address their comments. * TCWG-416, Improve GDB performance in remote debugging. [2/10] Patches for ARM and AArch64 are ready. Need to measure the performance improvement. * OpenOCD. [2/10] Chat with people working on AArch64 support on irc. Help him understanding GDB and GDB remote protocol. Patches are there, but need to figure out how to help to get these patches merged. * Misc, [2/10] Meeting, and various discussions. # Plan # * Continue all above. -- Yao Qi

8 years, 6 months

1
0
0 0

[ANNOUNCE] Linaro GCC 5 and 6 2016.10 snapshots

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2016.10 snapshot of both Linaro GCC 5 and Linaro GCC 6 source packages. Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.1+svn241214 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2016.11 stable[2] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 6.2+svn241214 * Backport of [Bugfix] PR libgcc/77519: Correct libgcc complex multiply excess precision handling * Backport of [Bugfix] PR target/63250: Enable HCmode multiply and divide (mulhc3/divhc3) * Backport of [AArch32/AArch64] Add qdf24xx base tuning support * Backport of [AArch32] [ARMv8.2] 1/17 Add ARMv8.2-A command line option and profile * Backport of [AArch32] [ARMv8.2] 2/17 [testsuite] Add a selector for ARM FP16 alternative format support. * Backport of [AArch32] [ARMv8.2] 3/17 [testsuite] Add ARM support for ARMv8.2-A with FP16 arithmetic instructions * Backport of [AArch32] [ARMv8.2] 4/17 Define feature macros for FP16 * Backport of [AArch32] [ARMv8.2] 5/17 Enable HI mode moves for floating point values * Backport of [AArch32] [ARMv8.2] 6/17 Add data processing intrinsics for float16_t * Backport of [AArch32] [ARMv8.2] 7/17 Add FP16 data movement instructions * Backport of [AArch32] [ARMv8.2] 8/17 Add VFP FP16 arithmetic instructions * Backport of [AArch32] [ARMv8.2] 9/17 Add NEON FP16 arithmetic instructions * Backport of [AArch32] [ARMv8.2] 10/17 Refactor support code for NEON builtins * Backport of [AArch32] [ARMv8.2] 11/17 Add builtins for VFP FP16 intrinsics * Backport of [AArch32] [ARMv8.2] 12/17 Add builtins for NEON FP16 intrinsics * Backport of [AArch32] [ARMv8.2] 13/17 Add VFP FP16 instrinsics * Backport of [AArch32] [ARMv8.2] 14/17 Add NEON FP16 instrinsics * Backport of [AArch32] [ARMv8.2] 15/17 Add tests for ARMv8.2-A FP16 support * Backport of [AArch32] [ARMv8.2] 16/17 Add tests for VFP FP16 ACLE instrinsics * Backport of [AArch32] [ARMv8.2] 17/17 Add tests for NEON FP16 ACLE intrinsics * Backport of [AArch32] [ARMv8.2] Delete one redundant word in target-supports.exp comment * Backport of [AArch32] [ARMv8.2] Enable mov[hsd]i_movw tests on ARM and big endian * Backport of [AArch32] [ARMv8.2] Fix invalid instructions generated for data movement. * Backport of [AArch32] [ARMv8.2] Fix invalid instructions generated for data movement. * Backport of [AArch32] [ARMv8.2] Fix new constraints and attributes of SI/HI data movement patterns * Backport of [AArch32] [ARMv8-M] Add support for ARMv8-M * Backport of [AArch32] [ARMv8-M] Add support for CB(N)Z and (U|S)DIV to ARMv8-M Baseline * Backport of [AArch32] [ARMv8-M] Add support for MOVT/MOVW to ARMv8-M Baseline * Backport of [AArch32] [ARMv8-M] Check CLZ availability with ISA support and architecture level macros * Backport of [AArch32] [ARMv8-M] Enable atomics for ARMv8-M Mainline * Backport of [AArch32] [ARMv8-M] Factor out MOVW/MOVT availability and desirability checks * Backport of [AArch32] [ARMv8-M] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M * Backport of [AArch32] [ARMv8-M] Fix pr42574.c selector syntax error * Backport of [AArch32] [ARMv8-M] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions * Backport of [AArch32] Fix RTL checking failure in Thumb mode * Backport of [AArch64] Add __artificial__ attribute to Aarch64 NEON intrinsics * Backport of [AArch64] Add missing attributes to arm_neon.h * Backport of [AArch64] Add more NEON intrinsics vmaxnm_f64, vminnm_f64, vmax_f64, vmin_f64 * Backport of [AArch64] Add tunning of ldpw for THunderX * Backport of [AArch64] Fix __builtin_aarch64_fmindf * Backport of [AArch64] [ARMv8.2] 1/4 ARMv8.2-A FP16 testsuite selector * Backport of [AArch64] [ARMv8.2] 2/4 ARMv8.2-A testsuite for new data movement intrinsics * Backport of [AArch64] [ARMv8.2] 3/4 ARMv8.2-A testsuite for new vector intrinsics * Backport of [AArch64] [ARMv8.2] 4/4 ARMv8.2-A testsuite for new scalar intrinsics * Backport of [Misc] Allow simple register subregs in noce_convert_multiple_sets * Backport of [Misc] Fix native_encode_real for HFmode constants * Backport of [Misc] Modify extend_mask to extend bits based on signop * Backport of [Testsuite] [AArch32] Fix prototype in vst1Q_laneu64-1.c * Backport of [Testsuite] [AArch32] neon-testgen.ml removal * Backport of [Cleanup] Fix typo in comment in tree-ssa-strlen.c Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn241215 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2016.11 maintenance release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2016.10/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 5.4+svn241215 Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed. [2]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed.

8 years, 6 months

1
0
0 0

Patch for ABE on Power Macintosh.

by Jens Bauer

Hi all. I've incorrectly reported a build failure in the support system. <https://support.linaro.org/hc/en-us/requests/1876> -But I'm posting a copy to this list, in order to follow Victor's advice. I've suggested a couple of changes, which makes ABE a little more compatible. Though I can still not build the toolchain on my PowerBook G4, I think that my two modifications might ease building on Intel based Macs and perhaps other architectures in addition. In short: * Use getconf instead of /proc/cpuinfo (you're already using getconf in configure.ac). * By default use twice as many cores for -jN as usual. (If you have 2 cores, use -j4) * Change the architecture from 'Power Macintosh' (which contains an offending space) to 'powerpc'. ...And here's "configure.ac.patch": ---8<-----8<-----8<----- diff --git a/configure.ac b/configure.ac index 1bf3593..8cc4986 100644 --- a/configure.ac +++ b/configure.ac @@ -49,9 +49,10 @@ AC_SUBST(DBPASSWD) DBHOST=${dbhost} AC_SUBST(DBHOST) -CPUS="`grep -c proces /proc/cpuinfo`" + +let CPUS=2*`getconf _NPROCESSORS_ONLN` AC_SUBST(CPUS) -CORES="`grep cores /proc/cpuinfo | tail -1 | cut -d ' ' -f 3`" +#CORES="`grep cores /proc/cpuinfo | tail -1 | cut -d ' ' -f 3`" AC_SUBST(CORES) LIBC="`getconf GNU_LIBC_VERSION`" AC_SUBST(LIBC) @@ -59,6 +60,7 @@ KERNEL="`uname -r`" AC_SUBST(KERNEL) BUILDHOST="`${srcdir}/config.guess`" BUILD_ARCH="`uname -m`" +[[ "`uname -s`" == "Darwin" ]] && BUILD_ARCH="`uname -p`" AC_SUBST(BUILD_ARCH) AC_SUBST(BUILDHOST) HOSTNAME="`uname -n`" --->8----->8----->8----- Apart from that, I'd like to report a successful build on Cubieboard2 running Armbian. I built for the aarch64 architecture, and I'm currently attempting to build Armbian for beelink GT1 using the new shiny Linaro toolchain. :) ...and what a pleasure, there's no fan-noise when building on the Cubieboard2! Love Jens

8 years, 6 months

2
4
0 0

Patch for ABE on RHEL

by Scott Telford

Just been trying to build the Linaro toolchain from source on RHEL 6.5. The ABE configure script fails to detect the packaging system on RHEL as it looks like RPM will only be detected if it's running on a Fedora system. This patch will instead detect RPM if the rpm binary is available (and it's not Debian/Ubuntu), like the test for Arch/pacman. diff --git a/configure b/configure index 42f787e..52ddd42 100755 --- a/configure +++ b/configure @@ -3639,7 +3639,6 @@ fi # Figure out which packaging system is in use. Since it's possible to # install both on a system. -rpm="`uname -a | grep -ic '\.fc[0-9].\.'`" deb="`uname -a | grep -ic 'ubuntu'`" deb=$(($deb + `uname -a | grep -ic 'debian'`)) @@ -3672,7 +3671,9 @@ $as_echo "yes" >&6; } ### RPM Packages ### else -if test ${rpm} -eq 1; then +rpm="`which rpm 2> /dev/null`" +result=$? +if test ${result} -eq 0; then packages="${packages} ncurses-devel python-devel" for i in ${packages}; do { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $i is installed" > Regards, Scott.

8 years, 6 months

2
2
0 0

Sanitiser 48-VMA Support

by Renato Golin

Hi Christophe, Here are the commits, in order, that Adhemerval did to support 48-bit VMA on AArch64. r275792: [asan] Enable 48-bit VMA support on aarch64 r277137: tsan: Enable 48-bit VMA support on aarch64 r279752: msan: Enable 48-bit VMA support on aarch64 r279753: dfsan: Enable 48-bit VMA support on aarch64 Currently, all sanitiser tests pass on Ubuntu Xenial on the LLVM side. cheers, --renato

8 years, 6 months

2
1
0 0

[ACTIVITY] 10 - 14 October 2016

by kugan

== Progress == LTO/IPA - Committed ipa-vrp and early-vrp improvements - Patches for propagation of nonnull and optimization are accepted; Will commit after testing (once again) - Noticed some improvements but full benchmarking not yet done - Setting up the benchmarking infrastructure == Next == - Commit pending patches - Start LTO benchmarking and analysis

8 years, 6 months

1
0
0 0

[ACTIVITY] Week 41

by Yvan Roux

== Progress == o Linaro GCC/Validation (7/10) - Completed backports for monthly snapshots (dependency tracking). - Prepared branch merges for branches 5 and 6 - ABE reviews - New jenkins job to compare toolchains (goal is to use it for development and to refactor current jobs). o Misc (3/10) * Various meetings and discussions. == Plan == o Release 2016.10 snapshots o On Vacation from Thu 20th to Tue. 24th.

8 years, 6 months

1
0
0 0

[ACTIVITY] 10 - 14 October 2016

by Prathamesh Kulkarni

== This Week == * TCWG-72 (3/10) - Committed patch to remove optab functions for [us]divmod_optab after Bernd's approval. - My assumption that __udivmoddi4 is generically available is perhaps wrong, call to __udivmoddi4 generates undefined reference error on aarch64-linux-gnu. To be safe, I dropped generating call to __udivmoddi4. - Patch posted upstream * TCWG-834 / PR71636 (1/10): - Patch posted upstream. * Misc (2/10) - PR35503: Changes to C++FE approved by Jason, waiting for approval to C, C-family changes. - Posted patch upstream to add reverse keyword to genmatch - Posted patch for abe bug 1439 - Meetings * Public Holidays (4/10) == Next Week == - TCWG-72, TCWG-665, TCWG-319 - Add support to tcwg-buildapp for SPEC2000 and SPEC2006.

8 years, 7 months

1
0
0 0

[ACTIVITY] 10 - 14 October 2016

by Diana Picus

== Progress == * Test GlobalISel on AArch64 Linux [TCWG-825] - Got the existing tests to work on Linux - luckily this only required changes to the tests and not to GlobalISel itself; committed these changes upstream - Ran the test-suite with GlobalISel and with the fallback to the old DAG ISel enabled; only 57 object files can be compiled with GlobalISel only, the others need the fallback to the old ISel; also, there are crashes in over 500 of the tests * Rewrite llvm-projs in Python [TCWG-833] - Rewrote the core functionality of the script and added tests - Still have to implement the command line interface * Handle special cases in AArch64InstrInfo::GetInstSizeInBytes [TCWG-757] - Committed upstream * [AArch64] CMP + label arithmetic not supported [TCWG-710] - Committed upstream * Misc - Upstream code review - Linaro annual performance review - Had a quick look at a hanging check-all in one of the AArch64 buildbots; I identified the hanging test as one of the TSAN tests, but I didn't manage to reproduce the issue locally (since the tests run in parallel, it's possible that there's a subtle interaction between them); I've seen other buildbots (PowerPC) similarly hanging every now and then, but I'm not sure it's the same issue; will keep an eye on it though. == Plan == * 2 weeks off

8 years, 7 months

1
0
0 0

[ACTIVITY] 10-14 October 2016

by Christophe Lyon

== Progress == * Validation - patches & reviews (jenkins jobs, abe) - collected various ideas for improvements and cleanup * Releases - backports reviews * GCC - reported a few regressions on trunk - "deprecated IT blocks" patch: rebased, but trunk ICEs when compiling spec2006 * Binutils - backported linker fix (PR 20608) to 2.27 branch * misc (conf-calls, meetings, emails, ....) == Next == * (try to) handle backlog of GCC trunk regressions * ABE patches reviews and bug fixes * backports/reviews * GCC: "deprecated IT blocks" patch

8 years, 7 months

1
0
0 0

[ACTIVITY] 10 - 14 October 2016

by Yao Qi

# Progress # * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10] Finish the patch, tested it on arm and ppc64. Post patches for review. * TCWG-556, aarch32 GDB buildbot slave. In progress. [1/10] Sergio needs to adjust buildbot setting to customize my buildslave. * TCWG-547, [2/10] Ping the patch series, and commit some obvious ones. * Misc, [3/10] ** Ask two people about using OpenOCD with AArch64 board. ** Review kernel patch to fix kernel limitation of byte address select. Patches look good, but GDB needs to detect that such limitation is removed. ** Read "C++ Primer". Need more knowledge on C++. # Plan # * Other thing on OpenOCD, * TCWG-167, TCWG-416, -- Yao Qi

8 years, 7 months

1
0
0 0

[ACTIVITY] 19 September-7 October 2016

by Christophe Lyon

* 3 days off * Connect week == Progress == * Validation - patch reviews (jenkins jobs, abe) * GCC - reported a few regressions on trunk, helped validating fixes - ran benchmarks with "deprecated IT blocks" patch. A few regressions, need to reproduce on other HW * Binutils - fixed https://sourceware.org/bugzilla/show_bug.cgi?id=20608 "Relocation truncated to fit: R_ARM_THM_JUMP24 for relocation to PLT entry" - requested backport approval for branches 2.26 and 2.27, but no answer so far * misc (conf-calls, meetings, emails, ....) == Next == * (try to) handle backlog of GCC trunk regressions * ABE patches reviews and bug fixes * backports/reviews * GCC: run benchmarks on other HW

8 years, 7 months

1
0
0 0

[ACTIVITY] Week 40

by Yvan Roux

o Two days off post-connect (4/10) == Progress == o Linaro GCC/Validation (3/10) - Restart work on 4.9.4 branch merge. - Restart backport activity. - Investigate binary release size issue (Lin. bug #2544) o Misc (3/10) * Various meetings and discussions. * Reviewing release tools branch == Plan == o Continue on-going tasks (backports, 4.9.4 merge, release tools) o ABE bugzillas

8 years, 7 months

1
0
0 0

[ACTIVITY] 3 - 7 October 2016

by Prathamesh Kulkarni

== This Week == * TCWG-807 (2/10) - Upstream patch iterations with Honza and Martin. - Committed to trunk as r240898. * TCWG-779 (1/10) - Changed %Z specifier to take int*, unsigned len args instead of vec<int> for easier format checking. - Committed diagnostic.c and diagnostic-core.h changes. - Waiting for approval for other parts of the patch. * Misc (1/10) - Committed patch to fix typo in bits propagation - Committed patch for freeing m_vr and bits in ipcp_transform_function * Holidays (6/10) == Next Week == - Abe bug 1439 - Extend tcwg-buildapp to include SPEC2000 - Address reviews for TCWG-779 - Look at checked exceptions nothrow propagation. - TCWG-319

8 years, 7 months

1
0
0 0

[ACTIVITY] 3 - 7 October 2016

by Peter Smith

== Activity == - AFDS and AFDS review comments LLD: - Have nudged the ARM exceptions story in lld along a bit, I've had one patch accepted, but not the most important one. - Updated the Linaro TCWG jira issues post Connect - Worked on static linking and ifunc support. I have managed to get ifunc working for dynamic linking and static linking working for an old ARM only sysroot. The latest Linaro linux-gnueabi-hf sadly segfaults in __libc_init_first -> __ctype_init, with what looks like stack corruption of the return address. I at least have a good idea of what needs to be done to make static linking work. Other LLVM: Some upstream review comments for ILP32 support and others. == Plans == On holiday all week. Will attempt to continue upstreaming lld work that I already have patches and tests for.

8 years, 7 months

1
0
0 0

[ACTIVITY] 3 - 7 October 2016

by Yao Qi

# Progress # * TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [3/10] Recall some discussions on it in GNU Cauldron, and dig into GDB source. Unfortunately, GDB decides to track function address rather than function pointer in 2001, which makes harder to fix it. Still thinking about it. * TCWG-556, aarch32 GDB buildbot slave. [2/10] Build GDB and test cases in arm on an aarch64 machine. There are 1000+ test fails, but not triaged yet. Discussed upstream on how to set up buildbot slave with special configuration option and test board file. Ongoing. * TCWG-685, GDB 7.12 release, and patches review. [1/10]. All blocking issues are gone. 7.12 should be released soon. * Clean up arm xml files. Done. [3/10] * Misc, meetings. [1/10] # Plan # * TCWG-333, TCWG-556. * As 7.12 goes out, ping my pending patches on TCWG-518, and TCWG-547 -- Yao Qi

8 years, 7 months

1
0
0 0

[ACTIVITY] 3 - 7 October 2016

by Diana Picus

== Progress == * [Lab] ASAN test fails with glibc 2.23 [TCWG-811] - Recommitted upstream after discussing with Adhemerval at Connect (thanks, Adhemerval) - The bot is now upstream * Add worktree module to tcwg-release-tools [TCWG-783] - In review. Trying to use it in our llvm-projs helper script * Investigate buildbot failure on clang-native-arm-lnt [TCWG-832] - Found and reverted the offending patch - Ran a pre-commit test on the second version of the patch * [Lab] Xenial Stage1 test failure: std::length_error [TCWG-821] - Couldn't use gdb on this, so I had to manually find the call that throws the exception; the code seems to be doing the right thing, and in addition selfhosting works, so we're suspecting either some undefined behaviour or a bug in the g++ toolchain on the bot - Neither ubsan nor clang-tidy had much to complain about the code, so this will require more investigation * Misc - Upstream code reviews, meetings etc == Plan == * [Lab] Xenial Stage1 test failure: std::length_error [TCWG-821] * [ARM] Switch from itineraries to schedule models [TCWG-824]

8 years, 7 months

1
0
0 0

[ANNOUNCE] Linaro Binary Toolchain Release GCC 6.1-2016.08

by Ryan Arnold

The Linaro Binary Toolchain ============================ The Linaro GCC 6.1-2016.08 Release is now available. The GCC 6 Release series has significant changes from the GCC 5 release series. For an explanation of the changes please see the following website: https://gcc.gnu.org/gcc-6/changes.html For help in porting to GCC 6 please see the following explanation: https://gcc.gnu.org/gcc-6/porting_to.html Download release packages from: http://releases.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/ http://releases.linaro.org/components/toolchain/binaries/6.1-2016.08/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 6.1-2016.08 http://releases.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/ FSF glibc 2.23 (linaro/2.23) https://www.sourceware.org/ml/libc-alpha/2016-08/msg00212.html Linaro newlib 2.4.0-2016.03 (linaro-2.4-branch) Linaro binutils 2.27 (linaro_binutils-2_27-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… FSF GDB 7.11 (binutils-gdb.git~gdb-7.11-branch) https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00010.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search NEWS for Linaro GCC 6.1-2016.08 ================================ * Include GNU Linker fix. commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59 Author: Nick Clifton <nickc(a)redhat.com> Date: Tue Aug 23 09:45:11 2016 +0100 Fix seg-fault in ARM linker when trying to parse a binary file. * Copy the libwinpthread DLL into the bin directories so it gets into the tmp directory before tar is run. https://review.linaro.org/#/c/13723/ * Include GNU Assembler fix for PR 20364 commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd Author: Nick Clifton <nickc(a)redhat.com> Date: Fri Aug 5 10:37:57 2016 +0100 Fix the generation of alignment frags in code sections for AArch64. https://sourceware.org/bugzilla/show_bug.cgi?id=20364 * Performance related backports from Linaro GCC 6.1-2016.06, and Linaro GCC 6.1-2016.07 have been included. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Ryan S. Arnold | Linaro Toolchain Engineering Manager ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net

8 years, 7 months

1
0
0 0

[ACTIVITY] 19 - 23 September 2016

by Diana Picus

== Progress == * [Lab] ASAN test fails with glibc 2.23 [TCWG-811] [4/10] - This issue is keeping us from moving one of the TK1 bots into production - Committed a patch upstream, but it broke on an x86_64 bot when compiling with -m32 - I tracked the problem to the wrong glibc function being used when -fsanitize=address is provided on the command line - Reported the problem on the mailing list * Add worktree module to tcwg-release-tools [TCWG-783] [4/10] - Made good progress on this, should be ready for review soon * Misc [2/10] - Code reviews, preparing for Connect

8 years, 7 months

1
0
0 0

[Activity] 19-23 September 2016

by Peter Smith

== Activity == Exceptions. Another attempt at ARM exceptions support. I did get some more fine grained comments back which have been addressed, but no approval to commit yet. Some follow up over whether ld -r support for merging output sections is necessary, answer seems to be yes as kernel modules depend on it. I've volunteered to post a simpler patch without ld -r support as this is a very niche use case. Not had any feedback yet so will just post it next week. TLS Fixed TLS support in lld so that it does not attempt to follow lld's generic relaxation model, which can't be implemented in ARM. Still some work to do for static linking. == Next Week == Out of office at Linaro Connect in Las Vegas == Planned Absences == Holiday 10th to 14th October

8 years, 7 months

1
0
0 0

[Activity] 19-23 September 2016

by Yao Qi

* Two days off [4/10] # Progress # * TCWG-685, GDB 7.12 release. [2/10] Patch "keep RES0 bits in CPSR" is pushed into mainline and 7.12. Find a GDBserver bug, and open PR 20627. It is target independent, but may block the release. :( * TCWG-518, Range stepping in ARM. [3/10] Regression test is done. Find some other issues exposed by my patches, and fix them. Need to post patches upstream for review. * Misc [1/10] Close gdbserver in mi_gdb_exit. The bug breaks the aarch64 multi-arch testing. Patch is pushed in. File expense for GNU Cauldron travel. # Plan # * Linaro Connect. -- Yao Qi

8 years, 7 months

1
0
0 0

AArch64: Disabling conditional execution

by Fernando Endo

Hello, I'm using Linaro GCC 4.9-2015.01-3 for AArch64, and trying to disable the generation of guarded instructions. More specifically, I'd like not to see instructions such as 'cset', 'csinc', 'ccmp', 'fccmp', etc. So far, it seemed that the flag '-fno-if-conversion2' could do the job, but I still see those instructions in my disassembled program functions (I guess that it may not be possible to remove them from standard libs). My command line: aarch64-linux-gnu-gcc -static -march=armv8-a -O3 -fno-strict-aliasing -fno-if-conversion2 I also tried '-fno-if-conversion' and both '-fno-if-conversion -fno-if-conversion2' without success. Regards, -- Fernando A. Endo, Post-doc INRIA Rennes-Bretagne Atlantique France

8 years, 7 months

2
2
0 0

[ACTIVITY] Week 37

by Yvan Roux

o Travel from Cauldron (2/10) o One day off (2/10) == Progress == o Linaro GCC/Validation (7/10) - Started backports for 2016.10 - Investigating 4.9.4 branch marge validation issues - Extended validation monitoring, tried to reproduce an OOM issue. o Misc (3/10) * Various meetings and discussions. * Connect preparation == Plan == o Tuesday off o Continue on-going tasks and travel to LAS16

8 years, 7 months

1
0
0 0

[ACTIVITY] 12-16 September 2016

by Christophe Lyon

== Progress == * Validation - patch reviews (Jenkins jobs, abe) * GCC - reported a few regressions on trunk - looked at making reporting scripts more robust at handling DejaGnu errors that could otherwise be un-noticed * Binutils - backported a fix from trunk to linaro-2.27 branch, to close bug 2518 (linker SEGV) - investigating https://sourceware.org/bugzilla/show_bug.cgi?id=20608 "Relocation truncated to fit: R_ARM_THM_JUMP24 for relocation to PLT entry" * misc (conf-calls, meetings, emails, ....) - Connect preparation == Next == - monitor GCC trunk regressions - release scripts/abe - backports/reviews - Binutils bug 20608

8 years, 7 months

1
0
0 0

[ACTIVITY] 5-11 September 2016

by Christophe Lyon

== Progress == * Validation - patch reviews (Jenkins jobs, abe) - helped on release infra/scripts * GNU Cauldron - useful discussion with several maintainers * GCC - progress on PR 67591 (ARM v8 Thumb IT blocks deprecated) First patch posted, I will need benchmark results. * misc (conf-calls, meetings, emails, ....)

8 years, 7 months

1
0
0 0

[ACTIVITY] 12 - 16 Sep 2016

by kugan

== Progress == - Connect slides - Return jump function - working on prototype - Revised and posted early-vrp - Revised and posted patch for PR72835 == Next == - Work on IPA/LTO improvements - Wrap-up connect slides - Follow up on pending patches

8 years, 7 months

1
0
0 0

[ACTIVITY] 12 - 16 Sep 2016

by Prathamesh Kulkarni

== This Week == * TCWG-807 (4/10) - Wrote patch for extending ipa-bits-cp with pointer alignment propagation, * TCWG-779 (2/10) - Removed obstack for fmt building and added %I to pp_format for printing vec<int> - Posted patch upstream for feedback * TCWG-319 (1/10) - Tried random hacks to lib/target-supports.exp, none of which worked :( * TCWG-72 (1/10) - Upstream discussion about optab_libfunc() issue with Richard Sandiford and Richi * Misc (2/10) - Travel from Cauldron - Meetings - Lava job #1118698 failed with infrastructure error: "Unable to download", restarted as #1123350 == Next Week == - Prepare slides for connect - Continue ongoing tasks

8 years, 7 months

1
0
0 0

[Activity] 12-16 September 2016

by Diana Picus

== Progress == * [AArch64] Support for label arithmetic in the assembler [TCWG-710] - 2 patches in upstream review * Handle special cases in AArch64InstrInfo::GetInstSizeInBytes [TCWG-757] - Committed a patch for stackmap / patchpoint sizes - Since this was a bit cumbersome to test otherwise, I had to add unit tests for it, which took a bit of CMake plumbing because these are the first target-specific unit tests in LLVM * Add worktree module to tcwg-release-tools [TCWG-783] - Started working on it * Misc - Helped test/setup the new TK1 buildbots == Plan == * Add worktree module to tcwg-release-tools [TCWG-783] * Help get the TK1 buildbots into a stable state * Ping upstream patches

8 years, 8 months

1
0
0 0

[Activity] 05th - 16th Sep.

by Yao Qi

* Off on Mon and Tue. [4/20] # Progress # * Range stepping in ARM. TCWG-518 [5/20] The thread starvation is fixed by randomly selecting pending events among threads. Being regression tested. * GDB 7.12 release. TCWG-685. [4/20] Due to the recent kernel change, single step in GDBserver stops working, because new kernel becomes sensitive on writing RES0 bits in CPSR. Fixed in GDB side. * GNU Cauldron. [7/20] Discussed with GDB people on the projects we are working on. Got some agreement on the general direction of some projects. Discussed with the possible GDB changes to handle variable length registers, such as SVE. Agreed to move ptrace-test from sourceware to kernel tree. Sync on 7.12 release. Discussed on AArch64 TLS var debug information, looks it is less complex than expected. # Plan # * Off on Mon and Tue. * TCWG-685, TCWG-518 * Prepare for the US travel. -- Yao Qi

8 years, 8 months

1
0
0 0

[Activity] 12 - 16 September

by Peter Smith

== Activity == Exceptions support in LLD; 3rd try at an implementation that will be accepted upstream. Now implementation complete and passing my existing tests but needs some more cases checked. Helped track down an intermittent build bot failure to an ld stub generation problem Some upstream patch review == Next Week == Add more test cases and send exceptions support upstream Use some of the Cauldron slides to replace existing LLD ones in the Connect presentation. == Planned Absences == Holiday 10th - 14th October

8 years, 8 months

1
0
0 0

[ANNOUNCE] Linaro Binary Toolchain Release-Candidate GCC 6.1-2016.08-rc2

by Ryan Arnold

The Linaro Binary Toolchain ============================ The Linaro GCC 6.1-2016.08-rc2 Release-Candidate is now available. The GCC 6 Release series has significant changes from the GCC 5 release series. For an explanation of the changes please see the following website: https://gcc.gnu.org/gcc-6/changes.html For help in porting to GCC 6 please see the following explanation: https://gcc.gnu.org/gcc-6/porting_to.html Download release-candidate packages from: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08-rc2/ http://snapshots.linaro.org/components/toolchain/binaries/6.1-2016.08-rc2/ Previous snapshots and release-candidates are at: http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases are at: http://releases.linaro.org/components/toolchain/binaries/ Host Requirements ================== Linaro officially supports the current and previous Ubuntu LTS releases (as of the time of this release). This does not mean that the toolchain will not work on other/older Linux distributions. See the following for the life-time of Ubuntu LTS releases. https://wiki.ubuntu.com/Releases The host system upon which the cross-compiler will run requires a minimum of glibc 2.14, because of API changes to glibc's memcpy API. https://bugs.linaro.org/show_bug.cgi?id=1869 Package Versions ================= Linaro GCC 6.1-2016.08-rc2 http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08-rc2/ FSF glibc 2.23 (linaro/2.23) https://www.sourceware.org/ml/libc-alpha/2016-08/msg00212.html Linaro newlib 2.4.0-2016.03 (linaro-2.4-branch) Linaro binutils 2.27 (linaro_binutils-2_27-branch) https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin… FSF GDB 7.11 (binutils-gdb.git~gdb-7.11-branch) https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00010.html Linaro toolchain package git branches are hosted at: http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search NEWS for Linaro GCC 6.1-2016.08-rc2 ==================================== * Copy the libwinpthread DLL into the bin directories so it gets into the tmp directory before tar is run. https://review.linaro.org/#/c/13723/ * Include GNU Assembler fix for PR 20364 commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd Author: Nick Clifton <nickc(a)redhat.com> Date: Fri Aug 5 10:37:57 2016 +0100 Fix the generation of alignment frags in code sections for AArch64. https://sourceware.org/bugzilla/show_bug.cgi?id=20364 * Performance related backports from Linaro GCC 6.1-2016.06, and Linaro GCC 6.1-2016.07 have been included. See the following Linaro GCC snapshots: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/ http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/ Contact Linaro =============== File bugs at http://bugs.linaro.org For Linaro member support see http://support.linaro.org For Linaro community support email linaro-toolchain(a)lists.linaro.org -- Ryan S. Arnold | Linaro Toolchain Engineering Manager ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net

8 years, 8 months

1
0
0 0

Heads-up: big.LITTLE and cache flushing

by Riku Voipio

Hi, As painfully found out by mono team, if big/little cores have different cache line sizes, __clear_cache doesn't work as expected. This affects any home-grown cache flushing mechanism as well. http://www.mono-project.com/news/2016/09/12/arm64-icache/ protip, if you suspect your application issues might related to big.LITTLE, use taskset(1) or hwloc-bind(1) to tie the process to either big or little cluster (or just a single core).

8 years, 8 months

2
1
0 0

[Activity] 5 - 8 Sept 2016

by Peter Smith

== Progress == - Still trying to get support for .ARM.exidx into upstream LLD, looks like more changes are needed by the owners, but I think I should be able to get this by the next report. - LLVM Cauldron on Thursday. Trip report sent separately - Holiday on Friday == Next week == Planned: - ARM Exceptions support in lld - Further lld porting work

8 years, 8 months

1
0
0 0

[ACTIVITY] 5-9 Sept 2016

by kugan

== Progress == - Connect slides - Analyzed IPA-VRP performance for slides - Started working on return jump function - Reading C++ ABI and other documents referred in Honza's blog to understand the C++ related issues in IPA/LTO = Next == - Work on IPA/LTO improvements - Benchmarking - Follow up on pending patches

8 years, 8 months

1
0
0 0

[ANNOUNCE] Linaro GCC 6 2016.09 snapshot

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2016.09 snapshot of the Linaro GCC 6 source package. This monthly snapshot[1] is based on FSF GCC 6.2+svn239654 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2016.11 stable[2] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/ Interesting changes in this GCC source package snapshot include: * Backport of [Bugfix] [AArch32] PR target/53440 Handle generic thunks better for TARGET_32BIT * Backport of [Bugfix] [AArch32] PR target/59833 ARM soft-float extendsfdf2 fails to quiet signaling NaN * Backport of [Bugfix] [AArch32] PR target/70473 Reduce size of Cortex-A8 automaton * Backport of [Bugfix] [AArch32] PR target/71061 length pop* pattern in epilogue correctly * Backport of [Bugfix] [AArch32] PR target/77281 Fix an invalid check for vectors of the same floating-point constants. * Backport of [Bugfix] [AArch64] PR 64971 Convert function pointer to Pmode when emit call. * Backport of [Bugfix] [AArch64] PR 70904 Relax the restriction on subreg reload for wide mode * Backport of [Bugfix] [AArch64] PR target/63596 Honor tree-stdarg analysis result to improve VAARG codegen * Backport of [Bugfix] [AArch64] PR target/63874 vtable address generation goes through memory * Backport of [Bugfix] PR 70751 Correct the cost for spilling non-pseudo into memory * Backport of [Bugfix] PR 77421 Redundant second assignment of bb_copy = NULL in free_original_copy_tables * Backport of [Bugfix] PR middle-end/37780 Conditional expression with __builtin_clz() should be optimized out * Backport of [Bugfix] PR middle-end/68217 Wrong constant folding * Backport of [Bugfix] PR middle-end/71700 zero-extend sub-word value when widening constructor element * Backport of [Bugfix] PR rtl-optimization/66940 Avoid signed overflow in noce_get_alt_condition * Backport of [Bugfix] PR rtl-optimization/71150 Guard in_class_p with REG_P check * Backport of [Bugfix] PR rtl-optimization/71295 * Backport of [Bugfix] PR rtl-optimization/71594 ICE in noce_emit_cmove due to mismatched source modes * Backport of [Bugfix] PR rtl-optimization/71878 * Backport of [Bugfix] PR tree-optimization/61839 More optimize opportunity for VRP * Backport of [Bugfix] PR tree-optimization/71818 ICE in as_a, at is-a.h:192 w/ -O2 -ftree-vectorize * Backport of [AArch32] Keep ctz expressions together until after reload * Backport of [AArch32] Add fcsel to Cortex-A57 scheduler * Backport of [AArch32] Add initial support for Cortex-A73 * Backport of [AArch32] Add support for overflow add, sub, and neg operations * Backport of [AArch32] Add support for some ARMv8-A cores to driver-arm.c * Backport of [AArch32] arm_neon.h: s/__FAST_MATH/__FAST_MATH__/g * Backport of [AArch32] Emit vmov.i64 to load 0.0 into FP reg when neon enabled. * Backport of [AArch32] Enable __fp16 as a function parameter and return type * Backport of [AArch32] Fix aprofile multilib mappings * Backport of [AArch32] Fix predicable_short_it attribute for arm_movqi_insn * Backport of [AArch32] genmultilib: improve error reporting for MULTILIB_REUSE * Backport of [AArch32] improve Cortex-A53 integer scheduler * Backport of [AArch32] Model CSEL instruction in Cortex-A57 scheduling model * Backport of [AArch32] no-data-is-text-relative & msingle-pic-base * Backport of [AArch32] Refactor MOVW/MOVT fusion logic to allow extension * Backport of [AArch32] Replace uses of int_log2 by exact_log2 * Backport of [AArch32] Update documentation for ARM architecture * Backport of [AArch32] Use a MULTILIB_REQUIRED approach for aprofile multilib * Backport of [AArch64] 1/2 Add support INS (element) instruction to copy lanes between vectors * Backport of [AArch64] 2/2 (Re)Implement vcopy<q>_lane<q> intrinsics * Backport of [AArch64] 1/2 Improve zero extend * Backport of [AArch64] 2/2 Improve zero extend * Backport of [AArch64] 1/3 Migrate aarch64_add_constant to new interface & kill aarch64_build_constant * Backport of [AArch64] 2/3 Optimize aarch64_add_constant to generate better addition sequences * Backport of [AArch64] 3/3 Migrate aarch64_expand_prologue/epilogue to aarch64_add_constant * Backport of [AArch64] 1/6 Reimplement scalar fixed-point intrinsics * Backport of [AArch64] 2/6 Reimplement vector fixed-point intrinsics * Backport of [AArch64] 3/6 Reimplement frsqrte intrinsics * Backport of [AArch64] 4/6 Reimplement frsqrts intrinsics * Backport of [AArch64] 5/6 Reimplement fabd intrinsics & merge rtl patterns * Backport of [AArch64] 6/6 Reimplement vpadd intrinsics & extend rtl patterns to all modes * Backport of [AArch64] Accept vulcan as a cpu name for the AArch64 port of GCC * Backport of [AArch64] Add ANDS pattern for CMP+ZERO_EXTEND * Backport of [AArch64] Add commit message * Backport of [AArch64] Add initial support for Cortex-A73 * Backport of [AArch64] Add legitimize_address_displacement hook * Backport of [AArch64] Add more choices for the reciprocal square root approximation * Backport of [AArch64] Add rtx_costs routine for vulcan * Backport of [AArch64] Add some more missing intrinsics * Backport of [AArch64] Add ThunderX vector cost model * Backport of [AArch64] Allow multiple-of-8 immediate offsets for TImode LDP/STP * Backport of [AArch64] Canonicalize Cortex core tunings * Backport of [AArch64] Cleanup -mpc-relative-loads * Backport of [AArch64] Define WORD_REGISTER_OPERATIONS to zero and comment why * Backport of [AArch64] Emit division using the Newton series * Backport of [AArch64] Emit square root using the Newton series * Backport of [AArch64] Enable tree-stdarg pass for AArch64 by defining counter fields * Backport of [AArch64] Fix typo in aarch64_legitimize_address * Backport of [AArch64] Fixup to fcvt patterns added in r237200 * Backport of [AArch64] Fix vld2/3/4 on big endian systems * Backport of [AArch64] Give some new costs for Cortex-A53 floating-point operations * Backport of [AArch64] Give some new costs for Cortex-A57 floating-point operations * Backport of [AArch64] Handle AND+ASHIFT form of UBFIZ correctly in costs * Backport of [AArch64] Handle iterator definitions with conditionals in geniterator.sh * Backport of [AArch64] Improve aarch64_modes_tieable_p * Backport of [AArch64] Increase code alignment * Backport of [AArch64] Keep CTZ components together until after reload * Backport of [AArch64] Optimize prolog/epilog * Backport of [AArch64] Remove aarch64_cannot_change_mode_class * Backport of [AArch64] Remove spurious attribute __unused__ from NEON intrinsic * Backport of [AArch64] Renaming ARMv8.1 to ARMv8.1-A in comments and documentations * Backport of [AArch64] Replace insn to zero up SIMD registers * Backport of [AArch64] update vulcan L1 cacheline size * Backport of [ARMv8.2] [AArch64] 10/10 ARMv8.2-A FP16 lane scalar intrinsics * Backport of [ARMv8.2] [AArch64] 1/10 ARMv8.2-A FP16 data processing intrinsics * Backport of [ARMv8.2] [AArch64] 2/10 ARMv8.2-A FP16 one operand vector intrinsics * Backport of [ARMv8.2] [AArch64] 3/10 ARMv8.2-A FP16 two operands vector intrinsics * Backport of [ARMv8.2] [AArch64] 4/10 ARMv8.2-A FP16 three operands vector intrinsics * Backport of [ARMv8.2] [AArch64] 5/10 ARMv8.2-A FP16 lane vector intrinsics * Backport of [ARMv8.2] [AArch64] 6/10 ARMv8.2-A FP16 reduction vector intrinsics * Backport of [ARMv8.2] [AArch64] 7/10 ARMv8.2-A FP16 one operand scalar intrinsics * Backport of [ARMv8.2] [AArch64] 8/10 ARMv8.2-A FP16 two operands scalar intrinsics * Backport of [ARMv8.2] [AArch64] 9/10 ARMv8.2-A FP16 three operands scalar intrinsics * Backport of [ARMv8.2] [AArch64] ARMv8.2 command line and feature macros support * Backport of [Misc] 1/2 Move choose_mult_variant declaration and dependent declarations to expmed.h * Backport of [Misc] 2/2 Hook up mult synthesis logic into vectorisation of mult-by-constant * Backport of [Misc] Append "evaluates to 0" for Wundef diagnostic * Backport of [Misc] Avoid unnecessary peeling for gaps with LD3 * Backport of [Misc] Check for POINTER_TYPE_P before accessing SSA_NAME_PTR_INFO in tree-inline * Backport of [Misc] Disable ifunc on *-musl by default * Backport of [Misc] Disable setting param of __builtin_constant_p to null * Backport of [Misc] Don't count spilling cost for it offmemok * Backport of [Misc] Don't use section anchors for declarations that don't fit in a single anchor range * Backport of [Misc] Fix ChangeLog entry * Backport of [Misc] Fix GROUP_GAP for single-element interleaving * Backport of [Misc] Fix unused variable warning in simplify_cond_clz_ctz on some targets * Backport of [Misc] Increase alignment of global structs in increase_alignment pass * Backport of [Misc] Latent alignment bug in tree-ssa-address.c * Backport of [Misc] Report supported function classes correctly on *-musl * Backport of [Testsuite] 29_atomics/atomic/65913.cc: require atomic-builtins rather than specific target * Backport of [testsuite] [AArch32] Add missing guards to fp16 AdvSIMD tests * Backport of [Testsuite] [AArch32] Fix, add tests for FP16 aapcs * Backport of [Testsuite] [AArch32] Fix dg-do and dg-skip order * Backport of [Testsuite] [AArch32] gcc.target/arm/pr37780_1.c: Use arm_arch_v6t2 effective target and options * Backport of [Testsuite] [AArch32] Make arm_neon_fp16 depend on arm_neon_ok * Backport of [Testsuite] [AArch32] Selectors and options directives for ARM VFP FP16 support * Backport of [Testsuite] [AArch64] Ensure vrnd* tests run on ARMv8 cores * Backport of [Testsuite] Add testcases * Backport of [testsuite] asan/clone-test-1.c: Handle clone() failure * Backport of [Testsuite] Fix testcases * Backport of [Testsuite] Use setrlimit for testing libstdc++ in cross toolchains * Backport of [Cleanup] [AArch32] 2/4 Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WIDE_INT_1U * Backport of [Cleanup] [AArch32] 3/4 Cleanup casts from INTVAL to [unsigned] HOST_WIDE_INT * Backport of [Cleanup] [AArch32] 4/4 Simplify checks for CONST_INT_P and comparison against 1/0 * Backport of [cleanup] [AArch32] Delete thumb_reload_in_h * Backport of [Cleanup] [AArch32] Remove non-existent extern declarations in arm.h * Backport of [Cleanup] [AArch64] aarch64_elf_asm_named_section: Remove declaration. * Backport of [Cleanup] [AArch64] Clean up parentheses and use GET_MODE_UNIT_BITSIZE in a couple of patterns * Backport of [Cleanup] [AArch64] Remove static variable all_extensions from aarch64.c * Backport of [Cleanup] Cleanup frame push/pop code * Backport of [Cleanup] rtlanal.c: Convert conditional compilation on WORD_REGISTER_OPERATIONS * Backport of [Debug] ifcvt: Print name of noce trasform that succeeded in dump file Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed. [2]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed.

8 years, 8 months

1
0
0 0

Question on "Using deprecated CP15 barrier instruction".

by stimits＠comcast.net

Hi, For reference, the following questions refer to a Linux 3.10 aarch64 kernel (ARMv8, ARMv8-A) compiled with Linaro 5.3-2016.02 (5.3-2016.02 arm64 CROSS_COMPILE and 5.3-2016.02 armhf CROSS32CC cross compiled from x86_64). This Linux kernel compile requires the full 64-bit tool chain plus the 32-bit gcc. There is a Linux kernel file "arch/arm64/kernel/deprecated.c". Within that file is a block of code which is apparently designed to detect some sort of older obsolete 32-bit code. Specifically, the warning message is "Using deprecated CP15 barrier instruction". I wouldn't think that this kernel, when compiled with such a recent compiler, would ever introduce CP15 barrier code (from what I see barrier code was deprecated in ARMv7 and used to deal with obsolete ARMv6 code). Is there any chance the 32-bit 5.3 gcc would still generate CP15 barrier code? Although this kernel and "most" modules are built with Linaro 5.3 I'd like to be able to narrow the cause down to existing binary modules not compiled with the 5.3 Linaro. If I can guarantee 5.3 32-bit gcc does not produce the CP15 barrier instruction then I'll know it is in pre-built binary modules. Can anyone tell me if C code compiled from Linaro version 5.3 32-bit gcc code would ever contain CP15 instructions? Thanks!

8 years, 8 months

3
2
0 0

RE: Question on "Using deprecated CP15 barrier instruction".

by stimits＠comcast.net

What I need to confirm is if the Linaro 5.3 would generate such code from a normal block of C without any kind of asm in it? Detecting the code is part of the kernel...I need to figure out where it was generated. Is Linaro 5.3 going to generate such code without explicitly writing it in? ----- Original Message -----From: Andrew Pinski <Andrew.Pinski(a)cavium.com>To: stimits(a)comcast.net, Linaro Toolchain Mailman List <linaro-toolchain(a)lists.linaro.org>Sent: Mon, 05 Sep 2016 17:21:24 -0000 (UTC)Subject: RE: Question on "Using deprecated CP15 barrier instruction". Simple answer is yes. There are a lot of assembly out there and someone (seen it in the past) could have used this barrier method in their code and not really thought it was going to change in the future. Thanks, Andrew From: linaro-toolchain [mailto:linaro-toolchain-bounces@lists.linaro.org]On Behalf Of stimits(a)comcast.netSent: Monday, September 5, 2016 8:10 AMTo: Linaro Toolchain Mailman List <linaro-toolchain(a)lists.linaro.org>Subject: Question on "Using deprecated CP15 barrier instruction". Hi, For reference, the following questions refer to a Linux 3.10 aarch64 kernel (ARMv8, ARMv8-A) compiled with Linaro5.3-2016.02 (5.3-2016.02 arm64 CROSS_COMPILE and 5.3-2016.02 armhf CROSS32CC cross compiled from x86_64). This Linux kernel compile requires the full 64-bit tool chain plus the 32-bit gcc. There is a Linux kernel file "arch/arm64/kernel/deprecated.c". Within that file is a block of code which is apparently designed to detect some sort of older obsolete 32-bit code. Specifically, the warning message is "Using deprecated CP15 barrier instruction". I wouldn't think that this kernel, when compiled with such a recent compiler, would ever introduce CP15 barrier code (from what I see barrier code was deprecated in ARMv7 and used to deal with obsolete ARMv6 code). Is there any chance the 32-bit 5.3 gcc would still generate CP15 barrier code? Although this kernel and "most" modules are built with Linaro 5.3 I'd like to be able to narrow the cause down to existing binary modules not compiled with the 5.3 Linaro. If I can guarantee 5.3 32-bit gcc does not produce the CP15 barrier instruction then I'll know it is in pre-built binary modules. Can anyone tell me if C code compiled from Linaro version 5.3 32-bit gcc code would ever contain CP15 instructions? Thanks!

8 years, 8 months

2
1
0 0

[ACTIVITY] Week 35

by Yvan Roux

== Progress == o Linaro GCC/Validation (7/10) - Merged bkk16 buildfarm developments into main job. - Backports: Reviews, dependencies tracking and backports. - Analysed extended validation results. o Misc (3/10) * Various meetings and discussions. == Plan == o Release 2016.09 Snapshots o GNU Cauldron

8 years, 8 months

1
0
0 0

[ACTIVITY] 29 August-2 Sept 2016

by Kugan Vivekanandarajah

== Progress == - IPA-VRP: Re-based ipa-cp/ipa-prop on top of Prathameshes commit (quite a few conflicts) and did full testing before posting to the list. Patch approved for commit. - Waiting for Early-VRP patch to commit rest of the patches in the series - All other patches are OK now. - Looking at tree-vrp in details. Created https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77387 - Looking at re-assoc wrong code generation issue (PR72835). Posted another attempt to fix for review = Next == - Work on tree-vrp improvements - Follow up on pending patches

8 years, 8 months

1
0
0 0

[ACTIVITY] 29 August-2 Sept 2016

by Christophe Lyon

1 day off (Wed) == Progress == * Validation - patch reviews (Jenkins jobs, abe) - infra seems very stable * GCC Snapshot - backports & reviews * GCC - progress on PR 67591 (ARM v8 Thumb IT blocks deprecated) = Next == - monitor GCC trunk regressions - GCC pr 67591 - release scripts/abe - backports/reviews - attend GNU Cauldron

8 years, 8 months

1
0
0 0

[ACTIVITY] 29 August - 2 September 2016

by Prathamesh Kulkarni

== This Week == * TCWG-779 (4/10) - Upstream patch iterations * NULL pointer propagation in ipa-bitwise-cp (4/10) - WIP patch * Benchmarking (1/10) - Found how to set iterations for coremark - Submitted job for setting up hack session on Juno * Misc (1/10) - Meetings == Next Week == - NULL pointer propagation - TCWG-779 - GNU Cauldron

8 years, 8 months

1
0
0 0

[ACTIVITY] 30 Aug -2 Sep 2016

by Yao Qi

* Holiday on Monday. [2/10] # Progress # * TCWG-685, GDB 7.12 release. No new issue. [1/10] * TCWG-655, ARM linux kernel ptrace bug. [3/10] Teach GDB testsuite to detect such kernel bug, and skip all tests related to floating point. Patches are committed. On the other hand, upgrade my arm kernel to 4.7.2, on which the ptrace bug is fixed. * TCWG-518, range stepping on ARM. [2/10]. Turned it on, but it causes some threads starvation. Investigating. * Finish the reproducer to show odd behaviour of armv8 kernel in si_code after PTRACE_SINGLESTEP and Will Deacon fixed it http://lists.infradead.org/pipermail/linux-arm-kernel/2016-September/453289… [1/10] * Think about the GDB plan, and write down a list of things I need to do. [1/10] # Plan # * TCWG-685, TCWG-518. * GNU Cauldron. -- Yao Qi

8 years, 8 months

1
0
0 0

[ACTIVITY] 30-2 September 2016

by Peter Smith

== Activity == [TCWG-610] Sent .ARM.exidx for upstream review. Will need to rework and simplify bit to make more specific to ARM. In summary abandon pretence of SHF_LINK_ORDER in general and concentrate on supporting its one known use case in .ARM.exidx sections. Made a couple of drafts of forthcoming LLVM Cauldron presentation - Presented locally - Modified slides after overrunning time == Plans == [TCGWG-610] Rework and resend for review llvm-cauldron on Thursday Intending to take Friday as holiday to take advantage of visiting parents whilst up North.

8 years, 8 months

1
0
0 0

[ACTIVITY] 22-26 August 2016

by Christophe Lyon

== Progress == * Validation - patch reviews (Jenkins jobs, abe) mainly for the release process * Backports - resubmitted the pending ones - started looking at v8.2 backports * GCC - resumed PR 67591 (ARM v8 Thumb IT blocks deprecated) * arm-neon-tests - small update to support clang, as requested by Chromium * misc (conf-calls, meetings, emails, ....) - catching up after holidays == Next == - monitor trunk regressions - pr 67591 - release scripts - backports

8 years, 8 months

1
0
0 0

[ACTIVITY] Week 34

by Yvan Roux

== Progress == o Linaro GCC/Validation (7/10) - Reviewed on-going Backports. - Analysis on remaining backports dependencies on-going. - Merged FSF GCC 6 branch. - Last FSF GCC 4.9 merge still on-going (some conflicts to solve). - Defining and experimenting new revisions/backports tracking format in yaml. o Misc (3/10) * Various meetings and discussions. == Plan == o FInish backports, and FSF branch merge for next week snapshot.

8 years, 8 months

1
0
0 0

[ACTIVITY] 22 - 26 August 2016

by Prathamesh Kulkarni

== This Week == * TCWG-666 (2/10) - Martin confirmed the assert was spurious that caused some obj-c tests to fail, removing it passes bootstrap+test. - Changed option name to -fipa-bit-cp following Honza's suggestion - Committed as r239769. * TCWG-779 (4/10) - Patch iterations based on upstream suggestions. * Public Holiday (2/10) * Misc (2/10) - Background reading on mod/ref analysis - Meetings

8 years, 8 months

1
0
0 0

[ACTIVITY] 22 - 26 August 2016

by Yao Qi

# Progress # * TCWG-685, GDB 7.12 release. [4/10] Finish all native testing on ARM. Triaged tests result. Only find one fail that test assumes HW watchpoint is always available. Reported it upstream, but need more thoughts on how to fix it. Both AArch64 and ARM GDB is in a good state, in terms of test results. * TCWG-533, Remove global variable arm_override_mode. [2/10] It is paused by 7.12 release, and work on it again. 10 patches are ready. Being regression tested. * Analyse the kernel behaviour on single step over fork. [4/10] Upgrade juno kernel to 4.7.0-rc4+, and verified Will Deacon's patch. http://lists.infradead.org/pipermail/linux-arm-kernel/2016-August/451711.ht… With the patch, GDB can correctly single step over fork, however, GDB is still broken if there is a breakpoint. Write a small reproducer, but doesn't trigger the problem. It might be a GDB bug or kernel bug. # Plan # * Resume works interrupted by 7.12 release. -- Yao Qi

8 years, 8 months

1
0
0 0

[ACTIVITY] 22 - 26 August 2016

by Peter Smith

== Progress == - Got back from Sabbatical and caught up with email/events - TCWG-610 Support for ARM Exceptions in lld. Implemented support for SHF_LINK_ORDER and .ARM.exidx in lld, have this working and tested for images (both with default and linker scripts) and relocatable ld -r with the default layout. Currently it looks like relocatable outputs with linker scripts aren't working at all right now. == Plan == - Hope to send to upstream review next week. - Write the first pass of the LLVM Cauldron presentation. == Planned absence == Monday 29th August is UK national holiday

8 years, 8 months

1
0
0 0

[ACTIVITY] 22 - 26 August 2016

by Diana Picus

== Progress == * [AArch64] Support for label arithmetic in the assembler [TCWG-710] [9/10] - Patch in upstream review - While adding more tests for the patch above, I noticed that we're not encoding the lsl #12 on add/sub immediates correctly - Submitted a patch to fix that as well * Misc [1/10] - Ran more precommit tests for last week's reverted revisions == Plan == * Handle special cases in AArch64InstrInfo::GetInstSizeInBytes [TCWG-757]

8 years, 8 months

1
0
0 0

[ACTIVITY] 15 - 19 Aug

by Yao Qi

* Two days off [4/10] # Progress # * TCWG-685, GDB 7.12 release. [3/10] Fix one bug that AArch64 GDB doesn't recognize new "STP with base register" instruction in prologue. Recent GCC https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01933.html starts to generate that instruction in prologue. Fix it in both master and 7.12. Successfully build armhf toolchain with latest gcc/glibc. Run GDB tests with the new toolchain. Test results are OK, except fails when tests are compiled with -march=cortex-a15. It isn't a release blocker. Open TCWG-756 for it and will look into these fails later. * GDBserver build failure. [1/10] Review the patch fixing GDBserver build failure with latest glibc. Patch is OK, but make sure it can be merged to master/7.12/7.11, as we are still using GDB 7.11. * Prelink. [1/10] prelink causes some GDB tests failures, so I look at it. prelink isn't active, because I can't see any mails in archive since 2013. ARM is supported, but AArch64 isn't. * Misc, [1/10]. Set up email 2fa. # Plan # * GDB 7.12 release. * Upgrade the linux kernel on my juno board. -- Yao Qi

8 years, 8 months

1
0
0 0

[ACTIVITY] 15 - 19 August 2016

by Diana Picus

== Progress == * LLVM 3.9.0 Release for AArch64 [TCWG-696] [1/10] - Ran the tests for RC2, everything looks good on AArch64 * [AArch64] Support for label arithmetic in the assembler [TCWG-710] [3/10] - This is starting to look like a patch, but I need to add more tests * Buildbot babysitting [TCWG-716, 719, 720] [5/10] - Bisected a number of failures and reverted some patches - Ran precommit tests for 2 different issues; one of them has passed with the author's fix, the other one hasn't, so I'll probably have to help figure out what the problem is * Set up a BeagleBoard so I can run some tests for TCWG-674 [1/10] == Plan == * [AArch64] Support for label arithmetic in the assembler [TCWG-710] - Send a patch upstream * Run more precommits if necessary

8 years, 8 months

1
0
0 0

[ACTIVITY] Week 33

by Yvan Roux

o one day off (2/10) == Progress == o Linaro GCC/Validation (3/10) - Continuing Backports. - Prepared branch merges - AArch64 builders stable again after Jenkins upgrade. - Investigated GDB build failure with Glibc trunk, Adhemerval patch accepted upstream. - start to merge Bkk16-buildfarm job into main buildfarm one. o Upstream GCC (1/10) - Guality fix: more investigation . o Misc (4/10) * Various meetings and discussions. * Another Internal support. == Plan == o Continue on backports, and FSF branch merge, etc

8 years, 8 months

1
0
0 0

gcc-linaro-6.1-2016.07...Big Endian and Little Endian aarch64 Options

by stimits＠comcast.net

Hi, I was able to get linaro-6.1-2016.07 compiled for both aarch64 and armhf. I also have some prebuilt 5.2 and 5.3 binaries, plus a few other 4.8 and 4.9 compilers from quite some time back. I've used these for building a Linux 3.10 kernel, and the newer linaro-6.1 fails during kernel compile. The issue seems to be the assembler does not recognize option "-EL" (all of the ARM systems I'm building for are little endian, I've not seen a big endian system). I am wondering if support for options "-EB" and "-EL" are part of the configure options? There is the generic "help" listing the "--enable-FEATURE=ARG", but I do not see a comprehensive list of features this might deal with. I'm hoping that big/little endian for armhf and aarch64 can be enabled with this. Otherwise I'm hoping to find more information on what I might need to do or change for compatibility with the "-EL" option. For reference, I have similar templates for 32-bit and 64-bit configuration (different triplet and build root). Here's one: export SRC='/home/build/linaro/gcc-linaro-snapshot-6.1-2016.07'export BUILD='/home/build/linaro/32bit'export TRIPLET=arm-linux-gnueabihfexport CLONE=/usr/local/sysroot/${TRIPLET}export VENDOR_ID=gcc-linaro-6.1-2016.07export LINUX_ARCH=armhf cd $BUILD${SRC}/configure --prefix=/usr/local/${TRIPLET}/${VENDOR_ID} --target=${TRIPLET} \ --with-build-sysroot=${CLONE} \ --enable-languages=c \ --with-sysroot=/ Thanks!

8 years, 8 months

2
1
0 0

gcc-linaro-snapshot-6.1-2016.07 Sysroot/Host Requirements Question

by stimits＠comcast.net

Hi, In a previous thread some sysroot issues were resolved, and I am able to build cross-compilers under gcc-linaro-snapshot-6.1-2016.07 for languages c, c++, and objc. My sysroot consisted of a loopback mounted dd copy of an Ubuntu 14.04 file system for aarch64. That particular file system runs on a quad core Cortex-A57, and is fully capable of compiling many different types of software (the file system is set up for development). The successful configuration was like this (configuration and compile was from an independent directory not in the source tree): export SRC='/home/build/linaro/gcc-linaro-snapshot-6.1-2016.07'export TRIPLET=aarch64-linux-gnuexport CLONE=/usr/local/sysroot/${TRIPLET}export VENDOR_ID=gcc-linaro-6.1-2016.07export LINUX_ARCH=arm64 ${SRC}/configure --prefix=/usr/local/${TRIPLET}/${VENDOR_ID} --target=${TRIPLET} \ --with-build-sysroot=${CLONE} \ --enable-languages=c,c++,objc \ --with-sysroot=/ Now I also need armhf (I must support both 32-bit and 64-bit), so I'm trying to figure out host and sysroot differences (I have been unable to get armhf to compile). The configuration is basically this variation of the above, plus some sysroot additional support: export SRC='/home/build/linaro/gcc-linaro-snapshot-6.1-2016.07'export TRIPLET=arm-linux-gnueabihfexport CLONE=/usr/local/sysroot/${TRIPLET}export VENDOR_ID=gcc-linaro-6.1-2016.07export LINUX_ARCH=armhf ${SRC}/configure --prefix=/usr/local/${TRIPLET}/${VENDOR_ID} --target=${TRIPLET} \ --with-build-sysroot=${CLONE} \ --enable-languages=c \ --with-sysroot=/ Note that for testing purposes I tried to compile only languages of c, c++, and objc, each one at a time instead of together. Errors do not differ in any way for picking of any of those three languages. I also have a complete Ubuntu 14.04 file system for armhf which is fully equipped for building of each of those languages, and is perhaps in some ways more complete as a development environment than the previously successful aarch64 file system (the sysroot runs on a quad core Cortex-A15). I tried this purely armhf file system as the sysroot to rule out incorrect multiarch support, and the error did not change. I am guessing the issue is not the sysroot, but I wanted to verify this since there may be other requirements for armhf instead of aarch64. I am at a loss though to explain why the host would be at issue since it appears all prerequisites were met and I had success with aarch64. The details of the error seem to always occur in libcc1 build. I see this in the libcc1/config.log as the failure regardless of sysroot or supported language, and only while building for armhf: configure:14569: checking for -rdynamicconfigure:14579: result: yesconfigure:14589: checking for library containing dlopenconfigure:14620: gcc -o conftest -g -O2 conftest.c >&5/tmp/ccyhVkpp.o: In function `main':/home/build/linaro/objdir/libcc1/conftest.c:38: undefined reference to `dlopen'collect2: error: ld returned 1 exit statusconfigure:14620: $? = 1configure: failed program was:| /* confdefs.h */| #define PACKAGE_NAME "libcc1"| #define PACKAGE_TARNAME "libcc1"| #define PACKAGE_VERSION "version-unused"| #define PACKAGE_STRING "libcc1 version-unused"| #define PACKAGE_BUGREPORT ""| #define PACKAGE_URL ""| #define STDC_HEADERS 1| #define HAVE_SYS_TYPES_H 1| #define HAVE_SYS_STAT_H 1| #define HAVE_STDLIB_H 1| #define HAVE_STRING_H 1| #define HAVE_MEMORY_H 1| #define HAVE_STRINGS_H 1| #define HAVE_INTTYPES_H 1| #define HAVE_STDINT_H 1| #define HAVE_UNISTD_H 1| #define __EXTENSIONS__ 1| #define _ALL_SOURCE 1| #define _GNU_SOURCE 1| #define _POSIX_PTHREAD_SEMANTICS 1| #define _TANDEM_SOURCE 1| #define HAVE_DLFCN_H 1| #define LT_OBJDIR ".libs/"| #define HAVE_DECL_BASENAME 1| /* end confdefs.h. */ Are there different host requirements when building armhf versus aarch64 which might explain why dlopen is not found? FYI, both development and other support for dlopen exists already on the system, so the failure to find dlopen is not for lack of host support (related dlopen files all seem to be present on all tested sysroots as well, both as armhf and aarch64). Is this a sysroot issue, a host issue, or a configure issue? Thanks!

8 years, 8 months

2
5
0 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

linaro-toolchain