== Progress ==
* Monday off (2/10)
* Buildbot (6/10)
- Investigating sanitizer crash in Thumb2+NEON
- Testing IFC6410 with Linaro 15.09
- CPUs good, 1.7GHz on all cores, stable, cool
- Not enough space on local (fast) flash
- USB stick stable, but slow (3h vs 2h on Chrome 2)
- USB disk unstable and slow (power management, etc)
- SATA broken, and slow
* Infrastructure (1/10)
- Discussing LAVA instance in TCWG lab, benchmarks
- Playing with D02: corrupted system, but the machine is *fast*
* Background (1/10)
- Code review, meetings, discussions, general support, etc.
== Plan ==
* More infrastructure meetings
* More buildbot work
* Whatever...
# Progress #
* TCWG-373, Aarch64 non-stop debugging (or displaced stepping). [2/10]
Patches V1 are ready for upstream submission, but find opcodes has
already interfaces to decode instructions, so decide to use opcodes
for aarch64 GDB first.
* TCWG-387, one patch exposing one opcode interface is pushed in. [4/10]
Switch software single step code for aarch64 to using opcodes
interface. Patch is pushed in.
Rewriting prologue analyser to use opcode interface too.
* TCWG-159, Kernel awareness in GDB. [1/10]
Resume the work as Peter Griffin has cycles to do so. We are happy
with the plan so far.
* Review arm software breakpoint in GDBserver patches. [1/10]
* Misc, [2/10]
# Plan #
* TCWG-387, TCWG-373
--
Yao
== Progress ==
2 days off (4/10)
* Infrastructure/validation: (3/10)
further checking of cross-testing results stability on aarch64-linux
- found a workaround for a timestamp problem (_Pragma3 testcase)
- looked at c11-atomic-exec-5 whose execution time ranges between 1s
and 1h :-)
- forcing make check to -j8 seems to work well, will work on a nicer
improvement
* reported and briefly looked at failure in a new libstdc++ test
(directory_iterator) on armv5t
* Misc (conf calls, meetings, emails, ....) (2/10)
* Internal (1/10)
- GNU linker patch review
The Linaro Toolchain Working Group is pleased to announce the availability
of the Linaro Stable Binary Toolchain Release-Candidate GCC 5.1-2015.08-rc2
Archives.
http://snapshots.linaro.org/components/toolchain/binaries/5.1-2015.08-rc2/
These archives provide cross-toolchain executables (compiler, debugger,
linker, etc.) and shared libraries (libstdc++, libc, etc.) that target ARM
or Aarch64 GNU/Linux and bare-metal environments. The cross-toolchain
binaries execute on a Linux or MS Windows (under mingw32) host
operating-system.
Please evaluate this release-candidate for correctness. Linaro will
shortly spin the Linaro GCC 5.1-2015.08 release if this release-candidate
passes stakeholder validation.
For bugs related to this release-candidate please email
linaro-toolchain(a)lists.linaro.org or file a bug at http://
https://bugs.linaro.org/enter_bug.cgi?product=Linux%20Binary%20toolchain
NEWS
* 2015.08-rc2
* The Linaro 2015.08-rc2 release-candidate binary toolchain is based on
the Linaro GCC-5.1-2015.08-rc1 release-candidate source archive. The only
changes between 2015.08-rc1 and 2015.08-rc2 were the following changes in
how the binary toolchains were built. The compiler itself was not changed.
* x86_64 hosted, armv8l-linux-gnueabihf targetted cross toolchains are
now correctly configured. This was broken in 2015.08-rc1. The
cross-compiler targetting armv8l-linux-gnueabihf is now correctly
configured with --with-arch=armv8-a --with-fpu=neon-fp-armv8
--with-float=hard --disable-multilib --enable-multiarch.
* Glibc’s slibdir and libdir were once again modified to address Linaro
Bugzilla 1717 – Linaro-4.9-2015.05 moved system libs from /libc/lib/ to
/libc/usr/lib/ which breaks things. The following are now the correct
locations:
libdir=lib/ (linker-scripts and static archives)
slibdir=usr/lib/ (shared objects)
rtlddir=lib/ (dynamic linker)
* 2015.08-rc1
* x86_64 hosted, armv8l-linux-gnueabihf targetted cross toolchain now
provided.
Delivering on REQ-477 – Enable x86_64 to Aarch32 (32-bit ARMv8-A)
cross binary toolchain product release and CARD-1637 – Enable Aarch32
(32-bit ARMv8-A) cross binary toolchain product releases ,
armv8l-linux-gnueabihf targetted toolchains are now available as part of
this release-candidate.
* Python support in GDB for both Linux and Mingw32 (32-bit windows).
Delivered as requested in the linaro-toolchain mailing list post
title – windows binary builds with gdb-python enabled?.
* Added missing expat support to GDB.
This addresses the following linaro-toolchain mailing list post –
"Missing expat support in GDB 7.8 multi-lib enablement for arm bare-metal
targets."
* A fix for multilib enablement in baremetal toolchains (as described
in ABE Review 6862).
* Library Paths are now congruent with older Linaro Toolchain path
layouts. This addresses Linaro Bugzilla 1717 – Linaro-4.9-2015.05 moved
system libs from /libc/lib/ to /libc/usr/lib/ which breaks things.
libdir=lib/ (shared objects)
slibdir=usr/lib/ (static libraries)
rtlddir=lib/ (dynamic linker)
# Progress #
* TCWG-189, Aarch64 fast tracepoint. [2/10]
Done. Patches are committed.
* TCWG-373, Support displaced stepping on aarch64-linux. [4/10]
GDB works basically, still need to refactor and polish the code.
* TCWG-374, Test displaced stepping on aarch64-linux. [1/10]
Add new tests.
* TCWG-166, gdbserver support for tracepoints on ARM. [3/10].
Review patches, play with patches, and investigate on some issues.
Ongoing.
# Plan #
* TCWG-373, TCWG-374, and TCWG-166.
--
Yao
# Progress #
* TCWG-188, aarch64 GDB multi-arch support. [2/10]
All patches went upstream except that one is blocked by kernel patch.
The work is done!
* TCWG-189, aarch64 fast tracepoint support. [2/10]
Update them and post V2 out. Pending for review.
* TCWG-373, Aarch64 non-stop debugging (or displaced stepping). [2/10]
Think about it, and break it into pieces. Refactor fast tracepoint
code so that some can be reused for displaced stepping.
* TCWG-375, Don't skip gdb.asm/asm-source.exp on aarch64. [1/10]
Patch is pushed in.
* TCWG-166, Review arm tracepoint patches from Ericsson upstream. [1/10]
May have something wrong for permanent breakpoint on thumb code.
Need to figure out a case to trigger that.
* Misc, meeting and training. [2/10]
# Plan #
* TCWG-189, TCWG-373, TCWG-166.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2015.09 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.2+svn227732 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2015.11
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.2+svn227732
* Backport of [Bugfix] [AArch32] PR target/26702
* Backport of [Bugfix] [AArch32] PR target/26702
* Backport of [Bugfix] [AArch32] PR rtl-optimization/34503
* Backport of [Bugfix] [AArch32] PR target/64208 iwmmxt pattern
* Backport of [Bugfix] [AArch32] PR target/65924
* Backport of [Bugfix] [AArch64] PR 65770 vstN_lane on bigendian
* Backport of [Bugfix] [AArch64] PR 65375 Fix RTX cost for vector SET
* Backport of [Bugfix] [AArch64] PR target/65491: Classify V1TF
vectors as AAPCS64 short vectors rather than composite types
* Backport of [Bugfix] [AArch64] PR target/66049
* Backport of [Bugfix] [AArch64] PR 63949
* Backport of [Bugfix] PR rtl-optimization/64616 Move insns without
introducing new temporaries in loop2_invariant
* Backport of [Bugfix] PR rtl-optimization/66076
* Backport of [Bugfix] PR tree-optimization/65447
* Backport of [AArch32] Add cpu_defines.h for ARM
* Backport of [AArch32] Additional bics patterns
* Backport of [AArch32] Add support for CFI directives in fp emulation
routines for ARM
* Backport of [AArch32] Add support for crtfastmath
* Backport of [AArch32] Apply arm.h change for previous commit
* Backport of [AArch32] (*arm_subsi3_insn): Fixed redundant alternatives
* Backport of [AArch32] Fix up bootstrap and fix typo in related changelog entry
* Backport of [AArch32] Handle UNSPEC_VOLATILE in rtx costs and don't
recurse inside the unspec
* Backport of [AArch32] insns attributes and alternative cleanups
* Backport of [AArch32] Make tune params tables more self-documenting
* Backport of [AArch32] Remove vec_shr and vec_shr optabs
* Backport of [AArch32] Use uppercase for code iterator names
* Backport of [AArch64] Add alternative 'extr' pattern, calculate rtx
cost properly
* Backport of [AArch64] Add branch-cost to cpu tuning information
* Backport of [AArch64] Add __extension__ and __always_inline__ to
crypto intrinsics
* Backport of [AArch64] Add vcond(u?)didi pattern
* Backport of [AArch64] Fix aarch64_rtx_costs of PLUS/MINUS
* Backport of [AArch64] Fix Cortex-A53 shift costs
* Backport of [AArch64] Fix geniterators.sh to use standard BRE syntax in sed
* Backport of [AArch64] Fix up new line in previous commit
* Backport of [AArch64] Handle FLOAT and UNSIGNED_FLOAT in rtx costs
* Backport of [AArch64] Idiomatic 64x1 comparisons in arm_neon.h
* Backport of [AArch64] Implement -m{cpu,tune,arch}=native using only
/proc/cpuinfo
* Backport of [AArch64] In aarch64_class_max_nregs use UNITS_PER_VREG
and UNITS_PER_WORD
* Backport of [AArch64] Make aarch64_min_divisions_for_recip_mul configurable
* Backport of [AArch64] Properly cost FABD pattern
* Backport of [AArch64] Properly cost MNEG/[SU]MNEGL patterns
* Backport of [AArch64] Properly handle mvn-register and add EON+shift
pattern and cost appropriately
* Backport of [AArch64] Properly handle SHIFT ops and EXTEND in
aarch64_rtx_mult_cost
* Backport of [AArch64] Remember to cost operand 0 in FP compare-with-0.0 case
* Backport of [AArch64] Use extend_arith rtx cost appropriately
* Backport of [AArch64] Use mov for add with large immediate
* Backport of [AArch64] Fix a couple of bugs regarding loop invariant
motion discovered by spec2k6 on aarch64
* Backport of [Musl libc] Add musl support to GCC
* Backport of [Musl libc] libitm fixes for musl support
* Backport of [Musl libc] musl libc config
* Backport of [Musl libc] mips musl support
* Backport of [Musl libc] unwind fix for musl
* Backport of [Musl libc] libstdc++, libgfortran gthr workaround for musl
* Backport of [Musl libc] fixincludes update for musl support
* Backport of [Musl libc] [AArch32] [4/13] arm musl support
* Backport of [Musl libc] [AArch64] [3/13] aarch64 musl support
* Backport of [Testsuite] [AArch32] advsimd-intrinsics.exp:
dg-do-what=compile if HW does not have Neon
* Backport of [Testsuite] [AArch32] Fix test for pr64616
* Backport of [Testsuite] [AArch32] Require Thumb2 effective target
* Backport of [Testsuite] [AArch32] Fix r222371 (PR target/26702)
* Backport of [Testsuite] Cleanup advsimd-intrinsics.exp, removing
unnecessary loop
* Backport of [Testsuite] don't clobber dg-do-what-default in
advsimd-intrinsics.exp
* Backport of [Testsuite] don't try to execute simd.exp tests on
targets without NEON
* Backport of [Testsuite] move check-gcc parallelize value into C front end
* Backport of [Testsuite] new vqmovn test
* Backport of [Testsuite] new vqmovun test
* Backport of [Testsuite] new vqrdmulh_lane test
* Backport of [Testsuite] new vqrdmulh_n test
* Backport of [Testsuite] new vqrdmulh test
* Backport of [Testsuite] new vqrshl test
* Backport of [Testsuite] new vqrshn_n test
* Backport of [Testsuite] new vqrshun_n test
* Backport of [Testsuite] new vqshl_n test
* Backport of [Testsuite] new vqshl test
* Backport of [Testsuite] new vqshlu_n test
* Backport of [Testsuite] new vqshrn_n test
* Backport of [Testsuite] new vqshrun_n test
* Backport of [Testsuite] Reinstate torture-init and torture-finalize
in advsimd-intrinsics.exp
* Backport of [Misc] Try REG_EQUAL for nonzero_bits
* Backport of [Misc] Don't reset ssa_name infor in struct iv
* Backport of [Misc] make clean' fix
* Backport of [Misc] Make vector_compare_rtx cope with VOID mode constants
* Backport of [Misc] set_nonzero_bits_and_sign_copies/combine.c
* Backport of [Misc] Expand pow (x, CONST) using square roots when possible
* Backport of [Doc] [AArch32] (ARM Options, mtune): add missing entries
* Backport of [Doc] Add missing jit and lto info.....
* Backport of [Doc] Declaring Attributes of Functions/split by target
* Backport of [Doc] reorganize (Type Attributes) and (Variable Attributes)
* Backport of [Doc] Update __atomic builtins documentation
* Backport of [Doc] Update definition location of attribute_spec in
documentation
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing
list":http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC
product:http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro
support":mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
Ensure all critical (benchmarking) data is logged - TCWG-349 [1/10]
* Added logging of several factors
* Documented what we do and don't log
Noise control experiments on Juno - TCWG-349 [4/10]
* Rediscovered that my Juno is an r0, not an r1
* Rebuilt target image in a carefully scripted way
* Fiddled about with differences between local and LAVA targets
* Ran a couple of trials to test infrastructure
Connect preparation - [2/10]
* General sorting out of tickets et al
* Final pass through benchmarking presentation
Misc - [3/10]
=Plan=
Merge 'logging' branch
Final pass through logging documentation
Run some noise experiments on Juno
If time, work on Jenkins benchmarking jobs
== Progress ==
LLDB development
-- Progress to add support for un-alinged watchpoints on AArch64
[TCWG-367] [5/10]
-- Truncating watched bits wasnt accepted as a solution, will look
into issues during connect.
-- Trying to figure out a way to use multiple watchpoint slots for a
single watchpoint.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
-- Travel preparations
Holiday 10 - 11 September 2015 - Travelling to US
== Plan ==
Holiday 14 - 18 September 2015
Connect 21 - 25 September 2015
Holiday 28 September - 5th October 2015
Hi,
I've tried probably a dozen different ABE build command lines with various combinations of cpu/arch/tune on the latest tree and on the 2014.09 release and am unable to build for the armv6/1136J-S.
Before bothering the list, I scoured the gzipped archive back through 2013, and there is little mention of any problems OR successes with armv6. I am wondering if armv6 is supported, and if so, what is the secret sauce ABE command line to build successfully for the 1136J-S.
Some of the builds I tried were missing tarball components, others fail later on such as the one below that gets through building gcc and bombs building the eabi.
--------------------
'abe.sh -target arm-linux-gnueabi -build all -set cpu=arm1136j-s' produces the following, see further below for the gcc version data:
arm-linux-gnueabi-gcc ../sysdeps/arm/aeabi_memclr.c -c -std=gnu99
-fgnu89-inline -O2 -Wall -Werror -Winline -Wno-error=undef -Wundef
-Wwrite-strings -fmerge-all-constants -frounding-math -g
-Wstrict-prototypes -I../include
-I/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/csu
-I/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master
-I../sysdeps/unix/sysv/linux/arm -I../sysdeps/arm/nptl
-I../sysdeps/unix/sysv/linux/include -I../sysdeps/unix/sysv/linux
-I../sysdeps/nptl -I../sysdeps/pthread -I../sysdeps/gnu
-I../sysdeps/unix/inet -I../sysdeps/unix/sysv -I../sysdeps/unix/arm
-I../sysdeps/unix -I../sysdeps/posix -I../sysdeps/arm/armv6
-I../sysdeps/arm/include -I../sysdeps/arm -I../sysdeps/wordsize-32
-I../sysdeps/ieee754/flt-32 -I../sysdeps/ieee754/dbl-64
-I../sysdeps/ieee754 -I../sysdeps/generic -I.. -I../libio -I. -nostdinc
-isystem
/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu/lib/gcc/arm-linux-gnueabi/5.1.1/include
-isystem
/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu/lib/gcc/arm-linux-gnueabi/5.1.1/include-fixed
-isystem /home/billd/_build/sysroots/arm-linux-gnueabi/usr/include
-D_LIBC_REENTRANT -include
/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/libc-modules.h
-DMODULE_NAME=libc -include ../include/libc-symbols.h -o
/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/csu/aeabi_memclr.o
-MD -MP -MF
/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/csu/aeabi_memclr.o.dt
-MT
/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/csu/aeabi_memclr.o
/tmp/ccTT8UgL.s: Assembler messages:
/tmp/ccTT8UgL.s:492: Error: lo register required -- `add
pc,r3,#(0xffff0fc0-0xffff0fff)'
/tmp/ccTT8UgL.s:490: Error: invalid immediate: -61441 is out of range
make[2]: ***
[/home/billd/_build/builds/x86_64-unknown-linux-gnu/arm-linux-gnueabi/glibc.git~release-2.21-master/csu/libc-start.o]
Error 1
--- here is the gcc -v output for the build above. ----
./arm-linux-gnueabi-gcc -v
Using built-in specs.
COLLECT_GCC=./arm-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu/libexec/gcc/arm-linux-gnueabi/5.1.1/lto-wrapper
Target: arm-linux-gnueabi
Configured with:
'/home/billd/_build/snapshots/gcc.git~linaro-gcc-5-branch/configure'
SHELL=/bin/bash --with-bugurl=https://bugs.linaro.org
--with-mpc=/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu
--with-mpfr=/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu
--with-gmp=/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu
--with-gnu-as --with-gnu-ld --disable-libstdcxx-pch --disable-libmudflap
--with-cpu=arm1136j-s --with-cloog=no --with-ppl=no --with-isl=no
--disable-nls --enable-c99 --with-fpu=vfpv3-d16 --with-float=softfp
--with-mode=thumb --disable-multilib --enable-multiarch --disable-libssp
--disable-libquadmath --disable-threads --without-headers --with-newlib
--disable-libmudflap --disable-bootstrap --disable-decimal-float
--disable-libgomp --disable-libatomic --disable-libsanitizer
--disable-plugins --disable-libitm MAKEINFO=echo --enable-languages=c
--with-sysroot=/home/billd/_build/builds/sysroot-arm-linux-gnueabi
--disable-shared --with-glibc-version=2.18
--build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu
--target=arm-linux-gnueabi
--prefix=/home/billd/_build/builds/destdir/x86_64-unknown-linux-gnu
Thread model: single
gcc version 5.1.1 20150608 (Linaro GCC 5.1-2015.06-1~dev)
== Progress ==
o Linaro GCC validation (8/10)
* Finished on-going backports validation
* Still dealing with jenkins/infra instability
* Prepared branch merge
* Continue on my new reviewing/validation tool
o Misc (2/10)
* Various meetings
* AArch64 libunwind patch review
== Plan ==
o Finish branch merge
o GCC snapshot
o Travel to SFO'15
== This week ==
* TCWG-316 -Exploit vector multiply by scalar instructions when multiple
scalars are used as
coefficients in a loop (5/10)
- Wrote patterns to allow combine pass to mergenon-standard multiply
by lane patterns.
* Bugzilla 57195 (mode iterator bug) blocked compiling new pattern (1/10)
- Updated patch based on upstream comments and re-sent upstream
* TCWG-77 - Transform end of loop conditions to min_expr (1/10)
- Writing dejagnu test case.
- Writing function to check for min expr support on target
* Misc (1/10)
- Conference calls
* Holiday (2/10)
== Next week ==
- Complete TCWG-77 and send upstream
- Continued investigation into TCWG-316
== This week ==
* TCWG-80 (1/10)
- PRE and dead-store elimination ipa pass (WIP upstream) already
handles optimization
* TCWG-120 (2/10)
- Investigating 3 possible approaches:
a) fold arm_andsi3_insn/arm_cmpsi_insn to
zeroextractsi_compare0_scratch/andsi3_compare0_scratch
b) Undo cse in test conditions, and modify arm_rtx_costs to fold
arm_andsi3_insn/arm_cmpsi_insn to
zeroextractsi_compare0_scratch/andsi3_compare0_scratch
c) Expand directly to zeroextractsi_compare0_scratch/andsi3_compare0_scratch
- Not sure whether the generated assembly is better (in terms of
speed) than with trunk.
asm diff at -O1: http://pastebin.com/yXBHHkhM
* TCWG-72 (2/10)
- Rebased Kugan's patch
* TCWG-299 (3/10)
- Simple workaround for PR65837 - configure gcc with --with-fpu=neon
- Firefox trunk doesn't build with gcc for arm, using apt-get source firefox
- LTO build fails with out-of-memory on my laptop in qemu-arm chroot
* TCWG-319 (1/10)
- Benchmarking setup with Bernie on Juno for running SPEC.
- SPEC Runs without error on Juno-{a53,a57} and APM
* Misc (1/10)
- Meetings
== Next Week ==
- Continue with TCWG-120, TCWG-72, TCWG-319
Hi!
The pre-built version of the stable version of Linaro Toolchain (Linaro
GDB 2015.02-3) for Windows is shipped with GDB 7.8-2014.09-1-git. GDB
was built with the following options:
(gdb) show configuration
This GDB was configured as follows:
configure --host=i686-w64-mingw32 --target=arm-linux-gnueabihf
--with-auto-load-dir=$debugdir:$datadir/auto-load
--with-auto-load-safe-path=$debugdir:$datadir/auto-load
--without-expat
--with-gdb-datadir=/home/buildslave/workspace/BinaryRelease/label/hetzner/target/arm-linux-gnueabihf/_build/builds/destdir/i686-w64-mingw32/share/gdb
(relocatable)
--with-jit-reader-dir=/home/buildslave/workspace/BinaryRelease/label/hetzner/target/arm-linux-gnueabihf/_build/builds/destdir/i686-w64-mingw32/lib/gdb
(relocatable)
--without-libunwind-ia64
--without-lzma
--without-guile
--with-separate-debug-dir=/home/buildslave/workspace/BinaryRelease/label/hetzner/target/arm-linux-gnueabihf/_build/builds/destdir/i686-w64-mingw32/lib/debug
(relocatable)
--without-zlib
--without-babeltrace
As you can see in the output GDB was built without expat support. This
is a major problem for widely used micro controllers like ARM Cortex A8
(e.g. used in Beaglebone Black), because the technical description of
this microcontroller is loaded out of xml files (arm-with-neon.xml part
of GDB). It's also possible to do that manually with "set tdesc filename
<xml-file>, before connecting to the target.
Without having the expat option enabled the g package, which is sent
from gdbserver during establishing a connection to gdb, can't be parsed
correctly. The result is in the first step a warning because of the
missing xml support and later on a error regarding the unexpected
content of the g package:
warning: Can not parse XML target description; XML support was disabled
at compile time
Remote 'g' packet reply is too long:
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f0fcffbe00000000407afdb6300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
Old GDB versions of Linaro Toolchain like 7.6.1-2013.10 doesn't have
that problem because they were compiled with enabled expat support.
In my opinion there can be two root causes regarding that missing expat
support:
a) Expat support was explicitly disabled with --without-expat option
during the built of GDB.
b) On the build machine there wasn't a expat library available when gdb
was built.
Best regards,
Andreas Schmidl
== Progress ==
* Libraries (1/10)
- Working on getting the libc++ tests green
* Maintenance (6/10)
- Working with Vinicius on the gnueabi memcpy issue
- More TargetTuple/TargetParser discussions
- More sanitizers discussions, patch reviews
* Background (3/10)
- Code review, meetings, discussions, general support, etc.
- Connect stuff
== Plan ==
* Look a bit more on the library issues, try to upstream the bot changes
* Check instability in SciMark2
* Change HD from a D01
* Continue discussion about the sanitizer's multiple VMA problem
* Prepare for Connect, travel arrangements, etc.
# Progress #
* TCWG-857, [7/10]
One patch is upstreamed. The rest of them are in the queue.
Upgrade juno board linux kernel to 4.2.0-rc4+ to test some
multi-arch kernel patches. It isn't easy to run that new kernel
on juno board, takes much time on this.
* Misc [3/10]. Meetings, online trainings, etc.
# Plan #
* Continue to upstream multi-arch patches.
* Some upstream patch reviews on tracepoint.
--
Yao
Hello guys,
I am newbie here and need your kindly help:)
When trying to use gcc-linaro-4.9 to build u-boot for ls1021atwr (ARM Cortex-A7 MPCore compliant with ARMv7-A architecture), we face issue. U-boot hangs at PCI-E.
After tracing the code, the issue is located at the line "*val = readl(addr);".
u-boot/drivers/pci/pcie_layerscape.c: ls_pcie_read_config():
if (PCI_BUS(d) == hose->first_busno) {
...
} else {
...
if (PCI_BUS(d) == hose->first_busno + 1) { #PCI_BUS(d) 1, hose->first_busno 0
ls_pcie_cfg0_set_busdev(pcie, busdev);
addr = pcie->va_cfg0 + (where & ~0x3); #pcie->va_cfg0 0x24000000, where 0xc
} else {
....
}
}
*val = readl(addr);
The gcc source we used is gcc-linaro-4.9-2015.02.tar.xz<https://releases.linaro.org/15.02/components/toolchain/gcc-linaro/4.9/gcc-l…> (link<https://releases.linaro.org/15.02/components/toolchain/gcc-linaro/4.9/>) which is based on FSF GCC 4.9.3-pre+svn220525.
Meanwhile, gcc-linaro-4.9-2015.01.tar.xz<https://releases.linaro.org/15.02/components/toolchain/gcc-linaro/4.9/gcc-l…> does not have this issue.
After Bisecting, we tracked down a gcc commit:
https://git.linaro.org/toolchain/gcc.git/commitdiff/e4f9e85e8152379aef37377…
2015-01-23 Jakub Jelinek <jakub(a)redhat.com>
PR rtl-optimization/63637
PR rtl-optimization/60663
* cse.c (merge_equiv_classes): Set new_elt->cost to MAX_COST
if elt->cost is MAX_COST for ASM_OPERANDS.
(find_sets_in_insn): Fix up comment typo.
(cse_insn): Don't set src_volatile for all non-volatile
ASM_OPERANDS in PARALLELs, but just those with multiple outputs
or with "memory" clobber. Set elt->cost to MAX_COST
for ASM_OPERANDS in PARALLEL. Set src_elt->cost to MAX_COST
if new_src is ASM_OPERANDS and elt->cost is MAX_COST.
* gcc.dg/pr63637-1.c: New test.
* gcc.dg/pr63637-2.c: New test.
* gcc.dg/pr63637-3.c: New test.
* gcc.dg/pr63637-4.c: New test.
* gcc.dg/pr63637-5.c: New test.
* gcc.dg/pr63637-6.c: New test.
* gcc.target/i386/pr63637-1.c: New test.
* gcc.target/i386/pr63637-2.c: New test.
* gcc.target/i386/pr63637-3.c: New test.
* gcc.target/i386/pr63637-4.c: New test.
* gcc.target/i386/pr63637-5.c: New test.
* gcc.target/i386/pr63637-6.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@220323 138bc75d<https://git.linaro.org/toolchain/gcc.git/object/138bc75d>-0d04-0410-961f-82ee72b054a4<https://git.linaro.org/toolchain/gcc.git/object/82ee72b054a4>
Before this commit, u-boot can boot up.
So any hint/suggestion? if more details needed, please feel free to tell us.
Thank you in advance.
-Ting
== Progress ==
LLDB development
-- Testing and bug fixing lldb on hikey AArch64 [TCWG-231] [4/10]
-- Looking into multi-threaded watchpoint test failures on
AArch64 highkey board.
-- Fixed watchpoint installation lag and unexpected behaviour.
Submitted http://reviews.llvm.org/D12522
-- Start work to add support for un-alinged watchpoints on AArch64
[TCWG-367] [3/10]
Miscellaneous [3/10]
-- Meetings, emails, discussions etc.
-- Laptop LCD screen malfunctioned, found a temporary replacement.
== Plan ==
LLDB development
-- Progress towards un-allinged watchpoint support on AArch64 LLDB
-- Fix broken parts of LLDB testsuite on AArch64.
== Progress ==
o Linaro GCC validation (8/10)
* Reviewed, validated and committed more backports
* New stability issues after executor number increased
* Started to script branch merge
* Developed a new tool to avoid wasting time in gerrit/jenkins/logs
navigation
o Upstream GCC (1/10)
* Looked at and updated some bugzillas
o Misc (1/10)
* Various meetings
== Plan ==
o Continue backports/validation/branch merge
== Progress ==
* Widening pass (TCWG-547) – 6/10
- Looked at “Error: unaligned opcodes detected in executable segment”
* Spent lot of time trying to understand the root cause.
* Got some suggestions from Jim and looking into it.
- Posted some of the important patches for review.
* https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00399.html
* https://bugs.linaro.org/show_bug.cgi?id=1318 (2/10)
- Tried reproducing with the source provided without success.
- Could build and reproduce with emacs-24.4 release.
- Trunk GCC version 6.0.0 20150902 works.
- GCC version 4.9.3 20150209 (Linaro GCC 4.9-2015.02) fails.
* Misc - 2/10
- gcc-patches, gcc-bugs list
== Plan ==
* Continue with widening pass
* Fix Bug1318
Holiday [4/10]
Multinode wrapper - TCWG-350 [2/10]
* Merged to benchmarking branch, roughly documented
* Tested & added job definition templates
Setting up VPN [2/10]
* Much struggling with mutt, pgp, VM vs real system, Mac vs Linux
* Still not working, but wrote up what I've learned on the Collaborate page
Misc [2/10]
* ARM admin, meetings, mail, etc etc
=Plan=
Last pass through benchmarking presentation
Finish multinode/updating benchmarking docs
Back to Juno noise control experiments
Back to Jenkins - get it to drive multinode
(Reporting with new Jira numbers)
Holiday [6/10]
Investigate effectiveness of noise control - TCWG-358 [2/10]
* Learned to build OE filesystems
* Got Juno running with more or less provenance-tracked firmware,
kernel, filesystem
Misc - [2/10]
* Pushed through some updates to benchmark sources
* Struggled with Collaborate permissions to share source/results handling rules
* Remaining multinode tests passed
== This week ==
* TCWG-832 -Exploit vector multiply by scalar instructions when multiple
scalars are used as
coefficients in a loop (4/10)
- Continued investigation.
* TCWG-833 - Exploit Wide Add operations when appropriate (4/10)
- Reworked Aarch64 patch to avoid redundant moves
- Sent patch upstream for review
- Debugging Aarch64 tree-dump regression suite failures
- Bugzilla 57195 (mode iterator bug) blocked compiling new pattern (1/10)
- Separated patch from Bugzilla 67321 patch and sent upstream
- Pinged upstream for comments
* Misc (1/10)
- Conference calls
== Next week ==
- USA Labor day holiday, September 7th
- Additional investigation into TCWG-832
== This Week ==
* TCWG-120 (8/10)
- Resolved df issue in my patch, sent to tcwg list for review,
- VRP makes the issue latent at -O2. Reproducible with -fno-tree-vrp
- Taking another approach to run a "specialized" combine pass before
combine pass that
folds arm_andsi3_insn/arm_cmpsi_insn to zeroextracsi_compare0_scratch
or andsi3_compare0_scratch without relying on combine.
Patch: http://pastebin.com/gLVg7pbN
Asm diff at -O1: http://pastebin.com/yXBHHkhM
Asm diff at -O2 -fno-tree-vrp: http://pastebin.com/EKj6hXkt
* Misc (2/10)
- Meetings
- Had a look at vect test-cases failing due to LTO
== Issues ==
- No access to Juno
- Can't login to IRC via ZNC (can connect directly).
== Next Week ==
- Continue with TCWG-120
- Start looking at TCWG-80
== Progress ==
* Holidays (4/10)
* Buildbots (2/10)
- Several breakages, Clang alignment issue sill breaking
self-hosted bots...
* Maintenance (2/10)
- Backtracks on the TargetParser, code heavily modified,
discussions ensued.
- Helping Vinicius with __aeabi_memcpy in the kernel
* Releases (0/10)
- Release 3.7.0 final validated / uploaded
- Waiting for final switch
* Background (2/10)
- Code review, meetings, discussions, etc.
- Backlog of emails, reviews
== Plan ==
Look at libc++ / RT / unwind again see if I can reduce the errors in
both AArch64 and ARM to zero.
== Issues ==
The power cuts and the effect it had on my buildbots made me spend 3
days of my holidays to fix. Other buildbot breakages made me spend
another 2, and I couldn't wait until I was back, or it would have
wasted an entire week (as it has happened before).
In a nutshell, I can't have holidays. Yay!
# Progress #
* Holiday on Monday [2/10]
* TCWG-857, [4/10]. All the multi-arch work are done
(I hope) but patches can't be sent out until kernel patches
are pushed in upstream.
** Collect some arguments from kernel folks to defend my change
"32-bit CPSR to 64-bit PSTATE". Patch is posted out.
** Finish the patch to convert siginfo_t between 32-bit debuggee
and 64-bit debugger. Done. Will post it next week.
** Get right TLS base in multi-arch debugging. Patch is done.
* Happen to see we can improve GDB performance in some case by
avoid sending some packets. Patch is done, but need to collect
some performance data. [2/10]
* Misc [1/10]
** Close some tickets, TCWG-567, TCWG-876, as they are done.
* TCWG-757 [1/10], many patches review.
# Plan #
* Continue to upstream multi-arch patches.
* Upgrade my juno board kernel to git master to test kernel patches
for multi-arch debugging work properly.
* Collect some GDB performance data for my patch.
--
Yao
Hi-
It seems that there is some discrepancy between Linaro GCC 4.8 2015.06 and Linaro GCC 4.8 2014.11 with regards to precompiled headers.
It appears that 2015.06 doesn't even attempt to open the precompiled headers according to strace. I have been looking on gcc mailing list but have not been able to find any fixes related to precompiled headers.
Does anyone have any pointers as to what should I be looking at to get to the bottom of this issue?
This simple program compiles without any problems on 2014.11, but fails on 2015.06 because 2015.06 doesn't even attempt to read tst.h.gch created by "make header"
dragans@tst:~$ cat Makefile
PROJ=tst
CC=arm-linux-gcc
LD=arm-linux-ld
all: header $(PROJ)
header: $(PROJ)._
cp $(PROJ)._ $(PROJ).h
$(CC) -x c-header -c $(PROJ).h
$(PROJ):
$(RM) $(PROJ).h
$(CC) $(PROJ).c -o $(PROJ)
clean:
$(RM) $(PROJ).h.gch $(PROJ).h $(PROJ)
dragans@tst:~$ cat tst._
#include <stdio.h>
dragans@tst:~$ cat tst.c
#include "tst.h"
int main(int argc, char**argv)
{
char *s = "Test";
printf("%s\n", s);
return 0;
}
== Progress ==
LLDB development
-- Testing and bug fixing lldb on hikey AArch64 [TCWG-886] [7/10]
-- Improve error handling of AArch64 watchpoint code. Submitted,
got reviewed and committed http://reviews.llvm.org/D12328
-- Looked into ways to improve watchpoint installation lag.
-- Looked into issues pertaining to un-alligned watchpoints installation.
-- Committed upstream arm hardware breakpoint and watchpoint support
[TCWG-770] [TCWG-794] [1/10]
-- Ran lldb testsuite in various combinations to figure out Arm and
AArch64 status [1/10]
-- Testing on chromebook with precise chroot works.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Try to find ways to debug lldb-server platform forked gdbserver instance.
-- Test, debug and fix testsuite failures on Arm and AArch64.
== Progress ==
LLDB development
-- Testing and bug fixing lldb on hikey AArch64 [TCWG-886] [2/10]
-- Looked into watchpoint tests which are still failing after
committing watchpoint support and bug fixes.
-- Modifications to arm hardware breakpoint and watchpoint support
[TCWG-770] [TCWG-794] [7/10]
-- Resubmitted the pending patch http://reviews.llvm.org/D9703
-- Testing on chromebook with precise chroot works.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
-- Looking into slow data transfer issues on chromebook and highkey board
== Plan ==
LLDB development
-- Get patches reviewed and committ them.
-- Continue looking into tests which are still failing on Arm and AArch64
-- Run test comparison between linux x86, android arm and linux arm
o 3 days off (6/10)
== Progress ==
o Linaro GCC validation (3/10)
* Reviewed, validated and committed on-going backports
* backported more revisions
o Misc (1/10)
* Various meetings
== Plan ==
o Continue backports/validation
== Progress ==
* Annual Leave (2/10)
* Widening pass (TCWG-547) - 6/10
- Fixed all execution test failure.
- bootstrap failure due to “Drop copy-rename” is still not resolved.
Found a workaround.
- Sorted debug_stmt handling
* TACT 1/10
- Started looking to cross execution set-up
* Misc - 1/10
- gcc-patches, gcc-bugs list
== Plan ==
* Continue with widening pass
== This Week ==
* TCWG-777 (3/10)
- Fixed ICE with the patch - toolchain builds with the patch.
- Sent patch to tcwg list for review
- Investigating why combine fails to combine
arm_andsi3_insn/arm_cmpsi_insn into zeroextractsi_compare0_scratch
when the pass uses ud-chains to find def but works
when def is found using ad-hoc way.
* TCWG-871 (4/10)
- Getting familiar with firefox build system
- LTO build lto/non-lto on x86 and arm (doc)
- Figuring out how to resolve "plugin needed to handle lto object" error.
tried the following:
binutils configured with: --enable-plugin, --enable-lto
gcc configured with: --enable-lto --with-ld-plugin=<just built ld>
Doesn't appear to work.
* TCWG-835 (1/10)
- Build failure with spec (PR67399)
* Misc (2/10)
- Meetings
- Looked at rtl dataflow (df.h and df*.c) and ree.c
== Next Week ==
Continue with TCWG-777, TCWG-835, TCWG-871
== This week ==
* TCWG-832 -Exploit vector multiply by scalar instructions when multiple
scalars are used as
coefficients in a loop (2/10)
- Initial investigation.
* TCWG-833 - Exploit Wide Add operations when appropriate (4/10)
- Ramana is reviewing Aarch32 patch
- Recoded Aarch64 support to use vect_select
- Debugging Aarch64 lto, tree-dump regression suite failures
* TCWG-834 - Use non-unit stride loads by preference when applicable (1/10)
- TCWG 834 is Bugzilla 67323 upstream; Richard Biener took ownership
as a vectorizer failure
- My plan was to write a test case that failed until fixed, but
Richard indicated this is not
standard practice
- Bugzilla 57195 (mode iterator bug) blocked compiling new pattern (1/10)
- Separated patch from Bugzilla 67321 patch and sent upstream
- Pinged upstream for comments
- Bugzilla 67320 - Incorrect standard names for wide addition (1/10)
- committed upstream in trunk
* Misc (1/10)
- Conference calls
== Next week ==
- Resolve Aarch64 TCWG-833 patch, validate and upstream
- Additional investigation into TCWG-832
# Progress #
* TCWG-857 [3/10]
With one kernel fix, HW breakpoint works for unaligned address
(2-byte aligned).
Debug linux kernel with KGDB. KGDB exposes an existing GDB bug, I
fixed it, but need some time thinking about how to submit it upstream.
* TCWG-567, arm watchpoint fixes [4/10]. All fails are fixed, but need
another round of test to confirm. ARM HW watchpoint doesn't work on
4.0.0 kernel, but I don't investigate on it.
* TCWG-757 [2/10], some patches review.
* Misc, meeting, [1/10]
# Plan #
* TCWG-857.
* Upstream the leftover of aarch64 multi-arch patches.
--
Yao
== Progress ==
o Linaro GCC validation (9/10)
* Analysed x86_64 fstack-protector and sse2 issue
* This is due to "ulimit -v" usage which brakes asan testing
and gcc testsuite caching mechanism.
* Validation is now stable on Hetzner/Austin hardware
* Documented summer validation issues
* Validate and committed on-going backports
o Upstream GCC (0/10)
* Armeb OOM fix committed into gcc-5
o Misc (1/10)
* Various meetings
== Plan ==
o 3 days off
o Continue backports/validation
== Progress ==
* Widening pass (TCWG-547) - 8/10
- Fixed all but one execution test failure.
- aarch64 and x86 are clean
- arm has one but this looks like a latent issue (in expand); looking
into it
- Latest trunk with aarch64 miscompiles stage2 fwprop (-fno-forwprop
works).
This happens with the commit 94f92c36a83d66a893c3bc6f00a038ba3dbe2a6f
[PR64164] Drop copyrename, use coalescible partition as base when
optimizing
- Tried forcing the same promote_mode for x86_64 and can reproduce it
with x86_64 also.
- Looking into it to see if this is an error with the commit
* Misc - 2/10
- gcc-patches, gcc-bugs list
== Plan ==
- Continue with widening pass
Upcoming Absences
* Away from this Wednesday until next Tuesday, inclusive
Benchmark infrastructure - TCWG-360 [1/10]
* Finished filling out cards/bugs for benchmarking work
* Which makes the rest of this report more fine-grained
Multinode wrapper - TCWG-888 [2/10]
* Completed oversubscription workaround
* Herded most tests through
* Uncovered one significant bug, seems fixed
Centralized source/results storage - TCWG-722 [1/10]
* Wrote draft of source/results handling rules
* Confirmed that old repos are subsets of new repos
Noise control experiments - TCWG-897 [2/10]
* Learned more about firmware, openembedded
* Juno running a minimal filesystem, needs some tidying up
Misc [4/10]
* Including a further 1/10 of ARM management
=Plan=
* Herd remaining multinode tests through
** Depends on LAVA lab coming back from power cut
** And queues being short enough
* Progress (finish?) Juno bring-up
* Share source/results rules draft
== This week ==
* TCWG-833 - Exploit Wide Add operations when appropriate (8/10)
- Reworked patch to use vect_select instead of unspec as requested
by Ramana
- Bugzilla 57195 (mode iterator bug) blocked compiling new pattern
- Created patch which successfully bootstrapped
- Created Bugzilla 67320 - Incorrect standard names for wide
addition (documentation bug)
- Successfully regression tested Aarch32 changes
- Send Aarch32 patch upstream for review
- Reworking patch for Aarch64 to use vect_select as well
- Created Bugzilla 67321 - [ARM] Exploit wide adds when appropriate
- Created Bugzilla 67322 - [Aarch64] Exploit wide adds when appropriate
* TCWG-834 - Use non-unit stride loads by preference when applicable (1/10)
- Created Bugzilla 67323 to track until fixed in GCC 6 by Richard Biener
- Began writing test case that fails
* Misc (1/10)
- Conference calls
== Next week ==
- Respond to Aarch32 TCWG-833 upstream requests and hopefully check-in patch
- Complete Aarch64 TCWG-833 patch, validate and upstream
- Finish testcase for TCWG-834 and submit upstream
== Progress ==
* Maintenance (CARD-1833 2/10)
- Fixing libc++abi build on AArch64
- Trying to remove a hack in ARMTargetInfo about default CPUs
- Bisecting PR24292
- Working with ARM to fix it, backport
* Buildbots (CARD-1823 8/10)
- Working with Adhemerval on VMA 42bits sanitizer
- Setting up a libc++ "full" build on the second stage, since
gcc can't build it yet. 171 tests fail.
- Ubuntu Vivid (39-bits VA / 4k pages) with Uboot is
the winner of stability, speed and easiness.
- Power outage meant I had to unbreak *a lot* of broken stuff
* Background (2/10)
- Code review, meetings, discussions, etc.
- Some Android/TSAN/AArch64 shenanigans
== Plan ==
Holidays all week
== Issues ==
Yes, it does add up to 12/10, since I had to work most of Saturday and
some of Sunday to fix the mess that the power cuts made on our lab.
If we had generators, that wouldn't have happened.
== This Week ==
* TCWG-835 (2/10)
- Testing on SPEC CPU2006
- Found ICE while testing on spec unrelated to my patch, created
reduced test-case.
* TCWG-777 (2/10)
- Working on RTL pass - enhanced it so it only replicates insn when required.
- Prototype patch works for the test-case but ICE's during toolchain build.
- Trunk generates expected output for -O2, git-bisect shows from r226516
* TCWG-871 (1/10)
- Built for x86_64 non LTO
- Trying to cross compile for ARM
* Sick Leave (2/10)
* Public Holiday (2/10)
* Misc (1/10)
- Meetings
== Next Week ==
- Continue with TCWG-777, TCWG-835, TCWG-871
# Progress #
* TCWG-806, aarch64 remote debugging multi-arch
support. Patches are pushed in. Done. [2/10]
* TCWG-857, HW breakpoint/watchpoint in multi-arch. [3/10]
Both GDB and linux
kernel needs some fixes. Fix one bug in GDB. Read ARMv8 manual about
byte address select for thumb code (2-byte aligned instruction) and
the implementation in kernel.
* TCWG-757 some patches review, [1/10]
* Misc [4/10]
** ARM new starter training on Wed. afternoon and Thu.
** Read early-debug https://gcc.gnu.org/wiki/early-debug
# Plan #
* TCWG-857.
* Update the state of some old linaro tickets on GDB.
--
Yao
Hi,
I compiled the Linaro cross tool chain for arm v7 SOC and using the buildroot to create the images. When I use the downloaded precompiled tool chain from linaro releases, I am not facing any issues. But with compiled tool chain, multiple packages are failing with similar to below mentioned error. I tried building cross tool chain on both redhat and Ubuntu machines. When I see the difference of gcc -v, the cross compile is with "--host=x86_64-build_unknown-linux-gnu" and the pre compiled is with "--host=i686-build_pc-linux-gnu". I tried with "crosstool-ng-linaro-1.13.1-4.9-2014.08.tar.bz2" and "crosstool-ng-linaro-1.13.1-4.9-2014.09.tar.bz2".
configure:25287: checking for MD5 in -lcrypto
configure:25312: /projects/broadcom-linux/dhananjay/nas/iproc/buildroot/output/host/usr/bin/arm-linux-gnueabihf-gcc -std=gnu99 -o conftest -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -pipe -Os -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 conftest.c -lcrypto >&5
/projects/broadcom-linux/dhananjay/toolchain/tool9/toolchain/lib/ct-ng-linaro-1.13.1-4.9-2014.08/install/lib/gcc/arm-linux-gnueabihf/4.9.2/../../../../arm-linux-gnueabihf/bin/ld: warning: libdl.so.2, needed by /projects/broadcom-linux/dhananjay/nas/iproc/buildroot/output/host/usr/arm-buildroot-linux-gnueabihf/sysroot/usr/lib/libcrypto.so, not found (try using -rpath or -rpath-link)
-bash-4.1$ uname -a
Linux lab-rtp-gw-05 2.6.32-358.23.2.el6.x86_64 #1 SMP Sat Sep 14 05:32:37 EDT 2013 x86_64 x86_64 x86_64 GNU/Linux
Can somebody help me here.
Thanks
Dhananjay
Hi Linaro Toolchain Group,
I am trying to compiling cross aarch64-linux-gnu toolchain using local
directory (tar file) for gcc.
I am using file:/// as mentioned in the https://wiki.linaro.org/ABE.
../abe/abe.sh --target aarch64-linux-gnu --build all --release
20150819 --tarbin
gcc=file:///home/vpathak/arm/toolchain/build/snapshots/gcc-2015.11-5.tar.bz2
But I get following error:
ERROR (#146): get_URL (not supported for .tar.* files.)
ERROR (#533): get_source
(file:///home/vpathak/arm/toolchain/build/snapshots/gcc-2015.11-5.tar.bz2
not a valid sources.conf identifier.)
TRACE(#190): checkout ()
ERROR (#193): checkout (No URL given!)
ERROR (#161): checkout_all (Failed checkout out of gcc.)
Am I missing something ? How can we use a local directory (e.g. gcc
source code) for building toolchain using abe ?
Please help.
Thanks.
--
with regards,
Virendra Kumar Pathak
== Progress ==
LLDB development
-- Testing and bug fixing lldb on hikey AArch64 [TCWG-886] [7/10]
-- Submitted following fixes and got them reviewed
-- http://reviews.llvm.org/D11899
-- http://reviews.llvm.org/D11902
-- http://reviews.llvm.org/D11987
Miscellaneous [3/10]
-- Meetings, emails, discussions etc.
-- 14th August Public Holiday
== Plan ==
LLDB development
-- Further progress on fixing test failues on hikey AArch64.
-- Testsuite status compilation for armel and armhf
== Progress ==
* Short week due to GNU Cauldron Travel
* Widening pass (TCWG-547) - 3/10
- Looked at the false positive warning for uninitialized variable
- Have a reduced test-case and looking at ways to fix this
- Split the patch for easy review
- Fixed test-cases and going through all the test-case failures
* Misc - 2/10
- gcc-patches, gcc-bugs list
- Looked at gcc vectorization
== Plan ==
- Widening pass
== Progress ==
o Linaro GCC validation (4/10)
* Validation issues investigation
* Austin's APM board seems more reliable
* New validation instability on x86_64 discovered:
- Analysis on-going but it is related to fstack-protector
* Waiting for VPN access
o Upstream GCC (4/10)
* Reworked OOM issue on armeb-linux-gnu target fix
* Patch committed on trunk
* Backport on gcc-5 validated and about to be committed
o Misc (2/10)
* Various meetings
* Team member support
== Plan ==
o Continue on validation
o Redo FSF branch merge after big-endian fix committed.
Benchmark infrastructure - TCWG-360 [6/10]
* Fixed remaining known critical issues in multinode
** Testing stymied by LAVA oversubscription
** Attempted to implement some workarounds for oversubscription
* Some discussion/investigation on generating filesystems for benchmarking
* Started brain-dumping state of infrastructure into cards.linaro.org
Bringing up Juno for noise control experiments [1/10]
* Some struggles with firmware/bootloader configuration
Misc [3/10]
Featuring some ARM management duties
= Plan =
* Get benchmarking tests through, if LAVA permits
* Fix any critical issues discovered
* Finish brain-dump into cards.l.o
* Bring up Juno for noise control experiments
* Some more ARM management
== This week ==
* TCWG-140 - Transform end of loop conditions to min_expr (4/10)
- Wrote initial test case as requested by maintainers
- Need to determine how to not run test case on targets with no
MIN_EXPR/MAX_EXPR
* TCWG-833 - Exploit Wide Add operations when appropriate (4/10)
- Fixed internal error by using unspec for vector sign/zero-extend
- Fixed multiple issues with test cases
- Investigating why gcc.dg/vect/slp-reduc-3.c with lto is regressing
for aarch32 and aarc64
- Investigating two additional regression failures on aarch64
* TCWG-834 - Use non-unit stride loads by preference when applicable (1/10)
- Spoke with Richard Biener at GNU cauldron.
- He indicated this was a problem with a interaction problem with
vectorizer not attempting multiple strategies
- He indicated that he planned to fix this for GCC 6 and not to
attempt a fix
- My plan is to write a test case that fails until the issue is
addressed in GCC 6
* Misc (1/10)
- Conference calls
== Next week ==
- Resolve testsuite regressions for TCWG-833
- Create bugzilla reports for TCWG-833 and TCWG-834
- Write testcase for TCWG-834 and submit upstream
- Investigate TCWG-832 as time permits
== This Week ==
* TCWG-777 (4/10)
- Working on RTL pass, prototype patch works for the test-case.
- updating the trunk to r226907 , it appears combine can fold
arm_andsi3_insn/arm_cmpsi_insn
into zeroextractsi_compare0_scratch at -O2 while not at -O1.
.* TCWG-835 (2/10)
- Testing patch with Spec 2006
- Found ICE unrelated to my patch
* Misc (4/10)
- Travel to home from GNU Tools Cauldron 2015, Prague.
== Next Week ==
- Continue working on TCWG-777
- Continue testing TCWG-835 patch with SPEC 2006
== Progress ==
* Buildbots (CARD-1823 6/10)
- Setting up new APMs
- Running around for a decent UEFI, Kernel, Distro
- Testing different builds, configurations
- Managed to get one APM doing the test-suite *only*! sigh...
- http://buildmaster.tcwglab.linaro.org/builders/clang-cmake-aarch64-lnt
* Background (4/10)
- Code review, meetings, discussions, etc.
- Doing more reviews than usual due to buildbot work being erradic
- Laptop is playing stupid again
== Plan ==
* Moar bots
* Moar code review
* Maybe some vodka, to wash it all up
== Progress ==
LLDB development
-- Testing and bug fixing lldb on hikey AArch64 [TCWG-886] [9/10]
-- Debugging of watchpoint test failures and problems with multiple
watchpoints.
-- Clean-up of AArch64 watchpoint code and fixing watchpoint cache bugs.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Submit and get review on bug fixes for lldb on hikey AArch64 code changes.
-- Investigate further lldb test failues on hikey AArch64.
Miscellaneous
-- Friday 14th August, Independence day public holiday in Pakistan.
== Progress ==
o Linaro GCC validation (4/10)
* Look at the various validation issues we have
* Dug into the logs, restarted jobs, asked to restart
builders/testers. etc ...
o Upstream GCC (5/10)
* Investigate OOM issue on armeb-linux-gnu target
* Found the issue and raised an upstream bugzilla:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67127
* Submitted a fix for it
o Misc (1/10)
* Various meetings
== Plan ==
o Continue validation babysitting
== Progress ==
LLDB development
-- Setup lldb test debug environment for testing failing tests on
chromebook. [1/10]
-- Debug various lldb hang scnarios on chromebook for armhf support
[TCWG-855] [4/10]
-- Figure out alternate fix for http://reviews.llvm.org/D11129.
[TCWG-855] [3/10]
Miscellaneous [2/10]
-- Fix chromebook malfunction due to battery issues
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Debug lldb test cases on armhf to figure out problems in
individual test-cases
-- Create an updated lldb development project plan on JIRA.
-- Update collaborate with steps on LLDB development process.
== Progress ==
* Widening pass (TCWG-547) - 8/10
- Handled review comments.
- Improved CONVERT_EXPR handling.
- Re based and retested - found some failures.
- This was due to VRP reusing the range info computed in VRP1 after
type promotion is applied. Invalidating the range info when type is
promoted.
- ARM with type promotion now improves (-O2) about ~2.8% with one tiny
benchmark (where it used to regress).
- Still some test cases failures (not execution failures but scanning
certain patterns in the dump/asm).
* Misc - 2/10
- Connect slides.
- gcc-patches, gcc-bgs list
- Meetings
== Plan ==
- Widening pass
== This week ==
* TCWG-146 - Detect smin/umin idiom (1/10)
- Incorporated final feedback and submitted code in SVN
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Misc. discussion upstream about concerning where optimization
should be performed
- Upstream maintainers asked me to create gimple ir test case
* TCWG-833 - Exploit Wide Add operations when appropriate (1/10)
- Unable to validate yet
* TCWG-834 - Use non-unit stride loads by preference when applicable (5/10)
- Further Aarch32 investigation to determine where decision to forgo
vld3 decision is being made
* Linaro connect preparation (1/10)
* Misc (1/10)
- Conference calls
== Next week ==
- Validate patches for TCWG-833 and submit upstream
- Further TCWG-834 investigation
- GNU Cauldron conference and travel
== This Week ==
* TCWG-835 (4/10)
- Validated and submitted patch upstream for review.
- Made changes to patches according to upstream reviews.
- Microbenchmarks: http://pastebin.com/tDnHZuG5
* TCWG-777 (5/10)
- Investigating different ICE's caused by my gimple remove-temps pass
- Looked at expansion of GIMPLE_COND
- Trying to write rtl version of remove-temps pass
* Misc (1/10)
- Conference calls
== Next Week ==
- Continue with TCWG-777
- GNU Tools Cauldron 2015
== Progress ==
* Performance (CARD-1832 1/10)
- Checking differences of PostRAListSched on OOO ARM cores
- Not many changes, ignoring for now
* Maintenance (CARD-1833 4/10)
- Building libc++/abi/unwind in LLVM/Clang tree
- Getting -Wa,-mfpu patches in, last important Clang driver ARM bug
- Some patches to get libunwind and libc++ to compile in-tree on ARM
- Fixed native sub-features detection (http://llvm.org/PR12794)
* Background (5/10)
- Code review, meetings, discussions, etc.
- Long discussions about TargetTuple/TargetParser/Triple
- Lots of patch reviews this week (I mean, *A LOT*)
- Moving some machines around, checking for Chromebook batteries
- Setting up cross-builder using multiarch / QEMU
- Some future planning
== Plan ==
* Look for some more performance issues in 3.7
* Try to hook up the cross-builder
* Investigate libc++ check-all failures
Benchmark infrastructure - TCWG-360 [8/10]
* Testing found many problems in multinode
* Iterating to solutions
Misc [2/10]
=Plan=
Holiday next week.
Then back to fixing multinode, incorporating into jenkins, noise
control experiments
Hi Linaro Toolchain Group,
I am building a native toolchain for aarch64 with below configurations:
--build=x86_64-unknown-linux-gnu --host=aarch64-linux-gnu
--target=aarch64-linux-gnu.
In copy_gcc_libs_to_sysroot() - which copy libgcc.a to sysroot, current
implementation try to find the absolute path of libgcc.a as below :
libgcc="`${local_builds}/destdir/${host}/bin/${target}-gcc
-print-file-name=${libgcc}`
But above line will not execute (i.e. gcc -print-file-name) on x86_64 as
the toolchain is native toolchain for aarch64-linux-gnu. Thus a infinite
loop will be created in copy command i.e. copying directory x in x.
however, when I hard coded the libgcc.a path in my machine (as below),
everything went fine.
libgcc="/home/vpathak/arm/toolchain/build_abe_new/builds/destdir/aarch64-linux-gnu/lib/gcc/aarch64-linux-gnu/5.1.1/libgcc.a"
I think this is a bug in ABE build infrastructure.
Thanks.
--
with regards,
Virendra Kumar Pathak
* TCWG-806, aarch64 remote debugging multi-arch support. [4/10]
Patches are done. Need to test them and polish them.
Fix various multi-arch issues when --wrapper is used in GDBserver.
Patches are pushed in to mainline.
Could you describe this activity in more detail?
Is the goal here to support mixed aarch32/aarch64 in the same GDB binary
and detect the change at runtime?
Thanks.
-Duane
== Progress ==
* Factor conversion out of COND_EXPR - TCWG-849 (5/10)
- Iterated through the review and more testing
* Looked at widening pass and the test-case from Wilco (1/10)
* Misc (2/10)
- Connect slides.
- gcc-patches, gcc-bugs list
- Meetings
* Sick (2/10)
== Plan ==
- GCC Bugs
- Widening pass
- Linaro bug 1318
== This week ==
* TCWG-146 - Detect smin/umin idiom (1/10)
- Made change recommended upstream and resubmitted
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Validated and submitted upstream
* TCWG-833 - Exploit Wide Add operations when appropriate (5/10)
- Added early clobber and forced operand 0 and operand 2 to match
- Finished Aarch32 by using mode iterators
- Developed patch for Aarch64
- Wide add instructions are now emitted for both Aarch32 and Aarch64
* TCWG-834 - Use non-unit stride loads by preference when applicable (2/10)
- Further Aarch32 investigation
* Misc (1/10)
- Conference calls
== Next week ==
- Validate patches for TCWG-833 and submit upstream
- Further TCWG-834 investigation
- Linaro connect presentation preparation
* TCWG-835 (6/10)
- Looked at newton raphson method
- Need to write new md pattern that matches sdiv_optab for modes == v2sf, v4sf
- First attempt for patch: http://pastebin.com/NKy8WdWC
* TCWG-830 (2/10)
- Ran Charles's benchmarks on ARM and AArch64.
- Investigating testsuite fallout for ARM patch.
- Still blocked by permissions to do benchmarking
* Misc (2/10)
- Conference Calls
- US visa collection
== Next Week ==
- Continue with TCWG-830, TCWG-835, TCWG-777
Hi Linaro Toolchain Group,
I am trying to learn the 'decoding decision tree' for aarch64 in binutils
by trying to add a new assembly instruction 'addvp'.
For example: addvp x0, x0, 9
For this, I added a entry in struct aarch64_opcode aarch64_opcode_table[]
(file opcodes/aarch64-tbl.h) as below:
{"addvp", 0x01000000, 0x7f000000, addsub_imm, 0, CORE, OP3 (Rd_SP, Rn_SP,
AIMM), QL_R2NIL, F_SF},
ARM manual say, bit 27 & bit 28 are unallocated. Thus for addvp, I am
giving opcode 01000000 (with bit 27 & 28 as 0).
With this, generating object file from assembly file is successful (test.s
--> test.o); but while disassembling using objdump, it say undefined
instruction.
>From objdump log:
81002400 .inst 0x81002400 ; undefined
(but instruction was generated correct i.e. 81002400 !!!).
I know since addvp is a hack instruction, it won't execute on cpu. But
still disassembly should succeed.
1. Please help me in knowing what I am doing wrong here ? What else I
should do to add a new instruction in binutils ?
2. I also saw some printf in opcodes/aarch64-gen.c which I guess create
decoding tree (initialize_decoder_tree()). How to print them ? I made debug
=1 but still print is not coming.
3. There are some auto-generated files
like aarch64-asm-2.c, aarch64-dis-2.c. How to re-generate them ?
Thanks.
--
with regards,
Virendra Kumar Pathak
== Progress ==
* Maintenance (CARD-1833 5/10)
- Building libc++/abi/unwind in LLVM/Clang tree
- Fixing some build errors (D11486)
- Addressing comments to submissions from last week
- Committing approved ones
- Re-working the others
* Releases (CARD-1431 1/10)
- Building 3.7.0-RC1 on ARM and AArch64, uploading
* Benchmarks (CARD-716 2/10)
- Running LNT, SPEC and EEMBC on ARM and AArch64 for 3.7.0
* Background (2/10)
- Code review, meetings, discussions, etc.
- Upgraded APM to Debian, kernel 3.16
- Perf still segfaults. :(
== Plan ==
* Finish open reviews
* Continue getting libc++ to build and pass the tests in tree
* Look at some of the performance regressions in 3.7
# Progress #
* TCWG-806, aarch64 remote debugging multi-arch support. [4/10]
Patches are done. Need to test them and polish them.
Fix various multi-arch issues when --wrapper is used in GDBserver.
Patches are pushed in to mainline.
* TCWG-876 [1/10]
Re-run GDB testsuite with incoming Linaro toolchain release.
Everything looks OK.
* TCWG-860, aarch64 fast tracepoint. [1/10]
Polish the patches, and ready for submission.
* TCWG-757, upstream patch review. [2/10].
* Misc, meeting. [2/10]
# Plan #
* TCWG-806, test patches on different targets, polish patches
and post them for review.
# Absence #
06th Aug - 10th Aug, GNU Tools Cauldron.
11th Aug - 14th Aug, Holiday.
--
Yao
Benchmark infrastructure - TCWG-360 [6/10]
* Some user support/bugfixing/bugraising
* Multinode job more or less working (not fully tested)
* Additional restructuring got rid of some more complexity
** Though if my simplifying assumption doesn't hold, I'll have to put it back
Benchmarking 101 presentation [2/10]
* Ran through slides with Ryan & Maxim
* Removed many slides
* Collected up and categorized the removed slides
** Probably will go into future presentation(s)
Misc [2/10]
=Plan=
* Tweak multinode a little more
* Integrate multinode into Jenkins
** To the extent that I'm comfortable with the security
* Read a bit about some benchmarks that aren't SPEC
* Start noise control experiments (may inform presentation)
=Week After Next=
Holiday
* One day off - Bastille day (2/10)
== Progress ==
o Upstream GCC (3/10)
* Finalized and committed fix in trunk for Linaro bug #416
o Linaro GCC release (4/10)
* Reviewed and did more patches for tcwg-release script
* Still investigate validation issues.
* Prepared FSF branch merge into Linaro GCC 5 branch
o Misc (1/10)
* Various meetings
== Plan ==
- Summer Holidays (2 weeks)
== Progress ==
* Add REG_EQUAL note for arm_emit_movpair (1/10)
- Patch2 ok to commit.
- Ran complete validation.
- Found an issue and posted a patch to fix
* Factor conversion out of COND_EXPR - TCWG-849 (6/10)
- Found a performance regression in tree-ssa-reasoc
- Looked at the tree-ssa-reasoc code to see possible fixes
- Posted an RFC patch
* PR66865
- Wine segfaults from gcc in trunk (r225757)
- Reproduced it but turned out not from my commit
- Fixed by other PR
* Misc (2/10)
- Looked at interaction between gcc optimization passes
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- GCC Bugs
- TACT driven optimization exploration for gcc
- Linaro bug 1318
Benchmark infrastructure - TCWG-360 [5/10]
* Worked through my Jenkins issues with Fathi, raised some tickets at him
* Converting LAVA end into multinode job
** Having some trouble with multinode API
Benchmarking 101 presentation [3/10]
* 1/2 day of discussions/reading, full day of redrafting
* Looked for Michael Hope's similar 2012 presentation
** Found slides, not video
=Plan=
* Complete multinode job
* Integrate into Jenkins to the extent that I'm comfortable
* Complete 'shareable' draft of benchmarking-101
** And see if I have enough left over for -102, maybe -103
== This week ==
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Blocked waiting on validation
* TCWG-833 - Exploit Wide Add operations when appropriate (7/10)
- Developed patch to handle signed and unsigned cases for Aarc32
- Investigation and debugging into support for Aarch64
* TCWG-834 - Use non-unit stride loads by preference when applicable (1/10)
- Initial Aarch32 investigation
* Misc (1/10)
- Conference calls
== Next week ==
- Validate Aarch32 patch for TCWG-833
- Develop Aarch64 patch for TCWG-833
- Validate TCWG-140
- Make recommended fixes to TCWG-146 and resubmit upstream
* TCWG-777 (3/10)
- O2 workaround: -fno-tree-pre -fno-tree-fre -fno-tree-dominator-opts
-fno-gcse -fno-peephole2
- Observing rtl dumps for gcse, combine, peephole2 with different
options and optimization levels.
- Continued investigating ICE during gcc build with my pass applied.
- Sent mail to tcwg, for further suggestions
* TCWG-830 (2/10)
- Verified the behavior for aarch64, and extended patch for aarc64
along same lines.
- Running Charles's microbenchmarks on r1-a7
- Benchmarking setup with Bernie. Blocked by permissions, sent a mail
to lava-lab,
for granting requisite permissions
* TCWG-835 (2/10)
- observing vector and asm dumps
* Misc (3/10)
- Travel to Mumbai for US Visa Interview
- Conference Calls
== Next Week ==
- Continue with TCWG-777, TCWG-835, TCWG-830
I'm trying to build the toolchain as win32 executable on Ubuntu with ABE.
I'm pretty new with ABE. I followed the FAQ
https://wiki.linaro.org/WorkingGroups/ToolChain/FAQ and Rob's post. Also
checked the MakeRelease.job and slave.sh. I have all packages listed in the
slave.sh installed. So I assume I have all dependencies ready for the build.
Here is what I have done:
Create _build subfolder beside abe
CD to _build and run: ../abe/configure --with-fileserver=148.251.136.42
--with-remote-snapshots=/snapshots-ref
First build this: ../abe/abe.sh --target aarch64-none-elf -build all
It installed the toolchain to
_build/builds/destdir/x86_64-unknown-gnu-linux. I added the bin under it to
my PATH
Then do 2nd round build: ../abe/abe.sh -host i686-w64-mingw32 --target
aarch64-none-elf -build all
However, I'm getting config error while it building libiberty:
configure:5946: checking for library containing strerror
Configure:5978: error: Link tests are not allowed after GCC_NO_EXECUTABLES.
My understanding is that the linker cannot find glibc or eglibc.
What have I missed?
Any where I can find detail instruction like step by step to build Linaro
toolchain for running on Windows host?
Sincerely,
Qyq
== Progress ==
* Maintenance (CARD-1833 4/10)
- Clang driver:
- Passing -Wa,-mfpu and friends to assembler (D11147, D11148)
- Passing -I to assembler (D11185)
- Don't include libgcc/asm if using libunwind/libc++abi (D11153)
- Asm warnings:
- Trying again to look for a way to disable asm warnings from clang (D11216)
* Benchmarks (CARD-716 3/10)
- Benchmarking shrink-wrapping in AArch64
- Setting up LNT Benchmarks on A32/A64
- Scripts to collate / compare LNT results on the fly
- Benchmarking LNT on 3.5.2 and 3.6.2 on ARM and AArch64
- Multisampling, perf, and all goodness
- Getting ready to compare with 3.7.0 to come
* Releases (CARD-1431 1/10)
- Spinning release 3.7.0
- Many changes, CMake builds, etc.
- Fixing the test-release.sh script (D11326)
* Background (2/10)
- Code review, meetings, discussions, etc.
- Upgrading APM to Debian 3.16
== Plan ==
* Upstreaming pending reviews
* Continue release 3.7.0, benchmark it
* Start looking at the effects of the stride vectorizer on ARM/AArch64
# Progress #
* TCWG-806, aarch64 remote debugging multi-arch support. [6/10]
Some code refactor and fix various multi-arch issues when --wrapper
is used in GDBserver. Patches are being tested.
* TCWG-757, Patches review. [2/10]
* Misc, meeting, [2/10]
# Plan #
* TCWG-806, aarch64 remote debugging multi-arch support.
# Absence #
* 06th Aug - 10th Aug, GNU Tools Cauldron.
* 11th Aug - 14th Aug, Holiday.
--
Yao
1 day off (2/10)
== Progress ==
* backports/release/infra (1/10)
- reviews
* GCC (3/10)
- posted patch to fix vget_lane on armeb
- investigating AdvSIMD failures on aarch64_be.
Having a way to debug target code would help (qemu does not seem
to support aarch64_be yet, and I use the foundation model in bare
metal mode)
* Misc (4/10)
- meetings, conf-calls, emails
== Next ==
Holidays until Aug 3rd.
Benchmark infrastructure - TCWG-360 [5/10]
* More thinking/prototyping sufficiently-secure Jenkins benchmarking
* Converting LAVA end into multinode job
Benchmarking presentation [2/10]
* A couple of helpful discussions
* Read a couple of helpful docs
Misc [3/10]
=Plan=
* Complete multinode job
* Settle on a plan for Jenkins
* Redraft presentation
== This Week ==
* TCWG-777 (4/10)
- Resolved ICE caused by pass during gcc build but hit another ICE:
http://pastebin.com/RUAY6scB
- Current pass state: http://pastebin.com/AGXnSkrZ
- For test-case:
void f(int flags)
{
void foo(void);
if (flags & 1)
foo();
}
- temporaries don't exist for -O1
- for -O2 temps introduced by peephole2 due to define_peephole2
pattern in thumb2.md:1540
http://pastebin.com/3rEF8Te4
So this intentionally transforms rtx from
zeroextractsi_compare0_scratch to rtx from shiftsi3_compare0_scratch.
Why is it beneficial to do this transform ?
- Looking into combine pass
- For above test-case works with -marm for -O2.
* TCWG-830 (3/10)
- trying to understand vect dump
- untested patch: http://pastebin.com/K4UX5iYz
* Misc (2/10)
- Started looking at TCWG-835, loop vectorized on x86 but not arm
- Committed fix to segfault on -dx
- Conference calls
== Next Week ==
- Continue with TCWG-777, TCWG-830, TCWG-835
- Travel to Mumbai on 14th July (Tuesday) for US Visa Interview with
US Consulate.
Hospital and physio (2/10)
== Progress ==
o Upstream GCC (2/10)
* More work on ongoing patches
o Linaro GCC release (3/10)
* Reviewed patches for tcwg-release script
* Looked at validation issues and redo backports for 5.1
o Misc (3/10)
* Various meetings
* Upstream libunwind support
== Plan ==
- Continue ongoing tasks
== Progress ==
LLDB development
-- Debugging problems with process launch and debugserver crash on remote
connection. [TCWG-855] [6/10]
-- Caught the notorious issue mentioned above fix can be found here
http://reviews.llvm.org/D11129.
-- Figured arm lldb and lldbserver host builds on chromebook will put
steps on collaborate LLDB page soon. [1/10]
Miscellaneous [3/10]
-- Travel to Islamabad for Czech Republic visa
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Follow up review process for process launch bug fix.
-- Run testsuite for armhf and figure out issues to fix.
-- Submit patches to fix build on older version of gcc.
Eid Holidays 17th to 21st July 2015
== This week ==
* TCWG-146 - Detect smin/umin idion (0/10)
- Waiting for upstream approval/review
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Blocked waiting on validation
* TCWG-833 - Exploit Wide Add operations when appropriate (8/10)
- Mere detailed investigation
- Working theory is to develop wide add rtl patterns that
incorporate vec_unpack to widen 16-bit to 32-bit
* Misc (1/10)
- Conference calls
- Conference call with Charles and Prathamesh to discuss
autovectorization progress
== Next week ==
- Validate patch for TCWG-140
- Develop patch for TCWG-833
- Validate TCWG-833 if successful patch is developed
- Investigate Aarch64 implementation
== Progress ==
* Add REG_EQUAL note for arm_emit_movpair (1/10)
- committed patch1 after testing again
* Factor conversion out of COND_EXPR - TCWG-849 (5/10)
- Gone through couple of iterations and committed the patch
- There are still some improvements need as follow up patches
* TACT -TCWG-851 (2/10)
- Started looking into spec2k
* Misc (2/10)
- Looked at interaction between gcc optimization passes
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- GCC Bugs
- TACT driven optimization exploration for gcc
- Linaro bug 1318
== Progress ==
* Releases (CARD-1431 1/10)
- Released 3.6.2-final
* Maintenance (CARD-1833 5/10)
- Reducing runtime of some benchmarks in LLVM's
test-suite by getting rid of millions of useless
fprintf calls.
- Working on https://llvm.org/PR20700 some more
* Background (4/10)
- Code review, meetings, discussions, etc.
- Long TargetTuple review (D10969) / discussions
- Replacing broken buildbot USB disks (need to buy more)
- Bisecting self-hosting bot breakage
- Testing patches for ARM
- Jira farming
== Plan ==
* continue PR20700
* continue review/discussion of TargetTuple
* look again at PR20757
* maybe look at PR21000
* Off Monday (2/10)
== Progress ==
* published linaro-4.8 and 4.9 2015.06 releases
* linaro-5.1-2015.07 (1/10)
- backport reviews
- updated my helper script for reviews for cope with the git-only branches
* upstream (1/10)
- started looking at vget_lane Neon intrinsic failure on armeb
* infra/release/backports (2/10)
- reviews
* Misc (4/10)
- meetings, conf-calls, emails
== Next ==
* Off Tuesday
* backports, release, validation: update doc
* backports, reviews
* upstream work
== Later ==
* Off July 18th-Aug 3rd
Hi Linaro Toolchain Group,
I am comparing execution time (run time) of sin() trigonometric function
between following glibc (including libm) libraries for aarch64 (juno cortex
a57) :
Linaro glibc 2.19, Linaro eglibc 2.19, eglibc 2.19 (from
http://www.eglibc.org/) and Linaro glibc 2.21.
My observation for execution time of sin():
with Linaro glibc 2.19 and eglibc 2.19 = 1m24.703s (approx)
whereas,
with Linaro eglibc 2.19 & Linaro glibc 2.21 = 0m25.243s (approx)
Has Linaro optimized the libm functions for aarch64 in Linaro eglibc 2.19 ?
If yes, please point me to relevant reference from where I can find more
information on them.
Since the eglibc development from version 2.19 has stopped, will Linaro
maintain its own development version of glibc ?
I am using below snippet code and linux 'time' command to calculate the
time.
void sin_func(void)
{
double incr = 0.732;
double result, count = 0.0;
printf("%s\n", __func__);
while (count < 105414350.0) {
result = sin(count);
count += incr;
}
}
Thanks.
--
with regards,
Virendra Kumar Pathak