== This week ==
* TCWG-619
- v8 LTO build with different options for x86 and aarch64.
- Reported upstream v8 LTO build failure on ARM.
- Tried to build chromium with FSF gcc, linaro binary release and
linaro-4.9-branch
* PR49551
- Not able to reproduce ICE with latest trunk (r221871).
* Misc
- College assignments submission and term end.
== Next Week ==
* TCWG-619
- Build chromium with linaro-4.9-branch and trunk.
- Prepare stats for LTO build with different options for v8 on x86 and aarch64
- Try building chromium with LTO with FSF trunk for arm
* TCWG-639:
- Add enhancement to header file flattening script.
== Progress ==
Friday holiday
* Automation Framework (CARD-1378 2/10)
- Power cut in the office
- Fixing gateway, rebooting machines
- Mob management
* LLVM ARM Maintenance (CARD-1833 2/10)
- ARMTargetParser review
* Background (4/10)
- Code review, meetings, discussions, etc.
- All LLVM buildbots broken (one still)
- Trying to merge Android round/exception
- https://android-review.googlesource.com/#/c/125910/1
- Not that easy, will need bigger changes and tests to go in
== Plan ==
* Long holidays
* EuroLLVM
* Back on the 15th
Hi,
I did some tests on the following function
--- CUT HERE ---
int fibo(int n)
{
if (n < 2) return 1;
return (fibo(n-2) + fibo(n-1));
}
--- CUT HERE ---
and I discovered that it is faster -O2 than -O3. This is with gcc 4.9.2.
Looking at the disassembly I see it is using FP registers to hold
integer values. The following is a small extract.
.L3:
fmov w0, s8
sub w25, w25, #1
cmn w25, #1
add w0, w0, w27
fmov s8, w0
bne .L19
add w0, w0, 1
b .L2
Recompiling with -mgeneral-regs-only generates a huge improvement.
The following are the times I get on various partner HW. I have
normalised the -O2 times to 1 second so that I do not disclose actual
partner performance data:
Partner 1: -O2 = 1sec, -O3 = 1.13sec, -O3 -mgeneral-regs-only = 0.72sec
Partner 2: -O2 = 1sec, -O3 = 0.68sec, -O3 -mgeneral-regs-only = 0.60sec
Partner 3: -O2 = 1sec, -O3 = 0.73sec, -O3 -mgeneral-regs-only = 0.68sec
Partner 4: -O2 = 1sec, -O3 = 0.83sec, -O3 -mgeneral-regs-only = 0.84sec
So, in general, -O3 does actually do better than -O2, but in all cases
performance is better if I stop it using FP registers for int values.
I have put a tarball of the test program along with 3 binaries and 3
disassemblies here:-
http://people.linaro.org/~edward.nevill/fibo.tar
All the best,
Ed.
Hi,
I'm seeing the following build error trying to build from the current master
branch (1ac806b) of http://git.linaro.org/toolchain/binutils-gdb.
make[3]: *** No rule to make target `-L../zlib', needed by `run'. Stop.
make[3]: *** Waiting for unfinished jobs....
make[3]: Leaving directory `gdb/sim/arm'
The following commit predating the zlib changes appears to build without error.
b19a8f8545100a08ee2a64c05631aff6f651faa1
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
catomics - TCWG-436 [5/10]
* Got pointed at a suitable set of benchmarks, results still underwhelming
* However, patches were using relaxed atomics rather than no atomics at all
* Fiddled abe into building sysroots for me (I get libstdc++ that way)
Misc - [5/10]
* Tidied up some 'perf shotgun' scripting from the juno cache
investigation, so I've got the tools for next time
* Started sorting out my backups - but didn't finish before build-01's
death destroyed a bunch of work
* Raised priority of sorting out my backups, now just a matter of
waiting on some large rysncs
* Pieced my world back together on dev-01
=Plan=
Holiday Wednesday, public holidays next Friday and Monday
See how catomics do when we're conditionally-not-atomic-at-all
Investigate a bit to see if I can see if there's a reason we were
using relaxed atomics
Resurrect Jira benchmarking on dev-01
* Will include some porting, scripts don't work out of box on dev-01
One day off on Friday. [2/10]
# Progress #
* aarch64 gdb, the number of FAIL is reduced to 26 on aarch64-linux!
there are still about 10+ FAILs can be fixed. [4/10]
** TCWG-726, fails in gdb.base/break-interp.exp. Fixed.
Remove prelink package from juno board as aarch64 isn't supported.
** TCWG-681, fails in savedregs.exp. Patch is committed.
** PR 18139. Patches are committed.
* arm gdb, 938 fails for -mfloat-abi=soft and 1014 fails for
-mfloat-abi=hard. Analysing fails. [2/10]
* GDB kernel-awareness meeting with ST. [1/10]
Understand the definition of "kernel-awareness", and will
discuss about the design upstreams later.
* TCWG-716, investigate LLDB perf testing. [1/10] Done.
** LLDB already had something about performance testing, in
lldb/test/benchmarks/ and lldb/tools/lldb-perf.
** TestCompileRunToBreakpointTurnaround.py compares the speed of LLDB
and GDB, but in an incorrect way.
# Plan #
* Take more care on arm gdb test fails.
* Fix the rest of aarch64 gdb fails.
--
Yao
== Issue ==
* none
== Progress ==
* Infrastructure and Validation (1/10)
* GCC Upstream (6/10)
- PR63587 and PR64871 committed in FSF 4.9 branch.
- PR64208 patch review is OK, but needs to be validate on an iWMMXT platform
(pinged some Marvell people).
- Submitted a fix for arm_subsi3_insn (alternatives issue). This is
a stage1 patch.
- Identified another insn which has alternatives issues in Thumb2.
* Release and Backports (1/10)
- Backflip maintenance
- 12 Backports for 2015.04 (CARD TCWG-699)
* Misc (2/10)
- Various meetings
- ST internal year review
== Plan ==
- Continue upstream work.
* ASAN/TSAN run on 42 bit VA Aarch64 (TCWG-634) (6/10)
Sent a patch that enables ASAN tests with 64 bit allocator on
amd-01 (AMD Seattle). All ASAN test passes in LLVM.
But on juno platform 39 bit VA does not have enough memory to map
hence we need to stay on 32 bit allocator.
Discussed with ASAN community and it is been decided to use 32 bit
allocator as default. They are not ok with having a mechanism to
detect VA and swutch allocators based on that.
Started looking at failures on amd-01 (AMD steatle) with 32 bit alloctor.
None of the ASAN tests ran when I switched to 32 bit allocator on amd-01.
Reason there is a spin mutex lock which is waiting for the memory
allocation to complete, but assertion failure makes it to wait
infinitely.
After fixing map range the assertion failure is gone but I keep
getting some failures with 32 bit allocator "on".
Bug869: Continued to look at ABS_EXPR cases (2/10).
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan, status meet
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
*Continue to fix TSAN/ASAN 32bit allocator failures on amd-01 .
* Bug869
== Progress ==
* Type promotion pass (zero/sign extension elimination) - TCWG-547 (2/10)
- Ran more benchmarks and gathered more data (will post the results)
- Need to run perf to analyse regressions
* Bug 1373 (1/10)
- Set-up back-porting infrastructure
- Ran into some issues
* TCWG-486 (6/10)
- Discussed with Jim and identified the issues and possible fixes
- Getting closer to an acceptable fix
- Need to run benchmarking
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
== Progress ==
LLDB development
-- Patch submission and build testing LLDB Arm SysV ABI classes
[1/10] [TCWG-643]
-- Patch submission and build testing LLDB AArch64 SysV ABI classes
[1/10] [TCWG-715]
-- Implemented native Linux register context for Arm [3/10] [TCWG-650]
-- Implemented POSIX register context for Arm [3/10] [TCWG-755]
-- Migrated LLDB wiki to collaborate.linaro.org and updated howtos
[1/10] [TCWG-640] [TCWG-641] [TCWG-583]
-- Another try on doing a native LLDB build on arm [1/10] [TCWG-647]
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Complete implementation and submit native Linux register context
for Arm upstream
-- Complete implementation and submit POSIX register context for Arm upstream
-- Patch reviews and upstream commits.
-- Start work on LLDB arm integration, testing and bug fixing.
Miscellaneous
-- Try LLDB armhf builds and figure out a way to do gcc 4.8 softfloat build.
== This Week ==
* TCWG-619:
- LTO and non-LTO builds of v8 and chromium on x86, arm, and aarch64 native and
x86->arm, x86->aarch64 cross.
- LTO build for v8 on arm native and with x86->arm cross works with linaro-4.8,
but not with linaro-4.9. Also appears to fail for trunk.
- Issues in building chromium cross x86->arm - undefined reference to
clock_gettime.
* PR 49551
- Patch approved by Charles.
== Next Week ==
- v8 LTO build with different lto options.
- Investigate LTO build failure for v8 on arm.
- LTO and non-LTO builds for chromium on x86, arm and aarch64.
- Submit patch to PR49551 for upstream review after testing on x86, arm.
== Progress ==
* Validation
- worked on stabilization of abe and jenkins jobs
* Backports
- a few reviews
* Misc
- meetings, conf-calls, emails, ...
== Next ==
* Validation: hopefully make the staging, then stable branches
== Progress ==
* Automation Framework (CARD-1378 5/10)
- Moving LLVM lab into llvm.tcwglab subnet
- Passing down my knowledge to the lab team
- Helping them set up the new builders
* Background (5/10)
- Code review, meetings, discussions, etc.
- Upgrading APM's compiler/binutils
- Writing LLVM Getting started wiki page
- Helping Adhemerval setup
== Plan ==
* Go back working on LLVM
== Progress ==
qemu-system experiment [4/10]
Tried to set up qemu-system for reliable simulated validation of tests
which don't work under qemu-user. Mostly works, but there is arcane
interaction between DejaGNU, gcc testsuite and board files which make
it a bit flakey. Interesting experiment, but I've dropped it for now
as there still niggles to iron out.
Misc [4/10]
Patch review for Prathamesh
Backporting stuff
ABE bugzilla stuff
Benchmarking results
Emails/doc review about Lab infrastructure
Holiday Friday [2/10]
== Plans ==
Holiday Monday
Investigate autovectorization
Next backport
== Progress ==
LLDB development
-- Implemented LLDB Arm SysV ABI classes [3/10] [TCWG-643]
-- Implemented LLDB AArch64 SysV ABI classes [3/10] [TCWG-715]
-- Started implementation of Arm native register context [1/10] [TCWG-650]
-- Figure out steps to run lldb-remote testsuite on Arm and AArch64
[1/10] [TCWG-640] [TCWG-641]
-- Try to build lldb-server natively on chromebook [1/10] [TCWG-647]
Miscellaneous [1/10]
-- Meetings, emails discussions.
-- Updates to wiki pages for LLDB howtos
== Plan ==
LLDB development
-- Complete implementation and submit LLDB Arm SysV ABI classes upstream
-- Complete implementation and submit LLDB AArch64 SysV ABI classes upstream
-- Further progress on implementation of native register context
-- Begin implementation of POSIX monitor register context for arm.
Miscellaneous
-- Migrate LLDB pages to collaborate.linaro
ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (6/10)
* Juno does not have space for kernel allocator map demanded by
ASAN, So we need to remain on 32 bit allocators only.
* amd-01 went offline. So moved to internal machine in AMD.
Debugging LLVM test failures in GDB showed that ASLR should be
turned off and also the shadow offset is set at 1<<36 and is not
changing when I fix it in asan_mappings.h file .
Manually changing shadow offset to 1<<39 fixes some segfaults.
Bug869: Continued to look at ABS_EXPR cases (2/10).
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
*Continue to fix TSAN/ASAN 64 bit allocator failures on amd-01 .
* Bug869
== Issue ==
* none
== Progress ==
* Infrastructure and Validation (1/10)
- Validate staging builders, still some issues with guality tests
* GCC Upstream (5/10)
- PR64208 submitted a patch that fixes the LRA ICE for iwmmxt target.
- PR63587 and PR64871 submitted patches that backport the fixes into
FSF 4.9 branch. Patches approved, to be committed.
* Release and Backports (3/10)
- Finished Backflip improvements, dev branch merged into master.
- Presented this new features, stacked backports process and conflict
handling during our GCC team weekly meeting.
* Linaro Bugzilla (-/-)
- #1322 - Identified it as already resolved on our 4.8 branch.
* Misc (110)
- Various meetings
== Plan ==
- Continue on upstream bugzillas, backports and validation.
catomics - TCWG-436 [6/10]
* Started a series of runs on a local board I'd borrowed
** Then had to give it back before they'd really got anywhere
* Got some, possibly dubious, results back from A15 from previous week
** If the results are worth anything, they suggest that catomics don't
achieve anything
* Started again with a subset of SPEC on juno-01, as it was on my desk
for the weekend anyway
** Results again underwhelming
** Maybe I picked the wrong subset, maybe A57 is too smart
Misc [4/10]
* Including a little 'juno cache effects' followup, a little juno-01
work, and a lot of mail catchup
=Plan=
* Get back to benchmark automation
** Apply a bunch of small improvements I've got on a branch
** Get a working Jenkins backport benchmarking prototype
** Sort out sources/results storage
* Think about why catomics may not be showing any effect
** Starting to believe that this is a red herring
** But might be interesting to try 'little' class cores
** But that does involve finding a reliable target I can hold for a long time
Juno cache effects - LDTS-1238 [6/10]
* Seems to be mainly due to (expected) instruction scheduling
limitations, and prefetcher effects
* Reported back, hopefully this will wrap up now
catomics - TCWG-436 [1/10]
* Shepherding benchmark runs in LAVA, usual problems with ssh-agent,
juno contention and random target failure
* Almost no actual data produced
benchmark automation - TCWG-360 [1/10]
* User support, some discussion about extent of our juno usage
* Something weird happened in Jenkins, _might_ have been a one-off due
to slaves moving around
Misc - [2/10]
* Featuring juno-01 fixing
TCWG-619:
- Cross compiled v8 on ARM using linaro toolchain (binary release).
- Built chromium LTO native
- Building v8 on ARM with LTO results in ICE at lto_tag_to_tree_code.
- Buiilding v8 (without LTO) with linaro-4.9-branch results in ar error.
- Cross compiling chromium on ARM with LTO using linaro toolchain
segfaults ld
- Using gcc-nm, gcc-ar works as a work-around for "plugin needed to
handle lto object" error
TCWG-621:
- Finished refactoring sel-sched-ir.h
* Bugs
- PR49951: Modified patch to fix few test-cases.
* Misc:
- Internal college event on Saturday.
== Next Week ==
- TCWG-619
- Test patch for PR49951 and submit upstream.
- Refactor lra-int.h
== Progress ==
* type promotion pass (zero/sign extension elimination) - TCWG-547 (6/10)
- Fixed LTO testcase failure
- Native testing on arm chromebook found three more failures
- Fixed all of them
- Setup spec2006 on chromebook
- spec2006 with -O3 -mfpu=neon -march=armv7-a -fno-common shows some
(12 of them) regressions even though there are some gains (17 of them).
- GEOMEAN is the same.
- 437.leslie3d regresses 18% for -O3 but improves 16% if I use -O2 in
both the original and with the patch
- some optimizations like vectorization could be impacted (?)
- restarted the full benchmarking at -O2
* TCWG-620 (1/10)
- read more documents and looked at code samples
* TCWG-486 (2/10)
- Latest trunk didn’t work with the patch I had
- Original patch Zhenqiang also behaves similar. Looking into it.
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
== Progress ==
* Thursday off (2/10)
* Buildbots (CARD-1823 1/10)
- Fixing llvm-apm-01 (disk problem)
- Fixing llvm-d01-04 (my bad)
* Releases (CARD-1431 1/10)
- Spinning release 3.5.2 RC1, all green
* Automation Framework (CARD-1378 3/10)
- A lot of time wasted in infra shenanigans
* Background (3/10)
- Code review, meetings, discussions, etc.
- Reviewing, testing and committing ARM11 patch by Tinti
- Getting ircproxy to work
- Broken bots a-plenty
== Plan ==
* Fork LLVM lab out of TCWG
* Zillions of patches to review
* Continue target description changes
* Welcome Adhemerval, setup LLD track
* Catch up with Omair on LLDB
# Progress #
* aarch64 gdb , TCWG-652, [7/10]
** TCWG-663, TCWG-680: closed, as patches are committed
** TCWG-681, TCWG-664: in progress, patches are posted upstream for
review.
The current FSF mainline GDB on aarch64-linux only has 46 FAILs
in the remote testing!
* arm gdb remote testing on pandaboard, [1/10]
There are 3584 FAILs! Have no chance to triage them yet.
* fsf gdb, [2/10]
** Clean up gdbarch method cannot_step_breakpoint.
** Take a look at the state of C++ move in GDB. Offer some help on this
project.
* misc [1/10]
** Meeting and internal trainings.
# Plan #
* Other cards under TCWG-652.
* TCWG-682, Investigate on GDB/LLDB performance.
* Write up some slides to help people understand what GDB can
do for the incoming meeting.
--
Yao
Hi all
I am trying to compile poky-dizzy-12.0.1(MACHINE ?= "beaglebone") using
meta-toolchain.
so i downloaded dizzy from
http://downloads.yoctoproject.org/releases/yocto/yocto-1.7.
1/poky-dizzy-12.0.1.tar.bz2
meta-linaro from
https://git.linaro.org/openembedded/meta-linaro.git
I have changed bblayers.conf as below
# LAYER_CONF_VERSION is increased each time build/conf/bblayers.conf
# changes incompatibly
LCONF_VERSION = "6"
BBPATH = "${TOPDIR}"
BBFILES ?= ""
BBLAYERS ?= " \
/home/praveenk/work/poky-dizzy-12.0.1/meta \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto-bsp \
/home/praveenk/work/poky-dizzy-12.0.1/meta-linaro/meta-linaro-toolchain \
"
BBLAYERS_NON_REMOVABLE ?= " \
/home/praveenk/work/poky-dizzy-12.0.1/meta \
/home/praveenk/work/poky-dizzy-12.0.1/meta-yocto \
I added required changes in local.conf
MACHINE ?= "beaglebone"
DEFAULTTUNE = "cortexa8hf-neon"
PREFERRED_PROVIDER_glibc ?= "glibc"
PREFERRED_VERSION_gcc ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-initial ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-intermediate ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-canadian ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk-initial ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-crosssdk-intermediate ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-runtime ?= "linaro-4.9%"
PREFERRED_VERSION_nativesdk-gcc-runtime ?= "linaro-4.9%"
PREFERRED_VERSION_libgcc ?= "linaro-4.9%"
PREFERRED_VERSION_nativesdk-libgcc ?= "linaro-4.9%"
PREFERRED_VERSION_gcc-cross-canadian-${TRANSLATED_TARGET_ARCH} ?=
"linaro-4.9%"
but still it is building gcc-4.9 instead of gcc-linaro-4.9
below is the log
WARNING: Could not copy license file COPYING: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING'
WARNING: Could not copy license file COPYING: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING'
WARNING: Could not copy license file COPYING3: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3'
WARNING: Could not copy license file COPYING3: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3'
WARNING: Could not copy license file COPYING3.LIB: [Errno 2] No such file
or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3.LIB'
WARNING: Could not copy license file COPYING3.LIB: [Errno 2] No such file
or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING3.LIB'
WARNING: Could not copy license file COPYING.LIB: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.LIB'
WARNING: Could not copy license file COPYING.LIB: [Errno 2] No such file or
directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.LIB'
WARNING: Could not copy license file COPYING.RUNTIME: [Errno 2] No such
file or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.RUNTIME'
WARNING: Could not copy license file COPYING.RUNTIME: [Errno 2] No such
file or directory:
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/COPYING.RUNTIME'
ERROR: Function failed: do_configure (log file is located at
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074)
ERROR: Logfile of failure stored in:
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074
Log data follows:
| DEBUG: Executing python function sysroot_cleansstate
| DEBUG: Python function sysroot_cleansstate finished
| DEBUG: SITE files ['endian-little', 'bit-32', 'arm-common',
'common-linux', 'common-glibc', 'arm-linux', 'arm-linux-gnueabi', 'common']
| DEBUG: Executing shell function autotools_preconfigure
| DEBUG: Shell function autotools_preconfigure finished
| DEBUG: Executing python function autotools_copy_aclocals
| DEBUG: Python function autotools_copy_aclocals finished
| DEBUG: Executing shell function do_configure
| 0 blocks
| chmod: cannot access
'/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work-shared/gcc-linaro-4.9-r2014.11/gcc-linaro-4.9-2014.11/libgcc/configure':
No such file or directory
| WARNING: exit code 1 from a shell command.
| ERROR: Function failed: do_configure (log file is located at
/home/praveenk/work/poky-dizzy-12.0.1/build/tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/libgcc/linaro-4.9-r2014.11/temp/log.do_configure.26074)
ERROR: Task 692
(/home/praveenk/work/poky-dizzy-12.0.1/meta-linaro/meta-linaro-toolchain/recipes-devtools/gcc/
libgcc_linaro-4.9.bb, do_configure) failed with exit code '1'
== Progress ==
LLDB development
-- Got lldb-server executable running on aarch64 target but debug
connection not working [1/10] [TCWG-640]
-- Got lldb-server executable running on arm target [1/10] [TCWG-641]
-- Started collecting missing pieces for arm lldb linux run control
support [2/10]
-- Written wiki pages for LLDB developer process [1/10]
GDB Development
-- Started writing tests for arm-gdb instruction recording [0.5/10] [TCWG-677]
-- Started writing tests for aarch64-gdb instruction recording
[0.5/10] [TCWG-517]
Miscellaneous [3/10]
-- Trying out 96board network setup with powered usb ethernet dongle
-- Emails/Meetings etc
-- Sick Day on Friday 13th March
== Plan ==
More work for ARM and AArch64 support in LLDB
Do some more work on arm/aarch64 gdb instruction recording tests
== Progress ==
LLDB Development
-- Tried lldb-server cross build for AArch64 target on x86 host
[1/10] [TCWG-640]
-- Tried lldb-server cross build for ARM target on x86 host [4/10] [TCWG-641]
GDB Development
-- Started writing tests for arm-gdb instruction recording [3/10] [TCWG-677]
-- Started writing tests for aarch64-gdb instruction recording
[1/10] [TCWG-517]
Miscellaneous [1/10]
-- Some work on setting up 96board for testing lldb-server
-- Emails/Meetings etc
== Plan ==
More work for ARM and AArch64 support in LLDB
Do some more work on arm/aarch64 gdb instruction recording tests
* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (3/10)
Tried various allocator sizes in juno, still fails.
On amd-01, Debugging LLVM test failures in gdb.
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe. status call.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
* AMD internal meeting (4/10)
* Half day off on 12/3/2015(1/10)
== Plan ==
*Continue TSAN/ASAN support look why 64 allocator on juno is failing .
* Bug869
== Progress ==
Off sick [4/10]
Backporting [2/10]
. unexpected conflicts and test failures meant that previous attempts
were abandoned
. will try again for 2015.04
Benchmarking [1/10]
. one config failed, restarted in Jenkins
. accessing Jenkins benchmarks still requires help from Bernie due to
permissions
Misc [3/10]
. emails about bugs
. meetings
. verification of lab fixes
== Progress ==
* Linaro bugs (2/10)
#1325
* type promotion pass (zero/sign extension elimination) - TCWG-547 (5/10)
- tried to improve some of the aspects and made it more aggressive
- improved handling of CASE_CONVERT
- tried it on CoreMark and it reduces the number of instructions
in per object file basis.
- bootstrapped the latest improvement on x86-64 and regression tested
on x86-64, ARM and AARCH64. noticed few LTO failures on ARM and AARCH64.
Looking into it.
- Plan to run spec2k again
- Current version at linaro-dev/type-promotion-pass
(https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=refs/heads/linaro-dev/typ…)
* Misc (1/10)
- gcc-patchs and gcc-bugs list
* Public Holiday (2/10)
== Plan ==
* TCWG-620 and TCWG-547
== This week ==
* TCWG-619:
- Cross compiled chromium for ARM without LTO
- Ran into issues with native and ARM lto build of chromium
* GCC Modularization Project:
* TCWG-621:
- Begun refactoring sel-sched-ir.h
* TCWG-639:
- Fixed issue with header flattening script.
* Bugs:
- 1178: Another triage, got reviewed from Charles.
* Backports:
- r218232, r218525.
== Next week ==
* Continue investigating LTO build issues on ARM and x86.
* submit patch to 1178 upstream.
* Target hook conversion
== Progress ==
* Automation Framework (CARD-1378 4/10)
- Restarting more dead machines
- Discussing more infrastructure
- Investigating PDU deamon
* Maintenance (CARD-1833 4/10)
- Making the case for all table-gen files to be built
- This would allow us to create TargetDescription
- Which would ease target-specific knowledge on all tools
- And common up the parser for fpu/cpu/arch features
- Adding commit message guidelines to developer policy
* Background (4/10)
- Code review, meetings, discussions, etc.
- Discussions about CMake, options, etc
- Cleaning up gateway, moving LLVM services to llvm server
- Making serial connections work for LLVM machines
- Fiddling with HiKey board
== Plan ==
* Continue TargetDescription changes
* Continue PDU investigations
* Move serial to abe, so we can work around auth issues
# Progress #
* aarch64 gdb , TCWG-652, [6/10]
** TCWG-663: Patches are posted upstream for review. Bernie gives me a
pandaboard and set it up. I can do HW breakpoint testing for both
aarch64 and arm.
** TCWG-670: Patch is posted upstream for review. Takes some time
to understand aarch64 syscall name and number.
** Write some bash scripts to test my gdb patches.
* fsf gdb patch review [2/10]
** Review and approve catch syscall code refactor.
* misc [2/10]
** two meetings.
# Plan #
* Other cards under TCWG-652.
* Investigate on GDB/LLDB performance.
* TCWG-660: Teach ABE to import systemtap and build glibc with
--enable-systemtap.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.03
engineering release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2015.03 is the twelfth Linaro GCC source package
release in the 4.9 series. It is based on FSF GCC 4.9.3-pre+svn221341
and includes performance improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include
* Linaro bugzilla PR fixed : #1149, #1291, #1314
* Updates to GCC 4.9.3-pre+svn221341
* Backport of PR tree-optimization/61607
* Backport of PR tree-optimization/64878
* Backport of PR bootstrap/63204
* Backport of PR ipa/63196
* Backport of PR tree-optimization/64083
* Backport of PR tree-optimization/64284
* Backport of PR middle-end/64246
* Backport of Abstract away marking loops for removal
* Backport of Sanity check removed loops
* Backport of [AArch64] Tighten predicates on SIMD shift intrinsics
* Backport of [AArch64] Wire up vqdmullh_laneq_s16 and vqdmullh_laneq_s32
* Backport of [AArch32/AArch64] Improve modeled latency between FP operations
and FP->GP register moves
* Backport of [AArch64] Adjust generic move costs
* Backport of [AArch64] Add range-check for Symbol + offset addressing
* Backport of [AArch64] Add vector pattern for __builtin_ctz
* Backport of [AArch64] Bics instruction generation for aarch64
* Backport of [AArch64] additional bics patterns
* Backport of [AArch64] Fix wrong-code bug in right-shift SISD patterns
* Backport of [Haifa Scheduler] Fix latent bug in macro-fusion/instruction
grouping
* Backport of [testsuite] Fix vaddl and vaddw tests
* Backport of [testsuite] revert changes on check_effective_target_arm_*_ok
* Backport of [testsuite] new set of Neon intrinsics tests
* Backport of [testsuite] fix vbic/vorn Neon tests
* Backport of [testsuite] Add explicit dependency on Neon Cumulative Saturation
flag
* Backport of [testsuite] Be more verbose, and actually confirm that a test was
checked.
* Backport of [testsuite] Add vld1_lane tests
* Backport of [testsuite] Add vldX_dup test.
* Backport of [testsuite] Add vmla and vmls tests.
* Backport of [testsuite] Add vmla_lane and vmls_lane tests.
* Backport of [testsuite] Add vtrn tests. Refactor vzup and vzip tests.
* Backport of [testsuite] Add vmlal and vmlsl tests.
* Backport of [testsuite] Add vmlal_lane and vmlsl_lane tests.
* Backport of [testsuite] Add vmlal_n and vmlsl_n tests.
* Backport of [testsuite] Add vqdmlal and vqdmlsl tests.
* Backport of [testsuite] Add vqdmlal_lane and vqdmlsl_lane tests
* Backport of [testsuite] Add vqdmlal_n and vqdmlsl_n tests.
* Backport of [testsuite] Add vsli_n and vsri_n tests.
* Backport of [testsuite] Add vsubl tests, put most of the code in common with
vaddl in vXXXl.inc.
* Backport of [testsuite] Add vsubw tests, putting most of the code in common
with vaddw
* Backport of [testsuite] Add vmovn tests.
* Backport of [testsuite] Add vmul_lane tests.
* Backport of [testsuite] Add vmul_n tests.
* Backport of [testsuite] Add vmull tests.
* Backport of [testsuite] Add vmull_lane tests.
* Backport of [testsuite] Add vmull_n tests.
* Backport of [testsuite] Add vqdmulh tests.
* Backport of [testsuite] Add vqdmulh_lane tests.
* Backport of [testsuite] Add vqdmulh_n tests.
* Backport of [testsuite] Add vqdmull tests.
* Backport of [testsuite] Add vqdmull_lane tests.
* Backport of [testsuite] Add vqdmull_n tests.
* Backport of [testsuite] Add vsubhn, vraddhn and vrsubhn tests.
* Backport of [testsuite] Add vmla_n and vmls_n tests.
* Backport of [testsuite] Add vpadd, vpmax and vpmin tests.
* Backport of [testsuite] Add vmovl tests.
* Backport of [testsuite] Add vmnv tests.
* Backport of [testsuite] Add vpadal tests.
* Backport of [testsuite] Add vpaddl tests.
* Backport of [testsuite] Add vmax, vmin, vhadd, vhsub and vrhadd tests.
The release tarball will be available on: http://releases.linaro.org/
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
Hi,
Linaro GCC 4.9 2015.01 source package has been respun and deployed on:
http://releases.linaro.org/15.01/components/toolchain/gcc-linaro/4.9
This package release contains two fixes for Linaro bugzilla's PR:
* #1291 - ICE (segmentation fault) on arm-linux-gnueabihf
* #1314 - ICE (in in expand_expr_addr_expr_1, at expr.c:7634) on
arm-linux-gnueabihf
You can find the original 2015.01 announcement below
Regards,
Yvan
---------------------------------------------------------------------------------------------------------------------
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.01
engineering release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2015.01 is the tenth Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.3-pre+svn219502 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include
* Linaro bugzilla PR fixed : #902
* Updates to GCC 4.9.3-pre+svn219502
* Backport of [AArch64] Support SISD variants of SCVTF,UCVTF
* Backport of [AArch64] Fix ICE in aarch64_float_const_representable_p
* Backport of [AArch64] Switch to sched-pressure by default.
* Backport of [AArch64] Add scheduler for ThunderX
* Backport of [AArch64] Remove crypto extension from default for cortex-a53,
cortex-a57
* Backport of [AArch64] doloop pattern for -fmodulo-sched
* Backport of [AArch32] Add execution tests of ARM REV intrinsics.
* Backport of [AArch32] Post-indexed addressing for NEON memory access
* Backport of [AArch32] Improve 64 bit division performance (serie)
* Backport of [AArch32] Revert 215321 backport.
* Backport of [AArch32/AArch64] Add ACLE 2.0 predefined macros
* Backport of PR tree-optimization/54742 - extend jump thread for finite state
automata
* Backport of PR target/61997 - cc1plus ICE with aarch64 target using PCH and
builtin functions
* Backport of PR target/63724 - Fix up BSL expander for floating point types
* Backport of [LRA] Relax one gcc_assert in lra-eliminate for fixed register
* Backport of Add clobber_reg function
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the
full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* Linaro bugs (6/10)
#1291 #1293, #1314
* Home PC crashed and required hardware upgrade and software
re-installation (2/10)
* Improve register allocation for AArch64 (TCWG-620) - (1/10)
- preparations for benchmarking of proposed changes
* Misc (1/10)
- gcc-patchs and gcc-bugs list
== Plan ==
* TCWG-620 and TCWG-547
* ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocator (TCWG-634) (5/10)
* Bug 869 (2/10)
* Bug 1266(1/10)
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe. status call.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
* TSAN/ASAN support look why 64 allocator on juno is failing .
* Look at ASAN failures if 64 allocator is enabled on amd-01.
* AMD internal meeting on Tuesday and Wednesday
== Progress ==
* Automation Framework (CARD-1378 5/10)
- Setting up new servers
* Background (5/10)
- Code review, meetings, discussions, etc.
- Updating some LLVM dev scripts
- Adding tools checks to LNT
- EuroLLVM Paper selection
- LLDB/ARM meetings
- Bisecting lots of failures in all bots
== Plan ==
Go back developing LLVM for a change...
Juno cache effects - LDTS-1238 [6/10]
* Ran more experiments
* Cobbled together some gdb/python script to run perf stat within an
address range
* Becoming more confident in my hypotheses
catomics - TCWG-436 [1/10]
* Found and fixed some more sysroot benchmark bugs
* Kicked off a bunch of spec runs, waiting for the results to come back
Benchmark automation - TCWG-360 [1/10]
* A couple of post-lab-maintenance fixups
* Took a first look at result consistency with a broken run intended
for catomics
Misc - [2/10]
* Featuring the start of fixing juno-01
=Plan=
Finish fixing juno-01
Carry on looking at LDTS-1238, hopeful of confirming hypotheses
Analyse catomics results (assuming that they land)
Carry on with Jenkins, if time
== Issue ==
* none
== Progress ==
* Linaro Bugzilla: (5/10)
- #1149: 4.9-2015.01 miscompiles GCC trunk on aarch64-linux-gnu
* Backported upstream bug fix in 2015.01 re-spin branch and our 4.9 one.
- #1291: [4.9 Regression] ICE (segmentation fault) on arm-linux-gnueabihf
* Identified a set of upstream revision that fixe the issue
* Backported them in 2015.01 re-spin branch and our 4.9 one.
- #1314: [4.9 Regression] ICE (in in expand_expr_addr_expr_1, at expr.c:7634)
on arm-linux-gnueabihf
* Identified that it's a duplicate of an upstream bug on 4.9
branch (PR 61207)
which is itself a duplicate of an already fixed bug on trunk (PR 64896)
* Tested backport of the fix on on 4.9 branch.
* Release and Backports (4/10)
- Re-spin 2015.01 source release with fixes for Linaro bugs: #1149 and #1291
- Various supports of backporting activity
- Reviewed some backports
- Discussed our new release/maintenance policy
- Worked on Backflip improvements
* Misc (1/10)
- Various meetings
== Plan ==
* Backport PR 64896 fix into FSF 4.9 branch
* Backport/FSF Merge/Release duty
== Progress ==
Benchmarking 2015.02 [2/10]
. it turns out to be difficult to build previous releases with abe.sh
(bz#776, bz#1307)
. submitted patch to gerrit to improve abe.sh error handling
. benchmarks started on Jenkins
Backports [4/10]
. investigating incorrect merge discovered in review
. resolved... then found more conflicts with other backports
. need to redo backports
bug #1254 [1/10]
. reduced
. started investigating
misc [1/10]
. mailing lists
. meetings
== Plan ==
redo backports of 217440, 217885
start backports of 218021, 218534
bug#1254
vectorization investigation
look at benchmarking results from Jenkins
# Progress #
* aarch64 gdb , TCWG-652, [6/10]
** TCWG-662: Fixed and committed (by Pedro).
** TCWG-660: Rebuild toolchain with ABE.
** TCWG-663: Root cause of fails are known, that test case sets HW
breakpoint on arbitrary address while aarch64 HW breakpoint requires
4-byte align. ARM has the similar HW breakpoint feature, need to
to check on arm target too.
* fsf gdb patch review [2/10]
** Review and approve one patch from IBM which fixes TCWG-669 too.
** Discuss on re-org for syscall catchpoint for different target/arch.
* misc [2/10]
** Meeting.
** Move to the new house.
# Issues #
* Need an ARM board with HW breakpoint support in kernel. I tried
32-bit system on my juno board via schroot, but
PTRACE_SETHBPREGS doesn't work properly.
# Plan #
* TCWG-660: Teach ABE to import systemtap and build glibc with
--enable-systemtap.
* TCWG-663: See how the tests behave on ARM if ARM board is available.
* Other cards under TCWG-652.
--
Yao
== Progress ==
* Validation: (2/10)
- reached a state where Jenkins "green" actually means no regression found
- submitted patches for review
- confirmed that ABE master branch produces results similar to merge branch
- stopped checking the accuracy of report.sh since a few bugzilla
had been submitted, using ST script instead
* Backports (3/10)
- reviews are getting difficult, with lots of conflicts as the 4.9
branch has diverged from trunk quite a lot
* Sanitizers (1/10)
- trying to build LLVM+run the ASAN tests on AArch32
- tried to reconfigure my Hikey 96board with a 42 VA bits enabled
kernel, but it didn't boot: I still don't have access to such a
platform
* GCC FSF trunk/4.9 monitoring
- stopped tracking random "Interrupted system call"
- builds and validations now run faster, but with more frequent such errors
* Misc (4/10)
- meetings, conf-calls, emails, ...
- Release/maintenance branches policy, respin criteria, validation matrix
== Next ==
* Backports: reviews, and improve review-tool
* Sanitizers
Hi,
I have being trying to persuade gcc to generate the ldp instruction without success. I have tried many combinations, below is an example.
--- cut here ---
#define LDP(x,y,p) { \
struct vec { long x, y; } data; \
data = *(struct vec *)p; p += 2; \
x = data.x; y = data.y; \
}
long testp(long *p) {
long x, y;
LDP(x, y, p);
return x+y;
}
--- cut here ---
$ gcc --version
gcc (GCC) 4.9.1
Copyright (C) 2014 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
$ gcc -S -O3 ldp.c
$ cat ldp.s
.cpu generic+fp+simd
.file "ldp.c"
.text
.align 2
.global testp
.type testp, %function
testp:
ldr x1, [x0,8] ;; why not ldp?????
ldr x0, [x0]
add x0, x1, x0
ret
.size testp, .-testp
.ident "GCC: (GNU) 4.9.1"
What can I do do make it generate ldp?
Ed.
== Progress ==
Bug triage [2/10]
Bug 1199 analysis [4/10]
reproduced, studied IRA dumps for a while, will have to report this upstream
Backports + BackFLiP enhancement [3/10]
Misc [1/10]
meetings, git training presentation, mailing lists
== Plans ==
benchmark 2015.02 release
more bugs
== Progress ==
LLDB development
-- Some code sniffing and created JIRA cards with some task estimation [2/10]
-- Trying AArch64 cross build and update howto [1/10]
-- Trying Arm cross build and update howto [2/10]
GDB patch updates and test cases for ARM record-replay instruction
recording [4/10]
Miscellaneous [1/10]
-- 96board with custom kernel no success with getting ethernet
working on it yet
== Plan ==
Wind up all pending gdb patches
== Issue ==
* none
== Progress ==
* Release and Backports (6/10)
- Supported backporting activity
- Added new feature to Backflip
- Discussed redefinition of release/maintenance policy
* Misc (4/10)
- Various meetings
- Catch up with mails
- Updated GCC release process in collaborate
- HiKey
== Plan ==
* Release and backport support
== This week ==
Short week - 3 days. Took Sat, Sun off due to health issues, severe
ear infection -:(
* Modularization project
a) TCWG-637: Applied TLC to parser in include-remove tool
b) TCWG-621: Began refactoring rtl.h
c) TCWG-628.
* TCWG-619:
- Started going through LTO documentation.
* Bugs
1178: Found a possible fix, prevents the ICE for the test-case.
== Next week ==
* TCWG-619
* Submit fix to 1178 upstream
* TCWG-628
== This week ==
* GCC Modularization project
- TCWG-621: Refactoring rtl.h almost completed.
- TCWG-639: Working on rewriting the tool in python.
- TCWG-637: Working on basing the tool on rtags instead of ctags.
- TCWG-629: Continue target-hook conversion.
* Backports:
- Submitted following backports for review:
r215612, r215722, r219656, r219657, r219659, r219661
== Issues ==
- Building chromium dependencies.
- Cannot log in to NX session on tcwg-env-05.
== Next Week ==
- Chromium LTO build (TCWG-619)
- Validate and commit backports.
== Progress ==
* compiler-pass to widen computation (TCWG-547) - (7/10)
- ran into -std=gnu90 issue in compiling spec2k/2006 with the trunk
using the new infrastructure
- ran benchmarking but the results are not much different
- tried with -save-temps but the intermediates are gone. Not sure if
infrastructure cleans it
- setting up spec2k in nx aarch64 chroot for easy comparison of
intermediate values (asm and tree dumps)
- also plan to try benchmarking with widening pass enabled only for
unsigned type where BIT_AND_EXPR (zero_extend) is optimized well as
compared to new middle-end ZEXT_EXPR (which is not handled well yet) to
see if the difference is there.
* Improve register allocation for AArch64 (TCWG-620) - (1/10)
- Looked at the relevant patches and code
* https://bugs.linaro.org/show_bug.cgi?id=1291 (1/10)
* Misc (1/10)
== Plan ==
* TCWG-620 and TCWG-547
* https://bugs.linaro.org/show_bug.cgi?id=1291
* TSAN support for Aarch64 (5/10)
TCWG-642
Discussed on making -pie for -fsanitize=thread as default in GCC.
Learnt that LLVM sanitizers now support both -pie and non -pie mode.
Discussed the same issue with sanitizer's group. They asked me to
do -pie for aarch64 as first version. Pushed GCC changes to
linaro git.
TCWG-654
Discussed with Renato, moved to LLVM tree and woking on that.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64946.
TCWG-634
Ran ASAN tests which 32 bit allocator code now as default on amd-01.
/home/venkataramanan.kumar/LLVM/TSAN_port/Source/projects/compiler-
rt/lib/sanitizer_common/sanitizer_allocator.h:841
((res)) < ((kNumPossibleRegions)) (4193146, 524288)
I got similar error in TSAN and it went off when I switched to 64
bit allocator.
* Bug 869 - Wrote a pattern in match.pd to remove type promotion in
ABS_EXPR . Richard Beiner suggested to add ABSU_EXPR to take care of
signed overflows (3/10)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64946
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, maxim and Ryan.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
* TSAN/ASAN support look if 64 allocator is needed or not .
* LLVM build with local patches.
* Bug869.
* Misc and Meetings (AMD, LInaro)
== Progress ==
* Releases (CARD-1431 2/10)
- Spinning RC4, final, all green
* Buildbots (CARD-1823 1/10)
- Adding new quick Thumb2 non-NEON bot
- Adding new full self-hosting Thumb2 bot
* Libraries (CARD-1831 1/10)
- Trying to build a soft-float compiler-rt test-suite
* Sanitizers for AArch32/64 (CARD-1753 4/10)
- Investigating/fixing broken sanitizer bots (4 failures)
- Investigating other sanitizer failures on Junos
- More planning on TSAN, ASAN
* Background (2/10)
- Code review, meetings, discussions, etc.
- Reviewing the remaining EuroLLVM papers
- More LLDB planning
== Plan ==
* LLDB meeting with Google
* EuroLLVM final paper review meeting
* Continue building test-suite with Compiler-RT, libc++
* Continue help on ASAN/TSAN
* Try our first sprint planning...
# Progress #
* aarch64 gdb, TCWG-652, [5/10]
** TCWG-653: triage fails in aarch64-linux gdb testing, both native and
remote. Nearly done.
** TCWG-670: Clean up GDB testsuite for syscall catchpoint first.
Ongoing.
** TCWG-672: GDB can't unwind from glibc with the expected function name
if glibc is stripped. Nearly done.
** Committed two patches upstream fixing two fails on aarch64-linux
target.
** Clean up arm and aarch64 bug reports on sourceware.org bugzilla.
* fsf gdb patch review [4/10]
** Reviewed Omair's two process record GDB patches.
** Reviewed one patch may cause fails on remote testing.
* misc [1/10]
** 1x1 with Ryan.
** With Bernard's help, set up ssh access to linaro servers.
# Plan #
* All cards under TCWG-652.
* Move out of temporary apartment to a rented one on Friday.
--
Yao
Go away where ? ABE just uses whatever triplet you give it. I commonly use just arm-linux-gnueabi for example. If you don't specify 'none', it shouldn't appear anywhere. If it does, let me know and I'll fix it.
- rob -
-------- Original message --------
From: Christopher Covington <cov(a)codeaurora.org>
Date: 02/26/2015 2:52 AM (GMT+07:00)
To: linaro-toolchain(a)lists.linaro.org
Subject: Debian Multiarch Tuple Style Naming With ABE
Hi,
I recently built with ABE for the first time. It's pretty slick.
Is there a way to make the vendor string (the "none" in
"arm-none-linux-gnueabihf-*") go away? It breaks my scripts without appearing
to add value.
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
linaro-toolchain mailing list
linaro-toolchain(a)lists.linaro.org
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Holiday Friday [2/10]
catomics - TCWG-436 [2/10]
* Fixed broken benchmark-against-sysroot code in scripts
* Built a lot of sysroots
Juno cache effects - LDTS-1238 [4/10]
* Quite a bit of reading and learning some more perf and other tools
* Formed a few hypothesis, started testing
* Looking promising, but I find these things often go wrong, so we'll see
Misc [2/10]
* Featuring first successful Jenkins run of all of SPEC2006
=Plan=
Make sure I've really fixed the last sysroot bug, actually run
benchmarks on catomics
Attempt to close out the cache effects issue
Carry on with Jenkins
Hi,
I recently built with ABE for the first time. It's pretty slick.
Is there a way to make the vendor string (the "none" in
"arm-none-linux-gnueabihf-*") go away? It breaks my scripts without appearing
to add value.
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Hi,
I am trying to port the Boost.Context library (from www.boost.org) to aarch64 gcc and have come across a gnarly problem.
Boost.Context essentially does co-routine style context switching. It has a structure f_context which it uses to save and restore contexts. The structure f_context contains both integer (x0..xN) and floating point VFP (d8..d15) context.
The function jump_context switches contexts
typedef struct f_context *f_context_t
extern void jump_context(fcontext_t *old, f_context_t new, bool save_fp);
So this jumps to a new context returning the old context in *old. If save_fp is set the floating point context must be saved because the application uses floating point. Otherwise the save and restore of the floating point context may be ignored.
So, essentially, to save the old context it does
jump_fcontext:
# prepare stack for GP + FPU
sub sp, sp, #0xb0
# test if fpu env should be preserved
cmp w3, #0
b.eq 1f
# save d8 - d15
stp d8, d9, [sp, #0x00]
stp d10, d11, [sp, #0x10]
stp d12, d13, [sp, #0x20]
stp d14, d15, [sp, #0x30]
1:
# save x19-x30
stp x19, x20, [sp, #0x40]
stp x21, x22, [sp, #0x50]
stp x23, x24, [sp, #0x60]
stp x25, x26, [sp, #0x70]
stp x27, x28, [sp, #0x80]
stp x29, x30, [sp, #0x90]
However, there is a problem with this because gcc may store integer value in floating point registers around a function call.
So, I have no way of knowing whether it is actually necessary to save/restore floating point context.
Even worse applications using Boost.Context may be completely borken if they assume it is safe to call jump_context with save_fp == 0.
Any suggestions?
Ed.
== This week ==
* Released Linaro 4.8 and 4.9 February 2015 release (2/10)
* Vector Extensions Project (7/10)
- Design work on C++ classes
- Reviewed Boost.simd as alternative implementation
- Review of libvpx benchmark
* Misc. (1/10)
- Conference calls
- ARM required online training
== Next week ==
- ARM CodeGen conference in Cambridge
--
Michael Collison
Linaro Toolchain Working Group
michael.collison(a)linaro.org
== Progress ==
LLDB development
-- LLDB Call graph analysis for understanding some development nits [1/10]
-- Trying out LLDB server arm and aarch64 cross compilation. [2/10]
-- List down arm-lldb task list with some debugging [2/10]
Miscellaneous [1/10]
-- 96board setup
Holiday [4/10]
-- Monday 16th and Tuesday 17th Feb 2015
== Plan ==
Convert LLDB Arm task list to JIRA cards
Try to fix LLDB server arm and aarch64 cross build issues.
Some GDB patch updates
Connect detox [2/10]
ABE benchmarking automation - TCWG-360 [5/10]
* Backport benchmarking
** Harder than expected, have to build the backport into a binary,
then benchmark that binary, passing information between jobs.
** AFAIK I'm blazing the Jenkins-chainging trail for us.
* Release benchmarking
** New LAVA release broke my image (but quickly fixed by the LAVA folks)
** Now seems to be running into issues with Jenkins/builders/an
anonymous job-slayer
* Misc fixes and improvements
** Main highlight being support for building with separated-out sysroot
Misc - [3/10]
=Plan=
Kick off catomics benchmark runs
(Attempt to) close out cache effects on Juno issue
Carry on with Jenkins
=Issues=
* Some of the Jenkins builders seem unreliable
* My lightly hacked version of the BinaryRelease job is unreliable
** Is the BinaryRelease job itself is reliable
* TSAN support for Aarch64 (5/10)
Fixed some kernel size issues in my local working tree. (TCWG-581) .
GCC does not default to -fPIE or -pie. Ran into address layout
issues when I used -fsanitize=thread. Some test cases passed with the
mapping I used for 42 bit VA when -pie and -fPIE are added.
* Bug 869 - Looking at match.pd to remove type promotion in ABS_EXPR (1/10)
* Emails, meetings. (2/10)
* Linaro 1-1 with maxim and Ryan.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
Leave on 20-Feb-2015 (2/10)
== Plan ==
* TSAN support for Aarch64 work fixing GCC -fsanitize=thread option.
* Break tasks under TCWG-581.
* LLVM build with local patches.
* Bug869.
* Misc and Meetings (AMD, LInaro)
== Progress ==
* compiler-pass to widen computation (TCWG-547) - (5/10)
- Analysed core-mark code size regression
- fixed constant handling
- Added VRP support for ZEXT_EXPR
* Improve register allocation for AArch64 (TCWG-620) - (1/10)
- Looked at the relevant patches
* Misc (4/10)
- Setting up ABE benchmarking scripts
- Ran into some LAVA related issues for ABE benchmarking
- Recovering from connect
- Started with 69 board setup
== Plan ==
* TCWG-620 and TCWG-547
* ABE benchmarking
== Progress ==
* GCC trunk/4.9 monitoring
* Neon intrinsics tests
- committed the last patch of the 2nd series.
- about another 1/3 of the tests remain to be converted: will wait
for GCC stage1
* AArch64 sanitizers (2/10)
- Renato committed my patches to enable ASAN in LLVM/AArch64
- the official aarch64 buildbot (Juno) had problems after these, so
the asan tests are disabled again until the problem is understood.
Probable board configuration problem, since the tests passed on our
Juno.
- preparing a patch to solve the long standing issue with dependency
on aarch64 kernel version (kernel_old_[ug]id)
* Backports (4/10)
- reviews
- respawned validations under MergeFarm
* ABE:
- improving reporting
* Misc (4/10)
- meetings, conf-calls, emails, ....
== Next ==
Connect, then holidays
== Progress ==
* Rebooting brain after Connect (2/10)
* Friday off (2/10)
* Release 3.6 (CARD-1431 1/10)
- Spinning RC3, RC4
- Long discussions about Phoronix benchmark regressions
* Buildbots (CARD-1823 2/10)
- Buildbot cleanup and reshape
- Adding two new internal buildbots
- Investigating AArch64 broken bot
* Background (3/10)
- Code review, meetings, discussions, etc.
- Sprint planning
- Catching up on emails
- Servers purchase
- EuroLLVM paper reviews
== Plan ==
* Install new servers when they come
* Add the two new bots upstream
* Plan LLDB with Omair, contact Google
* Plan TSAN with Venkat
* Help Christophe investigate ASAN on AArch64
Holiday [3/10]
ABE benchmarking automation - TCWG-360 [3/10]
* Initial Jenkins implementation
Investigating cache effects on Juno - LDTS-1238 [2/10]
* One effect due to write streaming, others still to look at
Misc [2/10]
* Unpacking, some background catomics
Connect [10/10]
=Plan=
Carry on with Jenkins implementation
Run some benchmarks on catomics
Juno cache effects
Write up/think about where to go with libm exercising
ABE benchmarking automation - TCWG-360 [8/10]
* Pursued sneaky bugs through twisty mazes of bash
* Learned that ControlMaster does not play nice with my scripts
* Learned more about IPC pitfalls
* Cleaned up build behaviour of scripts somewhat
* Implemented support for benchmarking against sysroot (needed by Will
and by me)
* Generally tried to help Charles
* A bit of Jenkins testing
Misc [2/10]
* Featuring part 1 of an office move
=Plan=
Holiday Wednesday, 1/2 of Thursday
Part 2 of office move
Support benchmark users
Look more at cache effects on Juno
Get Jenkins working
Benchmark catomic patches (as much as I can without putting even more
pressure on the Junos)
Write up/think about where to go with libm exercising
Final preparation for Connect
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.02
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2015.02 is the eleventh Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.3-pre+svn220525 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include
* Backport of [AArch32] PR63676, exit tree fold when node be TREE_CLOBBER_P
* Backport of [AArch32] M0/M1 small multiply
* Backport of [AArch64] Fix unsafe access to deallocated stack
* Backport of Int div by constant compilation enhancement
* Backport of [AArch32] Fix PR target/64460: Set 'shift' attr properly on some patterns
* Backport of [AArch32] Fix typo in *<arith_shift_insn>_shiftsi
* Backport of [AArch64] Let LR register allocable
* Backport of Improve warning message for bitfields
* Backport of [AArch32] PR rtl-optimization/64011
* Backport of Fix checking on MAX_PENDING_LIST_LENGTH
* Backport of Remove VEC_LSHIFT_EXPR and vec_shl_optab
* Backport of [AArch64] Use new reduc_[us](min|max)_scal optabs, inc. for builtins
* Backport of [AArch64] Use new reduc_plus_scal optabs, inc. for __builtins
* Backport of Add new optabs for reducing vectors to scalars
* Backport of [Vectorizer] Make REDUC_xxx_EXPR tree codes produce a scalar result
* Backport of [AArch32] new cortex-m7 tune option
* Backport of [AArch32] cortex-m7 scheduling
* Backport of Improve Neon intrinsics testing
* Backport of [AArch32] [testsuite] gnu11 cleanup for aapcs testcases
Linaro GCC 4.8 2015.02 is the sixteenth release in the 4.8 series and is in
maintenance. Based off the latest GCC 4.8.4+svn220525 release, it includes
performance improvements and bug fixes.
The Linaro GCC 4.8 maintenance branch will be retired when Linaro GCC 5.1 is delivered.
Linaro GCC 4.9 will become the new maintenance release. Interesting changes in this GCC source
package release include:
* Updates to GCC 4.8.4+svn220525
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
--
Michael Collison
Linaro Toolchain Working Group
michael.collison(a)linaro.org
== This week ==
* Linaro 4.8 and 4.9 Releases (9/10)
- Validated backports, followed release process and staged tarballs
for release
* Misc (1/10)
- Conference calls
== Next week ==
- Backports
- Work on bug fixes
* TSAN support for Aarch64 (3/10)
Working on memory map layout for TSAN in Aarch64 (TCWG-581) .
Experimenting switching on 64 bit allocator as default.
* Bug 869 - Analyzing tree dumps on how VECT_CONVERT_EXPR works (2/10)
* Emails, meetings. (3/10)
* Linaro remote hack sessions.
* internal AMD meetings/event, 1-1 with AMD manager, .
* GCC mailing list.
Leave on 10-Feb-2015 (2/10)
== Plan ==
* TSAN support for Aarch64 work on memory layout.
* Bug869
* Review/Watch connect slides.
== This week ==
* Created dummy release in preparation for February Linaro release (2/10)
* Backports (2/10)
- Backported 216220 and 217229
- Additional merge issues indicates another backport is required.
- I will abandon the backports for this release.
* Bug fixing (5/10)
- Bug 535 - Could not reproduce after triage.
- Bug 539 - Additional triage.
* Misc (1/10)
- Conference calls
== Next week ==
- Commit validated backports and create release
== Progress ==
* AArch64 ILP32 toolchain (5/10)
- Got SPEC2k results for LP64 and ILP32
* Committed patch for AArch64 -Bsymbolic ld issue (1/10)
* Other stuff (2/10)
- Working on handing over various projects
- Email, meetings, etc.
* Friday travelling to Connect (2/10)
== Issues ==
* Juno boards have been busy
== Plan ==
* Connect
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Automation Framework (CARD-1378 1/10)
- Restarting build-02
- Trying new way to setup juno-01, failed
- Moving gateway-config to new private git server
* Release 3.6 (CARD-1431 4/10)
- Found NEON regression, reverting patches
- Setting up more new NEON buildbots
* Libraries (CARD-1831 1/10)
- Opening discussion on libunwinder move, getting consensus
* Background (2/10)
- Code review, meetings, discussions, etc.
- FOSDEM 2015 (http://llvm.org/devmtg/2015-02/)
* Flying to Connect (2/10)
== Issues ==
After working on Sunday and all nights since, I'll be off tomorrow and
will get ready to Connect on Friday. Email/HO/IRC as usual.
== Plan ==
Connect
* TSAN support for Aarch64 (5/10)
Working on memory map layout for TSAN in Aarch64 (TCWG-581) .
* Emails, meetings. (3/10)
* 1-1 with maxim, linaro status call.
* internal AMD meetings, 1-1 with AMD manager.
* GCC mailing list.
Leave on 26-Jan-2014 (India Holiday) (2/10)
Planned Leave on 04-Feb-2014
== Plan ==
* TSAN support for Aarch64 work on memory layout.
== This week ==
* Backports (10/10)
- 216734 - Temporarily remove aarch64_gimple_fold_builtin code for
reduction operations
- 216736 - [Vectorizer] Make REDUC_xxx_EXPR tree codes produce a
scalar result
- 216737 - Add new optabs for reducing vectors to scalars
- 216738 - Use new reduc_plus_scal optabs, inc. for __builtins
- 216741 - Use new reduc_[us](min|max)_scal optabs, inc. for builtins
- 216742 - Restore gimple_folding of reduction intrinsics
- 216779 - Remove VEC_LSHIFT_EXPR and vec_shl_optab
- 217331 - Fix checking on MAX_PENDING_LIST_LENGTH
- 217430 - Fix typo in *<arith_shift_insn>_shiftsi
- 217431 - Let LR register allocable
- 217533 - Pair load store instructions using a generic scheduling
fusion pass
- 219717 - PR rtl-optimization/64011
- 219718 - Improve warning message
== Next week ==
- Prepare for release by creating "dummy" release
- Work on bug fixes
Hi,
We've noticed that in the 14.11 toolchain binary release that the .asc files
contain md5sums instead of PGP signatures. Would it be possible to either
switch these files to contain signatures or change the filename to indicate
that they contain md5sums?
I also noticed that an md5sum is missing:
http://releases.linaro.org/14.11/components/toolchain/binaries/armeb-linux-…
Finally, there appears to be some inconsistent usage of tuples in the download
directories. Would it be possible to use the same tuple for a particular
toolchain everywhere that tuple is used? For example, for the arm-none-eabi
toolchain, the directory is "arm-none-eabi", but the compiler tarball has only
"arm-eabi".
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
== Progress ==
* Automation Framework (CARD-1378 1/10)
- Setting up new box
* Release 3.6 (CARD-1431 5/10)
- Looking for the patch that introduced a major NEON regression since December
* Background (4/10)
- Code review, meetings, discussions, etc.
- More Jira farming...
- Some EuroLLVM paper reviews
- LLVM/Android planning
== Plan ==
* Keep trying to find the bug in release 3.6
* Try to have some time to fix the NEON unwinder issue
* Preparing for Connect
== Issues ==
I cocked up the LLVM 3.6 ARM release last December when I
inadvertently ignored a bug report about clang not self-hosting on
NEON machines. To make matters worse, I was the one that decided to
move *all* our buildbots to non-NEON machines, expecting that the
test-suite on a Chromebook would catch all NEON problems.
There are limits to human intelligence, not human stupidity.
== Progress ==
* LLD (1/10, TCWG-561, TCWG-563, TCWG-570)
- Updated and added more cards, adding more detail and loose priorities
- Rebased, fixed up and resubmitted relocation test patch
* AArch64 ILP32 toolchain (4/10)
- Attempted various SPEC2k runs and fixed issues found
* Submitted patch for AArch64 -Bsymbolic ld issue (1/10)
* Connect slides (2/10)
* Other stuff (1/10)
- Email, meetings, etc.
* Tuesday looking after sick child
== Issues ==
* Juno access has been patchy
== Plan ==
* Get SPEC2k running ok on Juno and with ILP32
* Push remaining LLD patches
--
Will Newton
Toolchain Working Group, Linaro
Hello,
I have a question about the status of overo support in qemu-linaro vs upstream qemu; from a quick look on the Git commits for qemu-linaro, most things seemed to have been ported back upstream into qemu as of v2.0.0, although there does appear to be some recent new commits. However, I'm looking for overo board support, and although I see that OMAP3 chip support has been merged upstream, there aren't any board configuration files for overo. What would be the easiest way to get working qemu overo board support?
Additionally, I don't see any recent binary packages available for qemu-linaro. The qemu-linaro packages on the Ubuntu PPA haven't been built for almost a year now, and the releases.linaro.org page doesn't seem to have recent qemu-linaro builds either.
Thanks,
Dominic
* TSAN support for Aarch64 (5/10)
Up streamed make file changes for building non x86_targets (TCWG-579).
Working on memory map layout for TSAN in Aarch64 (TCWG-581) .
* Fix Bug 863(Linaro)/ 63949(FSF) (2/10).
Tested patches and fixed few aarch64 regressions.
got feedback that approach is good. planning to send a revised patch
for stage 1.
* Emails, meetings. (3/10)
* 1-1 with maxim,christophe,Ryan, linaro status call.
* internal AMD meetings, 1-1 with AMD manager.
* GCC mailing list.
Leave on 26-Jan-2014 (India Holiday)
== Plan ==
* TSAN support for Aarch64 work on memory layout.
* Send revised patch for Bug 863
== Progress ==
LLDB vs GDB investigation [TCWG-583] [4/10]
-- Scoring of previous patches and mailing list discussions
-- Tried and was able to build+test lldb on x86_64 linux
-- Tried and was able to build (but not test) lldb on arm linux
-- Tried lldb AArch64 build but couldnt get it going successfully.
Some gdb bug fixing and wrap up open gdb stuff [4/10]
Miscellaneous [2/10]
-- Meetings, Emails etc
-- Connect Preparation: Flights Confirmation, Visa pick up etc.
== Plan ==
Try fixing LLDB testsuite on arm and try out aarch64 build if possible.
ABE benchmarking automation - TCWG-360 [6/10]
* Fixed an awkward escaped process
* Struggled with LAVA timeouts & discovered that some Junos
accidentally have a baked-in timeout
* More discussion/thinking about where to store benchmark source
* Some trouble with intermittent flakiness when copying large chunks
of data over the lab network
Investigating cache effects on Juno - LDTS-1238 [2/10]
Misc - [2/10]
* Featuring catomics (TCWG-436) - implemented a few missing catomics
(well under 1/10)
=Plan=
Pack for office move
Fix intermittent copying problem
Look more at cache effects on Juno
Test Jenkins dispatch (Rob says it works now)
* Look into triggering coremark on every backport
Carry on, hopefully close, storage discussion
Benchmark catomic patches
Write up/think about where to go with libm exercising
== Progress ==
* Automation Framework (CARD-1378 2/10)
- Rebooting machines, again...
- Fiddling with bugzilla, wiki
* Release 3.6 (TCWG-575 5/10)
- Investigating ARMv7 bootstrapping failures
- Rebuilding manually with cmake, as autoconf build is bogus
- Turns out wasn't autoconf, but a NEON bug reported 14th Dec
- Benchmarking AArch64 3.6-RC1 against 3.5.1 - all good
* Background (3/10)
- Code review, meetings, discussions, etc.
- More Jira farming
- Investigating some weird llvm-objdump issues
- Fixing ninja output issue on bots with an ugly hack
== Plan ==
* Bisect NEON bug, revert the patch, back-port to 4.6 RC2
* Add a NEON+T2 full buildbot (dragonboard) to the list of public bots
* Benchmark ARMv7 3.6 RC1 or RC2 against 3.5.1
