== Holiday ==
* Public Holiday (2/10)
* Leave (4/10)
== Progress ==
* Zero/sign extension elimination with widening types (4/10)
- Started experimented with a pass for widening type.
- Verified for one simple test-case.
- Bootstrapping is failing and looking into it.
== Plan ==
* Continue with Zero/sign extension pass.
== Progress ==
* Automation Framework (CARD-1378 1/10)
- Planning LAVA server for new TCWG gateway
* Buildbots (TCWG-76 7/10)
- Fixing Compiler-RT buildbot (from 69 to 4 failures)
* Background (2/10)
- Code review, meetings, discussions, etc.
- Re-testing a change in inst combine that broke bots before
- Reviewing CMake builder for Windows builds
- Discussing clang-reformat on lld's codebase
== Plan ==
* Continue fixing the Compiler-RT buildbot
* Present 2 talks at Linux Plumbers
== Progress ==
* GCC trunk/4.9 cross-validation (CARD-647) (2/10)
- trunk build for aarch64 reported to fail because libsanitizer
requires an update. Pinged libsanitizers maintainers but got no answer
so far.
- posted testsuite patch to test if -shared is supported
- managed to find how to force target-dependent -mword-relocations
flags to compile testglue, without needing a testuite patch :-)
* Validation (3/10)
- compared cbuild2 schroot-test branch using (default) shared libs
and forcing static libs
Using static libs causes many unresolved and unsupported tests
- compared using unix.exp and arm-linux.exp: the latter causes
creates instability in the results
* Neon intrinsics tests (2/10)
- rebased on trunk, applied requested changes
- the make-check parallelization support has changed mid-September,
took some time to discover that my .exp harness was now incompatible.
* Misc (3/10)
- calls/meetings
== Next ==
* GCC trunk/4.9 cross-validation
- continue investigation of abi_check test
* Neon intrinsic tests update, trying to take float16 types into account
* cbuild2:
- compare results + validation time of stable and schroot-test branches
- look at backport-test script + logs
cbuild2 benchmarking - TCWG-360 [7/10]
* Cleaned up and upstreamed some code that works
* Fixed a couple of issues raised by LAVA people
** No longer scraping the logs
** No longer assuming stable IP addresses
lowlevellock.h comments - CARD-341 [1/10]
* Respun based on Carlos' comments
Meetings/mail/etc - [2/10]
=Plan=
cbuild2 benchmarking
* Upstream code-with-fixes
* Write a doc
* Invite people to start using this thing
** Assuming that the storage questions get resolved
* Work through list of tweaks
Get up to speed on glibc vector math thread
== Progress ==
* Investigate a number of bugs in Linaro toolchain (2/10)
- Submitted patches for cbuild build failure with eglibc and i686
- Investigated BZ #675, gdb baud rate issue. Should be fixed by
switch to cbuild
- AArch64 PIE support seems to be ok?
* Submitted a patch to add all missing relocs from AArch64 ABI 1.0 to
binutils (1/10)
* Email, meetings, etc. (1/10)
* More malloc single-thread optimizations (6/10, TCWG-436)
- Patches submitted to the list
== Issues ==
* None
== Plan ==
* More atomics work
* Tidy up and commit malloc app benchmarks
* Out Thursday and Friday for a wedding
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* LR register not used in leaf functions (TCWG-539) (1/10)
Reviewed Jiong's changes.
* bug #412 (2/10)
- Seems to have been fixed but since there is not specific test-case
except that it happens with spec2k gcc, need more work to be entirely sure.
* AArch64 Spec2006 int regression (1/10)
- Looked at bug databases and mailing list archive for more information
* armv3 (bug #85 and bug #410) (2/10)
- Looked at both the outstanding bug to find more information
- proposed using -mno-lra for armv3 after discussion with the team
* Misc (2/10)
- Public holiday (2/10)
- Annual Leave (2/10)
== Plan ==
* zero/sign extension elimination with widening types
== Holidays ==
* 06/10/2014 - Public holiday
* 07/10/2014 and 07/10/2014 - Annual leave
== This week ==
* TCWG-515 - Neon intrinsic testing part 1 (5/10)
- Developed fix for vclz DejaGnu failure
- Tested on ARM hardware
* Linaro bugzilla 602 - gcc 4.7.3 compiler internal error while building
hsail components (1/10)
- Unable to reproduce with either Linaro 4.8 or 4.9
* Linaro Bugzilla 540 - Median of three has unneeded register moves (1/10)
- Results of Triage indicate generated code has improved though still
not optimal
- No plans for further improvement
* Misc. (1/10)
- Completed ARM annual review paperwork
* Out sick Friday, October 3rd (2/10)
== Next week ==
- Full validation testing on vclz bug fix
- Create patch for vclz bug fix and send to gcc-patches list
- Resolve any blocking issues to patch for bugzilla 331
= Progress ==
* Core mark benchmark and report for PGO and PGO + LTO (2/10)
Collected benchmark scores and report sent internally.
Adding PGO benefits coremark. LTO seems to hurt. More runs and profiling
next week. Tired few experiments with -funroll-all-loops and seems to
benefit.
* Misc [2/10]
Internal meeting and 1-1 with Ryan and inline manger.
Revisited and closed PR61442
Short week leave on 29 Sep, 2 and 3rd Oct (6/10).
== Plan ==
* Coremark benchmark and profiling for PGO and PGO + LTO
* Investigate PR 62308
* Setup Cbuildv2 build in internal machine.
== Progress ==
* Fixed test infrastructure bugs (TCWG 1378 - 8/10).
- Installed Foundation Model on all Hetzner machines so
aarch64 bare metal testing works.
- Refactored all board support files to eliminate duplication to
reduce maintainance headaches. Fixed ldflags so now getting
good results.
- Backport job is working good now.
- Worked on Gerrit/Jenkins integration, with the goal of having
the notifications work *after* the test and validation is done.
- More work on optimizing SSH connections by reducing extraneous
commands in the test framework.
- Recreated stable branch from master now that results are much
better.
* Meetings and Misc (2/10)
* Fixed National Park internal wireless network, getting access to
much better bandwidth than the crappy Guest one. :-)
== Plan ==
* Escape Yosemite, hard during a great weather window, and being
the only person in my group with a job...
* Continue fixing remote testing support, merge "boards" branch
into master, then make it stable after more testing.
== Progress ==
Closed bug #405 (not a bug)
NEON load/store
. reworked patches not to do type-punning [9/10]
. investigated alternative ways to solve poor code generation with
array of vector types
Started investigating NEON bugs 403, 418 [1/10]
== Plan ==
NEON load/store - submit new patches, continue upstream discussion
Try out validation infrastructure for my own patches
== Progres ==
* GCC trunk/4.9 cross-validation (CARD-647) (3/10)
- aarch64 address sanitizer tests currently all fail at execution
under qemu because they try to reserve 50GB of memory. Tried to push
the limits with no success so far.
- working on fixing support for testcases generating a shared lib
- newly introduced abi_check for aarch64 fails on my side, probable
testsuite configuration problem.
* Linaro branches
- updated backports spreadsheet
- reviewed backports prepared by Yvan
* Validation (3/10)
- manually running builds+validations to compare master and chroot
branches, see the diffs between static and dynamic libs in terms of
PASS/FAIL, ....
* Neon intrinsics tests (1/10)
- No need to comply to the GNU coding style since it's imported from
and existing testsuite.
- only minor changes requested
- should help having the 1st subset committed soon
* Misc (3/10)
- calls/meetings
- bugzilla admin etc..
cbuild2 benchmarking - TCWG-360 [9/10]
* Knocked off a lot of rough edges
* Now working fairly robustly
lowlevellock.h comments - CARD-341 [4/10]
* Got a bit stuck trying to follow condvar locking
* But wasn't really needed to describe the code in question
LCA [10/10]
LCA recovery day [2/10]
Meetings/mail/etc [5/10]
=Plan=
cbuild2 benchmarking:
* Push upstream for others to look at
* Sort out storage story for benchmark sources and results
* Try to get working on a Juno (in LAVA, therefore on OE)
* Look at our Jenkins scripts with a view to figuring out how to hook in
* Work through list of bits 'n' pieces to fix -
+ Don't scrape logs (bad for server)
+ Don't fail on network timeouts
+ Extra target control knobs - disable ASLR, set a nasty nice value,
maybe hugepages
+ Set appropriate flags automatically for cross-builds
== Progress ==
* Monday off to recover from Connect (2/10)
* Catch up on email (1/10)
* Upstream work (1/10, CARD-341)
- Patch review
* Investigate malloc single-thread optimizations (1/10, TCWG-436)
- More exploratory work on atomics
* Investigate binutils support for full range of AArch64 relocs (1/10)
* Annual leave Thursday and Friday (4/10)
== Issues ==
* None
== Plan ==
* More work on atomics
* Figure out how to make an LLVM cross compiler with gas/ld
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* LR register not used in leaf functions (TCWG-539) (2/10)
Posted the patch after regression testing
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01833.html
* AArch64 Spec2006 int regression (3/10)
- After struggling to boot Juno, found the combination that works
- Ran spec2006 int benchmarks to try reproduce
- waiting for more information to continue
* Launchpad bugs (LP1331112, LP1332640. LP1331126 and LP1320965) (3/10)
- Set-up cbuild2 and spec2k on aarch64 board
- ran aarch32 and aarch64 in aarch64 board with 09.2014
- Updated the bug entries with the results
* Misc (2/10)
- Connect recovery (2/10)
== Plan ==
* 29/09/2014 - Public holiday
* Get back to zero/sign extension with pass to promote operations
== Progress ==
* Connect recovery [6/10]
Very short week short week travel back from connect
22nd - 23rd travel.
25th - sick leave.
* Backport - Bug 676 - CSE did not optimize the redundant cmp
instruction on aarch64 [2/10].
Checked the issue by building latest trunk, linaro branch and by
adding the patch on top of linaro branch . Validated the code
generated at -O2 and it seemed to be optimal and bug does not occur.
Discussed with Christophe and decided to rebackport it along with
211881. It was reverted because of an libjava bug which is fixed in
211881. Used back flip to back port, git review was not automatically
working. So manually amended by adding the change log for combined
backport of revisions 209643 and 211881.
* Misc [2/10]
Prepared notes on LCU14 to AMD team.
Examined spec benchmark in internal Aarch64 hardware for a support issue.
Internal meeting and 1-1 with manager.
== Plan ==
* Coremark benchmark and report for PGO and PGO + LTO
* Get profiles on trunk for PGO and PGO + LTO
* 29/9/2014 - Personal day off
* 2/10/2014 - 3/10/2014- Dusserra Holidays Leave
== Progress ==
* Connect recovery [4/10]
* NEON load/stores (TCWG-516 [5/10])
. initial review of my vldN_lane asm()->__builtin patches is promising
. the other patches for other loads/stores are wrong. Have been investigating
(with upstream) how much bigger the can of worms is.
* Misc [1/10]
. LCA15 travel
. bug investigation (#405)
== Plan ==
* more NEON load/store
Short week, 2 days holiday (4/10)
== Progress ==
* GCC trunk/4.9 cross-validation (2/10)
- reported a few new FAILs
- trying to allocate time to fix new FAILs introduced in the 4.9
branch on devirt-28a.C, mostly because a testsuite configuration
problem.
- fixed reporting of email-driven validations
* AArch64 libsanitizer
- finally committed asan+ubsan support for AArch64!
* Misc (4/10)
* email catch-up
* calls/meetings
* updated backports speadsheet, backlog now > 75
* bugzilla management
== Next ==
* GCC trunk/4.9 cross-validation:
- actually reproduce+propose fixes for a couple of regressions
recently observed
* AArch64 thread sanitizer
* Neon intrinsic tests
* Analyze failures in Backport job in Jenkins
* Analyze differences in validation results between using shared libs
and static libs
I just updated the stable branch to match master, which in my testing
has been reliable and stable. I also changed the following Jenkins jobs
to use the stable branch: Backport, BuildFarm, BinaryRelease, SourceRelease.
Note that now any Jenkins job that runs tests and validates them using
the tcwgweb.sh script, the build and test run may succeed, but if there
are any regressions, the dot will be Red now instead of Green. This
primarily effects the Backport and the Release jobs.
- rob -
Hi Sugar,
the toolchain you need is the one with the aarch64-linux-gnu triplet.
Regards,
Yvan
On 18 September 2014 08:05, Sugar <shugelinux(a)gmail.com> wrote:
> Hi yvan,
> I saw linaro have released
> gcc-linaro-arm-linux-gnueabihf-4.9-2014.08_linux.tar.bz2. I have compiled
> cortex-a53 by 'arm-linux-gnueabihf', but its binary is 'ELF 32-bit LSB
> executable', not 'ELF 64-bit'.
> Is it only compile to aarch32? If I want to compile aarch64, which
> toolchains I should choose? Or what options should pass to compiler.
>
> Thanks.
Hi all,
I'm using ct-ng to rebuild Linaro toolchain (arm-linux-gnueabihf ) for Linux kernel 2.6.36.
Ct-ng version: ct-ng-linaro-1.13.1-4.8-2014.01-01
There is a “FATAL: Kernel too old” message after mounting the rootfs. It turns out the default config using pre-built sysroot from Linaro website. After setting " CT_PREBUILT_SYSROOT=n" to build sysroot with lower kernel version, I get the following error:
[EXTRA] Building final compiler
[ERROR] /projects/broadcom-linux/joelz/opt/gcc-linaro-arm-linux-2.6-gnueabihf/arm-linux-gnueabihf/libc/usr/include/gnu/stubs.h:7:29: fatal error: gnu/stubs-soft.h: No such file or directory
[ERROR] make[5]: *** [_muldi3.o] Error 1
[ERROR] make[4]: *** [multi-do] Error 1
I tried to put " -mfloat-abi=hard" as CFLAG in different place, still can't pass this error.
If you have any idea how to fix it, please let me know.
Thanks,
Joel
== Progress ==
* GCC trunk/4.9 cross-validation (2/10)
- noticed a couple of newly introduced failing tests in some corner cases
- improved notification of selected commits to help fill the
backports speadsheet
* AArch64 libsanitizer
- answered Marcus/Andrew after their feedback
* Misc (conf calls, meetings, ....) 6/10
- usual 1/1 and team calls
- Connect preparation
- travelled on Friday
== Next ==
* Connect LCU14
== Progress ==
* More work on malloc app benchmark framework (1/10, TCWG-441)
- Postgres still has an issue with SELinux on Fedora...
* Email, meetings, etc. (1/10)
* Upstream work (3/10, CARD-341)
- Patch review
- Investigate glibc testsuite build failures on ARM
* Investigate malloc single-thread optimizations (4/10, TCWG-436)
- Atomics changes look like they will only help on AArch64
- Some improvements can be made to atomic code in general on ARM and AArch64
- Still need to look at locking
* Peparing and packing for Connect (1/10)
== Issues ==
* Electric/gas meter replacement and broken refrigerator consumed some time
== Plan ==
* Linaro Connect
--
Will Newton
Toolchain Working Group, Linaro
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.09
release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.08 is the sixth Linaro GCC source package release.
It is based
on FSF GCC 4.9.2-pre+svn214896 and includes performance improvements
and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of
the GCC 4.9
compiler the Linaro TCWG will be focusing on stabilization and
performance of the
compiler as the FSF GCC compiler. The Linaro TCWG provides stable[1] quarterly
releases and monthly enginering[2] releases.
Interesting changes in this GCC source package release include
* Updates to GCC 4.9.2-pre+svn214896
* Backport of [AArch32] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook
* Backport of [AArch32] Enable arm target in ira-shrinkwrap-prep* testcases
* Backport of [AArch32] fix check_effective_target_arm_nothumb
* Backport of Do not convert cast + __builtin_round into __builtin_lround unless
-fno-math-errno is used
* Backport of [AArch64] Fix Thumb2 testsuite fallout
* Backport of [AArch64_be] Fix vec_select hi/lo mask confusions.
* Backport of [AArch64_be] Don't fold reduction intrinsics
* Backport of [AArch64] Fix offset glitch in load reg pair pattern
* Backport of [AArch64][2/2] Add constrain to address offset in
storewb_pair/loadwb_pair insns
* Backport of [AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hook
* Backport of [AArch64] Removed unused get_lane and dup_lane builtins.
* Backport of [sched-deps] Generalise usage of macro fusion to work on
any two insns
* Backport of [doc] Document clrsb optab and fix some inconsistencies
* Backport of [AArch64] Some aarch64-builtins.c cleanup.
* Backport of Guard transformation to lrint by -fno-math-errno
* Backport of [AArch32] Adjust clz, rbit and rev patterns for -mrestrict-it
* Backport of [AArch32/AArch64] Add CRC32 scheduling information to
Cortex-A53 and
Cortex-A57
* Backport of [AArch64] Use REG_P and CONST_INT_P instead of GET_CODE
+ comparison
* Backport of [AArch64] Prefer dup to zip for vec_perm_const; enable
dup for bigendian;
* Backport of [AArch32] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook
* Backport of [AArch64] Use MOVN to generate 64-bit negative
immediates where sensible
* Backport of [AArch64] Delete f_sels, f_seld types, use fcsel instead
* Backport of PR target/60606 target/61330 fix ICE
* Backport of [AArch64] PR target/63190
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
Hi,
I'm having some very odd problems building the 2014.08 toolchain respin --
in the cbuild1 i686-lucid env, building glibc fails with
[ERROR] ../sysdeps/unix/sysv/linux/bits/sched.h:127:14: error:
variably modified '__bits' at file scope
[ERROR] ../sysdeps/unix/sysv/linux/bits/sched.h:127:14: error:
variably modified '__bits' at file scope
[ERROR] ../sysdeps/unix/sysv/linux/bits/sigset.h:29:23: error:
variably modified '__val' at file scope
[ERROR] ../sysdeps/unix/sysv/linux/bits/sigset.h:29:23: error:
variably modified '__val' at file scope
[ERROR] ../misc/sys/select.h:69:15: error: variably modified
'fds_bits' at file scope
[ERROR] ../misc/sys/select.h:69:15: error: variably modified
'fds_bits' at file scope
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/linux/posix_types.h:25:16:
error: variably modified 'fds_bits' at file scope
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/asm/sigcontext.h:33:2:
error: requested alignment is not a positive power of 2
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/asm/sigcontext.h:53:2:
error: unknown type name '__uint128_t'
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/linux/posix_types.h:25:16:
error: variably modified 'fds_bits' at file scope
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/asm/sigcontext.h:33:2:
error: requested alignment is not a positive power of 2
[ERROR] /cbuild/slaves/oorts/crosstool-ng/builds/aarch64_be-linux-gnu-linux/install/aarch64_be-linux-gnu/libc/usr/include/asm/sigcontext.h:53:2:
error: unknown type name '__uint128_t'
[ERROR] ../ports/sysdeps/unix/sysv/linux/aarch64/sys/user.h:32:3:
error: unknown type name '__uint128_t'
[ERROR] ../ports/sysdeps/unix/sysv/linux/aarch64/sys/user.h:32:3:
error: unknown type name '__uint128_t'
(Yes, the fix is to get rid of cbuild1 and more importantly the requirement
for 32-bit builds in a prehistoric environment - it builds just fine on
64-bit present-day boxes... But I don't think we want to make that change
in a respin).
The "variably modified" errors remain even after hardcoding
typedef struct {
__cpu_mask __bits[16];
} cpu_set_t;
instead of relying on __CPU_SETSIZE and __NCPUBITS, and the line where it
complains about alignment not being a positive power of 2 actually
hardcodes an alignment of 16.
Have you run into those before?
ttyl
bero
== Progress ==
Debug KGDB with gdb for testing [4/10]
LCU14 slides preparation and study for presentation. [2/10]
Miscellaneous [4/10]
* Configure to use hackbox to test aarch64 gdb remote configs
* Retrieve gdb test results in different configurations.
* Emails/Patch scrolling/Meetings etc
== Plan ==
patch updates and re submission.
Figure ARM and AArch64 gdb missing features.
Prepare and travel LCU14
=Progress=
cbuild2 benchmarking - TCWG-360 [8/10]
* Got an end-to-end run in my test environment
* Patched tests to run more selectively (in review)
Meetings/mail/etc - [2/10]
=Plan=
cbuild2 benchmarking:
* Clean up some lose ends
* Sort out source/results storage
glibc:
* Finish comments in lowlevellock.h (if time)
4 days week.
== Issues ==
* Unfortunate cbuild schroot-branch merge, silently brake the validation, and we
had to revert a commit in our FSF repo.
* aarch64 bare valdiation was broken all week, now workaround but it
still have to
be fixed.
== Progress ==
* GCC 4.9 2014.09 (6/10)
- Completed new backports.
- Started FSF 4.9 branch merge for 2014.09
- Investigated validation breakages.
* Misc:
- Various meetings (2/10)
== Next ==
- 4.9 2014.09 release.
- Prepare LCU hacking session
- Travel to CA
== This week ==
* USA Holiday, Monday September 1st
* TCWG-534 - Neon intrinsic testing part 8 (2/10)
- Tested final eighteen neon intrinsics on ARM with no regressions
identified
- Unable to test on aarch64 due to test harness issues
* Linaro Bugzilla 331 - [4.9 Regression] ICE in final_scan_insn, at
final.c:2952 (aarch64-linux-gnu) (2/10)
- Bug fix investigation
* Launchpad 1312931- gcc 4.8 internal compiler error: in add_stores, at
var-tracking.c (2/10)
- validation test results review and code review submission
* Misc. (2/10)
- Linaro Connect presentation finalization and conference call
- 1:1 with Christophe
== Next week ==
- Complete Neon intrinsic testing on Aarch64
- Identify bug fix for Linaro Bugzilla 331
- Investigate failures identified in Neon intrinsic testing
== Progress ==
* TCWG-181 - Bench marking core mark with LTO (2/10)
Measured -O3 -flto vs -O3 on Aarch64 machine with Linaro GCC and
Trunk FSF GCC on Aarch64 and X86_64. Performance in both cases seems
to be same level. Planning to remeasure in trunk now.
* TCWG-531 Fix invalid use of vector register (3/10).
Completed fixing. patch tested on Aarch64 machine and up streamed the
patch to FSF trunk.
* TCWG-532 Fix abinit fails to build on AArch64 (2/10)
Bug does not appear in trunk. Case of missing back port.
Did git bisect experiments in trunk and found that r213078 solves the problem.
Case of code generation for loading labels at -O0 getting fixed after
changes to IRA register class.
* Cbuildv2 preparation for hack session in LCU14.(1/10)
* Others (2/10)
* Meetings Christophe, Ryan, Maxim and GCC status meeting
* Misc and internal meeting.
* Cbuildv2 preparation for hack session in LCU14.
== Plan ==
* Continue testing fix for TCWG-532
* Continue backport fix for TCWG-531.
* Continue Benchmark Core mark with LTO (TCWG-181).
* TCWG-533 Creating scripting to run git bisect with cbuild2.
* Cbuildv2 preparation for hack session in LCU14.
== Progress ==
* Regression on alphaev68-linux-gnu due to uxt/sxt commit (6/10)
- posted patch for promoted type based VRP after fixing issues found in
bootstrapping and regression testing. But had to drop this as this might
have performance implications.
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg00288.html
- Proposed setting a flag to indicating overflow/wrap so that we can
remove uxt/sxt safely.
* Preparation for connect hacking session (2/10)
- Started with materials for the discussions.
* misc (2/10)
- Visa
- Meetings
== Issues ==
- Value range data generated by VRP is not reliable for uxt/sxt removal
as wrapping/overflow is not propagated.
- Patch for Calculating range in promoted type is rejected
- Proposed propagating additional flag (with some tweaking to preserve
size) so that this information is available at the time we deicide on
uxt/sxt redundancy
- If this cannot be agreed, this patch has to be reverted
== Plan ==
* finalize overflow/wrap propagation
* prepare for connect
== Progress ==
* Email, meetings, etc. (1/10)
* Upstream work (1/10, CARD-341)
- Patch review
* LCU14 slides and review (4/10)
* More work on malloc app benchmark framework (4/10, TCWG-441)
- Ironed out a few bugs and sources of noise
- Still need to find a broader range of workloads
== Issues ==
* None
== Plan ==
* Look into malloc single thread optimization patches situation
* Find more workloads to add to malloc benchmarks
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Automation Framework (CARD-1378 2/10)
- Configuring D01s into a three-schroot box
- Turned out unstable, reverting to 4-core setup
* Toolchain (CARD-862 0/10)
- Re-committed vectorizer patch with MSVC2012-friendly code
* LLVM 3.5 Release (TCWG-476 1/10)
- Final release out, all done
* Buildbots (TCWG-76 4/10)
- Adding support for CMake on buildbot Zorg's interface
- Making the CMake builds test without NEON
- Created a compiler-rt bot, found some bugs, investigating
- Submitting changes upstream, will be up soon
* Background (3/10)
- Code review, meetings, discussions, etc.
- Presentations (Connect, LPC)
== Plan ==
* Migrate stack unwinding to VFP for ARMv7+ in compiler-rt
* Start implementing fpu stuff in assembler (parser/attributes)
* Finish LPC presentations
== Progress ==
* GCC trunk/4.9 cross-validation (1/10)
- monitoring results
- noticed failures on newly introduced tests when running on armeb.
Kyrill will fix his tests.
* bug #306 (bootstrap failure on i686) (1/10)
- unable to reproduce it
* AArch64 libsanitizer (3/10)
- asan and most of ubsan tests now pass
- submitted a gcc patch to enable it
- thread sanitizer does not work yet
* Neon intrinsic tests (1/10)
- ran the whole testsuite on aarch64* and arm* targets on gcc trunk
- reported an ICE on aarch64*; was a duplicated, fixed today by Carrot
- there are still several tests failing at runtime, need time to
reduce the testcases
* Misc (conf calls, meetings, ...) (4/10)
- usual 1:1 and team calls
- bugzilla management
== Next ==
* GCC trunk/4.9 cross-validation monitoring
* AArch64 thread sanitizer
* Neon intrinsic tests
* Connect preparation (hacking sessions)
Folks,
Clang+LLVM 3.5.0 was released yesterday (3rd Sep) and Linaro, as
usual, have tested both ARM and AArch64 native builds. This is a major
milestone for LLVM on ARM/AArch64, please read the release notes to
find out more.
http://llvm.org/releases/3.5.0/docs/ReleaseNotes.html
You can download the native ARM binaries (and sources) at:
http://llvm.org/releases/download.html#3.5.0
Since LLVM is natively a cross-compiler, you can download the binary
to your host platform and compile to ARM or AArch64, but you'll need
extra tools (linker, libc, etc).
The main changes are:
* EHABI is now enabled by default and it's compatible with both gcc_eh
and libc++abi unwinding libraries.
* The integrated assembler has got a complete makeover and is now
enabled by default on ARM and AArch64. It supports most of what GCC
produces and a good part of the hand-coded assembly we've seen in the
wild. Please report bugs!
* The current AArch64 back-end is the resulting of a merge between the
existing back-end with Apple's own private back-end (that they open
sourced). It's faster and as stable as the previous and has been
further improved since the merge.
* Compiler-RT has been integrated to the ARM/AArch64 CMake build,
including the sanitizers, though the resulting quality is still beta.
Please report bugs!
This is the first time that Linaro has produced binaries for both ARM
and AArch64 and we'll continue to do so for all major and minor
releases from now on. If there is any patch on trunk for ARM/AArch64
that you need back-ported to 3.5.1 (and beyond), please let us know.
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in LLVM's bugzilla:
http://www.llvm.org/bugs/
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? Inquire at "Linaro support":mailto:
support(a)linaro.org
Regards,
--renato
On 09/02/2014 01:36 PM, Renato Golin wrote:
> Plus, the American culture that I like the most is steak. And bacon. I
> think I'll pass.
I won't be making it either. Around here, American culture is called
the Rodeo. :-)
- rob -
== Progress ==
Arm gdb record-replay pending patches up-streaming [3/10]
* Update, test and resubmit patches
AArch64 gdb record-replay patches up-streaming [3/10]
* Update, test and resubmit patches
Miscellaneous [4/10]
* Configure git for replying to previous patch submission using send email.
* PERF try out on chromebook
* Update record-replay slides and debug using cdt integration.
* Emails/Patch scrolling/Meetings etc
== Plan ==
Up-streaming of all pending patches after updates.
GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480]
LCU14 slides preparation and study for presentation.
== This week ==
* TCWG-515 - Neon intrinsic testing part 1 (1/10)
- Completed testing on ARM targets
- Identified failure on vclz intrinsic at all optimization levels
* TCWG-524 - Neon intrinsic testing part 4 (1/10)
- Completed ARM testing with no regressions found
* TCWG-525 - Neon intrinsic testing part 5 (1/10)
- Completed ARM testing with no regressions found
* TCWG-528 - Neon intrinsic testing part 6 (1/10)
- Completed ARM testing with no regressions found
* TCWG-529 - Neon intrinsic testing part 7 (1/10)
- Completed ARM testing with no regressions found
* Launchpad 1312931- gcc 4.8 internal compiler error: in add_stores, at
var-tracking.c (2/10)
- Resolved and tested on linaro 4.9 branch
* Linaro Connect Presentation (2/10)
- Completed "Optimization Levels" portion of presentatio
* Misc. (2/10)
- Launchpad to bugzilla transition
- Conference calls with Ryan and Christophe
* Issues
- Delay in validating Launcpad 1312931 due to SchrootFarm instability
- Unable to issue code review on Gerrit after server upgrade
== Next week ==
- USA Holiday, Monday, september 1s
- Continue Neon intrinsic testing
- Finalize Linaro Connect presentation
- Bug fixing
== Progress ==
* TCWG-181 - Bench marking core mark with LTO (2/10)
Measuring -O3 -flto vs -O3 on Aarch64 machine with Linaro GCC and
Trunk FSF GCC.
* TCWG-520 ICE in linaro compiler for ARMv7 target (4/10).
Completed fixing. patch tested on schroot. Backported revision from
trunk using gerrit and jenkins. upstreamed the patch.
* Others (2/10)
* Meetings Christophe, Ryan, Maxim and GCC status meeting
* Misc and internal meeting.
* Discussed with Yvan on using gerrit and backflip script.
4 day week, Friday 29/8 was holiday.
== Plan ==
* Another Bug fixing task .
* Continue Benchmark Core mark with LTO (TCWG-181).
* Upstream patch review.
* Cbuildv2 preparation for hack session in LCU14.
== Progress ==
* Regression on alphaev68-linux-gnu due to uxt/sxt commit (7/10)
- built cross alphaev68-linux-gnu and reproduces it with qemu.
- Issue is due to PROMOTE_MODE definition and VRP truncating values.
- discussed upstream and after a failed patch, it was suggested that
the value ranges have to be calculated in promoted_mode precision.
- Patch to do VRP in promoted_mode is in testing. There are few
failures to fix.
- An easier fix probably is to check the promoted mode against
word_mode and disable uxt/sxt elimination.
* TCWG-521 - Analysed Coremark and Spec2k for uxt/sxt optimizations
TCWG-521(2/10)
- Continue with Coremark and have additional patches in development for
missing cases.
* bswap pr43550 (No card yet) (1/10)
- Finished regression testing. Will post the patch after resolving
regression with alpha.
== Paln ==
* Continue with VRP in promoted mode, TCWG-521 and bswap pr43550.
== Issues ==
* Multiple validation infrastructure issues (gerrit/jenkins/git.linaro.org)
now fixed.
* aarch64-none-elf is now really long to complete (~11hrs) whereas it
was less than 1hr last week.
== Progress ==
* GCC 4.9 2014.09 (3/10)
- Committed last week backports
- More backports under validation
- vca* intrinsics test are faiures analysis ongoing.
* Misc
- Linaro GCC git repo migration: (2/10)
+ Discussed and test the migration with Milo,
we'll be ready to move the coming week.
- Upstream bugzilla: (2/10)
+ Fixed PR 62248 : Configure error with --with-fpu=fp-armv8
- Linaro bugzilla: (1/10)
+ Fixed #562 : New tests failed on linaro 4_9 branch
- Various meetings: (1/10)
- Helped Venkat with backports (1/10)
- launchpad bug migration duty.
== Next ==
* Off on Monday
* Complete backports.
* Back on AArch64 libunwind
* Prepare Connect Hacking session
== Progress ==
* Monday bank holiday (2/10)
* Email, meetings, etc. (1/10)
* Upstream work (1/10, CARD-341)
- Patch review
* Built releases of newlib, binutils and gdb for 2014.09 (2/10)
* LCU14 research and slides (4/10)
== Issues ==
* None
== Plan ==
* Finish LCU slides
* malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* GCC trunk/4.9 cross-validation (1/10)
- checking results
* bug #306 (bootstrap failure on i686) (3/10)
- fixed an incorrect backport than made GCC build to fail in stage1
- now trying to reproduce the original bug reported
* AArch64 libsanitizer (2/10)
- resumed work, debugged sysroot / chroot problems with cbuild2
thanks to Maxim
* Misc (conf calls, meetings, ...) (4/10)
- usual 1:1 and team calls
- wrote some doc for Wang
== Next ==
* GCC trunk/4.9 cross-validation monitoring
* bug #306 (bootstrap failure on i686)
* AArch64 libsanitizer
* Neon intrinsic tests
== Progress ==
GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480] [4/10]
* FAST tracepoints try out on arm chromebook with trampoline code
borrowed from kernel.
AArch64 gdb record-replay bug fix [TCWG-503][TCWG-498] [2/10]
* Debugging of issues
Miscellaneous [4/10]
* Reading on PreLink for LCU14 Presentation
* Reading on PERF tools for LCU14 Presentation
* LCU14 slides preparation.
* Emails/Patch scrolling/Meetings etc
== Plan ==
GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480]
Some progress on AArch64 gdb record-replay bug fix [TCWG-503] [TCWG-498]
LCU14 slides preparation and study for presentation.
= Progress ==
* Upstream work (2/10, CARD-341)
- Bug investigations
- Applied a couple of patches
* Booting upstream kernel on Chromebook (2/10)
- Kernel booting and running
- No builtin wifi but dongle works ok
- Breakpoint issue fixed but the test still fails for some other
reason, created upstream issue
* Malloc application benchmarking (3/10, TCWG-441)
- Various improvements of the scripts
- Investigate benchmark variability in the presence of frequency scaling
- Is it possible to get repeatable numbers on Intel i{7,5,3}?
* Start looking at LCU session requirements (1/10)
* Annual leave on Friday (2/10)
== Issues ==
* None
== Plan ==
* LCU session slides
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (4/10)
Completed. Patch that sets same tune parameters solves the bootstrap
compare errors in Branch. Closed the JIRA cards. There are still LTO
IR streaming issues in trunk which needs to tracked down and fixed at
tree level. and no plans of doing that now.
* TCWG-520 ICE in linaro compiler for ARMv7 target. Bisected the
revision in trunk which fixes that. Backported and tested and fixes
tha bug. (4/10)
* Others (2/10)
* Bug migration from launchpad
* Meetings Christophe, Ryan, Maxim and GCC status meeting
* Misc and internal meeting.
* setup LLVM.
== Plan ==
* Continue Bug fix (TCWG 520).
* Benchmark Core mark with LTO (TCWG-181).
* Upstream patch review.
== MISC ==
* Local Holiday on 29th August
== Progress ==
* TCWG-413 - Release benchmarking (2/10)
- Analysed all the patches gone into the release for performance impact
* TCWG-521 - Analysed Coremark and Spec2k for uxt/sxt optimizations
TCWG-521(3/10)
- Studied Coremark and have additional patches in development for
missing cases.
* bswap pr43550 (No card yet) (3/10)
- Looked at the pr and it is not fixable with VRP
- An alternate approach based patch is in testing to fix this.
* 1 day off Sick (2/10)
== Paln ==
* Continue with TCWG-521 and bswap pr43550
== This week ==
* TCWG-515 - Neon intrinsic testing part 1 (1/10)
- Attempting testing on ARM targets; resolving build failures
* TCWG-524 - Neon intrinsic testing part 4 (2/10)
- Completed AARCH64 testing with no regressions found
* TCWG-525 - Neon intrinsic testing part 5 (2/10)
- Completed AARCH64 testing with no regressions found
* Launchpad 1312931- gcc 4.8 internal compiler error: in add_stores, at
var-tracking.c (3/10)
- Resolved, tested and requested code review on linaro 4.8 branch
- Resolved and tested on linaro 4.9 branch.
- Reviewing test results
* Linaro Connect Presentation (2/10)
- Met with Maxim and Will to prepare outline
- Began writing "Optimization Levels" portion of presentation
== Next week ==
- Continue Neon intrinsic testing including getting ARM portion to execute
- Complete "Optimization Levels" portion of Linaro Connect presentation
- Resolve Launchpad 1312931 on Linaro 4.9 branch
=Progress=
cbuild2 benchmarking - TCWG-360 [5/10]
* Proposed a plan for benchmark storage
* A bit more thought on cross-running
* Prototyped script to launch/run/release on LAVA targets (e.g. wg)
** The 'run' part is pretty much independent of the 'LAVA' part
lowlevellock.h commentary - ???? [2/10]
* In response to a patch review, added some comments to this fairly obscure file
* Took longer than expected, but the end's in sight so I guess I'll finish
* I know a bit more about futexes and threads now
Meetings/mail/etc [3/10]
=Plan=
Holiday. Back on 1st September.
== Progress ==
Arm gdb record-replay bug fix [4/10] [TCWG-314]
* Testing of all patches on x86 and arm machines.
* Patch submission upstream after sync up with latest gdb trunk.
AArch64 gdb record-replay bug fix [3/10] [TCWG-503][TCWG-498]
* Debugging of testsuite failures with apm and foundation mode.
* Patch series update after sync up with latest trunk.
GDB Tracepoints/Fast Tracepoints support on arm [2/10] [TCWG-480]
* Search for previously submitted patches, wiki info and other documentation.
* Started with initial study and code understanding.
Miscellaneous [1/10]
* Research GDB record/replay usage scenarios.
* Meetings/emails and installation/configurations etc
== Plan ==
AArch64 gdb record-replay bug fix [TCWG-503][TCWG-498]
* Fix test failures if possible otherwise submit updated patches.
GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480]
* Further study and investigate a missing functionality on arm.
Verify GDB non-stop debug support on ARM. [TCWG-246]
== Progress ==
* Looked at implementation options for backlog cards and
closed/postponed cards that doss not benefit or cards that require
excessive re-architecture that will not be possible now. (5/10)
- TCWG-468 - Postponed after detailed study and discussion.
- TCWG-412 (Support literal/constant pool sharing (wont-fix): As it is,
intra procedularl literal pool fix happens in
TARGET_MACHINE_DEPENDENT_REORG with arm_reorg. It is quite complex and
somewahat hacky. it would become even more messy if we are to record
these information and reuse it for whole program as a way to share
literal poool. Additionally A-profile (which is Linaro's focus) dosent
benefit from this as we use movw/movt instead. Therefore decided to
clsoe this as wont fix.
* TCWG-413 - Release benchmarking (2/10)
- Benchmarking or release for a15 and a57
* Analysed coremark and spec2k for uxt/sxt optimizations (3/11)
- Studied coremark and have additional patches in development for
missing cases.
* Misc
- Looked at bug database and monitored patches relevant to arm/aasrch64
== Paln ==
* Look at open uxt/sxt bugs in gcc bugzilla
* Study coremark and then spec2k for uxt/sxt
== Progress ==
* Reviewed a big pile of benchmarking patches for cbuild2. (TCWG 1378
- 2/10).
* Worked on stabilizing "Backport" Jenkins job (TCWG 1378 - 6/10).
* Meetings and Misc (2/10)
== Plan ==
* Keep tracking down Jenkins issues with Backport job.
* Get my D01 board working finally, since I killed my Odroid U2.
* Do more thorough testing of SSH performance improvements.
=Progress=
cbuild2 benchmarking - TCWG-360 [4/10]
* Some disagreements with gerrit
* One of my patches broke bare metal builds (now fixed)
* More review of the way we store benchmark sources
Other - [5/10]
* Meetings, mail, etc (featuring newlib build options, defaults,
cbuild vs benchmark scripts)
* Learned to use git-send-email, bent it to my will
* Authentication pain on ARM-side
Holiday - [1/10]
=Plan=
cbuild2 benchmarking
* Finish source/data storage plan
* Figure out how benchmark cross-running will work, get started on it
Holiday next week (25th - 29th August)
== This week ==
* TCWG-515 - Neon intrinsic testing part 1 (3/10)
- Completed testing with internal compiler error discovered compiling
with -Og and -g
- GCC bugzilla report 62040 already exists for this issue
* TCWG-518 - Neon intrinsic testing part 2 (2/10)
- Completed testing with no regressions found
* TCWG-519 - Neon intrinsic testing part 3 (2/10)
- Completed testing with no regressions found
* Reviewed branch merge of Linaro 4.8 and 4.9 with FSF trees (3/10]
== Next week ==
* Continue with neon intrinsic testing
* Investigate bug 373 - [gcc-4.9][android][armv8] internal compiler error
* Develop outline for Linaro Connect presentation
== Progress ==
* TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10)
Analyzed tree dumps between stage2 and stage3 compilers. Noted that
extra gimple declarations in stage2 compiler.
Also inline minimum parameters in gimple.c.048i.inline were different.
Richard Beiner found that way we hash the string literals was
different between stage2 and stage3 compilers.
Tested the patch, he posted on trunk but it does not solve the
comparison failures.
Also GCC garbage collector parameters for expansion and maximum heap
size varies between stage 2 and stage3. Setting this parameters to
same value in stage2 and stage3 builds fixes bootstrap failures in
Aarch64.
These fixes are for trunk and stage 1 5.0.
Ref: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62077
Still need to find a work around for release branches
Testing these patches on AMD64 /Aarch64 machines.
* Others (2/10)
* Upstream patch review.
* 1-1 Meeting Christophe.
* Misc and internal meeting.
* setup LLVM.
* Friday national holiday (2/10).
== Plan ==
* Continue LTO bootstrap issue.
* Benchmark Core mark with LTO.
* Upstream patch review.
== MISC ==
None .
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.08
stable release of both Linaro GCC 4.9 and Linaro GCC 4.8 source package.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly engineering[2] releases.
Linaro GCC 4.9 2014.08 is the fifth Linaro GCC source package release and first
stable one in the 4.9 series. It is based on FSF GCC 4.9.2-pre+svn213803 and
includes performance improvements and bug fixes.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.2-pre+svn213803
* Backport of [AArch64] Drop ISB after FPCR write.
* Backport of [AArch64] Remove from arm_neon.h functions not in the spec
* Backport of [AArch32] Fix check for __FAST_MATH in arm_neon.h
* Backport of [AArch64] fix and enable non-const shuffle for bigendian using TBL
instruction
* Backport of [AArch64] Fix constraint vec_unpack_trunk
* Backport of [AArch32] Cortex-A5 rtx costs table
* Backport of [AArch32] Handle clz, rbit types in arm pipeline descriptions
* Backport of [AArch64] Fix argument types for some high_lane* intrinsics
implemented in assembly
* Backport of [AArch64] Handle fcvta[su] and frint in RTX cost function
* Backport of [AArch64] Prologue rewrite + performance.
Linaro GCC 4.8 2014.08 is the fourteenth release in the 4.8 series and is in
maintenance. Based off the latest GCC 4.8.4+svn213802 release, it includes
performance improvements and bug fixes.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.8.4+svn213802
* Backport of Fix [AArch32] for PR sanitizer/58543
* Backport of Fix [AArch64] for PR target/59744
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
= Progress ==
* Upstream work (4/10, CARD-341)
- Patch review (gdb, binutils)
- glibc testsuites for ARM and AArch64
* Booting upstream kernel on Chromebook (4/10)
- Tried u-boot path but Google's shipped NV u-boot is broken in several ways
- Fall back to trying to boot a signed upstream kernel
- Gets halfway through boot then seems to turn the regulators off
* Malloc application benchmarking (2/10, TCWG-441)
- Add pdf library benchmark to benchmark suite
- Improve argument parsing and result plotting
- Seem to be hitting some new issue with mounting memory cgroup within docker
== Issues ==
* None
== Plan ==
* Iron out issues with malloc benchmark framework
* Get Chromebook booting
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Benchmarks (CARD-716 2/10)
- Wrapping up SPEC run, some results
- Fix missing tests, running with -ffast-math
* Toolchain (CARD-862 4/10)
- A few more assembler fixes
- http://llvm.org/PR20462
- http://llvm.org/PR20595
- Some vectorizer cleanups
- http://llvm.org/PR20655
* Background (4/10)
- Code review, meetings, discussions, etc.
- Trying D01s again as buildbots
== Plan ==
* Pick some more toolchain bugs to work on
* Release 3.5 tests and benchmarks
* Move bots to CMake, enable compiler-rt
* Change compilation to make Clang/LLVM non-NEON by default
* Enable D01s as buildbots
== Issues ==
* None.
== Progress ==
* Update "Keep constants in register when expanding" patch according
to comments (TCWG-486, 3/10).
* Refine ccmp patches since the old ones can not apply (TCWG-488, 2/10).
* Check PR62151, it was exposed by my commit r211885. But the root
cause was r208165.
* R/M toolchain related work (5/10)
== Plans ==
* Ping pending patches.
== Planed leaves ==
* Aug. 18 - 26.
Hi,
I am trying to build a working environment with Angstrom Linux, QT5 for
Toradex Apalis iMX6 module and additional QT5 SDK for my host machine.
The compilation of Angstrom with additional QT5 layer went fine.
However, there are some problems when building toolchain for the host
machine (command meta-toolchain-qt5). It seems that there is a problem
with configuration of linaro gcc runtime 4.8.
The reported error is: "checking dynamic linker characteristics...
configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES".
The log file is in the attachment. Does anyone have any idea how to fix
this problem? I am using Ubuntu 14.04.
Thanks in advance,
Crt Gorup
Hello,
I'm trying to perform cross platform remote debugging from my x86 computer
to a remote ARM device. (ex: Beagle Bone Black)
I'm using Ubuntu 14.04 and Eclipse CDT.
I installed the Ubuntu package gcc-arm-linux-gnueabihf but the gdb debugger
is not in that package.
Therefore, I'm wondering if I should use the Linaro toolchain (which
include arm-linux-gnueabihf-gdb) or if I should install the Ubuntu
gdb-multiarch package.
What is the difference between gdb-multiarch and arm-linux-gnueabihf-gdb ?
Is it better to use gdb-multiarch ?
Thanks
ssinfod
== Progress ==
BeagleBoard and Pandaboard setup for gdb testing [3/10]
* Deployed debian linux on both boards
* Installation of required packages for gdb testing
* Run gdb native tests on Beagleboard, Pandaboard and Chromebook
Arm gdb record-replay bug fix [6/10] [TCWG-314]
* Applied previous asimd and vfp patches and test for failures
* Fixed exception due to a bug in previous patches with latest trunk.
* Fixed issues with solib trampoline code when stepping in reverse.
Miscellaneous [1/10]
* In pursuit of deploying linux on boards dd,ed my hard drive by
accident and spent some time re-installing my desktop.
== Plan ==
Arm record-replay bug fix [TCWG-314]
* Test bug fixes with all previous patches and resubmit.
Update and Submit Aarch64 record replay patches.
Resume work on Aarch64 prologue analysis.
=Progress=
cbuild2 benchmarking- TCWG-360 [6/10]
* Existed patches tidied up and gerritified
* A few drive-by bugfixes
* Cross-building support added and also gerritified
lowlevellock patch [1/10]
* Resubmitted bugfix, reacted to review
* Some wrestling with space-mangling evil in mail clients
Meetings/mail/etc [3/10]
=Plan=
Holiday Tuesday afternoon
cbuild2 benchmarking
* Get remote targets working
* Maybe look at results gathering
== This week ==
* Linaro bugzilla 331 - [4.9 Regression] ICE in final_scan_insn, at
final.c:2952 [4/10]
- Triaged and investigating
* Linaro bugzilla 307 - [Linaro 4.8] ICE in change_address_1, at
emit-rtl.c:2019 [1/10]
- Unable to validate. Further investigation before closing
* TCWG-515 - Neon intrinsic bug testing [5/10]
- Linaro Infrastructure headaches and setup.
- May split into several blueprints targeting two to three tests
- Require assistance debugging DejaGnu script error preventing some
tests from running
== Next week ==
- Continue with Neon intrinsic testing
- Continue investigation into resolution for Linaro bugzilla 331
== Progress ==
* Fixed aarch64_be-none-elf builds and cross tests. (2/10)
* Forked ancient RSH support in DejaGnu to be more SSH aware. SSH
is now takes 1/4 of the time it used to for each remote execution test
case. (TCWG 512 - 4/10)
* Stabilized new ZSSH protocol in DejaGnu, also much faster than the
current RSH/SSH support. (TCWG 512 - 3/10)
* Meetings and Misc. (1/10)
== Plan ==
* Get my D01 board working finally, since I killed my Odroid U2.
* Review benchmarking patches.
* Do more thorough testing of SSH performance improvements.
== Progress ==
* TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (6/10)
Tried to recompile object files that showed differences in GCC trunk
on amd64 machine.It turned out that GCC make system always builds LTO
files in “gcc” directory and uses prev-gcc/xg++ to build them.
No differences when building stage2 and stage3 objects under same
directory “gcc” in FSF trunk.
Doing the same experiment with gcc 4.9 branch shows failure both in
x86_64 and aarch64.
Communicated the issue to Richard Beiner. Got some feedback on
debugging from Honza and Richard.
Tried passing –save-temps to BOOT_CFLAGS using FSF trunk, getting
assembler errors. Need to come back to this problem after finding root
cause.
Read about LTO passes and wpa (partitioned ) vs non portioned mode.
* Others (2/10)
* Upstream patch review.
* 1-1 Meeting Christophe.
* Misc and internal meeting.
* setup LLVM.
* Friday off (2/10).
== Plan ==
* Continue LTO bootstrap issue.
* Benchmark Core mark with LTO.
* Upstream patch review.
== MISC ==
* National holiday on 15th August .
== Progress ==
TCWG-445 - AArch64 does not generate post-decrement stores.
* Issue resolved with Jiong's prologue/epilogue patch committed to trunk.
* Closed the card.
TCWG-291 - Zero/sign extensions (5/10)
* More review and posted patch based on that which was accepted
* Ran full set of validation (including s390x, aarch64 be, x86 and arm)
* Committed two outstanding patches
* Closed the card.
TCWG-413 - Release benchmarking (2/10)
* Benchmarking or release for a15 and a57
TCWG-468: Sha1 regress (2/10)
* Experimented with back-end patterns. Not much improvement for the
test-case.
- Misc (1/10)
* Looked at gcc bugs and closed old ones.
* Posted test-case patch.
== Plan ==
- Sha1 regressions
- Fixing assigned Bugs
== Issue ==
* None.
== Progress ==
* Refine and send the patch to fix pr61225 in Combine pass for review (2/10).
* Send out the ARM backend patch to keep some constant in register
(TCWG-486, 2/10).
* Rebase and test ccmp related patches (TCWG-488, 2/10).
* R/M toolchain related work (4/10).
== Plans ==
* Ping pending patches.
== Planed leaves ==
* Aug. 18 - 26.
* Benchmarks (CARD-716 3/10)
- Working on Linaro's SPEC scripts for LLVM
- Running SPEC2000 INT/FP (C/C++ only) on both ARMv7 and AArch64
- Re-writing some EEMBC scripts to be more stable
- EEMBC reported some regressions from 3.4.2
- But still same when compared with GCC 4.8 (all in Jira)
* Toolchain (CARD-862 3/10)
- Fixing bugs in the assembler/libc++abi
- http://llvm.org/PR20529
- http://llvm.org/PR20025
- Investigating other bugs in the assembler
- http://llvm.org/PR18926
- http://llvm.org/PR20422
* LLVM 3.5 Release (TCWG-476 1/10)
- Building and testing release candidate 2
* Background (3/10)
- Code review, meetings, discussions, etc.
- Buildbot failures
- Plan for 2014 H2
- Basic LLD AArch64 support landed upstream
== Plan ==
* Take actual holidays
* Work on more assembler fixes
* Finish SPEC runs, hopefully test last release candidate
* Have a look at the bots, libraries, CMake, NEON, etc
== Progress ==
* Upstream work (2/10, CARD-341)
- Patch review
- Submitted a fix for armeb-eabi configurations of binutils
- Tested and removed aarch64 lowlevellock.h
- Tidied up glibc patchwork
* Rewrote src-release as a shell script (4/10, TCWG-487)
- Allows building releases as xz
- 80% less evil than existing makefile
* Booting upstream kernel on Chromebook (2/10)
- Kernel configured and built
- I think I have a plan...
* Off Wednesday (2/10)
== Issues ==
* None
== Plan ==
* Upstream kernel on Chromebook
* malloc app benchmarks
* Potentially glibc 2.20 release week
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
BeagleBoard and Pandaboard setup for gdb testing [1/10]
* Got both alive and working with minimal os
* Trying ubuntu prebuilt binaries didnt work.
Out of office to get internet fixed and buy accessories for boards. [1/10]
Eid Public Holidays in Pakistan from 29th July till 1st August [8/10]
== Plan ==
BeagleBoard and Pandaboard setup
* Get linux running on both boards
* Run gdb test scripts on both boards
* Compare test results outputs with chromebook and x86
Update and Submit Aarch64 record replay patches.
Resume work on Aarch64 prologue analysis.
== Progress ==
GNU Tools Cauldron
* Some useful corridor meetings with various GNU tools developers
and maintainers.
TCWG Sprint [8/10]
* Got to meet the team and discuss TCWG roadmap.
* Some useful howtos specially back porting and patch review howtos.
* Sprint with ARM and useful discussions on gdb patch review.
Return travel from UK on Friday 25th July.[2/10]
== Plan ==
Get over travel fatigue and resume office.
Get missing components and set up pandaboard and beagle board for gdb testing.
Eid Public Holidays in Pakistan from 29th July till 1st August
== Progress ==
* Installed dmucs on the TCWG build slaves, which works in DejaGnu
to do cpu load based scheduling of executing cross tests
remotely. (TCWG 511 - 4/10)
* Spent some time trying to improve SSH performance for cross
testing by opening the SSH connection via expect, and keeping it
open. (TCWG 512 - 2/10)
* Attended GNU Tools Cauldron and Linaro Sprint. (13/10)
* Worked with Bernie on changes to the benchmarking branch.
* Installed a Jenkins instance on my home server which uses my own
build farm for testing Jenkins/Cbuildv2 changes without screwing
up validation. (TCWG 1378 - 1/10)
- Experimented with some new plugins that might be useful.
(TCWG 1378 - 1/10)
- Added command line options to jenkins.sh so it'll work on
different Jenkins installations.
* Fixed bare metal testing for arm*-none-eabi*. (2/10)
* Fixed several Cbuildv2 bugs in bugzilla (TCWG 1378 - 2/10)
- #167 - tcwgweb.sh not accurate.
- #183 - cbuild2 configure --enable-bootstrap sets
'enable_bootstrap' not 'bootstrap'.
- #249 - cbuild2.sh --help only works after configure is run
* Reviewed and approved patches:
- Add configure option to choose compiler languages
- Enable parallelism by default
- Add support for --march
- Add support for --enable and --disable make_docs in configure
and cbuild2.sh
- lib/checkout.sh: Make checkout() dryrun safe when repodir
doesn't yet exist
- lib/stamp.sh: check_stamp() --force and --dryrun should return 1
- cbuild2.sh: Make --dump a do_ option so it's position doesn't
matter
- lib/make.sh: hello_world() will now return 1 if the compilation
or link fails
* Experiment with Docker to see if it has any advantages over a
chroot, which it seems to. (2/10)
* Refactor building binary tarballs. Now it doesn't run the test
first, it assumes the branch has already been validated. (2/10)
* Fix aach64_be-none-elf builds.
== Plan ==
* Fix current breakage in cbuild2/master.
* Get back to SSH performance improvements (TCWG 512).
* Get my D01 board working finally, since I killed my Odroid U2.
* Work through more cbuildv2 bug reports (TCWG 1378).
== Issues ==
* Sorry, several weeks of status in one activity report, I need to
get back to doing these weekly...
== Progress ==
- Travelling from TCWG sprint (2/10)
- Zero/sign extension elimination (TCWG-291) 2/10
* Posted the modified patch and some discussions. Further testing.
-SHA1 regression (TCWG-468) 4/10
* Looked at IRA's uses of back end cost model. It might be a
limitation (See the notes below). Looking at the test-case from sha1
which also has inline asm whose constraints are causing further issues.
- Misc (2/10)
* Looked at bugs assigned (https://bugs.linaro.org/show_bug.cgi?id=85)
* Set-up LLVM
== Plan ==
- Sha1 regressions
- Fixing assigned Bugs
---------------------------------------------------------------------
In AArch64, some of the integer operations support “w” constraint
(FP_REGS). For example *addsi3_aarch64 pattern supports it. However, not
all of the integer operations supports it. In the cases where it is
supported, all the operands have to be in FP_REGS and it will not work
if we have one operand in FP_REGS and other in GENERAL_REGS.
If there is an allocno whose pseudo register is used only in
*addsi3_aarch64 insns, it will have low cost for register class FP_REGS
(as in the case of a28 below exacted from an example). If the other
pseudo register used in *addsi3_aarch64 (a27 in the example below) is
also used in instructions (rorsi3_insn in the exaple below) that does
not support “w” constraint, there is going to be a cost involved in
moving it from FP_REGS to GENERAL_REGS (or other way)
Currently IRA dosent seems to be considering this dependency in
considering this inter dependency in cost calculation.
=Progress=
cbuild2 benchmarking - TCWG-360 [7/10]
* Integrated benchmarking more into the core of cbuild2
* 'Audited' the benchmarks lying around on toolchain64
* Persuaded cbuild2 to use git-over-ssh
Meetings/mail/etc [3/10]
=Plan=
cbuild2 benchmarking
* Convert eembc integration into reviewable patches
* Get cross-compilation working
* Get remote targets working
== This week ==
* Neon intrinsic testing (4/10)
- Patched sources with Christophe's patches
- Ran Neon intrinsic tests for vclz and vqadd
- Investigating regressions
* On leave Monday and Tuesday; out sick Wednesday (6/10)
== Next week ==
* Continued Neon intrinsic testing
== Issues ==
* None.
== Progress ==
* Rework the patch to fix pr61225 in Combine pass. (4/10)
* Investigate code-size regression when skipping arm_split_constant in
expand (TCWG-486, 4/10).
- For reg & 0xffff, zero_extendhi instruction is more efficient.
- For "PLUS", the define_insn_and_split "*arm_addsi3" is only
available when "reload_completed || !arm_eliminable_register
(operands[1])". The cprop and combine passes can not recover it back
when there is no chance to optimize the constant.
* R/M toolchain related work (2/10).
== Plans ==
* Send out the patches for review.
* Refine ccmp related patches.
== Planed leaves ==
* Aug. 18 - 22.
== Progress ==
* Toolchain (CARD-862 2/10)
- Helping debug some sanitizer work
- Re-evaluating compiler-rt on ARM with CMake
* LLVM 3.5 Release (TCWG-476 2/10)
- Working on SPEC to run with LLVM
* Background (6/10)
- Code review, meetings, discussions, patches, etc.
- Email and patch backlog due to Cauldron and sprint
- Investigating and fixing buildbot/build failures
== Plan ==
* Finish SPEC-LLVM integration, run against 3.5 vs. 3.4.2
* Test Release Candidate 2, when it comes
* Back to compiler-rt work...
== Progress ==
* Various small tasks (3/10)
- Catching up on email
- Bug report investigations
- Expenses from Cauldron/Sprint
- Pushing patches
- Tidy some JIRA cards
* Investigated gdb testsuite failures on Chromebook (2/10)
- Looks like a kernel issue, need to try a newer kernel on Chromebook
* Investigated state of ARM and AArch64 glibc testsuites for 2.20 release (2/10)
- Results look ok but a couple of things need investigation at some point
* Triaged bugzilla bugs (1/10)
* Built releases of binutils, eglibc and gdb for 2014.08 (2/10)
== Issues ==
* None
== Plan ==
* Get a newer kernel booting on Chromebook
* Look at improving src-release for xz tarballs
* Figure out what to do with glibc testsuite failures on AArch64
--
Will Newton
Toolchain Working Group, Linaro
Hi guy,
In order to have soft-float support in toolchain, I tried to build our toolchain using Linaro ct-ng script.
I used "linaro-armeb-linux-gnueabihf" configuration then change floating point option from hard to soft.
There is the error I have:
[ERROR] /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/../../../../armeb-linux-gnueabi/bin/ld: error: /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/libgcc.a(bpabi.o) uses VFP register arguments, /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/build-libc/elf/librtld.map.o does not
For short, libgcc.a(bpabi.o) uses VFP register arguments, but librtld.map.o does not.
The C library used is eglibc version (Linaro 2.19-2014.04), is this a way to make eglibc work with sfot-float?
Thanks!
Joel
I was using arm-eabi builds on Linaro Android 4.9 toolchain 2014.06.
I've just downloaded 2014.07 and found out there is not an arm-eabi
toolchain.
I need arm-eabi to build Linux kernels and arm-none-eabi toolchain from
here:
http://releases.linaro.org/14.07/components/toolchain/binaries/gcc-linaro-a…
is not capable of building LTO kernels.
Error pops up : "cc1: error: -fno-fat-lto-objects are supported only with
linker plugin"
TL;DR, I need arm-eabi builds from Linaro Android toolchains.
arm-none-eabi builds are not built with linker plugin enabled.
Short week (Friday off)
== Progress ==
* GCC trunk cross-validation (2/10)
- catch up with backlog, reported newly introduced FAILs
- analyzed logs of spurious failures, improved reporting of such cases
- the script will know send a separate email with the svn ids
it has selected for validation, to help fill the backports spreadsheet
* Infrastructure (2/10)
- started deployment of past releases to help us quickly
reproduce/investigate bug reports
- 14.* binary releases deployed on toolchain64 (/work/toolchains)
- automation not yet possible because of problem with the lab
internal squid proxy preventing the download of
http://releases.linaro.org/14.07/components/toolchain/binaries for
parsing
- started deployment of past toolchains built from the source
releases using cbuild2 but ran into build problems
* Neon intrinsics tests (1/10)
* Misc (conf calls, meetings) (3/10)
- 1-1 calls to get feedback after Cauldron+Sprint
- a bit of bugzilla triage
- backports reviews for 14.08 release
== Next ==
Holidays, back on Aug 18th
Hi Linaro-toolchain team,
I notice that the Linaro toolchain binary only support hard-float. We have a platform which is ARMv7 based does not support VFP.
Could you generate toolchain binary for ARmv7 that allows soft-float?
Thanks,
Joel
The Linaro Toolchain Working Group (TCWG) announces the 2014.07-1 release
of the Linaro GCC 4.9 source package. This is a respin of the 2014.07
release which
contained a backport of a revision that is only relevant to trunk.
Changes in this GCC source package release are:
* Updates to GCC 4.9.1 (svn212635)
* Revert backport of [AArch32] Fix PR target/61154.
Please find the original 2014.07 release notes below:
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.07
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.07 is the fourth Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn212419 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn212419
* Backport of [AArch32] Wrap long literals in HOST_WIDE_INT_C in
aarch-common.c
* Backport of [AArch32] Rewrite TLC Intrinsics.
* Backport of [AArch32] Remove vzip, vuzp, vtrn builtins and cleanup
* Backport of [AArch32] Use enum name instead of integer value for
PARAM_SCHED_PRESSURE_ALGORITHM.
* Backport of [AArch32] Vectorise bswap*
* Backport of [AArch32] Fix PR/61331
* Backport of [AArch32] Fix PR target/61154
* Backport of [AArch32] Use mov_imm type for movw operations consistently
* Backport of [AArch32] Remove XFmode from ARM backend.
* Backport of [AArch64] Rewrite REV Intrinsics.
* Backport of [AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE.
* Backport of [AArch64] Support tail indirect function call.
* Backport of [AArch64] Fix stack protector for ILP32
* Backport of [AArch64] ILP32 dynamic linker
* Backport of [AArch64] Correct signedness of builtins, remove casts from
arm_neon.h
* Backport of [AArch64] clarify stack layout diagram
* Backport of [AArch64] Implement movmem for the benefit of inline memcpy
* Backport of [AArch64] Fix REG_CFA_RESTORE mode.
* Backport of [AArch64] Fix layout of frame layout code.
* Backport of [AArch64] Fix some reg-to-reg move scheduler types.
* Backport of [AArch64] Implement CRC32 ACLE intrinsics + testsuite.
* Backport of [AArch64] Implement ADD in vector registers for 32-bit scalar
values.
* Backport of [AArch32/AArch64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV AArch64
* Backport of [AArch32/AArch64] Use signed chars in gcc.dg/pr60114.c.
* Backport of [AArch32/AArch64] Rewrite UZP Intrinsics.
* Backport of [AArch32/AArch64] Rewrite TRN Intrinsics.
* Backport of [AArch32/AArch64] Rewrite EXT Intrinsics.
* Backport of [genattrtab] Fix memory corruption, allocate enough memory for all
bypassed reservations
* Backport of Fix PR c/60114
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
=Progress=
GNU Cauldron
TCWG Sprint [8/10]
* Really helpful to meet (almost) everybody
* Some useful discussion, too
memcpy on A15 - TCWG-390 [1/10]
* Should have let this lie but I had an odd 1/2 day and some data
begging to be looked at
* Turned out I'd fat-fingered the wrong data
* But I gained more evidence suggesting that cortex-strings
benchmark is too noisy
(Non-sprint) meetings/mail etc [1/10]
=Plan=
cbuild2 benchmarking
* Fit what I have into Rob's worldview
* Hopefully convert it into some reviewable patches
Follow up on some notes from Cauldron, sprint
== Progress ==
* GNU Cauldron (4/10)
- GCC+LLVM presentation had some positive reviews
- Discussed sanitizers roadmap
- Very interesting meeting with QuIC
* TCWG Sprint (4/10)
- Mostly about GNU tools
- Team Mission streamlined, looking good
- LLVM roadmap attracted some attention
- We could have some bite-sized work from other team members?
* Release 3.5 testing (TCWG-476 2/10)
- No test regressions
- Spotted some benchmark regressions
- ARMv7 is overall the same on EEMBC
- AArch64 is overall 10% faster on EEMBC
* Weekend working, Friday off
== Plan ==
* Release week!
- Investigate 3.5 performance regressions on v7
- Work around the lack of perf on v8?
- Run SPEC on both v7 and v8 and spot regressions
