- linaro-toolchain - lists.linaro.org

URGENT: Cant build linaro toolchain : exact commands

by -- --

10 years, 12 months

3
4
0 0

[ANNOUNCE] Linaro GCC 4.7 2014.06 released

by Christophe Lyon

The Linaro Toolchain Working Group is pleased to announce the 2014.06 release of Linaro GCC 4.7. As announced at Linaro Connect USA 2013 Linaro GCC moved to a pattern of quarterly stable releases, with engineering releases in the intervening months. This is the third stable release, and contains no known regressions compared to the 2014.04 release. Linaro GCC 4.7 2014.06 is the twenty forth release in the 4.7 series. Based off the latest GCC 4.7.5+svn211571 release, this is the eleventh release after entering maintenance and the final one. Interesting changes include: * Updates to GCC 4.7.4+svn211571 Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list":http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at #linaro-tcwg * Bug reports should be filed in Launchpad against "Linaro GCC project":http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro":http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto:support@linaro.org

11 years

1
0
0 0

[ACTIVITY] 23 - 27 June 2014

by Omair Javaid

== Progress == * AArch64 GDB reverse watchpoints issues. [TCWG-503] [6/10] -- Proposed a fix which failed testing now working on an alternate fix in gdb process record target implementation. * Further progress on AArch64 GDB handling of functions with empty prologue. [TCWG-504] [2/10] -- Analysed different type of obj files and how they are being handled by gdb. * Investigate and improve ARM gdb frame unwinding [TCWG-157] [1/10] -- Try to reproduce reported bugs. * Miscellaneous [1/10] -- Setting up gdb remote testing with hackboxes. -- Meetings etc. == Plan == * AArch64 GDB reverse watchpoints issue. [TCWG-503] -- Figure out a new fix in gdb process record implementation, test it and then justify it. * AArch64 GDB handling of functions with empty prologue. [TCWG-504] -- Further investigation.

11 years

1
0
0 0

[ACTIVITY] June 23 - 27

by Bernie Ogden

=Progress= memset performance improvement - TCWG-156 [2/10] * Bugfixed/improved cortex-strings-bench-on-lava memcpy regression on A9 - TCWG-390 [6/10] * Scanned through lots of data * Learned some perf and some streamline * Still don't know what's going on here lowlevellock performance bugs - TCWG-435 [0/10] * Stalled until someone reacts to my pings Meetings/mail/etc [2/10] * Including some questions about whether we need softfloat support in binary releases =Plan= Keep prodding at memcpy with perf/streamline Explore repeatability of cortex-strings benchmark See how much quicker I can make cortex-strings benchmark without compromising repeatability Possibly try out a bare metal version of (a subset of) cortex-strings benchmark

11 years

1
0
0 0

[ACTIVITY] June 23 - 27

by Charles Baylis

* Analysis of PR61411 (CARD-341) [2/10] * Attempted to analyse VP8 decode performance on Aarch64 vs Aarch32 (TCWG-?) [6/10] . took a while to find compatible libvpx source and compilers :( . can't find a good way to profile on Aarch64, perf is broken, gprof results look implausible * Misc [2/10]

11 years

1
0
0 0

[ACTIVITY] Week 26

by Yvan Roux

== Issues == * None == Progress == * respin Linaro GCC 4.9 2014.06 (3/10) - Merged FSF 4.9 branch which includes the needed Big Endian fixes. - Validated and released Linaro GCC 4.9 2014.06-1 * TCWG-496 : Linaro GCC 4.9 2014.07 (4/10) - Reverted rev 209643 (AArch64 libjava issue). - Backports validation still ongoing. - Looked at Jenkins/cbuildv2/schroot validation issues. * Misc: (3/10) - Various meetings. == Next == * Office relocation planed on Thursday. * Complete validation and backports.

11 years

1
0
0 0

[ACTIVITY] Week 26

by Zhenqiang Chen

== Issues == * None == Progress == * Take care Linaro binaries release (1/10). * Send out ccmp patches for community review (TCWG-488, 1/10). * loop2_invariants heuristics tune (1/10, TCWG-469). One patch was committed @r212135. * Constant optimization (TCWG-486, 7/10 ) - Try to keep constant in register when expanding. But benchmark results show regression due to combine behavior changes. - Try to keep unsigned constant when expanding. For crc |= 0x8000, crc is unsigned short. If 0x8000 is represented as unsigned value, no need to split 0x8000. But in middle-end, wide_int_storage::set_len and trunc_int_for_mode always do sign extension. "trunc_int_for_mode (INTVAL (op), mode) == INTVAL (op)" is always checked when checking operand (e.g. in general_operand of recog.c). And in RTL, there is no "unsigned" information at all. == Plans == * Update ccmp patches according to comments. * Continue on constant optimization. * Ping pending patches.

11 years

1
0
0 0

[ACTIVITY] 23 - 27 June 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (10/10) - Posted two patches for review and gone through few iterations - Looked at flag_wrapv and !flag_strict_overflow regressions * ARM (and possibly some other targets) truncates negative values and this makes them incompatible with the value range in SSA. One solution is to ignore any gimple statements that load negative constants when eliminating zero/sign extension elimination. * We also loose the OVF(INF) information in tree when they are converted to wide_int and propagated to SSA. - Testing on a target that support PTR_EXTEND * Trying to set-up x86_64-linux with -mx32. Still not able to compile as I am getting various errors in glibc. Looking into it, == Plan == * Upstream zero/sign extension elimination activities

11 years

2
2
0 0

[Weekly] 23-27 JUNE 2014

by Michael Collison

== This week == Bug fixing: - Provide ldp/stp peephole optimization for Aarch64 [TCWG-446] [2/10] - Backported Launchpad 1318831 - Invalid unpoisoning of stack redzones on ARM [2/10] Investigation: - Launchpad 1267761 - miscompilation of unsigned comparison on aarch64 [3/10] Launchpad cleanup (3/10) : Bugs marked fix released: - Launchpad 1065509 - tetgen ftbfs in quantal on armhf using Linaro GCC 4.7 Bugs marked cannot reproduce: - Launchpad 1312931 - gcc 4.8 internal compiler error: in add_stores, at var-tracking.c:5918 Bugs marked incomplete: - Launchpad 1309122 - internal compiler error: in optimize_sc, at modulo-sched.c Bugs marked won't fix - Launchpad 1299354 - Floating Point Errors with Linaro GCC 4.7.3 - Launchpad 640521 - Incorrect function prologue with Thumb-1 high register variable == Next week == Launchpad 1267761 - miscompilation of unsigned comparison on aarch64 Provide ldp/stp peephole optimization for Aarch64 [TCWG-446]

11 years

3
2
0 0

[ACTIVITY] June 23-29

by Maxim Kuvyrkov

== Week of June 23rd == - Continued working on toolchain testing improvements (CARD-1378, 6/10) -- Various cleanups and improvements to cbuild2. -- Troubleshooting of Jenkins stability problems. -- Increasing test coverage for arm big-endian toolchains. - Various meetings and discussions (3/10) -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

[ACTIVITY] June 16-22

by Maxim Kuvyrkov

== Week of June 16th == - Continued working on toolchain testing improvements (CARD-1378, 6/10) -- Refactored cbuild2's schroot support after Rob's review -- Posted updated patches - Started moving TCWG dev environment master vm to Linaro's AWS (1/10) -- This the the VM from where toolchain64.lava.schroot and maximk.schroot are synchronized. -- Once migrated, all TCWG admins can access it, not just me. - Various meetings and discussions (2/10) -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

[ACTIVITY] June 9-15

by Maxim Kuvyrkov

== Week of June 9th == - Continued working on toolchain testing improvements (CARD-1378, 6/10) -- Added support for native testing inside schroot -- Troubleshooting of various problems -- Assisted Yvan in testing of the 2014.06 source release and general fire-fighting - Various meetings and discussions (2/10) - Interviewed 2 potential assignees (1/10) -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

[ACTIVITY] 23 - 27 June 2014

by Will Newton

== Progress == * Patch review, testing and follow-up (4/10, CARD-341) - glibc 2.20 freeze upcoming - submit some warning fix patches * Add support for ARM HWCAP2 to glibc (2/10, TCWG-499) * Submit a patch for increasing ld max page size on ARM (1/10) * Reformatted backports spreadsheet for glibc, binutils and gdb (1/10) * Investigated language runtimes (1/10) * Meetings (1/10) == Issues == * None == Plan == * More glibc patch work for the freeze (1st July) * malloc benchmarking -- Will Newton Toolchain Working Group, Linaro

11 years

1
0
0 0

[ACTIVITY] 23-27 June 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (CARD-647) (6/10) - email robot is now working - added list of "ignored" tests when reporting regressions, mainly because they are unstable when run under qemu (threads...) - a57+crypto FPU config looks OK - tried to use "contrib/test_summry" to send results, but that would flood gcc-testresults mailing-list - looked at impact of using CFLAGS/CFLAGS_FOR_TARGET etc upon libstdc++ tests. Needs deeper investigation - robustified scripts to handle more compute farm errors (random "interrupted system call") * AArch64 libsanitizer: no progress this week * Neon intrinsic tests: review started * Misc (meetings, conf-calls, ...) 4/10 - 4.7-2014.06 release done, benchmarks on-going == Next == * GCC cross-validation - look more deeply at the impact of the various CFLAGS (on testsuites results) * Neon intrinsic tests: - handle feedback * AArch64 libsanitzer: resume work * Publish 4.7-2014.06 release

11 years

1
0
0 0

[ACTIVITY] Week 26

by Renato Golin

== Progress == * Toolchain (CARD-862 1/10) - Testing Compiler-RT on autoconf/ARM - Checking LLD * Automation Framework (CARD-1378 6/10) - Writing script to manage TCWG rack - Testing D01 with new kernel - Testing Chromebook 2 vs. 1 vs. D01 for LLVM - Cleaning up failed Chromebooks - Pointlessly working on beagle bones * Background (3/10) - Code review, meetings, discussions, etc. - Starting the GCC + LLVM presentation == Plan == * continue trying to build compiler-rt with autoconf on ARM * continue working on the LLVM + GCC presentation * initial investigations on lld and MCLinker

11 years

1
0
0 0

[ANNOUNCE] Linaro GCC 4.9 2014.06-1 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) announces the 2014.06-1 release of the Linaro GCC 4.9 source package. This is a respin of the 2014.06 release which fixes some issues on AArch64 big-endian and in AArch64 libjava. Changes in this GCC source package release include: * Updates to GCC 4.9.1-pre+svn211964 * Revert backport of [AArch64] Define TARGET_FLAGS_REGNUM. * Backport of [AArch64] Cost model improvements. Please find the original 2014.06 release notes below: The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1-pre+svn211054 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1-pre+svn211054 * Backport of [AArch32] PR rtl-optimization/60663 * Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15. * Backport of [AArch32] Support ORN for DIMode. * Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A. * Backport of [AArch32] Allow any register for DImode values in Thumb2. * Backport of [AArch32] Initialize new tune_params values. * Backport of [AArch32] Initialise T16-related fields in Cortex-A8 tuning struct. * Backport of [AArch32] Enable tail call optimization for long call. * Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32. * Backport of [AArch64] Fix TLS for ILP32. * Backport of [AArch64] vrnd<*>_f64 patch. * Backport of [AArch64] Fix possible wrong code generation when comparing DImode values. * Backport of [AArch64] Add a space to memory asm code between base register and offset. * Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation. * Backport of [AArch64] vqneg and vqabs intrinsics implementation. * Backport of [AArch64] Vreinterpret re-implemention. * Backport of [AArch64] Define TARGET_FLAGS_REGNUM. * Backport of [AArch64] Merge longlong.h from glibc tree. * Backport of [AArch64] add, sub, mul in TImode. * Backport of [AArch64] Add handling of bswap operations in rtx costs. * Backport of [AArch64] Fully support rotate on logical operations. * Backport of [AArch64] Use standard patterns for stack protection. * Backport of [AArch64] VDUP Testcases. * Backport of [AArch64] Vectorise bswap[16,32,64]. * Backport of [AArch64] Enable TBL for big-endian. * Backport of [AArch64] Reverse TBL indices for big-endian. * Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class. * Backport of [AArch64] Improve vst4_lane intrinsics. * Backport of [AArch64] Rewrite and tests ZIP Intrinsics. * Backport of [AArch64] libitm Enabled. * Backport of [AArch64] Support full addressing modes for ldr/str in vectorization scenarios * Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...). * Backport of Fix warning in libgfortran configure script. * Backport of Remove PUSH_ARGS_REVERSED from the RTL expander Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

11 years

2
2
0 0

Cannot find build.mk file

by shining_diamond＠mail.com

11 years

2
2
0 0

[ACTIVITY] 16 - 20 June 2014

by Omair Javaid

Sorry for sending this late this week. == Progress == * Ran gdb testsuite on arm and x86. Investigated failures on arm-native-gdbserver config. [2/10] * Investigate shared library gdb test failures with dejagnu on remote connections. [TCWG-504] [2/10] * Debug AArch64 GDB reverse watchpoints issue. [TCWG-503] [2/10] * Debug AArch64 GDB handling of functions with empty prologue. [TCWG-504] [2/10] * Understand gdb remote vs native feature parity patches. [1/10] [TCWG-263] * Miscellaneous [1/10] -- Setting up chromebook with 14.04 -- Meetings etc. == Plan == * Further progress on AArch64 GDB reverse watchpoints issue. [TCWG-503] * Further progress on AArch64 GDB handling of functions with empty prologue. [TCWG-504]

11 years

1
0
0 0

[Activity] June 16-22

by Rob Savoye

== Progress == * Track down and fix build, testing, and Jenkins issues. (TCWG - 1378 9/10) - Reinstalled everything needed for toolchain build and Jenkins on the repaired chromebooks. - Setup D01 and APM boards for toolchain building and testing, added them to the Jenkins matrix. - Updated qemu to the latest to get aarch32 & crypto support. * Meetings and Misc (1/10) == Plan == * Fix bare metal testing for aarch64. * Continue working with the D01 boards. * Track down and fix build, testing, and Jenkins issues. (TCWG - 1378) == Issues == * Gerrit triggers only build trunk, and not the branch specified in the review request.

11 years

1
0
0 0

[ACTIVITY] 16 - 20 June 2014

by Will Newton

== Progress == * More work on malloc microbenchmark (5/10, TCWG-160) - Script for plotting results - Analyze performance with SystemTap probe points - Tidy up and submit v3 * Further work on ld issue on master (1/10, CARD-341) * Patch review and testing (2/10, CARD-341) * Annual leave on Friday (2/10) * Still no luck on getting Ubuntu on wg boards == Issues == * None == Plan == * Make sure we have everything we need for glibc freeze at month end * malloc app benchmark work -- Will Newton Toolchain Working Group, Linaro

11 years

1
0
0 0

How to build linaro crosscompiler

by -- --

11 years

3
2
0 0

[ACTIVITY] 16 - 20 June

by Bernie Ogden

=Progress= memcpy regression on A9 - TCWG-390 [6/10] * cortex-strings benchmarks suggest this isn't just an outlier, nor entirely about preload * Quick test on A15 suggests a similar (less severe) issue * Got cortex-strings benchmarks more-or-less running via lava memset performance improvement - TCWG-156 [1/10] * GNU benchtests not as repeatable as hoped lowlevellock performance bugs - TCWG-435 [1/10] * Converted a bunch of inline functions into macros for coldfire Meetings/mail/etc [2/10] =Plan= Carry on generating memcpy data, develop some hypotheses Bugfix lava-ization of cortex-strings benchmarks as & when Explore repeatability of cortex-strings benchmark See how much quicker I can make cortex-strings benchmark without compromising repeatability Try to get lowlevellock.h committed for at least arm/aarch64

11 years

1
0
0 0

[ACTIVITY] 16 - 20 June

by Venkataramanan Kumar

== Progress == * TCWG-418 : Bug fix Reload spill failure (3/10) Bench marked coremark – no degradations with patch. CPU2000 runs – Workedon running them as native in chromebook. Issues with space. * TCWG-181 : LTO enablement (3/10) GCC 4.9 FSF no ICE . Linaro 14.07 release has ICE. GIT bisect experiments on trunk on Aarch64 hardware. * Misc: (2/10) - Various meetings . - PGO bootstrap runs on Aarch64 hardware - pass. * AMD team out on 19th (2/10). == Next == * GIT bisect experiments on LTO bootstrap. * Continue Benchmark reload spill failure fix * Explore on Large memory model support for aarch64 * Cbuildv2 release packaging on native.

11 years

1
0
0 0

[ACTIVITY] Week 24

by Yvan Roux

== Issues == * None == Progress == * TCWG-496 : Linaro GCC 4.9 2014.07 (8/10) - Backported all the identified needed trunk revisions. - All the patch reviews are OK. - Validation ongoing - Looked at Jenkins/cbuildv2/schroot validation issues. * Misc: (2/10) - TCWG-444 : Final Linaro GCC 4.7 release o Reviewed and approved FSF branch merge. - Various meetings. == Next == * Complete validation and backports.

11 years

1
0
0 0

Reg. Error during binutils build

by Gopalasubramanian, Ganesh

I got an error while trying to build the latest Linaro-binutils source (http://releases.linaro.org/14.06/components/toolchain/binutils-linaro/binut…). ../bfd/bfd.h:304:75: error: right-hand operand of comma expression has no effect [-Werror=unused-value] #define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE) Found that the error is already resolved in FSF trunk (https://sourceware.org/ml/binutils/2014-01/msg00334.html). Is that on cards for backport? Regards Ganesh

11 years

2
1
0 0

[ACTIVITY] 16-20 June 2014

by Kugan

== Progress == * Benchmarking and regression testing (TCWG-468) (3/10) - More aarch64 spec2k benchmarking of patches and against fsf 4.9 release - Spec2k a15 benchmarking on chromebook * Zero/sign extension elimination (TCWG-15) (5/10) - Fixed regressions found and broke the patch into two - Looking at improving zero/sign extension elimination as it is not happening for one test-case now - Plan to benchmark the changes and post for review once this is done. * LP spec2k regression bugs (2/10) - #1320965 : Cant reproduce ICE but goes into infinite loop with -floop-interchange at -O3; Looking into it -#1330725 : Invalid as -fno-strict-overflow is needed for 254.gap. == Plan == * Benchmarking and spec2k bugs. * Upstream zero/sign extension elimination activities.

11 years

1
0
0 0

[ACTIVITY] Week 25

by Zhenqiang Chen

== Issues == * None. == Progress == * loop2-invariant heuristics tuning (TCWG-469, 2/10). Two patches were committed @r211818 and r211885. Another two are in review. * Test the rebased ccmp patches (TCWG-488, 2/10). * Send out a patch to enhance cprop pass by checking rtx_cost. Collect benchmark results and update the patch according to comments (TCWG-486, 6/10). == Plans == * Ping pending patches. * Continue on patches to optimize constant in loop.

11 years

1
0
0 0

[ACTIVITY] 16-20 June 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (CARD-647) (5/10) - fixes to email-driven robot, now generating html reports - trouble shooting transcient problems with the compute farm - added a57+crypto FPU configuration, still under test - added libstdc++ reports * AArch64 libsanitizer (TCWG-58) - Started looking at results. Different errors when running on HW and under QEMU (where it goes in an infinite loop) * Misc (meetings, conf-calls, ...) 3/10 - 4.7-2014.06 branch merge completed. - 4.9 backports reviews - trouble shooting connexion to tcwgXXX boards == Next == * GCC cross-validation - more fixes and enhancements - continue testing of the email robot * Neon intrinsic tests: - discuss with upstream * AArch64 libsanitizer: - investigate generated code and cause for infinite loop * Make 4.7-2014.06 final release

11 years

1
0
0 0

[ACTIVITY] Week 25

by Renato Golin

== Progress == * Automation Framework (CARD-1378 8/10) - Setting up D01s - Wasting time on Pandas - Setting up serial console - Preparing Chromebook2s - Testing remote gcc check * Background (2/10) - Code review, meetings, discussions, etc. == Plan == * help Guodong with D01 stabilisation * have a look at compiler-rt autoconf build for buildbots * start looking at the LLVM + GCC presentation * probably more lab stuff...

11 years

1
0
0 0

Issue with LPAE in Linux kernel

by Taras Kondratiuk

It seems we have an issue with 4.8 toolchain. Recent Linux kernels (v3.15, v3.16) fails to boot on TI Keystone 2 SoC with LPAE enabled if built by gcc 4.8, while they boots fine if built by 4.6, 4.7 or 4.9. Linux kernel versions used for testing: - 3.15, 3.16 - git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 4.8 toolchain binaries: http://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-a… 4.9 toolchain binaries: http://releases.linaro.org/14.05/components/toolchain/binaries/gcc-linaro-a… Our current investigation results: 1) The issue happened somewhere inside function arch/arm/mm/mmu.c -> paging_init(). 2) At the moment when paging_init() -> kmap_init() function is called the value of static structure "init_mm" become corrupted and (&init_mm)->pgd has changed its value from 0xc0003000 to 0xe2411001. 2.1) "init_mm" is initialized statically in mm/init-mm.c and not modified by code struct mm_struct init_mm = { .mm_rb = RB_ROOT, .pgd = swapper_pg_dir, .mm_users = ATOMIC_INIT(2), .mm_count = ATOMIC_INIT(1), .mmap_sem = __RWSEM_INITIALIZER(init_mm.mmap_sem), .page_table_lock = __SPIN_LOCK_UNLOCKED(init_mm.page_table_lock), .mmlist = LIST_HEAD_INIT(init_mm.mmlist), INIT_MM_CONTEXT(init_mm) }; 2.2) The below debugging code produces following log output: [ 0.000000] cma: CMA: reserved 16 MiB at 2e800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] ==== map_lowmem c06ecc08 c0003000 [ 0.000000] ==== dma_contiguous_remap c06ecc08 c0003000 [ 0.000000] ==== devicemaps_init c06ecc08 c0003000 [ 0.000000] ==== kmap_init c06ecc08 e2411001 [ 0.000000] Unhandled fault: alignment fault (0x221) at 0xe2411011 Debugging code: void __init paging_init(const struct machine_desc *mdesc) { void *zero_page; build_mem_type_table(); prepare_page_table(); pr_err("==== map_lowmem %p %p\n", &init_mm, (&init_mm)->pgd); map_lowmem(); pr_err("==== dma_contiguous_remap %p %p\n", &init_mm, (&init_mm)->pgd); dma_contiguous_remap(); pr_err("==== devicemaps_init %p %p\n", &init_mm, (&init_mm)->pgd); devicemaps_init(mdesc); pr_err("==== kmap_init %p %p\n", &init_mm, (&init_mm)->pgd); kmap_init(); pr_err("==== tcm_init\n"); 2.3) Most of functions called by paging_init() are static and get inlined. If 'static' modifier is removed from devicemaps_init() (so it will not be inlined by compiler), the issue disappears and kernel boots fine. 2.4) The same kernel binary boot fine if LPAE is disable. Does it make sense to file a toolchain bug? === Log === Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 3.15.0-rc8-next-20140605-dirty (x0174654@uglx0174654) (gcc version 4.8.3 20140401 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2014.04 - Linaro GCC 4.8-2014.04) ) #93 SMP PREEMPT Fri Jun 6 15:31:19 EEST 2014 [ 0.000000] CPU: ARMv7 Processor [412fc0f4] revision 4 (ARMv7), cr=30c7387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: Texas Instruments Keystone 2 Kepler/Hawking EVM [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Switching to high address space at 0x800000000 [ 0.000000] cma: CMA: reserved 16 MiB at 2e800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] Unhandled fault: alignment fault (0x221) at 0xe2411011 [ 0.000000] Internal error: : 221 [#1] PREEMPT SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 3.15.0-rc8-next-20140605-dirty #93 [ 0.000000] task: c06e3be0 ti: c06d6000 task.ti: c06d6000 [ 0.000000] PC is at paging_init+0xa00/0xaf0 [ 0.000000] LR is at paging_init+0x9e8/0xaf0 [ 0.000000] pc : [<c0693b2c>] lr : [<c0693b14>] psr: 600001d3 [ 0.000000] sp : c06d7ea0 ip : c06e5ce4 fp : 00000000 [ 0.000000] r10: 00000000 r9 : 00001000 r8 : fffff000 [ 0.000000] r7 : 00002530 r6 : fffff000 r5 : feb30000 r4 : c0692cd8 [ 0.000000] r3 : e2411001 r2 : 00000003 r1 : bfe00000 r0 : 00000000 [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [ 0.000000] Control: 30c5387d Table: 00003000 DAC: fffffffd [ 0.000000] Process swapper (pid: 0, stack limit = 0xc06d6240) [ 0.000000] Stack: (0xc06d7ea0 to 0xc06d8000) [ 0.000000] 7ea0: 2e800000 c06b194c 0000071f 00800000 00000401 00000000 00000000 00000000 [ 0.000000] 7ec0: 00000000 00000000 c0000000 00000000 c001cd40 00000000 00000800 00c00000 [ 0.000000] 7ee0: c06df834 00000000 c0800000 00c00000 c06ecc08 c06c4070 ffff1000 0082e7f5 [ 0.000000] 7f00: 00001000 00000007 c06cade4 c07184e0 c0008000 c06c4070 c06d7fd4 c06ca3e8 [ 0.000000] 7f20: c06ca3d8 c001cd40 c06cade4 c0690054 00000000 30c7387d 00000000 00000000 [ 0.000000] 7f40: 00000000 00000000 c071ac0e 000000dd 00000000 00000000 c071a318 00000000 [ 0.000000] 7f60: 00000000 00000000 00000000 00000000 00000000 00000001 c06e4d68 c06df800 [ 0.000000] 7f80: 00000000 00000000 00000000 c04a94ac c05d6e38 00000000 00000000 00000001 [ 0.000000] 7fa0: ffffffff c06df800 00000000 00000000 00000000 c068d898 00000000 00000000 [ 0.000000] 7fc0: 00000000 00000000 00000000 00000000 00000000 c06ca3e8 30c7387d c06df84c [ 0.000000] 7fe0: c06ca3e4 c06e4d68 80007000 412fc0f4 00000000 80008084 00000000 00000000 [ 0.000000] [<c0693b2c>] (paging_init) from [<c0690054>] (setup_arch+0x4b4/0x9ac) [ 0.000000] [<c0690054>] (setup_arch) from [<c068d898>] (start_kernel+0x80/0x39c) [ 0.000000] [<c068d898>] (start_kernel) from [<80008084>] (0x80008084) [ 0.000000] Code: e34f6fff e3a01000 e3a02003 e34b1fe0 (e1c381d0) [ 0.000000] ---[ end trace 3406ff24bd97382e ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ====================================================================================================================

11 years

1
0
0 0

Crosscompile for arm

by -- --

11 years

3
4
0 0

[ACTIVITY] 09 - 13 June

by Bernie Ogden

=Progress= memcpy regression on A9 - REQ-363 [3/10] * Verified regression on a couple of targets, some investigation around cause lowlevellock performance bugs - TCWG-435 [3/10] * Upstreamed, some reworking based on review, obsessed about odd code change & intermittent test failure memset improvement - TCWG-156 [1/10] * Started looking at glibc benchtests as a quicker way of doing 1st-round benchmarking Meetings/mail/etc [3/10] =Plan= More of the above - * Get some memset benchmarks running * Carry on with lowlevellock patches (breaks m68k build, apparently) * More memcpy investigation

11 years

1
0
0 0

[ACTIVITY] Week 23

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effor for ARMv8-a (8/10) - Installed cbuildv2-schroot environment (Thanks Maxim !) - Integrated and Validated all the on-going backports - Released 4.9 2014.06 - Backported half of the remaining revision marked in the spreadsheet (review and validation on-going). * Misc: (2/10) o Various meetings and HO. == Next == * Complete FSF 4.8 branch merge * Review 4.7.4 branch merge * Complete backports.

11 years

1
0
0 0

[ACTIVITY] 09 - 13 June 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Investigated prologue analysis and stepping issues. [3/10] [TCWG-484] -- Updates to JIRA cards. -- Updates to patches stalled till next week. * GDB arm v7 record/replay -- Prepare SIMD instruction recording support patches for re submission. [1/10] -- Chromebook issues stalls Testing and submission till next week. * GDB on Android improvements [3/10] -- Discussions with community developers -- Review of already submitted patches for catch syscall and exec events. -- Making things work with available upstream patches. * Miscellaneous [3/10] -- Compassionate leave on Monday 9th June 2013. -- Submit application for travel health certificate for UK travel in July. -- Confirm travel and hotel booking after UK visa approval. == Plan == * GDB arm v8 record/replay -- Update all patches after upstream comments. -- Investigate all remaining testsuite failures. -- Update all related jira cards and create new for persisting test failures. * GDB arm v7 record/replay -- Update and resubmit upstream. * GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321] -- Prioritize todo list in light of currently active upstream development.

11 years

1
0
0 0

[Weekly] 09-13 JUNE 2014

by Michael Collison

== This week == Out sick Tuesday and Wednesday (4/10) Launchpad cleanup (6/10) Launchpad 944572 - Infinite loop printing "warning: missing braces around initializer" in g++ - fix released Bugs marked "won't fix" after investigation: Launchpad 683683 - run-init on omap3, omap4 in natty dies if busybox is built with -marm Launchpad 757427 - gconftool-2 segfaults on arm [shrinkwrap] Launchpad 768384 - G++ gets stuck (100% cpu never finish) when compiling C++ code with -O2/3 Launchpad 771675 - shrink-wrap optimization produce buggy code Launchpad 625228 - Avoid unnecessarily saving $lr on Thumb-1 Launchpad 771832 - bogus reference to unused symbols Launchpad 788841 - GCC ICE: internal compiler error: in push_minipool_fix Launchpad 795131 - [armel, vfp] ICE in simplify_gen_subreg_concatn, at lower-subreg.c:468 Launchpad 803798 - FTBFS on armel: error: unable to find a register to spill in class 'VFP_LO_REGS' Launchpad 807156 - GCC (g++):internal compiler error: in extract_insn, at recog.c:2104 Launchpad 821455 - internal compiler error: in translate_clast, at graphite-clast-to-gimple.c:1123 Launchpad 839959 - 4.5-2011.08 internal compiler error Launchpad 841437 - fftw3 version 3.2.2-1 failed to build on armel Launchpad 887158 - NULL pointer deref in mark_reg_pointer Launchpad 890657 - Please merge the fix for upstream bug 45102 Launchpad 892880 - MIPS: link error against __unpack_d with --enable-target-optspace Launchpad 903178 - [4.6 regression/armhf] ICE, unable to find a register to spill in class 'LO_REGS' Launchpad 903347 - [armel/armhf] file fails to compile (indefinite loop?) Launchpad 903951 - The kernel on staging-panda does not boot with the 11.12 released toolchain Launchpad 937864 - Produces NEON code on armhf even when explicitly asked not to Launchpad 941676 - ppl ftbfs in precise on powerpc Launchpad 943264 - ICE in arm_select_dominance_cc_mode, at config/arm/arm.c:10625 Launchpad 1049614 - Assembler messages with -O0: Error: offset out of range == Next week == On vacation June 16th - June 20th == Future == No Plans

11 years

1
0
0 0

[ACTIVITY] 9- 13 June 2014

by Venkataramanan Kumar

= Progress == * Went to UK VISA office and submitted application and bio metrics (2/10) * Tried Installing chrubuntu on chromebook. But failed and later found that SD card issue. Given SD card back in office for replacement. Installed crouton and other packages for building gcc and testing gcc testsuites (1/10) * Reload spill failure (bug fix) on armhf target (3/10) Tested conservative patch that prevent ior_scc_scc patterns for thumb2 target using chrome book. Thumb2 compare condition test cases fails. Found that these test cases using constants for operands 2 and 5. Change conservative patch to allow constant operands for thumb2 target in ior_scc_scc patterns. Testing is in progress. * LTO experiments (2/10) Drilling down ICE with LTO on GCC 4.9 branch. * Misc (1/10) - 1-1 meetings (Ryan, Christophe) (0.5/10) - AMD internal support work and meetings (0.5/10) * Installed some packages and tested christophe libsantizer patch on hardware (1/10) == Plan == * Continue bug fixing. * LTO bootstrap failure

11 years

1
0
0 0

[ACTIVITY] 9 - 13 June 2014

by Kugan

== Progress == * Public holiday (2/10) * Benchmarking and regression testing (TCWG-468) (8/10) - Ran release benchmarking in chrome-book - Set-up package build environment and ran ubutest - spec2k benchmarking of patches that was included in 2014.06 release on aarch64 == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities.

11 years

1
0
0 0

[ACTIVITY] Week 24

by Zhenqiang Chen

== Issues == * None. == Progress == * Work out 4 patches to enhance loop2-invariant heuristics and send out for community review (TCWG-469, 3/10). * Test the rebased ccmp patches (TCWG-488, 2/10). * Investigate how to optimize large constant. Patch is in testing (TCWG-486, 5/10). Basic idea is: - Do not split large constant when expanding. - Improve cprop pass to check the rtx_cost when propagating constants. == Plans == * Ping pending patches. * Send out ccmp patches for review. * Send out patches to optimize constant.

11 years

2
3
0 0

[ACTIVITY] Week 24

by Renato Golin

== Progress == * Kernel (CARD-1246 1/10) - Helping LLVMLinux to test in LAVA * Background (9/10) - Code review, meetings, discussions, etc. - Setting up Chromebooks again (up, crouton) - Setting up APM boards (up) - Setting up D01 boards (bricked 2) == Plan == * work with guodong, fabo, tyler, to revive the D01s * put crouton on llvm-chrome-test to be ready for release 3.5 * have a look at compiler-rt autoconf build * keep helping LLVMLinux with LAVA

11 years

1
0
0 0

[ACTIVITY] 9 - 13 June 2014

by Will Newton

== Progress == * Rework malloc microbenchmark based on review (2/10, TCWG-160) * Get SystemTap probes working to analyze microbenchmark (3/10, TCWG-160) * Profile postgresql benchmark to discover bottlenecks (1/10) * Respin of gdb release to fix build issue (1/10) * Look into ld issue discovered by Maxim (1/10) * Patch review and followup (1/10) * Meetings, admin (1/10) == Issues == * None == Plan == * Ubuntu on wg? * Resubmit malloc microbenchmark * Rework postgresql benchmark to use unix domain sockets -- Will Newton Toolchain Working Group, Linaro

11 years

1
0
0 0

[ACTIVITY] 9-13 June 2014

by Christophe Lyon

Monday off. (2/10) == Progress == * GCC trunk cross-validation (CARD-647) (3/10) - improved scripts to avoid consuming to much memory - improved kill signals handling when generating reports - back to normal - started looking at adding libstdc++ in the reports - started looking at adding aarch32/armv8 configuration - email-driven robot looks operational. Started testing with Kugan * GCC 4.9 branch cross-validation (CARD-647) - it's now running * Neon intrinsic tests (CARD-???) (2/10) - discussion started: scan-assembler directives may be difficult to maintain - original testsuite maintenance: preparing aarch64 support * AArch64 libsanitizer support (TCWG-58) - Venkat tested my patch on HW, need to study the results and compare with qemu * Misc (meetings, conf-calls, ...) (3/10) - 4.7-2014.06 branch merge prepared, validation started == Next == * GCC cross-validation - check patch to add libstdc++ in the reports - define configuration for aarch32/armv8 - continue testing of the email robot * Neon intrinsics tests: - handle feedback - original testsuite: continue aarch64 support, investigate output formatting problems * AArch64 libsanitizer support: - analyze results - use cbuild2 + tcwgbuild configs to run the tests myself on HW * Backports reviews

11 years

1
0
0 0

[ANNOUNCE] Linaro GCC 4.9 2014.06 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1+svn211054 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1+svn211054 * Backport of [AArch32] PR rtl-optimization/60663 * Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15. * Backport of [AArch32] Support ORN for DIMode. * Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A. * Backport of [AArch32] Allow any register for DImode values in Thumb2. * Backport of [AArch32] Initialize new tune_params values. * Backport of [AArch32] Initialise T16-related fields in Cortex-A8 tuning struct. * Backport of [AArch32] Enable tail call optimization for long call. * Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32. * Backport of [AArch64] Fix TLS for ILP32. * Backport of [AArch64] vrnd<*>_f64 patch. * Backport of [AArch64] Fix possible wrong code generation when comparing DImode values. * Backport of [AArch64] Add a space to memory asm code between base register and offset. * Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation. * Backport of [AArch64] vqneg and vqabs intrinsics implementation. * Backport of [AArch64] Vreinterpret re-implemention. * Backport of [AArch64] Define TARGET_FLAGS_REGNUM. * Backport of [AArch64] Merge longlong.h from glibc tree. * Backport of [AArch64] add, sub, mul in TImode. * Backport of [AArch64] Add handling of bswap operations in rtx costs. * Backport of [AArch64] Fully support rotate on logical operations. * Backport of [AArch64] Use standard patterns for stack protection. * Backport of [AArch64] VDUP Testcases. * Backport of [AArch64] Vectorise bswap[16,32,64]. * Backport of [AArch64] Enable TBL for big-endian. * Backport of [AArch64] Reverse TBL indices for big-endian. * Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class. * Backport of [AArch64] Improve vst4_lane intrinsics. * Backport of [AArch64] Rewrite and tests ZIP Intrinsics. * Backport of [AArch64] libitm Enabled. * Backport of [AArch64] Support full addressing modes for ldr/str in vectorization scenarios * Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...). * Backport of Fix warning in libgfortran configure script. * Backport of Remove PUSH_ARGS_REVERSED from the RTL expander Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

11 years

3
3
0 0

[ACTIVITY] 02 - 06 June 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Fixed issues showing up when building code with default optimization. [TCWG-484] [3/10] -- Fixed failures in until-reverse test cases. [TCWG-484] [1/10] -- Investigation of failures in watchpoint-reverse and solib test cases. [TCWG-484] [2/10] -- Writing NEWS and changelog entries for all patches. [1/10] * GDB Remote vs Native feature parity (GDB on Android improvements) [2/10] [CARD-321] -- Scored through recently submitted patches. -- Ran testsuite in native and remote modes. -- Started review of related open jira cards * Miscellaneous -- Visit uk visa office for passport collection. [1/10] == Plan == * GDB arm v8 record/replay -- Update all patches after upstream comments. -- Investigate all remaining testsuite failures. -- Update all related jira cards and create new for persisting test failures. * GDB arm v7 record/replay -- Update and resubmit upstream. * GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321] -- Further progress towards creating a tasks list and timeline. * Miscellaneous -- Finalize travel and obtain health certificate for travel to UK.

11 years

1
0
0 0

[ACTIVITY] 2 - 6 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (2/10) - Posted patch for comment * benchmarking (TCWG-468) (1/10) - Ran a53 benchmarks * regressions (7/10) - THUMB1 regression for ARM fenv * Issue due to thumb1 not supporting mrc/mcr. Patch to fix this is posted for review. - Regression when allocating 128bit integer to VFP register * When LRA assigns DImode value to TImode register, it is not setting up it in the right place of TImode. Due to this, one of the moves becomes dead. Patterns needs to be checked. * VFP registers store big-endian values in little-endian format. Hence, subreg for mode greater than word has to be aware of this. As it is, aarch64_cannot_change_mode_class will need the fix like done in ARM. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities.

11 years

1
0
0 0

[ACTIVITY] 2- 7 June 2014

by Venkataramanan Kumar

= Progress == * LTO experiments (3/10) Tested with various compiler revisions and in native X86 machines. Compare errors in gcc 4.9 Linaro 14.05 version. Aarch64, LTO bootstrap passes in trunk. On FSF GCC 4.9 branch encountering ICE. Opened PRs in GCC Bugzilla. * Misc (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (0.5/10) - AMD internal support work and meetings (0.5/10) Sick Leave on 2nd June (2/10) UK VISA application processing (3/10) == Plan == * UK VISA processing attend interview, biometrics. * Continue bug fixing. * LTO bootstrap failure * Test libsanitizer patch for christophe.

11 years

1
0
0 0

[ACTIVITY] Week 23

by Bernie Ogden

=Progress= lowlevellock performance bugs - TCWG-435 [1/10] * All ready to go cbuild benchmarking - TCWG-360 [4/10] * Completed a draft implementation for spec2k * Parked pending review Meetings/mail/etc [5/10] =Plan= Send lowlevellock patches to list Get back to benchmarking/improving cortex-strings memset

11 years

1
0
0 0

[Activity] 2 - 6 June

by Charles Baylis

Progress: Investigation following review feedback of VLD post-indexing patch TCWG-430 [8/10] libvpx VP9 performance investigation TCWG-429 [2/10]

11 years

1
0
0 0

[ACTIVITY] 26-30 May

by Charles Baylis

Progress Bank holiday [2/10] Retested VLD post-indexing patch, held up by trunk breakage TCWG-430 [2/10] libvpx VP9 performance investigation TCWG-429 [4/10] libvpx aarch64 ICE investigation [2/10]

11 years

1
0
0 0

[Weekly] 02-06 JUNE 2014

by Michael Collison

== This week == Backported Launchpad 1234146 - Bad Neon intrinsics code gen when using ld4/st4 on AArch64 (2/10) Bug Investigations (4/10) Launchpad Bug 640521 - Incorrect function prologue with Thumb-1 high register variable Launchpad Bug 1318831 - Invalid unpoisoning of stack redzones on ARM Launchpad bug 771832 - bogus reference to unused symbols Launchpad cleanup (4/10) - 1305042 - Changed status to invalid - 634731 - Marked as won't fix for older releases. Improved code generated for 4.8 and 4.9 - 637882 - Marked as won't fix for older releases. Improved code generated for 4.8 and 4.9 - 638687 - Changed status to invalid. Code for alloca is correct and alignment is necessary - 1312931 - Could not verify. - 772085 - Marked as won't fix for older releases. Fixed in 4.8 and 4.9 - 1225317 - Marked as incomplete due to lack of test case == Next week == Vacation == Future == No Plans.

11 years

1
0
0 0

[ACTIVITY] Week 23

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effort for ARMv8-a (8/10) - Put the backporting script on https://git.linaro.org/toolchain/backflip.git (documentation still needed) - FSF branch merges for 4.9 and 4.8 - Backported requested fixes in 4.9 - Validate merges and some backports in cbuildv1 - Looked at the different results we have in cbuildv2 and cbuildv1 - Still some issues in Jenkins (build crash or are stuck) - 40 backports stiil need validation * Misc: (2/10) o Various meetings. == Next == * Complete FSF branch merges and release 4.9-2014.06 * Document backporting script usage * Continue feedback and help with the validation

11 years

1
0
0 0

[ACTIVITY] Week 23

by Zhenqiang Chen

== Issues == * None. == Progress == * One day off. * Clean up and test loop2-invariant heuristic tune patches (TCWG-469, 6/10). * Rebase conditional compare patches and split them into smaller ones (TCWG-488, 2/10). == Plans == * Send out loop2-invariant heuristic tuning patches for review. * Rework on the conditional compare patches.

11 years

1
0
0 0

[ACTIVITY] Week 23

by Renato Golin

== Progress == * Toolchain (CARD-862 0/10) - Some investigations on LLVM Linkers * Background (10/10) - Code review, meetings, discussions, etc. - Cleaned up the rack, drown a map - Jenkins Chromebooks with native Arch Linux - Failures and problems ensued... - More time wasted on APMs, but some progress was made - All Chromebooks had I/O errors on SD cards, starting over == Plan == Spend the weekend and the next week re-flashing Chromebooks

11 years

1
0
0 0

[ACTIVITY] 2-6 June 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (CARD-647) (6/10) - recent LRA change to fix AArch64 compiler causes huge memory consumption. - this has caused my validations to crash several servers, and I had to stop them until I could restart reliably. - so far unable to restore them - trying to test LRA tentative fix separately, but results are unreliable too - tested Thomas Preud'homme patch (bswap-2.c), luckily before everything became unstable. * GCC 4.9 branch cross-validation (CARD-647) (1/10) - validation scripts needed some adaptations to handle the 4.9-branch - not running yet, until the trunk problems are solved * Neon intrinsic tests (CARD-????) (1/10) - submitted patch series containing 40 test files (total will be 136) * AArch64 libsanitizer support (TCGW-58) - qemu still needs a patch of mine which I thought had been committed since February.. - once patched, the sanitizer tests now start executing but lead to SEGV+timeout * Misc (meetings, conf-calls, ...) (2/10) == Next == * short week (Monday off, lots of external constraints) * GCC cross-validation: - hopefully fix unstability and restore the automatic validations of trunk + start those of 4.9 branch - try to actually start mail-driven robot to validate patches * Neon intrinsics tests: handle feedback * AArch64 libsanitizer support: look at why tests fail

11 years

1
0
0 0

[ACTIVITY] 2 - 6 May 2014

by Will Newton

== Progress == * Holiday Monday and Tuesday (4/10) * Write some scripts to graph malloc app benchmark results (1/10, TCWG-418) * Patch review and testing (2/10) * Released eglibc 2.19 2014.06, binutils 2.24.0 2014.06 and gdb 7.7.1 2014.06 (3/10) == Issues == * None == Plan == * Get wg boards running for validation * More malloc benchmarking -- Will Newton Toolchain Working Group, Linaro

11 years

1
0
0 0

[ACTIVITY] June 2-8

by Maxim Kuvyrkov

== Week of June 2nd == - Toolchain testing improvements (CARD-1378, 8/10) -- Implemented schroot testing inside cbuild2. This will allow both Jenkins automation and developers to use schroot testing approach. -- Automated board configuration for schroot testing. -- Started cleaning up and committing my testing changes to cbuild2 and dejagnu. - Various discussions (1/10) - NZ public holiday (2/10) - Celebrated! My! Happy! Birthday! -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

[ACTIVITY] May 26-1

by Maxim Kuvyrkov

== Week of May 26th == - Toolchain testing improvements (CARD-1378, 8/10) -- Prototyped parallelization of testing across several ARM board. Turns out that striping tests across target boards does not give much as host is the bottleneck in our setups. -- Prototyped testing using GCC's shared libraries and newly-built sysroot (instead of using system libraries on the target). -- Prototyped testing using schroots -- this appears the way to go about our toolchain testing. For each test run a schroot session is started on the board, complete with a dedicated SSH server and freshly-built sysroot. After testing is done schroot session is closed and everything is cleaned up including disk files and stray processes. - Various discussions (2/10) -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

[ACTIVITY] May 19-25

by Maxim Kuvyrkov

== Week of May 19th == - TCWG development environment (TCWG-483, 2/10) -- Followed up on various package requests and backup settings. - STREAM performance regression (TCWG-388, 3/10) -- Tested, posted upstream and committed first batch of patches. - Toolchain testing improvements (CARD-1378, 4/10) -- Discussed testing design and approaches with the team. -- Prototyped various approaches to testing. - Various discussions and bits of administrivia. -- Maxim Kuvyrkov www.linaro.org

11 years

1
0
0 0

Bulding Linaro gcc on Debian Olinuxino A20

by "João M. S. Silva"

Hi, I'm trying to follow https://wiki.linaro.org/WorkingGroups/ToolChain/Using/GCCNative but it looks like it is outdated? Can someone confirm? E.g.: configure: WARNING: unrecognized options: --disable-bootstrap, --with-mode, --with-arch, --with-tune, --with-fpu, --with-float -- João M. S. Silva

11 years

4
5
0 0

[ACTIVITY] Week 22

by Zhenqiang Chen

== Issue == * None. == Progress == * Commit the fixes for pr61220, 61278 and part of 61225. The patch to fix other part of 61225 is still in review (2/10). * Loop invariant heuristics tuning. Tests are ongoing. (7/10, TCWG-763) * Rebase conditional compare patches. Tests are ongoing. * Prepare UK visa. == Plans == * Send out loop-invariant heuristic tuning patches for review. * Rework on the conditional compare patches. == Leaves == * June 2.

11 years

1
0
0 0

[Weekly] 26-30 May 2014

by Michael Collison

== This week == - Memorial day holiday Monday (2/10) - Investigated launchpad 1295738 - [4.8 Regression] unable to find a register to spill in class 'LO_REGS' [CARD-300](2/10) - Will mark as unlikely to fix (reload error); works with LRA and/or with -fomit-frame-pointer - Investigated launchpad 757427 - gconftool-2 segfaults on arm [shrinkwrap] [CARD-300](2/10) - Segfault not reproducible in linaro 4.8 or 4.9 - Shrinkwrap bug not reproducible in linaro 4.8 or 4.9 - Investigating launchpad 1225317 - gcc mis-compiles (large-value) jump tables with -fPIC or thumb2 [CARD-300](1/10) - Investigating launchpad 1234146 - Bad Neon intrinsics code gen when using ld4/st4 on AArch64 [CARD-300] (2/10) == Next week == - Resolve Launchpad bugs 1225317 and 1234146 == Future == No Plans. == Planned holidays == Possible vacation June 16th - June 20th

11 years

4
3
0 0

[Activity] May 26 - June 1

by Rob Savoye

== Progress == * Meetings and Misc (3/10) - Upgraded my Samsung Chromebook to boot Ubuntu trusty instead of using crouton. Works much better for native builds now. * Worked on perfecting building binary tarballs in a 32bit chroot that run on any platform. (TCWG 383 - 7/10) - Added zlib to infrastructure so libz.so.1 can be found at runtime. - Force libgloss to build for bare metal. - Fixed minor issues with Canadian cross builds. == Plan == * Figure out why Canadian cross builds fail on the TCWG build farm, but work on my local machines. * Continue improving building binary releases. * Get D01 board setup and working. * Get back to test result verification automation. - rob -

11 years

1
0
0 0

[ACTIVITY] 26 - 30 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Support for recording advance SIMD load store instructions. [TCWG-403] [4/10] -- Code cleanup and patch creation. [2/10] -- Investigation of patches failing in native configuration. [TCWG-484] [2/10] * Miscellaneous -- Sick day off on Monday [2/10] == Plan == * GDB arm v8 record/replay -- Bug fix issues stalling patch submission upstream. -- Submission of patches upstream. -- Bug fixing to reduce failures. * Run gdb testsuites on arm/x86 in native/remote for latest feature parity. * Day out of office on Thursday to collect passport from UK visa office.

11 years

1
0
0 0

[ACTIVITY] 26-30 May 2014

by Christophe Lyon

Short week (2 days off) (4/10) == Progress == * GCC trunk cross-validation (CARD-647) (2/10) - reported 2 new compiler build failures and 2 regressions - tested one proposed patch, which did not fix the regression - trunk now builds OK again * Neon intrinsics tests (1/10) - cleaned branch to prepare submission - working on Cumulative Saturation Neon flag support for AArch64 * aarch64 libsanitizer support - resumed work: libsanitizer no longer builds with recent glibc, will need to patch it upstream before bringing it back to GCC. - testing will be difficult using qemu since libsanitizer reserves a huge chunk of memory at startup (8GB) which may not be available on the host machine * Misc (meetings, conf-calls, ....) (3/10) - 1:1 calls, weekly calls - backports review == Next == * GCC trunk cross-validation: - test Kugan's patch before submission - evaluate effort to develop a mail-driven support for testing patches vs trunk befiore submission - add support for validation of FSF-4.9 branch * Neon intrinsics tests - add support for Cumulative Saturation Neon flags on AArch64 * AArch64 libsanitizer - discuss how to make cross-testing more practical

11 years

1
0
0 0

[ACTIVITY] Week 22

by Yvan Roux

Short week (3 days) == Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effort for ARMv8-a (4/10) - Enhanced my backporting script - Looked at the merge process (4.9, 4.8 and 4.7 merge are comming) - 40 backports stiil need validation * Misc: (2/10) o Various meetings. o Discussed schroot testing == Next == * FSF branch merges * Document backporting script usage * Continue feedback and help with the validation

11 years

1
0
0 0

[ACTIVITY] 26 - 30 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (7/10) - regression tested and fixed all the issues - final bootstrap and regression testing for arm and x86_64 are ongoing - will post the patch for comment after checking the results * benchmarking (TCWG-468) (1/10) - Set-up chrome-book for a15 release benchmarking * SAH1 performance (TCWG-413) (2/10) - Christophe noted regression for aarch64_be due to clean-up patch. - register_move_cost hook in aarch64 does not handle all the cases (CORE_REGS and POINTER_REGS) and due to this, it calculates FP2FP cost for these classes . With CORE_REGS gone, costs for register classes are now different. Cost table needs adjustment. * FENV for C11 TCWG-447 - Committed ARM part. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years

1
0
0 0

[ACTIVITY] Week 22

by Renato Golin

== Progress == * Kernel (CARD-1246 2/8) - Fixed edge cases for named registers - http://llvm.org/PR19841 - http://llvm.org/PR19837 * Background (6/8) - Code review, meetings, discussions, etc. - TCWG Rack re-org - Trying to set up native Chromebooks - Trying to set up APM - Trying to add Compiler-RT to our buildbots == Plan == * Continue rack re-org * Continue RT support on current bots * Try libc++ bot * Have a look at sanitizer bot

11 years, 1 month

1
0
0 0

[ACTIVITY] 26 - 30 May 2014

by Will Newton

== Progress == * Bank Holiday Monday (2/10) * Got a postgresql malloc benchmark running (4/10, TCWG-441) * Started refactoring malloc microbenchmark based on review (2/10, TCWG-160) * Patch review and testing (2/10) == Issues == * None == Plan == * Holiday Tuesday and Wednesday * Finish refactoring malloc microbenchmark * Work on results plotting code for benchmarks -- Will Newton Toolchain Working Group, Linaro

11 years, 1 month

1
0
0 0

Prebuilt Linaro 2014.04 arm-linux-gnueabihf: cannot find /lib/ld-linux-armhf.so.3

by Denys Dmytriyenko

Hi, I've been having this issue with latest binary Linaro 2014.04 toolchain from http://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-a… It comes with own sysroot, but linker fails to locate /lib/ld-linux-armhf.so.3 $ make arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o nvs.o nvs.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o misc_cmds.o misc_cmds.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o calibrator.o calibrator.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o plt.o plt.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o wl18xx_plt.o wl18xx_plt.c arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o ini.o ini.c arm-linux-gnueabihf-gcc -L/tmp/lib/ nvs.o misc_cmds.o calibrator.o plt.o wl18xx_plt.o ini.o -lm -lnl-3 -lnl-genl-3 -o calibrator /opt/linaro-2014.04/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: cannot find /lib/ld-linux-armhf.so.3 collect2: error: ld returned 1 exit status Makefile:26: recipe for target 'all' failed make: *** [all] Error 1 And when I pass my own sysroot, it works fine. Is it supposed to work as a standalone toolchain with its own bundled sysroot? Thanks. -- Denys

11 years, 1 month

2
4
0 0

x86_64 libsanitizer test case bug

by Rob Savoye

I've been digging through test logs, and for gcc 4.9.1 native x86_64 tests, all the libsanitizer test cases fail to link due to unresolved symbols from libpthread and libdl. Does anybody know more about this bug, or care to fix it ? :-) It still exists in gcc trunk. - rob -

11 years, 1 month

2
1
0 0

[Weekly] 19-23 May 2014

by Michael Collison

== This week == - Completed GCC Launchpad bug dispositions [CARD-300][2/10] - Backported PR61202 - gcc generated invalid sqdmulh instruction [TCWG-485](2/10) - Triaged and investigated Launchpad bug 1295738- Unable to find a register to spill in class 'LO_REGS' [Card 300](3/10) - Triaged and investigated Launchpad bug 1248752 - ARM assembly instruction compile error [Card-300](3/10) == Next week == - Resolve Launhpad bugs 1295738 and 1248752 - Triage and investigate other bugs as time warrants == Future == No Plans. == Planned holidays == No Plan

11 years, 1 month

1
0
0 0

[Activity] May 19-25

by Rob Savoye

== Progress == * Worked on building binary tarballs from Jenkins. (TCWG 383 - 4/10) * Continuing work on regression test analysis and reporting. (TCWG 448 - 3/10) - now copying the check.log from make check to toolchain so tcwgweb.sh can scan it for build errors in the test cases. - Got the delimiter for concurrent Jenkins builds changed, now glibc build problems are gone. - Track down and try to fix testsuite build issues. * Meetings and Misc. (3/10) - Worked on making remote testing go faster. Setting ControlPersist seems to help. - Much debugging of Jenkins related issues. == Plan == * Continuing work on validating test results and fixing testsuite build issues. (TCWG 448) * Probably more work on binary tarballs. (TCWG 383) * More tracking down and fixing Jenkins related issues. == Issues == * For some reason libgloss isn't getting built for *-elf via Jenkins/Cbuildv2.

11 years, 1 month

1
0
0 0

Parallel cross-testing of GCC

by Maxim Kuvyrkov

Hi, I have tried out a prototype of using binfmt_misc, and it does not appear to be a worthwhile solution at this point. Bottom line: with a nice fast multi-core x86 server and a pool of ARM boards we can test GCC in ~20min. Testing setup: - Core i3 2-core host - Chromebook 2-core target, SSD disk - WiFi network - GCC mainline built from sources with same flags both natively and cross: C, C++, Fortran. General observations about testing ARM toolchains: - When testing natively target is busy 100%: around 50% of time is spent compiling testcases, 40-45% in dejagnu/expect, 5-10% on actual test execution. Target is the bottleneck. -- 21633.22user 4400.13system 4:13:11elapsed - With testing cross using standard rsh_prog=ssh, rcp_prog=scp, target is busy 40% of the time: 30% on ssh, 10% on actual test execution. Host is the bottleneck. -- - When testing cross (using method below) target is busy only 15-20% of the time: 10% on ssh and 10% on actual test execution. Host is the bottleneck. -- 9490.16user 2882.54system 1:10:57elapsed I've got a prototype implementation of parallelized cross-testing of GCC that I'm happy with using rsh_prog and rcp_prog dejagnu wrappers: General observations on dejagnu cross-testing process: - All communication with the target is done by Dejagnu via rsh_prog and rcp_prog hooks. These are normally defined to ssh and scp respectively. - Dejagnu copies every testcase to /tmp/ on the target with scp. - Dejagnu executes every testcase via ssh off target's /tmp/. In total there is 1 scp and 3 ssh invocations per testcase. The idea of below scripts is to assume shared filesystem between host and a pool of target boards, and skip copying executables to target's local filesystem. Since there is no longer local state (local state == contents of /tmp) on the target boards, testcases can be executed on any of the boards in the pool. This happens transparently to dejagnu: dejagnu issues "rsh_prog chromebook-pool ./test" and then rsh_prog converts this to "ssh chromebook-XX ./test", where XX chosen at random. Script implementation notes: - For some unholy reason there is no way of correctly parse command line from dejagnu and give it to bash. The reason why myssh script ssh'es onto host itself is because that's the only way I've found to reliably execute the command. Hey! The command line was intended for ssh anyway! - Myssh script translates hostname of foobar-pool-01-03-08 into foobar01, foobar03 or foobar08 chosen at random. If there is no "-pool-" mentioned in hostname, then it is used verbatim. -- Maxim Kuvyrkov www.linaro.org

11 years, 1 month

2
2
0 0

[ACTIVITY] 19 - 23 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Completed implementation of system call recording [TCWG-409] [4/10] -- Support for recording A64 Loads and stores [TCWG-409] [2/10] -- Bug Fixing to reduce failures in gdb.reverse testsuite [TCWG-484] [2/10] * Miscellaneous -- Day off on Friday [2/10] == Plan == * GDB arm v8 record/replay -- Submission of patches upstream. -- Bug fixing to reduce failures. -- Advance SIMD load/store instruction recording support.

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 21

by Zhenqiang Chen

== Issue == * None. == Progress == * Investigate PR61220, 61225 and 61278, which are triggered by my previous commits. Patches are in review. (9/10) * Investigate codes generated by shrink-wrapping interrupt routes. It seams no dwarf info issue. * Misc update for Linaro crosstool-ng to make the build work in case someone wants to use it. - Down grade gdb to 7.6. - Disable multilib for 4.9. - Move local patches at binutils/linaro-2.24.0-2014.03 to binutils/linaro-2.24.0-2014.05. == Plans == * Push pending patches. == Planed leaves == * June. 2.

11 years, 1 month

2
1
0 0

ld can't deal with LTO bytecode in static libraries

by Bernhard Rosenkränzer

Hi, I've run into some compile errors after updating to 4.9 -- usually getting undefined references to symbols defined in helper static libraries. It turns out this is triggered by gcc -flto now creating slim object files by default (-ffat-lto-objects "fixes" it) - but I think it is actually an ld bug that should be fixed at some point. ld (regardless of whether I use -fuse-linker-plugin, -fuse-ld=gold or -fuse-ld=bfd) doesn't seem to see LTO bytecode in object files that are inside an ar wrapper. It deals with the library just fine if I use "ar x" to extract its object files and link to them individually as opposed to the .a file. I've attached a small test case to demonstrate ("make broken" shows the error, "make works" shows the workaround). Is there any reason why ld should behave the way it does, or is this a bug that needs fixing? ttyl bero

11 years, 1 month

2
1
0 0

[ACTIVITY] 19- 23 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (3/10) Not able to reproduce in trunk, r210538 masks the bug again :( Discussed with maxim on extending the macro ,Likely spilled class for thumb2. Decided that it will lead to performance regressions. Conservative fix is to allow the pattern for ARM target alone. Verfying the fix by on armhf schroot * Testing GCC Linaro compiler on Hardware (4/10) Completed GCC Linaro compiler 4.8 and 4.9 correctness tests on hardware. Completed running SPEC 2006 for -O3. Completed running SPEC2006 for -O3 -ftlo and -mcpu=cortex-a57. Triggered PGO runs on hardware. Looked at bootstrap failure with BOOT_CFLAGS="-mcpu=cortex-a57". Changed from system assembler to Linaro assembler solved it as system assembler is old. * Misc (3/10) - Completed installing ubuntu, set up chroot and migrate to toolchain 64 environment. (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (1/10) - AMD internal support work and meetings == Plan == * Continue bug fixing. * LTO bootstrap failure * Testing GCC Linaro compiler on hardware. * UK VISA processing.

11 years, 1 month

1
0
0 0

[ACTIVITY] 19 - 23 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (9/10) - Initiated discussion and started working on alternate approach to handle this. - Gone through couple of prototype to understand approach. - Finshed first implrmentation; Needs cleanup and some failiures in regression needs fixing. * benchmarking (TCWG-468) (1/10) - Changes to Maxim's script is complete; Doing final testing before committing. * SAH1 performance (TCWG-413) - Committed a clean-up patch upstream. - Posted spill_class patch. * FENV for C11 TCWG-447 - Committed AArch64 part. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 21

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effort for ARMv8-a (8/10) - Looked at Jenkins build/failures/reportin - Review the backporting process and scripted it - 40 backports are in review and need validation * LP #1169164 : including signal.h exposes various PSR_MODE #defines - Committed upstream. * Misc: o Various meetings (2/10) o LCU'14: Register and booked flights == Next == * Child care today * Improve the backport script and document it's usage * Continue backports * Continue feedback and help with the validation

11 years, 1 month

1
0
0 0

[ACTIVITY] 19-23 May 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (4/10) - build broken last week-end, because of a new optimization that broke glibc build. - glibc fixed by Joseph mid-week, updated - to help diagnose build failures earlier, I have setup a reduced version of the validation framework, which only performs a build of binutils+glibc+gcc, at every commit on gcc trunk for 16 arm+aarch64 configurations. [ yes, another buildbot of sorts ] - restarted builds+validations to last known successful status (i.e. before last week-end) - builds are catching up * Neon intrinsics tests (3/10) - continuing conversion (about 40 files done, out of ~140) * Misc (meetings, conf-calls, ...) (3/10) * Backports for 4.9: - started reviewing candidate backports == Next == * GCC trunk cross-build/cross-validation: - monitor and report regressions * Neon intrinsics tests: - continue conversion - prepare a cleaner branch for upstream submission * Backports: - more reviews - process improvements

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 21

by Renato Golin

== Progress == * Kernel (CARD-1246 4/10) - Named registers committed in Clang - GCC seems to break on local named regs, too. - Trying to change the kernel code to use only globals for non-GPRs - Adding support for pointer types, and structure fields in GNRVs * Benchmarks (CARD-716 0/10) - Re-enabling perf reports for LNT bot (ARM fixed reporting) * Background (6/10) - Code review, meetings, discussions, etc. - Removing *all* buildbots' batteries after failure - Testing D01 box, not stable yet for toolchain testing - Moving development to git.linaro.org (for backup) - Planning TCWG rack migration - Drafting an LLVM white paper == Plan == * Continue with named register extra work (http://llvm.org/PR19837) * Start TCWG rack migration * Discussions about LLVM white paper

11 years, 1 month

1
0
0 0

[ACTIVITY] 19 - 23 May 2014

by Will Newton

== Progress == * Investigate and fix building glibc for ARM with -mtls-dialect=gnu2 (3/10) * Investigate ld TLS behaviour for Huawei (1/10) * Refactor scripts to enable benchmarking postgresql malloc performance (2/10, TCWG-441) * Patch review and testing (1/10) * Diagnose and fix glibc testsuite failures on aarch64 (2/10) * Meetings, admin (1/10) == Issues == * None == Plan == * More malloc application benchmarking -- Will Newton Toolchain Working Group, Linaro

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 21

by Bernie Ogden

== Progress== lowlevellock performance bugs - TCWG-435 [5/10] * Tried various methods to build/test glibc for aarch64 * Eventually succeeded (tests passed) cbuild benchmarking - TCWG-360 [3/10] * cbuildized spec2xxx scripts working as far as 'run' Meetings/mail/etc [2/10] == Plan == Holiday for one week After that: * Clean up cbuildized spec2xxx scripts, cbuildize them some more & discuss with Rob * Send lowlevellock patch upstream * If time, put together some more experimental memset implementations

11 years, 1 month

1
0
0 0

Using binfmt_misc for cross testing

by Maxim Kuvyrkov

I have been thinking how to simplify cross-testing our toolchain for both automated and development/debugging builds, and among various options the most universal I came up with is ARM hardware + ssh + binfmt_misc + sshfs. I wonder if anyone has already tried this or can suggest alternatives which are as universal. Given: - host x86_64 development machine - cross-compiler - target hardware with fast network to the host - host and target have ssh - testsuite (gcc/glibc/gdb/etc) Here is how it is going to work 1. On host we create a simple wrapper script that will pass through its arguments as command to execute on target via ssh: === #!/bin/sh ssh -p 22NN $TARGET_BOARD "$@" === 2. We register this script in binfmt_misc to be used as interpreter for target binaries. Value of $TARGET_BOARD will be picked up from the environment and can be set to different boards for different testsuite runs. 3. The target board needs to be prepared for a particular testsuite run: -- Runtime libraries need to be either copied or mounted via sshfs from the host. It is an open question how best to install several sets of libraries (for parallel runs) so that each set appears to be main system libraries. My current thinking is a separate ssh server inside chroot per each test run. -- Test directory needs to be sshfs mounted on target from host so that the target could see test executables. -- Preparation/finalization of the board can either be done explicitly before/after testing. Or it can be done on demand by the aforementioned script: the script checks whether a multiplexed ssh socket exists, and, if not, it prepares the board and starts a multiplexed ssh connection. 4. Testing is fired up as if it is normal "native" testing. Whenever kernel is given an ARM binary to execute -- it passes it off to wrapper, which passes it off to the target board via ssh. The board sees same filesystem as host and happily executes binaries against toolchain runtime libraries. Comments or rotten tomatoes? Thank you, -- Maxim Kuvyrkov www.linaro.org

11 years, 1 month

5
7
0 0

[Activity] May 12-18

by Rob Savoye

= Progress == * Worked on the LLVM branch of Cbuildv2 (TCWG - 1/10). * More work on regression test analysis and reporting. (TCWG 448 - 5/10) * Meetings and Misc (4/10) - Produced lots of test results via Jenkins, need to verify they're not having remote target problems. == Plan == * Verify test runs aren't having problems with remote targets. * Start training the Jenkins Failure Analysis plugin. * Install lava-tool and get it working on all the tcwgbuild* machines. * Continuing work on regression test analysis and reporting. (TCWG 448 - 5/10)

11 years, 1 month

1
0
0 0

[Weekly] 12-16 MAY 2014

by Michael Collison

== This week == - Investigated infinite loop bug [TCWG-290][3/10] - Worked on GCC Launchpad bug dispositions (75% complete) [CARD-300][7/10] == Next week == - Complete spreadsheet for GCC Launchpad bug dispositions - Work on unresolved bugs == Future == No Plans. == Planned holidays == No Plans

11 years, 1 month

1
0
0 0

[ACTIVITY] May 12-16

by Charles Baylis

== Progress: == Holiday [2/10] Rewrite of division optimisation changes following review - TCWG293 [8/10] == Plan == Mostly on holiday this week. I may be working sporadically

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 20

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 (7/10) - Released GCC 4.9 2014.05 - Iterate with rob on jenkins issues, regression reporting, etc... * LP #1169164 : including signal.h exposes various PSR_MODE #defines - submitted patch upstream * Misc: o Cbuildv1 and tcwg-web baby-sitting (2/10) o Various meetings (1/10) == Next == * Continue on release/backport process * fix tcwg-web broken pages

11 years, 1 month

1
0
0 0

[ACTIVITY] 12-16 May 2014

by Christophe Lyon

Back full time == Progress == * resumed 1:1 calls with Zhenqiang, Venkat, Charles. * GCC trunk cross-validation (2/10): - monitored results - a few improvements/cleanups * Neon-intrinsics tests (5/10) - continuing conversion - needs to add support AArch64 Neon overflow flag * Misc (meetings, conf-call, ..) (3/10) * Successfully tried OpenNX setup put in place by Maxim (on office computer, despite firewall and no root access) == Next == * GCC trunk cross-validation: - monitor and report results - use this system to pre-validate a patch from Kugan - share scripts with Kugan * Neon intrinsics tests: - continue conversion - hopefully push a preliminary version upstream

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 20

by Bernie Ogden

== Progress== lowlevellock performance bugs - TCWG-435 [3/10] * Trying to build/test aarch64 on a foundation model cbuild benchmarking - TCWG-360 [4/10] * Integrating Maxim's spec scripts into Kugan's benchmarking branch * Began modifying the branch to use existing cbuild functions where possible Meetings/mail/etc [3/10] == Plan == Holiday next week (w/c 26th May) This week: * Try testing glibc on system qemu rather than foundation model * Carry on with cbuild benchmarking * If time, put together some more experimental memset implementations

11 years, 1 month

1
0
0 0

[ACTIVITY] 12 - 16 May 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Bug fixing: Improve gdb.reverse testsuite results on armv8 [TCWG-451] [2/10] -- core files issue submitted bfd patch upstream [TCWG-451] -- Support for recording Data processing - Advanced SIMD and Cryptographic [TCWG-405] [TCWG-407] [3/10] -- Support for recording A64 Data processing - Floating point instructions [TCWG-404] [TCWG-406] [2/10] * Miscellaneous -- UK visa application submission [3/10] == Plan == * Continue work on issues related to GDB arm v8 record/replay

11 years, 1 month

1
0
0 0

[ANNOUNCE] Linaro GCC 4.9 2014.05 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.05 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.05 is the second Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1+svn210052 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1+svn210052 * Backport of the Ada AArch64 support Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

11 years, 1 month

1
0
0 0

[ACTIVITY] 12 - 16 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (5/10) - In thumb2 mode, we get a pattern "*ior_scc_scc" for the third argument expression by the combiner pass. - Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 . - The class object this pointer is passed in r0. r7 is used for stack pointer. - The pattern "*ior_scc_scc" demands more LO_REGISTERS. It needs 5 LO_registers for destination and 4 source operands. But we are left with r3,r4,r5,r6 only. - Such situation is handled for Thumb1 only using TARGET_CLASS_LIKELY_SPILLED_P. Thumb2 should accept HI registers also. - Changing the pattern to accept general registers for destination operation is also not helping. - Need to explore secondary reload macros. * Misc - AMD meetings and internal tasks (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (1/10) * Testing: Installed packages and ran GCC Linaro compiler 4.8 correctness tests on hardware. Completed running SPEC 2006 for -O3 -mcpu=cortex-a57 flag (2/10). == Plan == * Continue bug fixing. * LTO bootstrap failure * Testing GCC Linaro compiler on hardware. * New laptop install ubuntu, set up chroot and migrate to toolchain 64 environment. * UK VISA processing.

11 years, 1 month

1
0
0 0

[ACTIVITY] 12 - 16 May 2014

by Kugan

== Progress == * TCWG-413 (8/10) sha1 performance - Looked at IRA dumps and aarch64 target hooks. - GCC now uses FP registers as register class and this results in lots of fmovs for the test-case. - Discussed in list and tried spill_class hook for aarch64. This helps sha1. - Regression tested the change. - Ran Spec2000 with the changes and 168.wupwise, 187.facerec are failing. - Investigation continues. * TCWG-468 (1/10) - Continuing with benchmarking. * Set-up NX and started using it (1/10) == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 20

by Zhenqiang Chen

== Issue == * None. == Progress == * Commit three patches to enhance shrink-wrap for loop. But community reports an ICE in dwarf info with the patches. (TCWG-133, 5/10) * Update/test shrink-wrap for apcs patch according to comments (TCWG-482, 2/10) * Loop-invariant heuristic tuning (TCWG-763, 2/10). * Investigate Linaro crosstool-ng gdb build fail for 2014.05 config. But have not find an easy way to fix lsbcc build fail. (1/10). == Plans == * Fix the ICE triggered by shrink-wrap changes. * gdb build fail issue if Linaro still use crosstool-ng for release * Continue loop-invariant heuristic tuning == Planned leaves == * June 2.

11 years, 1 month

1
0
0 0

[ACTIVITY] May 12-18

by Maxim Kuvyrkov

== Week of May 12th == - Rolled out TCWG development environment. (TCWG-483, 4/10) -- https://collaborate.linaro.org/display/TCWG/TCWG+Development+Environment -- Demo'ed it both inside and outside TCWG. -- Finished up configuration of environment and setup backups. - STREAM performance regression (TCWG-388, 2/10) -- Prepared first batch of patches for upstream submission - Various discussions, including ... (4/10) -- register allocation and reload with Venkat -- register allocation with Kugan -- benchmarking with Kugan -- Maxim Kuvyrkov www.linaro.org

11 years, 1 month

1
0
0 0

[ACTIVITY] May 5-11

by Maxim Kuvyrkov

== Week of May 5th == - Worked on standardized development environment (TCWG-483, 8/10) -- Deployed it on toolchain64.lava and maximk.linaro.org. -- Demoed and got early feedback from several people. - Various discussions, including ... (2/10) -- GCC debugging and var-tracking pass with Michael. -- Maxim Kuvyrkov www.linaro.org

11 years, 1 month

1
0
0 0

[ACTIVITY] Week 20

by Renato Golin

== Progress == * Kernel (CARD-1246 5/10) - Named register support in Clang * http://reviews.llvm.org/D3797 * Toolchain (CARD-862 3/10) - Testing libc++abi on ARM, now that it has EHABI - Setting up Chromebook library buildbot (FAILED) - One of the bots had a battery failure, needs to be replaced - Which means we won't have the lib bot soon :( * Background (2/10) - Code review, meetings, discussions, etc. == Plan == * Follow up named register patch upstream * Help LLVMLinux with moving current code to conform to global named regs * Help LLVMLinux with LAVA bots * Replace the failing buildbot * Set up a temporary (local) library buildbot on the spare Chromebook * Try other hardware to replace all Chromebooks

11 years, 1 month

1
0
0 0

[ACTIVITY] 12 - 16 May 2014

by Will Newton

== Progress == * Various patch review and followup (2/10) * Helping diagnose an aarch64 linker crash in buildroot (1/10) * Failed attempt to update kernel on Chromebook (1/10) * Analyze and benchmark cortex-strings to find the oustanding work (1/10) * Get docker setup with cgroups to measure memory usage (4/10, TCWG-441) * Trying to get NX working on Fedora 20 (1/10) == Issues == * None == Plan == * Get postgresql and hopefully others working with new benchmark setup * Figure out how to make NX work -- Will Newton Toolchain Working Group, Linaro

11 years, 1 month

1
0
0 0

[RFC][AArch64] Remove CORE_REGS form reg_class

by Kugan

Hi All, AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set of register. Is there any reason why we need this? target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS. In addition, IRA cost calculation also has logics like make common class biggest of best and alternate; this might get confused with this. Attached RFC patch removes it. regression tested for aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ? Thanks, Kugan gcc/ 2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org> * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS to GENERAL_REGS. (aarch64_secondary_reload) : LikeWise. (aarch64_class_max_nregs) : Remove CORE_REGS. * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS. (REG_CLASS_NAMES) : Likewise. (REG_CLASS_CONTENTS) : LikeWise. (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.

11 years, 1 month

2
1
0 0

[ACTIVITY] 5 - 9 May 2014

by Venkataramanan Kumar

== Progress == * Reload - IRA bug fix (5/10) - Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second a gets register r6, but third a not able to reuse r6 or r1 and spill failure. - Debugging the IRA dumps and reload dumps - Getting Maxim help * TCWG-180 (3/10) - GCC bootstrap fails with compare errors. - comparing the dis assembly. * Misc (2/10) - AMD meetings - 1-1 meetings - looked at 1 x86 related bug == Plan == * Continue bug fixing. * LTO bootstrap failure

11 years, 1 month

1
0
0 0

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

linaro-toolchain