=Progress=
memcpy regression on A9 - TCWG-390 [6/10]
* cortex-strings benchmarks suggest this isn't just an outlier, nor
entirely about preload
* Quick test on A15 suggests a similar (less severe) issue
* Got cortex-strings benchmarks more-or-less running via lava
memset performance improvement - TCWG-156 [1/10]
* GNU benchtests not as repeatable as hoped
lowlevellock performance bugs - TCWG-435 [1/10]
* Converted a bunch of inline functions into macros for coldfire
Meetings/mail/etc [2/10]
=Plan=
Carry on generating memcpy data, develop some hypotheses
Bugfix lava-ization of cortex-strings benchmarks as & when
Explore repeatability of cortex-strings benchmark
See how much quicker I can make cortex-strings benchmark without
compromising repeatability
Try to get lowlevellock.h committed for at least arm/aarch64
== Progress ==
* TCWG-418 : Bug fix Reload spill failure (3/10)
Bench marked coremark – no degradations with patch.
CPU2000 runs – Workedon running them as native in chromebook.
Issues with space.
* TCWG-181 : LTO enablement (3/10)
GCC 4.9 FSF no ICE . Linaro 14.07 release has ICE.
GIT bisect experiments on trunk on Aarch64 hardware.
* Misc: (2/10)
- Various meetings .
- PGO bootstrap runs on Aarch64 hardware - pass.
* AMD team out on 19th (2/10).
== Next ==
* GIT bisect experiments on LTO bootstrap.
* Continue Benchmark reload spill failure fix
* Explore on Large memory model support for aarch64
* Cbuildv2 release packaging on native.
== Progress ==
* Benchmarking and regression testing (TCWG-468) (3/10)
- More aarch64 spec2k benchmarking of patches and against fsf 4.9 release
- Spec2k a15 benchmarking on chromebook
* Zero/sign extension elimination (TCWG-15) (5/10)
- Fixed regressions found and broke the patch into two
- Looking at improving zero/sign extension elimination as it is not
happening for one test-case now
- Plan to benchmark the changes and post for review once this is done.
* LP spec2k regression bugs (2/10)
- #1320965 : Cant reproduce ICE but goes into infinite loop with
-floop-interchange at -O3; Looking into it
-#1330725 : Invalid as -fno-strict-overflow is needed for 254.gap.
== Plan ==
* Benchmarking and spec2k bugs.
* Upstream zero/sign extension elimination activities.
== Issues ==
* None.
== Progress ==
* loop2-invariant heuristics tuning (TCWG-469, 2/10). Two patches were
committed @r211818 and r211885. Another two are in review.
* Test the rebased ccmp patches (TCWG-488, 2/10).
* Send out a patch to enhance cprop pass by checking rtx_cost. Collect
benchmark results and update the patch according to comments
(TCWG-486, 6/10).
== Plans ==
* Ping pending patches.
* Continue on patches to optimize constant in loop.
== Progress ==
* GCC trunk cross-validation (CARD-647) (5/10)
- fixes to email-driven robot, now generating html reports
- trouble shooting transcient problems with the compute farm
- added a57+crypto FPU configuration, still under test
- added libstdc++ reports
* AArch64 libsanitizer (TCWG-58)
- Started looking at results. Different errors when running on HW
and under QEMU (where it goes in an infinite loop)
* Misc (meetings, conf-calls, ...) 3/10
- 4.7-2014.06 branch merge completed.
- 4.9 backports reviews
- trouble shooting connexion to tcwgXXX boards
== Next ==
* GCC cross-validation
- more fixes and enhancements
- continue testing of the email robot
* Neon intrinsic tests:
- discuss with upstream
* AArch64 libsanitizer:
- investigate generated code and cause for infinite loop
* Make 4.7-2014.06 final release
== Progress ==
* Automation Framework (CARD-1378 8/10)
- Setting up D01s
- Wasting time on Pandas
- Setting up serial console
- Preparing Chromebook2s
- Testing remote gcc check
* Background (2/10)
- Code review, meetings, discussions, etc.
== Plan ==
* help Guodong with D01 stabilisation
* have a look at compiler-rt autoconf build for buildbots
* start looking at the LLVM + GCC presentation
* probably more lab stuff...
=Progress=
memcpy regression on A9 - REQ-363 [3/10]
* Verified regression on a couple of targets, some investigation around cause
lowlevellock performance bugs - TCWG-435 [3/10]
* Upstreamed, some reworking based on review, obsessed about odd code
change & intermittent test failure
memset improvement - TCWG-156 [1/10]
* Started looking at glibc benchtests as a quicker way of doing
1st-round benchmarking
Meetings/mail/etc [3/10]
=Plan=
More of the above -
* Get some memset benchmarks running
* Carry on with lowlevellock patches (breaks m68k build, apparently)
* More memcpy investigation
== Progress ==
* GDB arm v8 record/replay
-- Investigated prologue analysis and stepping issues. [3/10] [TCWG-484]
-- Updates to JIRA cards.
-- Updates to patches stalled till next week.
* GDB arm v7 record/replay
-- Prepare SIMD instruction recording support patches for re
submission. [1/10]
-- Chromebook issues stalls Testing and submission till next week.
* GDB on Android improvements [3/10]
-- Discussions with community developers
-- Review of already submitted patches for catch syscall and exec events.
-- Making things work with available upstream patches.
* Miscellaneous [3/10]
-- Compassionate leave on Monday 9th June 2013.
-- Submit application for travel health certificate for UK travel in July.
-- Confirm travel and hotel booking after UK visa approval.
== Plan ==
* GDB arm v8 record/replay
-- Update all patches after upstream comments.
-- Investigate all remaining testsuite failures.
-- Update all related jira cards and create new for persisting test failures.
* GDB arm v7 record/replay
-- Update and resubmit upstream.
* GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321]
-- Prioritize todo list in light of currently active upstream development.
== This week ==
Out sick Tuesday and Wednesday (4/10)
Launchpad cleanup (6/10)
Launchpad 944572 - Infinite loop printing "warning: missing braces
around initializer" in g++
- fix released
Bugs marked "won't fix" after investigation:
Launchpad 683683 - run-init on omap3, omap4 in natty dies if busybox
is built with -marm
Launchpad 757427 - gconftool-2 segfaults on arm [shrinkwrap]
Launchpad 768384 - G++ gets stuck (100% cpu never finish) when
compiling C++ code with -O2/3
Launchpad 771675 - shrink-wrap optimization produce buggy code
Launchpad 625228 - Avoid unnecessarily saving $lr on Thumb-1
Launchpad 771832 - bogus reference to unused symbols
Launchpad 788841 - GCC ICE: internal compiler error: in push_minipool_fix
Launchpad 795131 - [armel, vfp] ICE in simplify_gen_subreg_concatn,
at lower-subreg.c:468
Launchpad 803798 - FTBFS on armel: error: unable to find a register
to spill in class 'VFP_LO_REGS'
Launchpad 807156 - GCC (g++):internal compiler error: in
extract_insn, at recog.c:2104
Launchpad 821455 - internal compiler error: in translate_clast, at
graphite-clast-to-gimple.c:1123
Launchpad 839959 - 4.5-2011.08 internal compiler error
Launchpad 841437 - fftw3 version 3.2.2-1 failed to build on armel
Launchpad 887158 - NULL pointer deref in mark_reg_pointer
Launchpad 890657 - Please merge the fix for upstream bug 45102
Launchpad 892880 - MIPS: link error against __unpack_d with
--enable-target-optspace
Launchpad 903178 - [4.6 regression/armhf] ICE, unable to find a
register to spill in class 'LO_REGS'
Launchpad 903347 - [armel/armhf] file fails to compile (indefinite loop?)
Launchpad 903951 - The kernel on staging-panda does not boot with the
11.12 released toolchain
Launchpad 937864 - Produces NEON code on armhf even when explicitly
asked not to
Launchpad 941676 - ppl ftbfs in precise on powerpc
Launchpad 943264 - ICE in arm_select_dominance_cc_mode, at
config/arm/arm.c:10625
Launchpad 1049614 - Assembler messages with -O0: Error: offset out of
range
== Next week ==
On vacation June 16th - June 20th
== Future ==
No Plans
= Progress ==
* Went to UK VISA office and submitted application and bio metrics (2/10)
* Tried Installing chrubuntu on chromebook. But failed and later found that
SD card issue. Given SD card back in office for replacement. Installed
crouton and other packages for building gcc and testing gcc testsuites
(1/10)
* Reload spill failure (bug fix) on armhf target (3/10)
Tested conservative patch that prevent ior_scc_scc patterns for thumb2
target using chrome book.
Thumb2 compare condition test cases fails. Found that these test cases
using constants for operands 2 and 5. Change conservative patch to allow
constant operands for thumb2 target in ior_scc_scc patterns. Testing is in
progress.
* LTO experiments (2/10)
Drilling down ICE with LTO on GCC 4.9 branch.
* Misc (1/10)
- 1-1 meetings (Ryan, Christophe) (0.5/10)
- AMD internal support work and meetings (0.5/10)
* Installed some packages and tested christophe libsantizer patch on
hardware (1/10)
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
== Progress ==
* Public holiday (2/10)
* Benchmarking and regression testing (TCWG-468) (8/10)
- Ran release benchmarking in chrome-book
- Set-up package build environment and ran ubutest
- spec2k benchmarking of patches that was included in 2014.06 release
on aarch64
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
== Issues ==
* None.
== Progress ==
* Work out 4 patches to enhance loop2-invariant heuristics and send
out for community review (TCWG-469, 3/10).
* Test the rebased ccmp patches (TCWG-488, 2/10).
* Investigate how to optimize large constant. Patch is in testing
(TCWG-486, 5/10). Basic idea is:
- Do not split large constant when expanding.
- Improve cprop pass to check the rtx_cost when propagating constants.
== Plans ==
* Ping pending patches.
* Send out ccmp patches for review.
* Send out patches to optimize constant.
== Progress ==
* Kernel (CARD-1246 1/10)
- Helping LLVMLinux to test in LAVA
* Background (9/10)
- Code review, meetings, discussions, etc.
- Setting up Chromebooks again (up, crouton)
- Setting up APM boards (up)
- Setting up D01 boards (bricked 2)
== Plan ==
* work with guodong, fabo, tyler, to revive the D01s
* put crouton on llvm-chrome-test to be ready for release 3.5
* have a look at compiler-rt autoconf build
* keep helping LLVMLinux with LAVA
Monday off. (2/10)
== Progress ==
* GCC trunk cross-validation (CARD-647) (3/10)
- improved scripts to avoid consuming to much memory
- improved kill signals handling when generating reports
- back to normal
- started looking at adding libstdc++ in the reports
- started looking at adding aarch32/armv8 configuration
- email-driven robot looks operational. Started testing with Kugan
* GCC 4.9 branch cross-validation (CARD-647)
- it's now running
* Neon intrinsic tests (CARD-???) (2/10)
- discussion started: scan-assembler directives may be difficult to maintain
- original testsuite maintenance: preparing aarch64 support
* AArch64 libsanitizer support (TCWG-58)
- Venkat tested my patch on HW, need to study the results and
compare with qemu
* Misc (meetings, conf-calls, ...) (3/10)
- 4.7-2014.06 branch merge prepared, validation started
== Next ==
* GCC cross-validation
- check patch to add libstdc++ in the reports
- define configuration for aarch32/armv8
- continue testing of the email robot
* Neon intrinsics tests:
- handle feedback
- original testsuite: continue aarch64 support, investigate output
formatting problems
* AArch64 libsanitizer support:
- analyze results
- use cbuild2 + tcwgbuild configs to run the tests myself on HW
* Backports reviews
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn211054 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1+svn211054
* Backport of [AArch32] PR rtl-optimization/60663
* Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15.
* Backport of [AArch32] Support ORN for DIMode.
* Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A.
* Backport of [AArch32] Allow any register for DImode values in Thumb2.
* Backport of [AArch32] Initialize new tune_params values.
* Backport of [AArch32] Initialise T16-related fields in Cortex-A8
tuning struct.
* Backport of [AArch32] Enable tail call optimization for long call.
* Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32.
* Backport of [AArch64] Fix TLS for ILP32.
* Backport of [AArch64] vrnd<*>_f64 patch.
* Backport of [AArch64] Fix possible wrong code generation when
comparing DImode values.
* Backport of [AArch64] Add a space to memory asm code between base
register and offset.
* Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation.
* Backport of [AArch64] vqneg and vqabs intrinsics implementation.
* Backport of [AArch64] Vreinterpret re-implemention.
* Backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Merge longlong.h from glibc tree.
* Backport of [AArch64] add, sub, mul in TImode.
* Backport of [AArch64] Add handling of bswap operations in rtx costs.
* Backport of [AArch64] Fully support rotate on logical operations.
* Backport of [AArch64] Use standard patterns for stack protection.
* Backport of [AArch64] VDUP Testcases.
* Backport of [AArch64] Vectorise bswap[16,32,64].
* Backport of [AArch64] Enable TBL for big-endian.
* Backport of [AArch64] Reverse TBL indices for big-endian.
* Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class.
* Backport of [AArch64] Improve vst4_lane intrinsics.
* Backport of [AArch64] Rewrite and tests ZIP Intrinsics.
* Backport of [AArch64] libitm Enabled.
* Backport of [AArch64] Support full addressing modes for ldr/str in
vectorization scenarios
* Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...).
* Backport of Fix warning in libgfortran configure script.
* Backport of Remove PUSH_ARGS_REVERSED from the RTL expander
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* GDB arm v8 record/replay
-- Fixed issues showing up when building code with default
optimization. [TCWG-484] [3/10]
-- Fixed failures in until-reverse test cases. [TCWG-484] [1/10]
-- Investigation of failures in watchpoint-reverse and solib test
cases. [TCWG-484] [2/10]
-- Writing NEWS and changelog entries for all patches. [1/10]
* GDB Remote vs Native feature parity (GDB on Android improvements)
[2/10] [CARD-321]
-- Scored through recently submitted patches.
-- Ran testsuite in native and remote modes.
-- Started review of related open jira cards
* Miscellaneous
-- Visit uk visa office for passport collection. [1/10]
== Plan ==
* GDB arm v8 record/replay
-- Update all patches after upstream comments.
-- Investigate all remaining testsuite failures.
-- Update all related jira cards and create new for persisting test failures.
* GDB arm v7 record/replay
-- Update and resubmit upstream.
* GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321]
-- Further progress towards creating a tasks list and timeline.
* Miscellaneous
-- Finalize travel and obtain health certificate for travel to UK.
== Progress ==
* Zero/sign extension elimination (TCWG-15) (2/10)
- Posted patch for comment
* benchmarking (TCWG-468) (1/10)
- Ran a53 benchmarks
* regressions (7/10)
- THUMB1 regression for ARM fenv
* Issue due to thumb1 not supporting mrc/mcr. Patch to fix this is
posted for review.
- Regression when allocating 128bit integer to VFP register
* When LRA assigns DImode value to TImode register, it is not
setting up it in the right place of TImode. Due to this, one of the
moves becomes dead. Patterns needs to be checked.
* VFP registers store big-endian values in little-endian format.
Hence, subreg for mode greater than word has to
be aware of this. As it is, aarch64_cannot_change_mode_class will need
the fix like done in ARM.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
= Progress ==
* LTO experiments (3/10)
Tested with various compiler revisions and in native X86 machines. Compare
errors in gcc 4.9 Linaro 14.05 version. Aarch64, LTO bootstrap passes in
trunk. On FSF GCC 4.9 branch encountering ICE. Opened PRs in GCC Bugzilla.
* Misc (2/10)
- 1-1 meetings (Ryan, Christophe and Maxim) (0.5/10)
- AMD internal support work and meetings (0.5/10)
Sick Leave on 2nd June (2/10)
UK VISA application processing (3/10)
== Plan ==
* UK VISA processing attend interview, biometrics.
* Continue bug fixing.
* LTO bootstrap failure
* Test libsanitizer patch for christophe.
=Progress=
lowlevellock performance bugs - TCWG-435 [1/10]
* All ready to go
cbuild benchmarking - TCWG-360 [4/10]
* Completed a draft implementation for spec2k
* Parked pending review
Meetings/mail/etc [5/10]
=Plan=
Send lowlevellock patches to list
Get back to benchmarking/improving cortex-strings memset
== This week ==
Backported Launchpad 1234146 - Bad Neon intrinsics code gen when using
ld4/st4 on AArch64 (2/10)
Bug Investigations (4/10)
Launchpad Bug 640521 - Incorrect function prologue with Thumb-1
high register variable
Launchpad Bug 1318831 - Invalid unpoisoning of stack redzones on ARM
Launchpad bug 771832 - bogus reference to unused symbols
Launchpad cleanup (4/10)
- 1305042 - Changed status to invalid
- 634731 - Marked as won't fix for older releases. Improved code
generated for 4.8 and 4.9
- 637882 - Marked as won't fix for older releases. Improved code
generated for 4.8 and 4.9
- 638687 - Changed status to invalid. Code for alloca is correct
and alignment is necessary
- 1312931 - Could not verify.
- 772085 - Marked as won't fix for older releases. Fixed in 4.8 and 4.9
- 1225317 - Marked as incomplete due to lack of test case
== Next week ==
Vacation
== Future ==
No Plans.
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and
optimization effort for ARMv8-a (8/10)
- Put the backporting script on https://git.linaro.org/toolchain/backflip.git
(documentation still needed)
- FSF branch merges for 4.9 and 4.8
- Backported requested fixes in 4.9
- Validate merges and some backports in cbuildv1
- Looked at the different results we have in cbuildv2 and cbuildv1
- Still some issues in Jenkins (build crash or are stuck)
- 40 backports stiil need validation
* Misc: (2/10)
o Various meetings.
== Next ==
* Complete FSF branch merges and release 4.9-2014.06
* Document backporting script usage
* Continue feedback and help with the validation
== Issues ==
* None.
== Progress ==
* One day off.
* Clean up and test loop2-invariant heuristic tune patches (TCWG-469, 6/10).
* Rebase conditional compare patches and split them into smaller ones
(TCWG-488, 2/10).
== Plans ==
* Send out loop2-invariant heuristic tuning patches for review.
* Rework on the conditional compare patches.
== Progress ==
* Toolchain (CARD-862 0/10)
- Some investigations on LLVM Linkers
* Background (10/10)
- Code review, meetings, discussions, etc.
- Cleaned up the rack, drown a map
- Jenkins Chromebooks with native Arch Linux
- Failures and problems ensued...
- More time wasted on APMs, but some progress was made
- All Chromebooks had I/O errors on SD cards, starting over
== Plan ==
Spend the weekend and the next week re-flashing Chromebooks
== Progress ==
* GCC trunk cross-validation (CARD-647) (6/10)
- recent LRA change to fix AArch64 compiler causes huge memory consumption.
- this has caused my validations to crash several servers, and I had
to stop them
until I could restart reliably.
- so far unable to restore them
- trying to test LRA tentative fix separately, but results are unreliable too
- tested Thomas Preud'homme patch (bswap-2.c), luckily before
everything became unstable.
* GCC 4.9 branch cross-validation (CARD-647) (1/10)
- validation scripts needed some adaptations to handle the 4.9-branch
- not running yet, until the trunk problems are solved
* Neon intrinsic tests (CARD-????) (1/10)
- submitted patch series containing 40 test files (total will be 136)
* AArch64 libsanitizer support (TCGW-58)
- qemu still needs a patch of mine which I thought had been
committed since February..
- once patched, the sanitizer tests now start executing but lead to
SEGV+timeout
* Misc (meetings, conf-calls, ...) (2/10)
== Next ==
* short week (Monday off, lots of external constraints)
* GCC cross-validation:
- hopefully fix unstability and restore the automatic validations of
trunk + start those of 4.9 branch
- try to actually start mail-driven robot to validate patches
* Neon intrinsics tests: handle feedback
* AArch64 libsanitizer support: look at why tests fail
== Progress ==
* Holiday Monday and Tuesday (4/10)
* Write some scripts to graph malloc app benchmark results (1/10, TCWG-418)
* Patch review and testing (2/10)
* Released eglibc 2.19 2014.06, binutils 2.24.0 2014.06 and gdb 7.7.1
2014.06 (3/10)
== Issues ==
* None
== Plan ==
* Get wg boards running for validation
* More malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Week of June 2nd ==
- Toolchain testing improvements (CARD-1378, 8/10)
-- Implemented schroot testing inside cbuild2. This will allow both Jenkins automation and developers to use schroot testing approach.
-- Automated board configuration for schroot testing.
-- Started cleaning up and committing my testing changes to cbuild2 and dejagnu.
- Various discussions (1/10)
- NZ public holiday (2/10)
- Celebrated! My! Happy! Birthday!
--
Maxim Kuvyrkov
www.linaro.org
== Week of May 26th ==
- Toolchain testing improvements (CARD-1378, 8/10)
-- Prototyped parallelization of testing across several ARM board. Turns out that striping tests across target boards does not give much as host is the bottleneck in our setups.
-- Prototyped testing using GCC's shared libraries and newly-built sysroot (instead of using system libraries on the target).
-- Prototyped testing using schroots -- this appears the way to go about our toolchain testing. For each test run a schroot session is started on the board, complete with a dedicated SSH server and freshly-built sysroot. After testing is done schroot session is closed and everything is cleaned up including disk files and stray processes.
- Various discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of May 19th ==
- TCWG development environment (TCWG-483, 2/10)
-- Followed up on various package requests and backup settings.
- STREAM performance regression (TCWG-388, 3/10)
-- Tested, posted upstream and committed first batch of patches.
- Toolchain testing improvements (CARD-1378, 4/10)
-- Discussed testing design and approaches with the team.
-- Prototyped various approaches to testing.
- Various discussions and bits of administrivia.
--
Maxim Kuvyrkov
www.linaro.org
Hi,
I'm trying to follow
https://wiki.linaro.org/WorkingGroups/ToolChain/Using/GCCNative but it
looks like it is outdated? Can someone confirm?
E.g.:
configure: WARNING: unrecognized options: --disable-bootstrap,
--with-mode, --with-arch, --with-tune, --with-fpu, --with-float
--
João M. S. Silva
== Issue ==
* None.
== Progress ==
* Commit the fixes for pr61220, 61278 and part of 61225. The patch to
fix other part of 61225 is still in review (2/10).
* Loop invariant heuristics tuning. Tests are ongoing. (7/10, TCWG-763)
* Rebase conditional compare patches. Tests are ongoing.
* Prepare UK visa.
== Plans ==
* Send out loop-invariant heuristic tuning patches for review.
* Rework on the conditional compare patches.
== Leaves ==
* June 2.
== This week ==
- Memorial day holiday Monday (2/10)
- Investigated launchpad 1295738 - [4.8 Regression] unable to find a
register to spill in class 'LO_REGS' [CARD-300](2/10)
- Will mark as unlikely to fix (reload error); works with LRA and/or
with -fomit-frame-pointer
- Investigated launchpad 757427 - gconftool-2 segfaults on arm
[shrinkwrap] [CARD-300](2/10)
- Segfault not reproducible in linaro 4.8 or 4.9
- Shrinkwrap bug not reproducible in linaro 4.8 or 4.9
- Investigating launchpad 1225317 - gcc mis-compiles (large-value) jump
tables with -fPIC or thumb2 [CARD-300](1/10)
- Investigating launchpad 1234146 - Bad Neon intrinsics code gen when
using ld4/st4 on AArch64 [CARD-300] (2/10)
== Next week ==
- Resolve Launchpad bugs 1225317 and 1234146
== Future ==
No Plans.
== Planned holidays ==
Possible vacation June 16th - June 20th
== Progress ==
* Meetings and Misc (3/10)
- Upgraded my Samsung Chromebook to boot Ubuntu trusty instead of
using crouton. Works much better for native builds now.
* Worked on perfecting building binary tarballs in a 32bit chroot
that run on any platform. (TCWG 383 - 7/10)
- Added zlib to infrastructure so libz.so.1 can be found at runtime.
- Force libgloss to build for bare metal.
- Fixed minor issues with Canadian cross builds.
== Plan ==
* Figure out why Canadian cross builds fail on the TCWG build farm,
but work on my local machines.
* Continue improving building binary releases.
* Get D01 board setup and working.
* Get back to test result verification automation.
- rob -
== Progress ==
* GDB arm v8 record/replay
-- Support for recording advance SIMD load store instructions.
[TCWG-403] [4/10]
-- Code cleanup and patch creation. [2/10]
-- Investigation of patches failing in native configuration. [TCWG-484] [2/10]
* Miscellaneous
-- Sick day off on Monday [2/10]
== Plan ==
* GDB arm v8 record/replay
-- Bug fix issues stalling patch submission upstream.
-- Submission of patches upstream.
-- Bug fixing to reduce failures.
* Run gdb testsuites on arm/x86 in native/remote for latest feature parity.
* Day out of office on Thursday to collect passport from UK visa office.
Short week (2 days off) (4/10)
== Progress ==
* GCC trunk cross-validation (CARD-647) (2/10)
- reported 2 new compiler build failures and 2 regressions
- tested one proposed patch, which did not fix the regression
- trunk now builds OK again
* Neon intrinsics tests (1/10)
- cleaned branch to prepare submission
- working on Cumulative Saturation Neon flag support for AArch64
* aarch64 libsanitizer support
- resumed work: libsanitizer no longer builds with recent glibc,
will need to patch it upstream before bringing it back to GCC.
- testing will be difficult using qemu since libsanitizer reserves a
huge chunk of memory at startup (8GB) which may not be available on
the host machine
* Misc (meetings, conf-calls, ....) (3/10)
- 1:1 calls, weekly calls
- backports review
== Next ==
* GCC trunk cross-validation:
- test Kugan's patch before submission
- evaluate effort to develop a mail-driven support for testing
patches vs trunk befiore submission
- add support for validation of FSF-4.9 branch
* Neon intrinsics tests
- add support for Cumulative Saturation Neon flags on AArch64
* AArch64 libsanitizer
- discuss how to make cross-testing more practical
Short week (3 days)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and
optimization effort for ARMv8-a (4/10)
- Enhanced my backporting script
- Looked at the merge process (4.9, 4.8 and 4.7 merge are comming)
- 40 backports stiil need validation
* Misc: (2/10)
o Various meetings.
o Discussed schroot testing
== Next ==
* FSF branch merges
* Document backporting script usage
* Continue feedback and help with the validation
== Progress ==
* Zero/sign extension elimination (TCWG-15) (7/10)
- regression tested and fixed all the issues
- final bootstrap and regression testing for arm and x86_64 are ongoing
- will post the patch for comment after checking the results
* benchmarking (TCWG-468) (1/10)
- Set-up chrome-book for a15 release benchmarking
* SAH1 performance (TCWG-413) (2/10)
- Christophe noted regression for aarch64_be due to clean-up patch.
- register_move_cost hook in aarch64 does not handle all the cases
(CORE_REGS and POINTER_REGS) and due to this, it calculates FP2FP cost
for these classes . With CORE_REGS gone, costs for register classes are
now different. Cost table needs adjustment.
* FENV for C11 TCWG-447
- Committed ARM part.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* Kernel (CARD-1246 2/8)
- Fixed edge cases for named registers
- http://llvm.org/PR19841
- http://llvm.org/PR19837
* Background (6/8)
- Code review, meetings, discussions, etc.
- TCWG Rack re-org
- Trying to set up native Chromebooks
- Trying to set up APM
- Trying to add Compiler-RT to our buildbots
== Plan ==
* Continue rack re-org
* Continue RT support on current bots
* Try libc++ bot
* Have a look at sanitizer bot
== Progress ==
* Bank Holiday Monday (2/10)
* Got a postgresql malloc benchmark running (4/10, TCWG-441)
* Started refactoring malloc microbenchmark based on review (2/10, TCWG-160)
* Patch review and testing (2/10)
== Issues ==
* None
== Plan ==
* Holiday Tuesday and Wednesday
* Finish refactoring malloc microbenchmark
* Work on results plotting code for benchmarks
--
Will Newton
Toolchain Working Group, Linaro
Hi,
I've been having this issue with latest binary Linaro 2014.04 toolchain from
http://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-a…
It comes with own sysroot, but linker fails to locate /lib/ld-linux-armhf.so.3
$ make
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o nvs.o nvs.c
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o misc_cmds.o misc_cmds.c
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o calibrator.o calibrator.c
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o plt.o plt.c
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o wl18xx_plt.o wl18xx_plt.c
arm-linux-gnueabihf-gcc -I/tmp/include/libnl3/ -DCONFIG_LIBNL32 -c -o ini.o ini.c
arm-linux-gnueabihf-gcc -L/tmp/lib/ nvs.o misc_cmds.o calibrator.o plt.o wl18xx_plt.o ini.o -lm -lnl-3 -lnl-genl-3 -o calibrator
/opt/linaro-2014.04/bin/../lib/gcc/arm-linux-gnueabihf/4.8.3/../../../../arm-linux-gnueabihf/bin/ld: cannot find /lib/ld-linux-armhf.so.3
collect2: error: ld returned 1 exit status
Makefile:26: recipe for target 'all' failed
make: *** [all] Error 1
And when I pass my own sysroot, it works fine.
Is it supposed to work as a standalone toolchain with its own bundled sysroot?
Thanks.
--
Denys
I've been digging through test logs, and for gcc 4.9.1 native x86_64
tests, all the libsanitizer test cases fail to link due to unresolved
symbols from libpthread and libdl. Does anybody know more about this
bug, or care to fix it ? :-) It still exists in gcc trunk.
- rob -
== This week ==
- Completed GCC Launchpad bug dispositions [CARD-300][2/10]
- Backported PR61202 - gcc generated invalid sqdmulh instruction
[TCWG-485](2/10)
- Triaged and investigated Launchpad bug 1295738- Unable to find a
register to spill in class 'LO_REGS' [Card 300](3/10)
- Triaged and investigated Launchpad bug 1248752 - ARM assembly
instruction compile error [Card-300](3/10)
== Next week ==
- Resolve Launhpad bugs 1295738 and 1248752
- Triage and investigate other bugs as time warrants
== Future ==
No Plans.
== Planned holidays ==
No Plan
== Progress ==
* Worked on building binary tarballs from Jenkins. (TCWG 383 - 4/10)
* Continuing work on regression test analysis and reporting. (TCWG
448 - 3/10)
- now copying the check.log from make check to toolchain so
tcwgweb.sh can scan it for build errors in the test cases.
- Got the delimiter for concurrent Jenkins builds changed, now
glibc build problems are gone.
- Track down and try to fix testsuite build issues.
* Meetings and Misc. (3/10)
- Worked on making remote testing go faster. Setting
ControlPersist seems to help.
- Much debugging of Jenkins related issues.
== Plan ==
* Continuing work on validating test results and fixing testsuite
build issues. (TCWG 448)
* Probably more work on binary tarballs. (TCWG 383)
* More tracking down and fixing Jenkins related issues.
== Issues ==
* For some reason libgloss isn't getting built for *-elf via
Jenkins/Cbuildv2.
Hi,
I have tried out a prototype of using binfmt_misc, and it does not appear to be a worthwhile solution at this point.
Bottom line: with a nice fast multi-core x86 server and a pool of ARM boards we can test GCC in ~20min.
Testing setup:
- Core i3 2-core host
- Chromebook 2-core target, SSD disk
- WiFi network
- GCC mainline built from sources with same flags both natively and cross: C, C++, Fortran.
General observations about testing ARM toolchains:
- When testing natively target is busy 100%: around 50% of time is spent compiling testcases, 40-45% in dejagnu/expect, 5-10% on actual test execution. Target is the bottleneck.
-- 21633.22user 4400.13system 4:13:11elapsed
- With testing cross using standard rsh_prog=ssh, rcp_prog=scp, target is busy 40% of the time: 30% on ssh, 10% on actual test execution. Host is the bottleneck.
--
- When testing cross (using method below) target is busy only 15-20% of the time: 10% on ssh and 10% on actual test execution. Host is the bottleneck.
-- 9490.16user 2882.54system 1:10:57elapsed
I've got a prototype implementation of parallelized cross-testing of GCC that I'm happy with using rsh_prog and rcp_prog dejagnu wrappers:
General observations on dejagnu cross-testing process:
- All communication with the target is done by Dejagnu via rsh_prog and rcp_prog hooks. These are normally defined to ssh and scp respectively.
- Dejagnu copies every testcase to /tmp/ on the target with scp.
- Dejagnu executes every testcase via ssh off target's /tmp/. In total there is 1 scp and 3 ssh invocations per testcase.
The idea of below scripts is to assume shared filesystem between host and a pool of target boards, and skip copying executables to target's local filesystem. Since there is no longer local state (local state == contents of /tmp) on the target boards, testcases can be executed on any of the boards in the pool. This happens transparently to dejagnu: dejagnu issues "rsh_prog chromebook-pool ./test" and then rsh_prog converts this to "ssh chromebook-XX ./test", where XX chosen at random.
Script implementation notes:
- For some unholy reason there is no way of correctly parse command line from dejagnu and give it to bash. The reason why myssh script ssh'es onto host itself is because that's the only way I've found to reliably execute the command. Hey! The command line was intended for ssh anyway!
- Myssh script translates hostname of foobar-pool-01-03-08 into foobar01, foobar03 or foobar08 chosen at random. If there is no "-pool-" mentioned in hostname, then it is used verbatim.
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* GDB arm v8 record/replay
-- Completed implementation of system call recording [TCWG-409] [4/10]
-- Support for recording A64 Loads and stores [TCWG-409] [2/10]
-- Bug Fixing to reduce failures in gdb.reverse testsuite [TCWG-484] [2/10]
* Miscellaneous
-- Day off on Friday [2/10]
== Plan ==
* GDB arm v8 record/replay
-- Submission of patches upstream.
-- Bug fixing to reduce failures.
-- Advance SIMD load/store instruction recording support.
== Issue ==
* None.
== Progress ==
* Investigate PR61220, 61225 and 61278, which are triggered by my
previous commits. Patches are in review. (9/10)
* Investigate codes generated by shrink-wrapping interrupt routes. It
seams no dwarf info issue.
* Misc update for Linaro crosstool-ng to make the build work in case
someone wants to use it.
- Down grade gdb to 7.6.
- Disable multilib for 4.9.
- Move local patches at binutils/linaro-2.24.0-2014.03 to
binutils/linaro-2.24.0-2014.05.
== Plans ==
* Push pending patches.
== Planed leaves ==
* June. 2.
Hi,
I've run into some compile errors after updating to 4.9 -- usually getting
undefined references to symbols defined in helper static libraries.
It turns out this is triggered by gcc -flto now creating slim object files
by default (-ffat-lto-objects "fixes" it) - but I think it is actually an
ld bug that should be fixed at some point. ld (regardless of whether I use
-fuse-linker-plugin, -fuse-ld=gold or -fuse-ld=bfd) doesn't seem to see LTO
bytecode in object files that are inside an ar wrapper.
It deals with the library just fine if I use "ar x" to extract its object
files and link to them individually as opposed to the .a file.
I've attached a small test case to demonstrate ("make broken" shows the
error, "make works" shows the workaround).
Is there any reason why ld should behave the way it does, or is this a bug
that needs fixing?
ttyl
bero
== Progress ==
* Reload - IRA bug fix (3/10)
Not able to reproduce in trunk, r210538 masks the bug again :(
Discussed with maxim on extending the macro ,Likely spilled class for thumb2.
Decided that it will lead to performance regressions. Conservative fix
is to allow the pattern for ARM target alone. Verfying the fix by on
armhf schroot
* Testing GCC Linaro compiler on Hardware (4/10)
Completed GCC Linaro compiler 4.8 and 4.9 correctness tests on
hardware. Completed running SPEC 2006 for -O3. Completed running
SPEC2006 for -O3 -ftlo and -mcpu=cortex-a57. Triggered PGO runs on
hardware.
Looked at bootstrap failure with BOOT_CFLAGS="-mcpu=cortex-a57".
Changed from system assembler to Linaro assembler solved it as system
assembler is old.
* Misc (3/10)
- Completed installing ubuntu, set up chroot and migrate to toolchain
64 environment. (2/10)
- 1-1 meetings (Ryan, Christophe and Maxim) (1/10)
- AMD internal support work and meetings
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
* Testing GCC Linaro compiler on hardware.
* UK VISA processing.
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and
optimization effort for ARMv8-a (8/10)
- Looked at Jenkins build/failures/reportin
- Review the backporting process and scripted it
- 40 backports are in review and need validation
* LP #1169164 : including signal.h exposes various PSR_MODE #defines
- Committed upstream.
* Misc:
o Various meetings (2/10)
o LCU'14: Register and booked flights
== Next ==
* Child care today
* Improve the backport script and document it's usage
* Continue backports
* Continue feedback and help with the validation
== Progress ==
* GCC trunk cross-validation (4/10)
- build broken last week-end, because of a
new optimization that broke glibc build.
- glibc fixed by Joseph mid-week, updated
- to help diagnose build failures earlier, I have setup
a reduced version of the validation framework,
which only performs a build of binutils+glibc+gcc,
at every commit on gcc trunk for 16 arm+aarch64
configurations. [ yes, another buildbot of sorts ]
- restarted builds+validations to last known successful
status (i.e. before last week-end)
- builds are catching up
* Neon intrinsics tests (3/10)
- continuing conversion (about 40 files done, out of ~140)
* Misc (meetings, conf-calls, ...) (3/10)
* Backports for 4.9:
- started reviewing candidate backports
== Next ==
* GCC trunk cross-build/cross-validation:
- monitor and report regressions
* Neon intrinsics tests:
- continue conversion
- prepare a cleaner branch for upstream submission
* Backports:
- more reviews
- process improvements
== Progress ==
* Kernel (CARD-1246 4/10)
- Named registers committed in Clang
- GCC seems to break on local named regs, too.
- Trying to change the kernel code to use only globals for non-GPRs
- Adding support for pointer types, and structure fields in GNRVs
* Benchmarks (CARD-716 0/10)
- Re-enabling perf reports for LNT bot (ARM fixed reporting)
* Background (6/10)
- Code review, meetings, discussions, etc.
- Removing *all* buildbots' batteries after failure
- Testing D01 box, not stable yet for toolchain testing
- Moving development to git.linaro.org (for backup)
- Planning TCWG rack migration
- Drafting an LLVM white paper
== Plan ==
* Continue with named register extra work (http://llvm.org/PR19837)
* Start TCWG rack migration
* Discussions about LLVM white paper
== Progress ==
* Investigate and fix building glibc for ARM with -mtls-dialect=gnu2 (3/10)
* Investigate ld TLS behaviour for Huawei (1/10)
* Refactor scripts to enable benchmarking postgresql malloc
performance (2/10, TCWG-441)
* Patch review and testing (1/10)
* Diagnose and fix glibc testsuite failures on aarch64 (2/10)
* Meetings, admin (1/10)
== Issues ==
* None
== Plan ==
* More malloc application benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress==
lowlevellock performance bugs - TCWG-435 [5/10]
* Tried various methods to build/test glibc for aarch64
* Eventually succeeded (tests passed)
cbuild benchmarking - TCWG-360 [3/10]
* cbuildized spec2xxx scripts working as far as 'run'
Meetings/mail/etc [2/10]
== Plan ==
Holiday for one week
After that:
* Clean up cbuildized spec2xxx scripts, cbuildize them some more &
discuss with Rob
* Send lowlevellock patch upstream
* If time, put together some more experimental memset implementations
I have been thinking how to simplify cross-testing our toolchain for both automated and development/debugging builds, and among various options the most universal I came up with is ARM hardware + ssh + binfmt_misc + sshfs. I wonder if anyone has already tried this or can suggest alternatives which are as universal.
Given:
- host x86_64 development machine
- cross-compiler
- target hardware with fast network to the host
- host and target have ssh
- testsuite (gcc/glibc/gdb/etc)
Here is how it is going to work
1. On host we create a simple wrapper script that will pass through its arguments as command to execute on target via ssh:
===
#!/bin/sh
ssh -p 22NN $TARGET_BOARD "$@"
===
2. We register this script in binfmt_misc to be used as interpreter for target binaries. Value of $TARGET_BOARD will be picked up from the environment and can be set to different boards for different testsuite runs.
3. The target board needs to be prepared for a particular testsuite run:
-- Runtime libraries need to be either copied or mounted via sshfs from the host. It is an open question how best to install several sets of libraries (for parallel runs) so that each set appears to be main system libraries. My current thinking is a separate ssh server inside chroot per each test run.
-- Test directory needs to be sshfs mounted on target from host so that the target could see test executables.
-- Preparation/finalization of the board can either be done explicitly before/after testing. Or it can be done on demand by the aforementioned script: the script checks whether a multiplexed ssh socket exists, and, if not, it prepares the board and starts a multiplexed ssh connection.
4. Testing is fired up as if it is normal "native" testing. Whenever kernel is given an ARM binary to execute -- it passes it off to wrapper, which passes it off to the target board via ssh. The board sees same filesystem as host and happily executes binaries against toolchain runtime libraries.
Comments or rotten tomatoes?
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
= Progress ==
* Worked on the LLVM branch of Cbuildv2 (TCWG - 1/10).
* More work on regression test analysis and reporting. (TCWG 448 - 5/10)
* Meetings and Misc (4/10)
- Produced lots of test results via Jenkins, need to verify
they're not having remote target problems.
== Plan ==
* Verify test runs aren't having problems with remote targets.
* Start training the Jenkins Failure Analysis plugin.
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continuing work on regression test analysis and reporting. (TCWG
448 - 5/10)
== Progress: ==
Holiday [2/10]
Rewrite of division optimisation changes following review - TCWG293 [8/10]
== Plan ==
Mostly on holiday this week. I may be working sporadically
Back full time
== Progress ==
* resumed 1:1 calls with Zhenqiang, Venkat, Charles.
* GCC trunk cross-validation (2/10):
- monitored results
- a few improvements/cleanups
* Neon-intrinsics tests (5/10)
- continuing conversion
- needs to add support AArch64 Neon overflow flag
* Misc (meetings, conf-call, ..) (3/10)
* Successfully tried OpenNX setup put in place by Maxim
(on office computer, despite firewall and no root access)
== Next ==
* GCC trunk cross-validation:
- monitor and report results
- use this system to pre-validate a patch from Kugan
- share scripts with Kugan
* Neon intrinsics tests:
- continue conversion
- hopefully push a preliminary version upstream
== Progress==
lowlevellock performance bugs - TCWG-435 [3/10]
* Trying to build/test aarch64 on a foundation model
cbuild benchmarking - TCWG-360 [4/10]
* Integrating Maxim's spec scripts into Kugan's benchmarking branch
* Began modifying the branch to use existing cbuild functions where possible
Meetings/mail/etc [3/10]
== Plan ==
Holiday next week (w/c 26th May)
This week:
* Try testing glibc on system qemu rather than foundation model
* Carry on with cbuild benchmarking
* If time, put together some more experimental memset implementations
== Progress ==
* GDB arm v8 record/replay
-- Bug fixing: Improve gdb.reverse testsuite results on armv8
[TCWG-451] [2/10]
-- core files issue submitted bfd patch upstream [TCWG-451]
-- Support for recording Data processing - Advanced SIMD and
Cryptographic [TCWG-405] [TCWG-407] [3/10]
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404] [TCWG-406] [2/10]
* Miscellaneous
-- UK visa application submission [3/10]
== Plan ==
* Continue work on issues related to GDB arm v8 record/replay
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.05
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.05 is the second Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn210052 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1+svn210052
* Backport of the Ada AArch64 support
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* Reload - IRA bug fix (5/10)
- In thumb2 mode, we get a pattern "*ior_scc_scc" for the third
argument expression by the combiner pass.
- Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 .
- The class object this pointer is passed in r0. r7 is used for stack pointer.
- The pattern "*ior_scc_scc" demands more LO_REGISTERS. It needs 5
LO_registers for destination and 4 source operands. But we are left
with r3,r4,r5,r6 only.
- Such situation is handled for Thumb1 only using
TARGET_CLASS_LIKELY_SPILLED_P. Thumb2 should accept HI registers also.
- Changing the pattern to accept general registers for destination
operation is also not helping.
- Need to explore secondary reload macros.
* Misc
- AMD meetings and internal tasks (2/10)
- 1-1 meetings (Ryan, Christophe and Maxim) (1/10)
* Testing: Installed packages and ran GCC Linaro compiler 4.8
correctness tests on hardware. Completed running SPEC 2006 for -O3
-mcpu=cortex-a57 flag (2/10).
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
* Testing GCC Linaro compiler on hardware.
* New laptop install ubuntu, set up chroot and migrate to toolchain
64 environment.
* UK VISA processing.
== Progress ==
* TCWG-413 (8/10) sha1 performance
- Looked at IRA dumps and aarch64 target hooks.
- GCC now uses FP registers as register class and this results in lots
of fmovs for the test-case.
- Discussed in list and tried spill_class hook for aarch64. This helps
sha1.
- Regression tested the change.
- Ran Spec2000 with the changes and 168.wupwise, 187.facerec are failing.
- Investigation continues.
* TCWG-468 (1/10)
- Continuing with benchmarking.
* Set-up NX and started using it (1/10)
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Issue ==
* None.
== Progress ==
* Commit three patches to enhance shrink-wrap for loop. But community
reports an ICE in dwarf info with the patches. (TCWG-133, 5/10)
* Update/test shrink-wrap for apcs patch according to comments (TCWG-482, 2/10)
* Loop-invariant heuristic tuning (TCWG-763, 2/10).
* Investigate Linaro crosstool-ng gdb build fail for 2014.05 config.
But have not find an easy way to fix lsbcc build fail. (1/10).
== Plans ==
* Fix the ICE triggered by shrink-wrap changes.
* gdb build fail issue if Linaro still use crosstool-ng for release
* Continue loop-invariant heuristic tuning
== Planned leaves ==
* June 2.
== Week of May 12th ==
- Rolled out TCWG development environment. (TCWG-483, 4/10)
-- https://collaborate.linaro.org/display/TCWG/TCWG+Development+Environment
-- Demo'ed it both inside and outside TCWG.
-- Finished up configuration of environment and setup backups.
- STREAM performance regression (TCWG-388, 2/10)
-- Prepared first batch of patches for upstream submission
- Various discussions, including ... (4/10)
-- register allocation and reload with Venkat
-- register allocation with Kugan
-- benchmarking with Kugan
--
Maxim Kuvyrkov
www.linaro.org
== Week of May 5th ==
- Worked on standardized development environment (TCWG-483, 8/10)
-- Deployed it on toolchain64.lava and maximk.linaro.org.
-- Demoed and got early feedback from several people.
- Various discussions, including ... (2/10)
-- GCC debugging and var-tracking pass with Michael.
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Kernel (CARD-1246 5/10)
- Named register support in Clang
* http://reviews.llvm.org/D3797
* Toolchain (CARD-862 3/10)
- Testing libc++abi on ARM, now that it has EHABI
- Setting up Chromebook library buildbot (FAILED)
- One of the bots had a battery failure, needs to be replaced
- Which means we won't have the lib bot soon :(
* Background (2/10)
- Code review, meetings, discussions, etc.
== Plan ==
* Follow up named register patch upstream
* Help LLVMLinux with moving current code to conform to global named regs
* Help LLVMLinux with LAVA bots
* Replace the failing buildbot
* Set up a temporary (local) library buildbot on the spare Chromebook
* Try other hardware to replace all Chromebooks
== Progress ==
* Various patch review and followup (2/10)
* Helping diagnose an aarch64 linker crash in buildroot (1/10)
* Failed attempt to update kernel on Chromebook (1/10)
* Analyze and benchmark cortex-strings to find the oustanding work (1/10)
* Get docker setup with cgroups to measure memory usage (4/10, TCWG-441)
* Trying to get NX working on Fedora 20 (1/10)
== Issues ==
* None
== Plan ==
* Get postgresql and hopefully others working with new benchmark setup
* Figure out how to make NX work
--
Will Newton
Toolchain Working Group, Linaro
Hi All,
AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set
of register. Is there any reason why we need this?
target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS.
In addition, IRA cost calculation also has logics like make common class
biggest of best and alternate; this might get confused with this.
Attached RFC patch removes it. regression tested for
aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ?
Thanks,
Kugan
gcc/
2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org>
* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
== Progress ==
* Reload - IRA bug fix (5/10)
- Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second
a gets register r6, but third a not able to reuse r6 or r1 and spill
failure.
- Debugging the IRA dumps and reload dumps
- Getting Maxim help
* TCWG-180 (3/10)
- GCC bootstrap fails with compare errors.
- comparing the dis assembly.
* Misc (2/10)
- AMD meetings
- 1-1 meetings
- looked at 1 x86 related bug
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
Short week, 2 days off (4/10)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 (6/10)
- Prepared FSF 4.9 branch merge in Linaro one.
- Backported Zhenqiang upstream patches.
- Iterate with rob on various jenkins issues
- Looked at gerrit for the backport reviews
* Misc:
o Cbuildv1 baby-sitting
== Next ==
* Continue on Linaro GCC 4.9 release.
== Progress ==
* TCWG-413 (5/10)
- Rebuild FSF 4.8, Linaro 4.8 and Linaro 4.9 releases for aarch64 with
crosstool-ng (Kept all the dependencies same and used different gcc).
- Lost all the config for running benchmark on the test-machine and set
it up again.
- Re-ran spec2k benchmarking and results.
* TCWG-468 (5/10)
- Looked in detail IRA dumps and cost models.
- Also looked at IRA and LRA code to get better understanding of the
algorithms.
- Costs dumped seems odd and looking further.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* GDB arm v8 record/replay: core files issue [TCWG-451] [6/10]
-- Add bfd support for missing aarch64 core file handlers.
-- Added regset caching functions for aarch64 linux gdb.
* GDB arm v8 record/replay: Support for recording A64 Data processing
- Floating point instructions [TCWG-404] [3/10]
* Miscellaneous [1/10]
-- Meetings
-- Browse through Linaro training resources.
-- UK visa documents preparation.
== Plan ==
* Continue work to support GDB arm v8 record/replay
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404]
-- Support for recording syscalls, signals etc [TCWG-409]
* UK visa application submission.
= Progress ==
* Continue improving LAVA support in DejaGnu. (TCWG 455 - 1/10)
* More work on regression test analysis and reporting. (TCWG 448 - 4/10)
- Did builds of 4.8, 4.9, and master to establish baseline test
results.
- Worked on test analysis script.
- Jenkins matrix builds & test runs are working, and copying results to
toolchain64.
* Meetings and Misc (5/10)
- Fixing various Cbuildv2 bugs found by yroux dealing with git.
- Fixed bug where the GDB build was polluting the destdir with
binutils.
- Installed OpenNX chroot on toolchain64 with maxim.
- Fixed disk on toolchain64 with maxim to access all 4TB. Use GPT...
- Added more config triplets to Jenkins, so now it builds everything
we support.
== Plan ==
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
- Do diffs of new builds test runs from the baseline, not the previous
build.
* Try to look at the LLVM branch of Cbuildv2, do some testing of it.
== Issues ==
* Jenkins needs to be able to see LAVA slaves as online, but not
booted..
* The skiing is good, but the avalanche danger is high, so limits
accessibility.
* We need a backup plan for toolchain64.
* Google groups have problems, so had to setup test results list on
one of my servers instead. (ask me if you want to be on the list) The
new beta release of GNU Mailman looks very nice.
* The chromebooks in our build farm can't build GCC native.
- rob -
== Issue ==
* None.
== Progress ==
* Identify a build environment issue for linux64 gdb binaries "Symbol
format `elf32-littlearm' unknown".
* Send out shrink-wrap related patches from community review (TCWG-133, 2/10)
* Move-loop-invariant heuristic tuning (TCWG-469, 8/10).
- Update heuristic according to benchmark testing.
== Plan ==
* Update shrink-wrap patches according to comments.
* Continue on move-loop-invariants heuristic tune.
== Planned leaves ==
* June 2.
== Progress==
Holiday [2/10]
Fixing performance bugs in lowlevellock - TCWG-435 [4/10]
* Initial patch for lowlevellock.h largely done, awaiting an aarch64 test run
* About 1/2 of the lowlevellock.h's remain post-patch, need to ask
some questions about them
cortex-strings memset - TCWG-156 [1/10]
* Fixed an alternative implementation, a little more benchmarking investigation
cbuild benchmarking branch [1/10]
* Hunting for correct benchmark source, added a little more error checking
Meetings/mail/etc [2/10]
== Plan ==
More of the same -
* Post lowlevellock.h patch and ask some questions
* Finish exploring memset alternatives and work out how to benchmark them
* Carry on with cbuild benchmarking branch
Holiday 26th - 30th May
== Progress ==
* Kernel (CARD-1246 3/10)
- Committed Named Register LLVM change
- Working on the Clang part
- Helping LLVMLinux to set up bots/LAVA tests
* Tests/CBuild2 (CARD-716 2/10)
- Submitted CBuild2 LLVM patch, waiting for review
- Implemented sqrt to pacify GCC on sphereflake
* Background (3/10)
- Code review, meetings, discussions, etc.
* Bank Holiday Monday (2/10)
== Plan ==
* Continue named registers on Clang
* Continue LLVMLinux hardware test bot
* Run some benchmarks on AArch64
* Check CBuild2 progress, try builds live
== Progress ==
* Bank Holiday Monday (2/10)
* glibc patch review and followup (1/10)
* Started investigating malloc intensive applications (3/10, TCWG-440)
* Investigate a couple of linker issues (1/10)
* Figure out how to benchmark postgresql (3/10, TCWG-441)
== Issues ==
* None
== Plan ==
* Develop a good general way to measure memory usage of complex applications
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
Bank holiday [2/10]
Investigated using D01 board [1/10]
Retested and pinged division patch - TCWG-293 [2/10]
Added post-index addressing to NEON memory access for ARM -TCWG-430 [5/10]
* wrote patch
* makes useful improvement to libvpx performance
== Progress ==
Holiday [3/10]
Post-indexed addressing for NEON on Aarch64 - TCWG-430 [3/10]
* needs much more work than for ARM
Revisited apparent NEON scheduling problem in libvpx - TCWG-429 [2/10]
* it transpires that this was an incorrect analysis
* the assembler code didn't conform to the ABI
* upstream has now fixed this
Received review for division patch - TCWG-293 [2/10]
* needs a rewrite
(Resending to correct address)
== Progress==
TCWG-435 needless busy-wait in lowlevellock.c (0/10)
* Patches for lowlevellock.c sent to list
* Patch for lowlevellock.h still to do
TCWG-156 cortex-strings memset (5/10)
* Dug through a bunch of docs and fiddled with the source
Looking at the cbuild benchmarking branch (2/10)
* Some back and forth around getting access to lava lab
* Poked around the code, made some small improvements
== Misc ==
Meetings/mail/etc 3/10
== Plan ==
(Public) holiday on Monday
Put together lowlevellock.h patch
Do something more substantial with cbuild
Finish fiddling with the memset source
== Week of April 28th ==
- Made a prototype rootfs for benchmarking (CARD-1413, 2/10)
-- Got a tutorial from Fathi on how to build openembedded rootfs.
-- Wrote up notes at https://collaborate.linaro.org/display/TCWG/How+to+build+openembedded+rootf…
- More benchmarking setup (TCWG-413, 2/10)
- Various discussions (3/10)
-- 1-on-1 with Venkat (NX setup and GCC reload problem)
-- 1-on-1 with Kugan (benchmarking handover)
-- 1-on-1 with Michael (var-tracking investigation)
-- 1-on-1 with Rob (command-line access to LAVA and job submission)
- Made NX/schroot rootfs (3/10)
-- This can be deployed on Linaro [build] servers and provide standardized development environment for toolchain work.
-- More details to follow.
- Misc
-- Reported a kernel oops related to networking on vexpress64.
- Tyler Baker of the LAVA team deserve a special mention for answering all the questions about LAVA from the toolchain group!
--
Maxim Kuvyrkov
www.linaro.org
== Week of April 21st ==
- Setup SPEC benchmarking runs in LAVA environment (TCWG-413, 5/10).
-- Built SPEC cpu2000/cpu2006 tools for armv7a/armv8
-- Added SPEC CPU2006 support to spec2xxx-utils.
- Various discussions (1/10)
- Short week due to public holidays (4/10)
--
Maxim Kuvyrkov
www.linaro.org
== This week ==
- Investigated infinite loop bug [TCWG-290][6/10]
- Narrowed bug down to data flow analysis of micro operation in
variable tacking pass
- Created bugzilla report
- Still debugging to determine cause of infinite loop
== Next week ==
- Attend ARM Big Picture conference, May 5th-7th
- Resolve infinite loop bug
== Future ==
== Progress ==
* More work on regression test analysis and reporting. (TCWG 448 - 2/10)
* Started adding LAVA support to DejaGnu. (TCWG 455 - 4/10)
* Meetings and Misc (4/10)
- Fixed various bit-rot bugs in the cbuildv2 testsuite.
- Figured out how to add SSH keys to our launchpad account.
== Plan ==
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
== Progress ==
* GDB reverse debugging on aarch64
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401] [1/10]
* Investigated and progressed towards fix for GDB unable to read core files
[TCWG-451] [6/10]
* Public Holiday on 1st May [2/10]
* Miscellaneous [1/10]
-- Meetings
-- UK visa documents attestation
-- LCU14 registration and travel booking
== Plan ==
* GDB unable to read core files [TCWG-451]
-- Fix aarch64 linux regset functions
-- Add support for writing aarch64 regset in aarch64 core file.
* Miscellaneous
-- UK visa application
-- LCU14 finalize bookings.
== Progress ==
* TCWG-447 (5/10)
* Re-spin few versions of the patches and posted after testing based
on reviews.
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01743.html
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01744.html
* TCWG-413 Spec2006 (5/10)
* Updated the scripts to deploy libraries and to run cross spec
benchmarking with them.
* Experimented with open embedded image generation for benchmarking-
still finding some issues even with a trusty chroot.
* Started benchmarking and variance analysis.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* Start with literal pool merging.
Very short week (3 half days)
== Progress ==
* GCC trunk cross-validation (2/10):
- monitored results, and reported some regressions/new fails
- moved away from Jenkins
- as commit rate has decreased, there is no backlog in validations
* Neon-intrinsics test (1/10):
- Continuing conversion for inclusion in the GCC testsuite.
- Preparing an additional Makefile, simpler than the current one,
to help using the testsuite for various GCC variants until
conversion is complete.
== Next ==
* Continue to closely monitor GCC trunk validations
* Neon intrinsics tests
* Off Thursday/Friday
Short week, Labor day (2/10)
== Issues ==
* None
== Progress ==
* Launchpad bugs: (4/10)
o LP #1307197 : gcc-4.9 miscompiles linux kernel zlib for armv3
- This an LRA issue for architectures < armv4 withi movhi
- Investigation ongoing
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- The proposed patch fix the issue
- Still need some validation before upstream submission
* Test new backport workflow and Cbuild2 (2/10)
- Some troubles to access the build farm.
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Two days off
- FSF branch merge + backports