== Issues ==
* None
== Progress ==
* May 1-2: Laybor day holiday
* Commit fcsel support patch for aarch64 @r209889.
* Tuning move-loop-invariants heuristics for -fira-loop-pressure:
- Record register pressure for each invariant other than a max for all.
- Take register pressure into account when selecting the best candidate.
== Plan ==
* Tuning move-loop-invariants heuristics
* Ping pending patches.
== Planned leaves ==
* June 2.
* -fno-sched-interblock
* loop-inv
> Hello,
> I have a problem building gcc-linaro-arm-linux-gnueabihf
> toolchain for my x86_64 system. I download crosstool-ng (v1.13) and
> toolchain source code (4.8-2014.03) from
> http://releases.linaro.org/14.03/components/toolchain/binaries. I use
> the example configuration linaro-arm-linux-gnueabihf (obtained from
> ct-ng list-samples) and modify some entries using menuconfig option,
> like the local tarballs directory (pointing to downloaded toolchains
> source code directory) and the prefix directory (custom directory output).
>
> This is the problem during the execution of "ct-ng build" command:
>
> =================================================================
>
> [INFO ] Installing final compiler
>
> [EXTRA] Configuring final compiler
>
> [EXTRA] Building final compiler
>
> [EXTRA] AFMOYA: EMPIEZA A EJECUTARSE make jobsflags all
>
> [EXTRA] -j5
>
> [EXTRA] /home/afmoya/Descargas/build/.build/arm-linux-gnueabihf/build/build-cc
>
> [ERROR] configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES.
>
> [ERROR] make[2]: *** [configure-zlib] Error 1
>
> [ERROR] make[1]: *** [all] Error 2
>
> [ERROR]
>
> [ERROR] >>
>
> [ERROR] >> Error happened in: main[scripts/crosstool-NG.sh]
>
> [ERROR] >>
>
> [ERROR] >> For more info on this error, look at the file: 'build.log'
>
> [ERROR] >> There is a list of known issues, some with workarounds, in:
>
> [ERROR] >> '/opt/cross-linaro/share/doc/ct-ng-linaro-1.13.1-4.8-2014.03/B - Known issues.txt'
>
> [ERROR]
>
> [ERROR] Build failed in step 'Extracting and patching toolchain components'
>
> [ERROR]
>
> [ERROR] (elapsed: 11:18.57)
>
> make: *** [build] Error 2
>
>
> Highlighted in green some entries added for me in attemp to understand
> the execution secuence.
>
> The error is triggered in the "configure-zlib" target of
> "${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/Makefile". The
> "configure.log" of the
> "${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/zlib/"
> directory shows some errors (I don't know if the are significants):
>
> LINE 83: Thread model: posix
>
> LINE 84: gcc version 4.7.2 (Debian 4.7.2-5)
>
> LINE 85: configure:3234: $? = 0
>
> LINE 86: configure:3223: x86_64-build_unknown-linux-gnu-gcc -V >&5
>
> LINE 87: gcc: error: unrecognized command line option '-V'
>
> LINE 88: gcc: fatal error: no input files
>
> LINE 89: compilation terminated.
>
> LINE 90: configure:3234: $? = 4
>
> LINE 91: configure:3223: x86_64-build_unknown-linux-gnu-gcc -qversion >&5
>
> LINE 92: gcc: error: unrecognized command line option '-qversion'
>
> LINE 93: gcc: fatal error: no input files
>
> LINE 94: compilation terminated.
>
> ...
>
> LINE 188: configure:6661: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 189: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 190: compilation terminated.
>
> ...
>
> LINE 207: configure:6720: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 208: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 209: compilation terminated.
>
> ...
>
> LINE 318: configure:10852: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 319: conftest.c:23:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 320: compilation terminated.
>
> Some idea of what's the problem?
>
> This is my system info:
> Linux afmoya-pc 3.2.0-4-amd64 #1 SMP Debian 3.2.57-3 x86_64 GNU/Linux
>
> and some tools version installed in my system:
> gcc (Debian 4.7.2-5) 4.7.2
> GNU Make 3.81
> GNU Awk 4.0.1
> ...
>
> Best regards:
> Alexis Fajardo Moya.
I have removed the "zlib" folder from "gcc-linaro-4.8-2014.03.tar.xz" tarball, the compiler is also using zlib-1.2.5 statically linked, and thats permit compile the Linaro toolchain.
Best regards
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
-----
"...hay locuras que son la locura
personales locuras de dos...
hay locuras sin nombre
sin fecha sin cura
que no vale la pena curar...
que una de ellas será mi morir."
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
Hello,
I have a problem building gcc-linaro-arm-linux-gnueabihf
toolchain for my x86_64 system. I download crosstool-ng (v1.13) and
toolchain source code (4.8-2014.03) from
http://releases.linaro.org/14.03/components/toolchain/binaries. I use
the example configuration linaro-arm-linux-gnueabihf (obtained from
ct-ng list-samples) and modify some entries using menuconfig option,
like the local tarballs directory (pointing to downloaded toolchains
source code directory) and the prefix directory (custom directory output).
This is the problem during the execution of "ct-ng build" command:
=================================================================
[INFO ] Installing final compiler
[EXTRA] Configuring final compiler
[EXTRA] Building final compiler
[EXTRA] AFMOYA: EMPIEZA A EJECUTARSE make jobsflags all
[EXTRA] -j5
[EXTRA] /home/afmoya/Descargas/build/.build/arm-linux-gnueabihf/build/build-cc
[ERROR] configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES.
[ERROR] make[2]: *** [configure-zlib] Error 1
[ERROR] make[1]: *** [all] Error 2
[ERROR]
[ERROR] >>
[ERROR] >> Error happened in: main[scripts/crosstool-NG.sh]
[ERROR] >>
[ERROR] >> For more info on this error, look at the file: 'build.log'
[ERROR] >> There is a list of known issues, some with workarounds, in:
[ERROR] >> '/opt/cross-linaro/share/doc/ct-ng-linaro-1.13.1-4.8-2014.03/B - Known issues.txt'
[ERROR]
[ERROR] Build failed in step 'Extracting and patching toolchain components'
[ERROR]
[ERROR] (elapsed: 11:18.57)
make: *** [build] Error 2
Highlighted in green some entries added for me in attemp to understand
the execution secuence.
The error is triggered in the "configure-zlib" target of
"${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/Makefile". The
"configure.log" of the
"${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/zlib/"
directory shows some errors (I don't know if the are significants):
LINE 83: Thread model: posix
LINE 84: gcc version 4.7.2 (Debian 4.7.2-5)
LINE 85: configure:3234: $? = 0
LINE 86: configure:3223: x86_64-build_unknown-linux-gnu-gcc -V >&5
LINE 87: gcc: error: unrecognized command line option '-V'
LINE 88: gcc: fatal error: no input files
LINE 89: compilation terminated.
LINE 90: configure:3234: $? = 4
LINE 91: configure:3223: x86_64-build_unknown-linux-gnu-gcc -qversion >&5
LINE 92: gcc: error: unrecognized command line option '-qversion'
LINE 93: gcc: fatal error: no input files
LINE 94: compilation terminated.
...
LINE 188: configure:6661: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 189: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 190: compilation terminated.
...
LINE 207: configure:6720: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 208: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 209: compilation terminated.
...
LINE 318: configure:10852: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 319: conftest.c:23:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 320: compilation terminated.
Some idea of what's the problem?
This is my system info:
Linux afmoya-pc 3.2.0-4-amd64 #1 SMP Debian 3.2.57-3 x86_64 GNU/Linux
and some tools version installed in my system:
gcc (Debian 4.7.2-5) 4.7.2
GNU Make 3.81
GNU Awk 4.0.1
...
Best regards:
Alexis Fajardo Moya.
== Progress ==
* Prototype scripting for macro-benchmarks for malloc (4/10, TCWG-441)
* glibc single thread optimization work (3/10, TCWG-436)
* Built releases of eglibc, gdb and binutils (2/10)
* glibc patch review and followup (1/10)
* Misc admin (expenses, LCU travel)
== Issues ==
* None
== Plan ==
* Various bits of patch followup
* More malloc macro-benchmark work
* See how single thread optimization discussion goes
* glibc benchmark graphing?
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Named Register (CARD-1246 2/10)
- Changing type of intrinsics, rebasing patch
* Build & Benchmark (CARD-716 6/10)
- Adding Clang+LLVM builds to CBuild2
- Re-setting APM's testing environment after replacement
* Background (2/10)
- Code review, etc.
- EuroLLVM 2014 outcome analysis, plans for 2015
== Plan ==
* Get Clang+LLVM in CBuild2
* Get Named registers in, then try Clang's parser
* Try SPEC on APM
hi,
For building arm64 kernel, I tried all toolchain released from
http://releases.linaro.org/latest/components/toolchain/binaries/
But it complained about some instructions bad:
/home/work/linux/arch/arm64/include/asm/irqflags.h: Assembler
messages:
/home/work/linux/arch/arm64/include/asm/irqflags.h:49: Error: no
such instruction: `msr daifset,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:49: Error: no
such instruction: `msr daifset,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:40: Error: no
such instruction: `msr daifclr,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:40: Error: no
such instruction: `msr daifclr,'
Could anyone tell how to solve it? thanks!
== Progress==
TCWG-435 needless busy-wait in lowlevellock.c (3/10)
* Patches ready, testing a bit slow & fiddly
TCWG-156 cortex-strings memset (3/10)
* Worried about noisy benchmarks
* Learned to use Lava
* Found some helpful internal docs
* Managed to tweak the code slightly
== Misc ==
Meetings/mail/etc 2/10
(Public) holiday 2/10
== Plan ==
Stop worrying and follow the general curve of the noisy benchmarks
(But also try to convince Maxim's spec scripts + lava to generate some
less noisy results)
Another public holiday next Monday
== Progress ==
* GDB reverse debugging on aarch64
-- Complete decoding of aarch64 data processing immediate instructions.
[TCWG-399] [1/10]
-- Complete decoding of aarch64 data processing register instructions.
[TCWG-402] [1/10]
-- Completed decoding of aarch64 exception and system instructions.
[TCWG-400] [2/10]
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401] [2/10]
-- Started implementation of aarch64 syscall record/replay. [TCWG-409]
[2/10]
* Sick Day Off on Monday [2/10]
== Plan ==
* GDB reverse debugging on aarch64
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401]
-- Further progress on aarch64 syscall record/replay. [TCWG-409]
* Public Holiday on 1st May.
Short week, Easter Monday + child care (3/10)
== Issues ==
* Toolchain64 disk still full every 2 days
== Progress ==
* Linaro GCC 4.9 2014.04 release (3/10)
- Branch merge with FSF 4.9.1
- Release tarball available on releases.linaro.org
- Announcement will follow
* Launchpad bugs: (2/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- Discussed and implemented a fix
- Validation on-going
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
o Resolved cards :
- TCWG-343. Make LRA the default for the ARM backend
- TCWG-422. LP-bug 1296676 : ICE in assign_by_spills building linux
btrfs module
== Next ==
- One day off (Labor day)
- Submit patch for LP #1169164
- TCWG-345. Analyse performance of LRA for ARM
== Progress ==
PGO - AArch64 (TCWG-179) (4/10)
* Completed SPEC2006 runs ( -O3 + PGO) in chroot + qemu-arm64-saucy
with Linaro branch(4.9).
* Perlbench train run failed, issue with qemu.
* DealII train runs failed due to system libstdc++.so.6 not compatible
with GCC 4.9.
Changing the LD_LIBRARY_PATH to point to the libstdc++.so.6 that
gets built along with GCC 4.9 solves the problem.
* CPU2000 runs are completed my maxim so functional testing of PGO for
spec benchmarks completed.
* Wating on Arm64 hardware to benchmark SPEC2000 and SPEC2006 and
compare against the PGO runs for x86.
Misc (2/10)
* Setup arm64-trusty chroot and built GCC 4.9 compiler
* Maxim 1-1 discussions and set up opennx client
* Checked libssp patch upstream status
* Read about gcc debug counters.
* Upgrade laptop to Ubuntu 14.04 LTS
Short week (22nd and 23rd leave (4/10))
== Plan ==
* Bug fixing.
== Issues==
* Waiting on hardware to Benchmark SPEC2006 PGO runs in hardware.
== Issue ==
* None
== Progress ==
* More tests on shrink-wrap changes (TCWG-133, 6/10).
- Cortex-m3 tests exposes a data flow issue: New BB created after
dfinit does not have correct df_lr info.
- Collect Spec2k benchmarks on X86-64 and ARM.
* Linaro 4.9 binaries release (2/10).
- Update Linaro crosstool-ng config and samples to support 4.9.
- Disable parallel build for gcc manual (pdf & html).
- Prebuild binaries for aarch64:
http://cbuild.validation.linaro.org/binaries/4.9-prerelease-2014.04
* Ping aarch64 fcel patch. But still no comments.
* Fix a trunk build fail issue @r209556.
* One day off (2/10).
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
* Investigate move-loop-invariants heuristics.
== Planed leaves ==
* May 1-3: Labour day holiday.
== Progress ==
* Got Jenkins working with matrix builds so we can utilize all LAVA
slaves. (TCWG 1387 - 3/10)
* Write script to take a list of revisions and then build and test
them all and diff the results. (TCWG 448 - 4/10)
* More experimenting with Kugan's benchmarking branch. (1/10)
* Meetings and Misc (2/10)
== Plan ==
* More work on matrix builds. (TCWG 1387)
* More work on regression test analysis and reporting. (TCWG 448)
== Progress ==
* Short week (21st and 25th are public holidays) (4/10)
* TCWG-447 (5/10)
* Implemented and tested fenv target hooks, necessary built-ins and md
patterns
* Posted RFC patches for review for both arm and aarch64
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01743.html
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01744.html
* TCWG-413 Spec2006 (1/10)
* Finished the set-up
* On hold for now
== Plan ==
* upstream zero/sign extension elimination activities
* start with literal pool merging
== Progress ==
* Holidays (3 days)
- Clearing emails/tasks backlog
- Some post-trip illness
* AArch64 vs. ARM64
- Comparing performance of both back-ends
* Named Register
- Re-implementing after code review
- http://reviews.llvm.org/D3261
* Time
- CARD-1246 4/10
- Others 6/10
== Plan ==
* Finish named register in LLVM, check Clang
* Continue testing and benchmarking ARM64 back-end
* Have a try at CBuildv2
== Progress ==
* Back to work part-time (50%) for the next 3 weeks
* Easter Monday (1/5)
* (No Jira card - 2/5)
Analyzed at GCC trunk validations and reported some regressions.
The current commit rate is very high since stage1, and our compute
farm isn't fast enough. Should be OK after the week-end.
Modified my scripts so that I move these validations out of Jenkins.
* (No Jira card - 2/5)
Continued converting Neon intrinsics tests for inclusion in GCC testsuite.
To make the review easier, I now believe that it would be better that
I convert most of the testsuite first, and rework the patches order.
* Meetings and conf calls(1/5)
== Next ==
* Continue to closely monitor GCC trunk validations
* Neon intrinsics tests
* Off Thursday/Friday next week
=== Previous ===
libvpx NEON intrinsics investigation [TCWG-429 14/10]
. if interested, you can read the report in card 429:
https://cards.linaro.org/browse/TCWG-429?focusedCommentId=22247
tested division optimisation patches against current trunk and pinged
on list [2/10]
good friday bank holiday [2/10]
=== Next ===
Resume looking at NEON scheduling TCWG-135, which ties into libvpx
Upgrade laptop to Ubuntu 14.04 LTS
== Progress ==
* GDB reverse debugging on aarch64
-- Scored through a64 instruction set details. [1/10]
-- Completed testing and implementation of all basic structures.
[TCWG-398] [1/10]
-- Started decoding aarch64 load store instructions for recording.
[TCWG-401] [2/10]
-- Completed decoding of aarch64 branch instructions. [TCWG-400] [2/10]
-- Scored through a32 instruction set and researched on a32 recording.
[2/10]
* Miscellaneous [2/10]
-- UK visa application process
-- Tools cauldron and TCWG sprint bookings etc.
-- Meetings
== Plan ==
* GDB reverse debugging on aarch64
-- Complete decoding of aarch64 load store instructions. [TCWG-401]
-- Completed decoding of aarch64 exception and system instructions.
[TCWG-400]
== Progress ==
PGO - AArch64 (TCWG-179) (4/10)
* Completed SPEC runs -O3 -mcpu=cortex-a57 in chroot + qemu
arm64-saucy with Linaro release source (4.8) march 2014.
* Built Linaro 4.9 GCC branch based tool chain under chroot + qemu arm64-saucy
* Created a PGO config file for aarch64 as a peak configure and use --tune=peak
SPEC gave warning that FDO cannot be used as base flags and will
ignore the flags.
Also setting basepeak = yes gave issues and ran base runs and
setting it to no does both base and peak runs
* Started SPEC2006 runs for PGO under chroot + qemu arm64-saucy
* Perlbench train run failed in qemu.
* Other benchmarks are progressing.
GLIBC Systemtap (2/10)
* Ran glibc make check under qemu. Seen some illegal instructions and
ntpl tests hung in qemu aarch64. Will has completed these tests in
hardware.
Misc (2/10)
* Tested cbuildv2 to build gcc natively under qemu-arm64-chroot-ubuntu-saucy.
git gave issues not able to clone and hangs when downloading
binutils and gdb repos.
* 17th was Public Holiday (2/10)
== Plan ==
* Go through the results for SPEC2006 PGO runs.
* Start functional PGO runs for SPEC2000
* Bug fixing.
== Issues ==
* Toolchain64 disk full
== Progress ==
* Linaro GCC 4.9 2014.04 (3/10)
- Created FSF Linaro 4.9 branch
- Testing FSF 4.9.0 RC
* Launchpad bugs: (3/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- Two possible ways to fix the issue (to be discussed with maintainers)
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Easter Monday off
- Continue on LP #1169164
- Linaro GCC 4.9 release (when FSF release will be made)
== Week of April 14th ==
- Benchmarked autoprefetcher patches. (TCWG-388, 2/10)
- Continued working on spec2xxx-utils scripts. These are now gaining support for AArch64 and SPEC2006. (TCWG-238, 4/10)
- Various discussions. (2/10)
- Short week due to Good Friday / Easter. (2/10)
== Week of April 21st ==
- Take Tyler B.'s LAVA test definition for SPEC benchmarking and adjust spec2xxx-utils scripts to match LAVA environment.
- Investigate regressions on gap, eon and wupwise from autoprefetcher patches.
-- SPEC2000's gap in particular is sensitive to 1st scheduling pass with register pressure, and, apparently has a 5% performance improvement potential (at -O2 Cortex-A15).
- Various discussions.
- Even shorter week due to Easter Monday and ANZAC Day on Friday. (4/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* TCWG-238 (4/10)
- Created scripts and spectools for spec2006 to work with cbuild2
* TCWG-413 Spec2006 (4/10)
- Worked out Spec2006 config and src.alt for v1.1 src we have to work
correctly
- Got it to work natively with Maxim's scripts
- Did a trail run in apm openembedded; Needs ccrypt, tar with xz
compression support and system binutils with -mabi=ilp64 support
* 18th is Public Holiday (2/10)
== Plan ==
Benchmarking and FENV support
== Progress ==
* Attempted to get qemu-aarch64 working, fails on saucy, works on
precise. Did native build, hung during 'make check'. Setup
qemu-aarch64 chroot on all TCWG x86_64 build farm
machines. (4/10)
* Tracked down problem that's kept TCWG Jenkins from
working. (1/10)
* Tried Kugan's benchmarking branch of cbuildv2. (1/10)
* More work on Neon intrinsics tests. (TCWG-322 - 1/10)
* Meetings and Misc (3/10)
- Worked on benchmarking doc with Ryan.
== Plan ==
* Get Jenkins working with matrix builds so we can utilize all LAVA
slaves.
* More experimenting with Kugan's benchmarking branch.
== Issue ==
* None.
== Progress ==
* multilib can not work with multiarch anymore, so change Linaro
crosstool-ng to make 2014.04 release (2/10).
- For 4.8 release, we will revert the change and keep it align with
previous releases.
* Linaro 4.9 toolchain binaries pre-releases (Cross & native) for
aarch64 (2/10):
http://cbuild.validation.linaro.org/binaries/4.9-prerelease-2014.04.
* Try to set up native spec2006 tests on Chromebook. But got "out of
memory" when building the tools (1/10).
* Clean up and test for shrink-wrap enhancement (TCWG-133: 2/10)
* Rebase the aarch64 fcsel patch and testing. (1/10)
* ARM internal work (2/10)
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
== Planed leaves ==
* April 21: Team event.
* May 1-3: Labour day holiday.
== This week ==
- Resolved Launchpad bug 1305042 as user error and provided proper asm
coding [TCWG-290] [2/10]
- Investigated infinite loop bug [TCWG-290][6/10]
- Determined the infinite loop is occurring in function
vt_find_locations in the variable tracking pass
- Still debugging to determine cause of infinite loop
- Absent due to illness on April 14th
== Next week ==
Vacation
== Future ==
Getting the following cross compiling for RPi on Debian Wheezy x64 using
the gcc-linaro-arm-linux-gnueabihf-raspbian toolchain within Eclipse
Kepler. Compilation works fine using native Debian x64 GCC and native
GCC compiler on the RPi.
out of dynamic memory in yy_create_buffer()
collect2: error: ld returned 2 exit status
make: * [cwebsocket] Error 1
I'm stumped. Can't find much info on the issue. Any ideas?
== Progress ==
* One bank holiday, half day childcare (3/10)
* Submit two iterations of malloc microbenchmark for glibc (4/10, TCWG-160)
* Submitted a patch for aarch64 ld bug with SystemTap notes (1/10)
* Investigated strcmp implementations for ARM (1/10, TCWG-153)
* Patch review, bugs, support, etc. (1/10)
== Issues ==
* None
== Plan ==
* malloc benchmarking/implementation work
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
TCWG-156 cortex-strings memset (3/10)
* Got a full set of benchmarks (for my 2 targets)
* Cleaned up code
* Sped up small memsets (for A9, A15 results pending)
glibc performance bug in lowlevellock.c (1/10 - I'll make a card next week)
* Learned to build and test glibc
* Understood the bug and worked out how to fix
Misc
* Meetings/mail (1/10)
* Infrastructure/workflow fiddling (1/10)
* 2 days holiday
== Plan ==
More TCWG-156
Finish off glibc performance bug
Public holidays Friday & Monday
== Week of April 7th ==
- Made a how-to wiki page/script on how to use QEMU and schroot for system emulation (TCWG-179, 2/10).
-- This allows you to get armhf or armel or aarch64 Ubuntu or Debian system within minutes, e.g., for PGO or LTO bootstraps of GCC.
-- https://collaborate.linaro.org/display/TCWG/ARM+ubuntu+chroot+with+QEMU+use…
-- I can move this page into public wiki if get enough interest from non-Linaro people.
- Fixed various bugs in instruction scheduling patch set (TCWG-388, 5/10).
- Scripted running SPEC2000 for reproducible benchmarking (TCWG-238, 3/10).
-- The scripts are now at http://git.linaro.org/toolchain/spec2xxx-utils.git
-- Scripts support both local (native) and remote (cross) benchmarking.
== Week of April 14th ==
- Document spec2xxx-utils scripts and see how they fare in LAVA environment. Add support for SPEC2006. (TCWG-238)
- Post autoprefetcher patch set upstream (TCWG-388)
--
Maxim Kuvyrkov
www.linaro.org
== Week of March 31st ==
- Investigated and scripted how to reproducibly run benchmarks (TCWG-238, 7/10)
-- Stop all services on target board
-- Use local disk
-- Stop networking
-- Bind benchmark to a specific CPU. Bind all other processes to a different CPU.
-- Disable frequency scaling.
- Various discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
PGO - AArch64 (TCWG-179) (4/10)
* Installed QEMU user static for aarch64 and use them from
chroot environment in ubuntiu 13.10
* Tried installing chroot + qemu arm64-saucy in another ubuntu 12.04
machine. Issue with binfmts. looks to be corrupted.
* Bootstrap GCC with PGO with --enable-languages=c,c++,fortran
completed under arm64-chroot.
* Built GCC and binutils in native mode under chroot + qemu arm64-saucy .
* SPEC runs -O3 -mcpu=cortex-a57 in chroot + qemu arm64-saucy with
linaro release source (4.8).
Calculix did not finish under chroot + qemu arm64-saucy
GLIBC Systemtap (4/10)
* Built systemtap under chroot + qemu arm64-saucy. Built glibc with
the patch and used --enable-systemtap.
* Able to see setjmp probe in gdb, but longjmp probes not loading.
Tried debugging in gdb. gdb debugging support not available yet under
qemu.
* Discussed with Will newton on my observation.
Bug fix (1/10)
* Not much progress continued looking at reload dumps.
Misc (1/10)
* Tested cbuildv2 to build gcc natively under qemu-arm64-chroot-ubuntu-saucy.
cbuildv2 reports configure error for gcc and g++multilibs. But they
are not needed for native builds. Sent note to Rob for fixing it.
* Attend 1-1 with Ryan
* Attend 1-1 with Maxim discuss PGO work.
== Plan ==
PGO runs for SPEC2006 on chroot + qemu arm64-saucy
Upstream /testing for systemtap probes in glibc
Reload bug fix.
Leave: 17-Apr local state election.
== Progress ==
* GDB reverse debugging on aarch64 [6/10] [TCWG-398]
-- Setup development tree and debug environment.
-- Verified generic reverse debugging implementation aarch64.
-- Implemented main function stubs to catch instruction for decoding
and recording.
* Work on gdb testing utility [TCWG-96] [1/10]
-- Some tweaks to scripts and wiki updates.
* Experimented gdb testing/debugging with Aarch64 QEMU + Chroot [3/10]
== Plan ==
* GDB reverse debugging on aarch64 [TCWG-398]
-- Implement main instruction decoding handler and write function
stubs for different types of instructions.
-- Dig deeper into aarch32 for handling it through armv7
implementation if possible.
== Progress ==
TCWG-156 cortex-strings memset (5/10)
* Fixed a couple of bugs in the no-VFP case
* Ran benchmarks, discarded broken benchmarks, ran more benchmarks
* Explored benchmarking scripts
* Took a hard look at the memset tests
* Experimented with ARM-internal cortex-strings benchmark (not useful right now)
Misc
* Meetings (1/10)
* Kicked an A15 target until it worked (1/10)
* 1/2 day holiday
== Plan ==
More TCWG-156
Maxim's glibc starter issue
Holiday Tuesday
Public Holidays Friday & next Monday
1 day off (Child care)
== Issues ==
* Toolchain64 disk full
== Progress ==
* Released Linaro GCC 4.7 and 4.8 2014.04 (5/10)
* Launchpad bugs: (1/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- rebased and rework patch
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Continue on LP #1169164
- Linaro GCC 4.9 release
== Issue ==
* None
== Progress ==
* 2 day off.
* Investigate lp:1304267 and close it as invalid.
* Investigate shrink-wrap bootstrap issues [4/10, TCWG-133]
- Re-implement the copy propagate part by referring cprop_hardreg pass.
- Other tests are ongoing.
* Document cross-native build on wiki:
https://wiki.linaro.org/WorkingGroups/ToolChain/cross-native
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
== Planed leaves ==
* April 21: Team event.
* May 1-3: Labour day holiday.
== Progress ==
* TCWG-413 Spec2006 (6/10)
- Setup chroot for aarch64
- Created rootfs with 4.8/trunk and spec2006
- booted created rootfs on foundation model with ubuntu kernel
* TCWG-291 CRC (3/10)
- posted vrp patch upstream
- with that seeing expected performance improvement
- analysing crc complete and up-streaming activities pending
* LP1301335 and PR59695 back-porting (1/10)
== Plan ==
Benchmarking and FENV support
Dear Sir,
Thanks for you page. it is really very helpful to us.
We are facing a problem during compiling GCC for our ARMv7-a Cortex-a9.
We are using following option:
1.
../gcc-linaro*/configure --disable-bootstrap --enable-languages=c,c++
--with-mode=thumb --with-arch=armv7-a --with-tune=cortex-a9
--with-float=hard --with-fpu=vpfv3-d16 --prefix=$home/gcc/gcc-linaro
2.
make -j`getconf _NPROCESSORS_ONLN`
after 2 step we are getting following error:
checking whether putc_unlocked is declared... yes
checking whether getrlimit is declared... yes
checking whether setrlimit is declared... yes
checking whether getrusage is declared... yes
checking whether ldgetname is declared... no
checking whether times is declared... yes
checking whether sigaltstack is declared... yes
checking whether madvise is declared... yes
checking for struct tms... yes
checking for clock_t... yes
checking for F_SETLKW... yes
checking if mkdir takes one argument... no
Unknown CPU given in --with-arch=armv7-a.
make[1]: *** [configure-gcc] Error 1
make[1]: Leaving directory `/home/anwej/src/build'
make: *** [all] Error 2
Please suggest the solution. where is the problem and what will be our next
steps.
Thanks in advance.
-best regards
Anwej Alam
Ph: +91.995.833.3456
Hi,
The preprocessed file:
http://people.linaro.org/~rikuvoipio/qmltextgenerator.ii.gz
With compile command line:
g++ -save-temps -c -g -O2 -fstack-protector --param=ssp-buffer-size=4
-Wformat -Werror=format-security -D_FORTIFY_SOURCE=2 -fvisibility=hidden
-fvisibility-inlines-hidden -Wall -W -D_REENTRANT -fPIC -o x.o
qmltextgenerator.ii
Will take apparently forever (north of 1600min) on a debian native gcc. -O
compiles instantly. Some bisecting for gcc optimization flags later,
disabling strict aliasing allows instant build as well:
g++ -save-temps -c -g -O2 -fno-strict-aliasing -fstack-protector
--param=ssp-buffer-size=4 -Wformat -Werror=format-security
-D_FORTIFY_SOURCE=2 -fvisibility=hidden -fvisibility-inlines-hidden -Wall
-W -D_REENTRANT -fPIC -o x.o qmltextgenerator.ii
Happens with:
gcc version 4.8.2 (Debian 4.8.2-19)
and
gcc version 4.9.0 20140405 (experimental) [trunk revision 209146] (Debian
20140405-1)
Linaro binary cross-compilers are compile the file fine with -O2.
do we do native gcc testing, or should it be just submitted upstream
bugzilla?
Riku
The Linaro Toolchain Working Group is pleased to announce the 2014.04
release of both Linaro GCC 4.8 and Linaro GCC 4.7.
As announced at Linaro Connect USA 2013 Linaro GCC moved to a pattern of
quarterly stable releases, with engineering releases in the intervening
months. This is the second stable release, and contains no known regressions
compared to the 2014.01 release.
The next stable release of GCC 4.8 will be the 2014.08 release. There will be
no engineering releases of GCC 4.8 until this release, as it enters in
maintenance.
No more releases of GCC 4.7 are planned.
Next month's release - 2014.05 - will be based off GCC 4.9 and be an
engineering build.
Linaro GCC 4.8 2014.04 is the thirteenth and last development release in the
4.8 series before entering maintenance. Based off the latest GCC 4.8.3+svn208968
release, it includes performance improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.3+svn208968
* Cortex-a53 support
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1268893: ICE when building kernel raid6 neon code
* A fix for LP #1273511: ICE APCS Frame & optimize-sibling-calls
Linaro GCC 4.7 2014.04 is the twenty third release in the 4.7 series. Based
off the latest GCC 4.7.4+svn209005 release, this is the tenth release after
entering maintenance and the final one.
Interesting changes include:
* Updates to GCC 4.7.4+svn209005
* A fix for LP #1129013: Internal compiler error in push_reload during
bootstrap stage 2
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1301335: Compiler segmentation fault while cross-compiling QT5
Webkit
The source tarball is available from:
http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.8http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.7
Downloads are available from the Linaro Releases website:
http://www.linaro.org/downloads/
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.8/4.8-2014.04https://launchpad.net/gcc-linaro/4.7/4.7-2014.04
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
I compiled my code with debug symbols on an BeagleBoneBlack using Debian
gcc-4.7. If I use objdump -S on my object file, I see both source lines
and disassembly. On my Ubuntu 13.10 host, using
gcc-linaro-arm-linux-gnueabihf-4.7-2013.04-20130415_linux, I do
arm-linux-gnueabihf-objdump -S on the same object file, I see disassembly
lines, but the source lines are not displayed. I¹m attempting to debug my
code with a Lauterbach JTAG debugger, but no source code is available
which makes debugging very difficult.
Is there some compatibility issue here or am I doing something wrong?
Regards,
John
== Progress ==
* Work on gdb testing utility [TCWG-96] [8/10]
-- Support to run native and native-gdbserver test via ssh on remote
machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
* Chromebook ubuntu re-install and fix network lag issue [2/10]
== Plan ==
* GDB reverse debugging on aarch64
-- Start implementation of reverse debugging infrastructure [TCWG-398]
-- Add support for running aarch64 gdb test suite in gdb testing utility.
== This week ==
a53 support [CARD-300][3/10]
- aarch64-none-elf target using cpu=cortex-a53 passed validation on
foundation model
- Resolved code review issues (formatting and unnecessary patches)
Backport 202663 - vectorizer bug passed validation and merge review for
4.7 and 4.8 [CARD-300][3/10]
GCC Bugzilla bug 60657 [TCWG-290][2/10]
- began fix by adding new conditions to pattern causing crash
- bug was fixed upstream by Jeffrey Law on April 4th
== Next week ==
- Transition from backports to bug fixing
- Create Wiki page for Aarch64 bug contingency bug fixes, feature and
performance improvements for partners
== Future ==
One week of vacation either the third or fourth week of April.
=== Progress ===
LP1296601 (ICE in push_minipool_fix) [5/10]
* completed a prototype fix
* submitted RFC patch to gcc-patches
* still awaiting review
PR60609 (Error: value of 256 too large for field of 1 bytes) [3/10]
* implemented fix and posted to gcc-patches
* approved, subject to further testing on Thumb-1
libvpx NEON assembler vs instrinsics performance investigation [2/10]
* looking at disassembly, code is not terribly aesthetically pleasing
* in some cases clang looks better
=== Plan ===
write up libvpx investigation
follow up/ping LP1296601
NEON scheduling TCWG-135
TCWG-156 (5/10)
* Hacked v7 memcpy into a memset
* Much fiddling with builds, targets
* Kicked off a benchmark run
Misc
* Meetings (1/10)
* Finding hardware/setting up working environments/figuring out workflows
(4/10)
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- New failure after first fix reported.
- reduced new testcase.
- Fix committed by Vladimir as rev209038
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- analysed validation results.
- re-spawned some jobs.
* Backports review: (5/10)
o cortex-a53 support backport:
- We are still not able to validate it on aarch64-linux-gnu target
with a compiler configured to default to cortex-a53, but no regressions
observed in the generic case and on bare_metal (with cortex-a53).
* Misc:
o Cbuildv1 baby-sitting (2/10)
- Toolchain64 disk was full.
o Various meetings (1/10).
== Next ==
- Mainly 4.7 and 4.8 April releases
- TCWG-413 Spec2006 (5/10)
- Analysed 456.hmmer
- In the process of opening performance bug reports
- Started looking at 453.povray
- TCWG-291 CRC (2/10)
- Not seeing performance improvement with redundant "and" instruction gone
- Analysing with perf to see the reason
- LP1301335 (3/10)
- SLP vectorizer ICEs for QT5 Webkit for Linaro 4.7
- Doesn’t occur in trunk/4.8/4.7 FSF
- Patch proposed for merge request which fixes
- I also see some FAIL -> PASS in the regression with this patch
- This patch is only relevant for Linaro 4.7 so we cant/don’t need to
upstream it (?)
== Plan ==
Continue with Spec2006 and crc
4 day week 31-Oct local holiday
Bug fix (2/10)
* Looking at a register allocation issue with ARMv7 hard float issue. (3/10)
Tried changing machine description pattern same as trunk in gcc 4.8 branch.
Issue does not occur with trunk and reason is arm64 moved to lra.
turning off lra bug occurs.
Trying to find out if it is easy to fix in reload or wait for LRA backport.
PGO - AArch64 (TCWG-179) (3/10)
* Native CPU2006 runs on V8 foundation model.
SPEC runs -O3 -mcpu=cortex-a57. INT benchmark failures seen with mcf
and h264ref.
rest benchmarks running.
* Tried to use ubuntu saucy core image on V8 foundation model and
mount NFS is failing.
* Trying to install QEMU user static for aarch64 and use them from
chroot environment
GLIBC Systemtap (2/10)
* Re spined libc systemtap probe patch to glibc. Will newton is
testing it in hardware.
Meetings (2/10)
* Attend 1-1 with Ryan discuss 2014 goal planning.
* Attend 1-1 with Maxim discuss PGO work.
== Progress ==
* Kernel (TCWG-417)
- Implementing named register global variables (D3261)
- Helping Milosz and Vinicius (LLVMLinux) to get a kernel ready
- First LLVM-compiled kernel booted on Versatile Express hardware
* Background
- Reviewing patches, etc.
- Apple merged their ARM64 back-end, fiddling bots
- Making the new TableGen docs official
- Jira farming
- Became code owner for the ARM Linux support
- LLVM Foundation announced
- Trying to run SPEC on AArch64
* Time
- CARD-124 6/10
- Others 4/10
== Plan ==
* Holiday for two and a half weeks
* Follow up the named register patch
== Progress ==
* glibc patch review (2/10)
* Helping out with aarch64 glibc setjmp/longjmp Systemtap probes testing (1/10)
* Investigated and submitted patch for gas ARM alignment issue (3/10)
* Committed library and script for malloc logging (1/10, TCWG-423)
* Rebased and tidied up malloc microbenchmark (2/10, TCWG-160)
* Various small binutils and glibc patches (1/10)
== Issues ==
* None
== Plan ==
* Submit patch for glibc malloc microbenchmark
--
Will Newton
Toolchain Working Group, Linaro
Hi all,
I've just filed a bug on glibc I'd love you to take a look at:
https://sourceware.org/bugzilla/show_bug.cgi?id=16796
Here's the description to save clicking:
Hi,
There is a test in glibc (tst-tls5) that tests that
((uintptr_t)pthread_self())%16 is zero. But watch this:
(t-mwhudson)mwhudson@am1:~$ cat btp.c
#include <stdint.h>
#include <stdio.h>
#include <pthread.h>
int
main(int argc, char** argv)
{
uintptr_t p = (uintptr_t)__builtin_thread_pointer();
uintptr_t q = (uintptr_t)pthread_self();
printf("p: %lx %ld\n", p, p%16);
printf("q: %lx %ld\n", q, q%16);
}
(t-mwhudson)mwhudson@am1:~$ gcc -o btp btp.c -lpthread
(t-mwhudson)mwhudson@am1:~$ ulimit -s unlimited
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 2000028d88 8
q: 2000028698 8
(t-mwhudson)mwhudson@am1:~$ ulimit -S -s 8192
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 7f7fd086f0 0
q: 7f7fd08000 0
So something is clearly wrong; maybe it's just that the test is too
strict, but somehow that seems a bit unlikely. FWIW, this doesn't
happen if you don't link with libpthread so maaaaybe it's a bug in
something that ends up in libpthread's .init section?
Cheers,
mwh
== Week of March 24th ==
- STREAM regression (TCWG-388, 5/10)
-- Finished prototype patch. The patch adds modeling of ARM L2 auto-prefetcher hardware to GCC scheduler (the model is very simple as auto-prefetcher is very lightly documented). Half of the patch cleans up and improves GCC scheduler, and the other half implements the auto-prefetcher model.
-- While looking into ARM scheduling support noticed that ARM doesn't use multipass lookahead scheduling, which surprised me. Enabled it (multipass scheduling) in my patches.
- Looked into lll_timed_wait Glibc/uClibc bug upstream (1/10)
-- https://sourceware.org/ml/libc-alpha/2014-03/msg00905.html
- Various discussions and reviews (4/10)
== Week of March 30th ==
- STREAM regression (TCWG-388)
-- Benchmark patches on SPEC2k and find/confirm best values for tuning parameters:
--- dfa_lookahead: should normally be issue_rate-1.
--- L2 auto-prefetcher queue depth: new tuning knob.
-- Investigate any performance regressions from the patches.
- lll_timed_wait Glibc/uClibc bug
-- Make sure it is fixed upstream. Possibly backport to Linaro branches.
--
Maxim Kuvyrkov
www.linaro.org
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- created blueprint for :
https://bugs.launchpad.net/gcc-linaro/+bug/1296676
- Reported upstream as :
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60650
- Reduced testcase
- Fix committed by Vladimir as rev208876
- still ICE when configured for arm-none-linux-gnueabihf
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- https://bugs.launchpad.net/gcc-linaro/+bug/1129013
- some testsuite regressions observed. will investigate.
* Backports review: (5/10)
o reviewed backport for pr60264 and rev202663
o cortex-a53 support backport:
- Analysed testsuite regression
- 22K Loc patch under review
* LRA on AArch32:
o TCWG-345 : Analyse performance of LRA for ARM. (1/10)
- looked at the perf tool results
* Misc:
o Various meetings (1/10).
o Various support to team members (1/10)
o Cbuildv1 baby-sitting (Calxedas nodes have to be restarted after
each upgrades !)
== Next ==
- continue cortex-a53 review
- continue on backports.
- continue on TCWG-345.
== Progress ==
* Short Week
-- Monday Day Off: Pakistan Day 23rd March public holiday roll over. [2/10]
-- Short leave on Thursday [1/10]
* Work on gdb testing utility [TCWG-96] [7/10]
-- Writing a new gdb testing utility script that automates gdb
testing in various configurations and compares testsuite results.
-- Support for all kind of native, native-gdbserver and
remote-gdbserver gdb configurations has been added.
-- Interactive and configuration file based user input mode has been added.
-- Testing configurations host alive, ssh possible, board file found
and ability to build sources using user defined configure flags has
been added.
== Plan ==
* Work on gdb testing utility [TCWG-96].
-- Add support to run native and native-gdbserver test via ssh on
remote machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
== This week ==
a53 support
- Fixed regression found in arm testing and resubmitted build and
merge requests
- arrch64 testing passed with no regressions. Testing with a53
support enabled still required
Merged 202663 (vectorizer bug) into 4.7 and 4.8 branches. Submitted
merge and build requests
== Next week ==
- Test aarch64 with a53 support enabled on qemu64
- Work on bug 60657 - [4.9 Regresssion] ICE: error: insn does not
satisfy its constraints
== Future ==
== Issues ==
* None
== Progress ==
* Create prebuilt sysroot based on Linaro eglibc 2014.04 release
(https://launchpad.net/linaro-toolchain-binaries/support/01/+download/linaro…)
(1/10).
* Enable shrink-wrap for apcs. Patch was out for community review. (1/10)
* Reinvestigate shrink-wrap enhancement (4/10, TCWG-133)
- There was improvement in ira to split_live_ranges_for_shrink_wrap
(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10474). But it still can
not handle the case in 453.povray.
- Investigate to do a simple copy-forward when prepare_shrink_wrap.
* Investigate lp:1296942 (pr60663). Patch is sent out for community
review. (4/10)
* Backporting the fix for pr60264 to Linaro 4..8.
== Plans ==
* Continue on shrink-wrap enhancement.
== Planned leaves ==
* April 7: Qingming holiday.
== Progress ==
- TCWG-413 Spec2006 (7/10)
- Investigated compiler error for 481.wrf with FSF 4.8.2. Issue is
due to aarch64_cm<cmp><mode> pattern (fcmle and fcmlt supports only #0
as third val). This is already fixed in trunk and Linaro 4.8.
- Ran profiling to analyse 4.9 regressions. Started looking into
P7Vitterbui which is one of the functions that performs badly.
- TCWG-291 CRC (3/10)
Came up with a patch for improving vrp for test-case. Some c++ test
cases are failing in regression testing with this patch. Looking into it.
- TCWG-394 / PR60034
Patch committed and card closed.
http://gcc.gnu.org/viewcvs?rev=208949&root=gcc&view=rev
== Plan ==
Continue with Spec2006 and crc
== Progress ==
* Android (no card, 10 minutes. ;)
- Implemented __builtin___clear_cache in Clang
* Kernel (TCWG-417) 6/10
- VLAIS in crypto (last place in kernel)
- __builtin__stack_pointer (new builtin)
- Discussion in GCC list, named registers might be a better option
- Discussion in LLVM list about implementing named registers
- Implementing named register variables...
- Planning on LAVA testing LLVM kernels with LLVMLinux
- __aeabi_memset/cpy/move (both Android and Kernel) will have to be fixed
* Libraries (TCWG-125) 2/10
- libc++abi's unwind routines assume (ARM == SjLj)
- libc++ doesn't work without them
- We'll need to teach it about EHABI (later)
* Background 2/10
- Installed ArchLinux on my laptop, took some time to setup
- Re-org of LLVM Jira Cards (TCWG-417)
- Reviewing some GSoC proposals
== Plan ==
* implement named register variables in LLVM, then Clang
* Continue helping LLVMLinux and Milosz to test the LLVM kernel
* Time allowing, check CBuild2 for an LLVM build
* Two long weeks of holidays...
== Progress ==
* Bugfix aarch64 setcontext patch (2/10, TCWG-410)
* malloc requirements wiki page (2/10, TCWG-414)
* Lots of creating and updating and updating JIRA cards (1/10)
* glibc patch review (1/10)
* Assorted small patches - ld relasz, gnulib obstack, glibc strtod
benchmark (2/10)
* Investigate a couple of issues raised by member services and on lists (2/10)
== Issues ==
* None
== Plan ==
* Resurrect glibc malloc benchtest
* More glibc benchmark infrastructure work
* Check status of glibc ARM port build warnings
--
Will Newton
Toolchain Working Group, Linaro
== Week of March 17th ==
- STREAM regression (TCWG-388, 4/10)
-- Investigated how to prioritize memory references instructions in GCC scheduler to take full advantage of L2 autopretch hardware in certain ARM cores.
-- Fixed -fdbg-cnt=sched_insn debug counter along the way. It appear to have been broken since GCC 4.7.
- Discussed reg_pressure instruction scheduling with Charlie. (TCWG-135, 1/10)
- Various discussions about instruction scheduling in GCC. (1/10)
- Together with Michael prepared patch list for GCC contingency plan. (3/10)
- Made first-in-series video about tips-and-trick of GCC development. Your critiques are welcome!
-- Using GCC debug counters (7m34s): https://www.youtube.com/watch?v=IWRYCOkgL04
== Week of March 24th ==
- STREAM regression (TCWG-388)
-- Get a prototype patch.
- Other expected and unexpected tasks that come up.
--
Maxim Kuvyrkov
www.linaro.org
Last week
* one day off [2/10]
* NEON scheduling investigation - TCWG-135 [3/10]
. investigated scheduler register pressure heuristics
. call with Maxim about scheduling algorithm
. still more investigation required
* NEON intrinsics vs assembler libvpx performance difference
investigation [5/10]
. GCC seems to generate poor code for address generation in NEON loads/stores
. maybe some improvements to the intrinsics code would also be possible
Plan:
. write down some conclusions about libvpx performance
. investigate PR60609
. more on TCWG-135
. investigate LP1296676 & LP1296601 ICEs when building the kernel
== Progress ==
Machine descriptions for stack smashing in Aarch64 - TCWG-23 (5/10)
* Completed building QEMU for Aarch64 on Ubuntu 13.10. Ran
regression tests on it.
* Submitted patches for libssp as per Marcus suggestions and got it approved.
PGO support for Aarch64 -TCWG- 179 (2/10)
* Installed "CPU2006" tools in foundation model running open embedded image
and started running benchmarks. Plan is to build it with -PGO next.
Bug fix (2/10)
* Working on reproducing and fixing PR60617.
Misc (1/10)
* AMD Internal meeting and work.
== Plan ==
* Bug fix PR60617.
* Build CPU006 benchmarks with -PGO flag
* Restart PGO bootstrap failure investigations
Hi,
I read in the armv8 architecture reference manual that a number of AArch32 instructions have been obsoleted. Do the current armv7 version of GCC ever generate code containing any of these, without me explicitly writing inline assembly? If it can, how can this be turned off? Just would like to make sure that a C-program (without inline assembly) compiled today for armv7 will run in AArch32 mode when armv8 boards come out.
The following are obsoleted in ARMv8:
A32 SWP and SWPB instructions.
Jazelle (only trivial implementations are supported).
VFP short vectors and asynchronous bounces.
Fast Context Switch Extension (FCSE).
Thanks: Magnus
Magnus Karlsson
Software Development Engineering Manager
LSI Corporation
Box 1024, Knarrarnäsgatan 15
SE-164 21 Kista, Sweden
TEL +46 8 594 607 09
FAX +46 8 594 607 10
CELL +46 73 80 444 88
magnus.karlsson(a)lsi.com
== Issues ==
* none
== Progress ==
* LRA on AArch32:
o TCWG-343 : Make LRA the default for the ARM backend (0/10)
- Stop progress on this card, will close it when FSF 4.9 will be released.
o TCWG-345 : Analyse performance of LRA for ARM. (4/10)
- Spec2K figures on Cortex-a15 Analysis.
- re-run benchs in console mode chrubuntu without ASLR + perf tool
* Backports review: (2/10)
o Start to prepare cortex-a53 backports review
* Misc:
o Various meetings and slideware (4/10).
- Linaro and internal ones.
== Next ==
- continue cortex-a53 review
- some backports to do.
- continue on TCWG-345
== Progress ==
* Worked on getting eglibc git mirror back up and running
* Released eglibc 2.19 2014.04
* Respin of glibc aarch64 setcontext patches
* Respin of ld aarch64 RELASZ patch
* Tidied up, rebased and committed ARM ld pointer equality patch
* Work on resurrecting glibc benchmark result graphing script
* Holiday on Friday
== Issues ==
* Couple of hours power outage on Monday
== Plan ==
* Get outstanding glibc and binutils patches committed
* Reorganise JIRA cards for malloc work
* glibc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Add support for fork/vfork/exec events/catchpoints in remote
gdbserver [TCWG-263] [4/10]
-- Debugged catchpoint code and reviewed gdbserver implementation for events.
-- Still require a lot of code understanding before actual
implementation can start.
* Wrote a script that takes two gdb build trees and configuration
arguments to test them in native, remote-native and remote-target
configurations [TCWG-96] [3/10]
* Laptop OS re-install [1/10]
* GDB open cards issues review [1/10]
* Sick half day off on Friday [1/10]
== Plan ==
* Complete work on TCWG-96.
-- Write a script that tests gdb in remote-native configuration using ssh.
-- Integrate all testing scripts and test them.
-- Update wiki page with updated scripts and how to use them.
* Monday Day Off: Pakistan Day 23rd March public holiday roll over.
== Progress ==
CARD-1210 - optimizing prologue/epilogue With -fomit-frame-pointer (4/10)
- regression tested the patch and fixed issues
- Dropping the patch and closing the card as it has been worked on at arm.
TCWG-15 - zero/sign extension elimination for crc (3/10)
- Looked at crc and looked at the other optimizations listed in card 440.
- Improved the local patch to remove the missing optimization
TCWG-413 - Running spec2006 with aarch64 (3/10)
- Built and set-up spec2006.
- Ran into to some compile time and run time errors
== Plan ==
Continue with zero/sign extension elimination
Start looking at literal pool merging
== This week ==
Merged all backports related to a53 support and successfully built arm
and aarch64 cross compilers:
202333 - [AArch64, ARM] Introduce "mrs" type attribute.
202334 - [AArch64] Use neon_<ldm,stm>_2 where appropriate as "type".
202448 - [AArch64] Prevent generic pipeline description from dominating
other pipeline descriptions.
202560 - set "type" attribute properly in arm_cmpsi_insn, cleanup
203241 - Cortex-a53 use Cortex tuning
203611 – 203621 – Neon types Parts 1 to 10
204575 - [ARM, AArch64] Make aarch-common.c files more robust.
205050 - [ARM] Add missing type attribute to zero_extend on arm
204782 - [AArch64] [-mtune cleanup 2/5] Tune for Cortex-A53 by default.
204784 - [AArch64] [-mtune cleanup 4/5] Remove "example-1", "example-2"
tuning options.
204852 - [AArch64] Remove simd_type
205014 - [AArch64] Remove v8type attribute.
205105 - [AArch64] Remove "mode", "mode2" attributes
204783 - [AArch64] [-mtune cleanup 3/5] [Temporary] When asked to tune
for Cortex-A57, tune for Cortex-A15
== Next week ==
Test a53 support
Backport vectorization bug
== Future ==
== Issues ==
* None
== Progress ==
* Identify a missing instruction pattern which blocks fcsel
optimization. A patch was sent out for community review. [2/10,
TCWG-309]
* Identify a ICE when handling dwarf-info in ARM backend when testing
shrink-wrap. A fix was committed to trunk. [2/10]
* Rebase and test the shrink-wrap codes for APCS_FRAME. [5/10]
* Prepare Linaro toolchain 2014.03 binaries release [1/10].
* Investigate CRC improvement chances.
== Plans ==
* Create a prebuilt sysroot based on Linaro eglibc-2014.04.
* Continue on shrink-wrap.
== Progress ==
* AArch64 (TCWG-387)
- Implemented simple C sin/cos functions for sphereflake
- AArch64 builds, passes check-all and test-suite
- Closed Jira task
* IAS (TCWG-377)
- Updated release notes
- IAS build, passes check-all, test-suite and compiles other large codebases
- Closed Jira task
* EHABI (TCWG-124)
- Updated release notes
- EHABI builds, passes check-all, test-suite
- Waiting for last patch to go to close the Jira task
* Compiler-RT (TCWG-125)
- Re-testing with current trunk+RT, all pass
- Next step, libunwind (not ready yet)
* Background
- Patch review, etc
- Studying TableGen, writing some docs (http://llvm.org/docs/TableGen/)
- Proposing changes to debug/EH unwind function attributes in IR
- Changing Zorg to not submit LNT reports by default (avoids bot breakage)
- Planning LLVM+Linux involvement as next big task
* Time
- CARD-862 8/10
- Others 2/10
== Plan ==
* Continue pushing __builtin___clear_cache and -fno-unwind-tables upstream
* Implement the Clang part of __builtin___clear_cache and update the docs
* Try to add LLVM/Clang to cbuildv2
* Start merging libunwind from libc++ to Compiler-RT and test it on ARM
* Get the kernel task started with the LLVMLinux guys
Hello,
the attached program changes the output from "true" to "false" when the
-Bsymbolic / -Bsymbolic-functions options are passed to GCC. This
happens on ARM -- on x86-64 output is always "true".
The program involves a comparison, within a shared library, of a PMF
defined inside the shared library itself with the same PMF passed by the
application.
At this stage I still don't know if it's a GCC problem, a ld.so problem,
ABI constraints, undefined behaviour, or whatnot; but any help is
appreciated.
Compile with:
> g++ -fPIC -shared -Wall -o libshared.so -Wl,-Bsymbolic shared.cpp
> g++ -fPIE -Wall -o main main.cpp -L. -lshared
(The long story is that Qt 5 is taking PMFs in its public API, and the
comparison failing inside of Qt shared libraries is breaking code on
ARM, as -Bsymbolic is set by default there.)
Thanks,
--
Giuseppe D'Angelo | giuseppe.dangelo(a)kdab.com | Software Engineer
KDAB (UK) Ltd., a KDAB Group company
Tel. UK +44-1738-450410, Sweden (HQ) +46-563-540090
KDAB - Qt Experts - Platform-independent software solutions
== Progress ==
* Off Monday after travelling back from Connect
* Catching up on email and post-Connect admin
* Released Linaro binutils 2.24.0 2014.03
* Submitted aarch64 setcontext patches upstream
* Submitted a patch for ld RELASZ issue
* Looked into eglibc svn mirroring
== Issues ==
* None
== Plan ==
* Resolve eglibc mirror situation
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Get started with Aarch64 GDB testing and development process using
foundation model. [6/10] [CARD-1115]
-- Figured out steps for running gdb in remote mode using foundation model.
-- Wrote a wiki page with steps on development process, still in progress.
-- Completed a gdb testsuite run and made a comparison with arm gdb.
-- All new testsuite results will be available on gdb wiki page.
-- Setup aarch64 gdb remote debugging.
* Updates to GDB pages on wiki.linaro.org [TCWG-96] [2/10]
-- Added pages containing test scripts and gdb testing tips
-- Added page containing current gdb testsuite results in various
configurations
* Add support for fork/vfork/exec events/catchpoints in remote
gdbserver [TCWG-263] [1/10]
-- GDB code review for task break down, still in progress.
* Fix network and internet problems [1/10]
== Plan ==
* Arm v8 reverse debugging support.[CARD-1115]
-- Provide card update and deliverable list.
-- Implement reverse debugging infrastructure for aarch64 gdb.
* Add support for fork/vfork/exec events/catchpoints in remote
gdbserver [TCWG-263]
-- GDB code review for task break down, still in progress.
* Update and cleanup gdb wiki pages on wiki.linaro.org
* All open gdb card review and update.
== Progress ==
* Went through few Linaro Connect - LCA14 slides and videos .
* Restarted upstream discussions on writing machine descriptions for
stack smashing. Working on submitting patches again as per Marcus
suggestions.
* Installed "CPU2006" in foundation model running open embedded image
and tried running 403.gcc benchmark.
* Tried buiding QEMU for aarch64 on ubuntu 12.04,2. I am getting
segment fault on using -L <library path >. Need to debug further.
* PGO runs: GCC boot strap failed when libjava building at stage3.
Need to have re-look further. Issue may be missing package in
opembedded image on foundation model.
Misc
------
Attended some Internal meetings.
== Plan ==
* Continue machine descriptions for stack smashing work.
* Work on using QEMU for running gcc test suites
* Restart PGO bootstrap failure investigations
== Issues ==
* None
== Progress ==
* Validate R/M toolchain 4.8 q1 update release.
* Try Cross-Native build based on Linaro crosstool-ng.
* Handle conditional compare in ifcvt.c to make ccmp and csel work together.
* Read document about FCMP/FCCMP and investigate on how to generate
FCCMP instructions:
- The tree representation of UNORDERED compare (UNLT, etc) can not
fit into current framework to handle CCMP.
- For LT, LE, GT and GE, the compiler will generate FCMPE
instruction, which can not be the first compare of CCMP.
- For NE, EQ, it is easy to handle them based on previous patches.
== Plan ==
* Continue on ccmp performance tuning.
== This week ==
Completed the following backports related to a53 support:
201375 - Insn classification refactoring 7/n Factor out "type" attribute
201376 - Insn classification refactoring 7/n Factor out common
scheduling dependency routines (done)
201399 - Insn classification unification 1/n Define "type" attrib for
all patterns (done)
201400 - Share the a53 pipeline description between arm and aarch64 backends
201436 - Insn classification unification 4/N load/store types
202272 - [AArch64, AArch32][Insn classification refactoring 6/N] Remove
"neon_type" attribute
202291 - [AARCH64][Insn classification unification 3/N] ALU/shift types
202292 - [AArch64] Fix categorisation of the frecp* insns.
202323 - [Patch ARM] Add "type" attribute to Everything!
202328 - [ARM,AARCH64] Insn type reclassification. Split f_cvt type.
202329 - [Patch ARM AARCH64] Split "type" attributes: fdiv
202330 - [Patch AArch64] Fix types for some multiply instructions.
202331 - [AArch64, ARM] Rename the FCPYS type to FMOV
202332 - [AArch64, ARM] Use "multiple" for type, where more than one
instruction is used for a move
== Next week ==
Complete remaining backports for a53 support and complete builds for arm and aarch64.
== Future ==
--
Michael Collison
Linaro Toolchain Working Group
michael.collison(a)linaro.org
The Linaro Toolchain Working Group is pleased to announce the 2014.03
engineering release of Linaro GCC 4.8.
As announced at Linaro Connect USA 2013 Linaro GCC is moving to a
pattern of quarterly stable releases, with engineering releases in the
intervening months. This is the second engineering release. The next stable
release will be the 2014.04 release.
Linaro GCC 4.8 2014.03 is the twelfth release in the 4.8 series. Based
off the latest GCC 4.8.3+svn208264 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.3+svn208264
The source tarball is available from:
http://releases.linaro.org/14.03/components/toolchain/gcc-linaro/4.8
Downloads are available from the Linaro Releases website:
http://www.linaro.org/downloads/
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.8/4.8-2014.03
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
~
== Progress ==
* Ill until Thusrday due to Chinese food allergy/intolerance/poisoning
- Seems I'm not the only one...
* EHABI
- Adding a few more EH tests to test-suite
- Integration with ARM compiler better handled by ARM
- Plugging -fno-unwind-tables to disable EH tables in ARM
* Android
- Implementing __builtin___clear_cache in LLVM
- Need to add parsing to Clang later, and docs to LangRef
* AArch64
- Tested a "fix" on sphereflake, didn't work
- Seems the problem is the sin() results on glibc variants
- We might need to round the result a bit shorter to make it work everywhere
* Time
- CARD-862 8/10
- Others 2/10
== Plan ==
* Continue ___builtin__clear_cache implementation
* Continue RT and AArch64 test-suite investigation
Dear Linaro toolchain support team:
I am Justin Guo from S3 graphics Inc. I am studying linaro's big-little
codes and is using TC2 Platform.
I used ./linaro_kernel_build_cmds.sh to build kernel, I got no problem
when I set CONFIG_DEBUG_INFO=y to build for kernel.
However, When I trace kernel, the traced line in source code level is
jumping up/down, so I tried to turn off the optimization.
After modified Makefile as below to turn off optimization:
ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
KBUILD_CFLAGS += -Os $(call cc-disable-warning,maybe-uninitialized,)
else
KBUILD_CFLAGS += -O0
endif
I got errors when build linaro kernel for TC2:
root@ubuntu:/home/justinguo/linaro/1309# ./linaro_kernel_build_cmds.sh
Directory linaro-kernel exists. If the kernel code exists in this
directory you may continue
without cloning the git repository for the kernel. Are you sure you want
to do this? (y/n)
y
M Makefile
HEAD is now at dafe325... Merge branch 'linux-linaro-lsk' into
linux-linaro-lsk-android
% Total % Received % Xferd Average Speed Time Time Time
Current
Dload Upload Total Spent Left
Speed
100 57281 100 57281 0 0 90703 0 --:--:-- --:--:-- --:--:--
188k
Using /home/justinguo/linaro/1309/linaro-kernel as source for kernel
GEN /home/justinguo/linaro/1309/linaro-kernel/out/Makefile
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
UPD include/generated/utsrelease.h
make[2]: `include/generated/mach-types.h' is up to date.
CC kernel/bounds.s
GEN include/generated/bounds.h
CC arch/arm/kernel/asm-offsets.s
GEN include/generated/asm-offsets.h
CALL
/home/justinguo/linaro/1309/linaro-kernel/scripts/checksyscalls.sh
CC scripts/mod/empty.o
MKELF scripts/mod/elfconfig.h
CC scripts/mod/devicetable-offsets.s
GEN scripts/mod/devicetable-offsets.h
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/sumversion.o
HOSTLD scripts/mod/modpost
CC init/main.o
CHK include/generated/compile.h
CC init/version.o
CC init/do_mounts.o
CC init/do_mounts_rd.o
CC init/do_mounts_initrd.o
LD init/mounts.o
CC init/initramfs.o
CC init/calibrate.o
CC init/init_task.o
LD init/built-in.o
CC arch/arm/vfp/vfpmodule.o
AS arch/arm/vfp/entry.o
AS arch/arm/vfp/vfphw.o
CC arch/arm/vfp/vfpsingle.o
CC arch/arm/vfp/vfpdouble.o
LD arch/arm/vfp/vfp.o
LD arch/arm/vfp/built-in.o
CC arch/arm/kernel/elf.o
AS arch/arm/kernel/entry-armv.o
AS arch/arm/kernel/entry-common.o
CC arch/arm/kernel/irq.o
CC arch/arm/kernel/opcodes.o
CC arch/arm/kernel/process.o
CC arch/arm/kernel/ptrace.o
CC arch/arm/kernel/return_address.o
/home/justinguo/linaro/1309/linaro-kernel/arch/arm/kernel/return_address
.c:63:2: warning:
#warning "TODO: return_address should use unwind tables" [-Wcpp]
CC arch/arm/kernel/sched_clock.o
CC arch/arm/kernel/setup.o
CC arch/arm/kernel/signal.o
CC arch/arm/kernel/stacktrace.o
CC arch/arm/kernel/sys_arm.o
CC arch/arm/kernel/time.o
CC arch/arm/kernel/traps.o
CC arch/arm/kernel/atags_parse.o
CC arch/arm/kernel/cpuidle.o
CC arch/arm/kernel/armksyms.o
CC arch/arm/kernel/module.o
AS arch/arm/kernel/sleep.o
CC arch/arm/kernel/suspend.o
CC arch/arm/kernel/smp.o
CC arch/arm/kernel/smp_tlb.o
CC arch/arm/kernel/smp_scu.o
CC arch/arm/kernel/smp_twd.o
CC arch/arm/kernel/arch_timer.o
CC arch/arm/kernel/ftrace.o
CC arch/arm/kernel/insn.o
CC arch/arm/kernel/unwind.o
CC arch/arm/kernel/devtree.o
CC arch/arm/kernel/swp_emulate.o
CC arch/arm/kernel/hw_breakpoint.o
CC arch/arm/kernel/perf_event.o
CC arch/arm/kernel/perf_event_cpu.o
CC arch/arm/kernel/topology.o
CC arch/arm/kernel/io.o
CC arch/arm/kernel/psci.o
/tmp/cciaYmCJ.s: Assembler messages:
/tmp/cciaYmCJ.s:147: Error: .err encountered
/tmp/cciaYmCJ.s:148: Error: .err encountered
/tmp/cciaYmCJ.s:149: Error: .err encountered
/tmp/cciaYmCJ.s:150: Error: .err encountered
/tmp/cciaYmCJ.s:191: Error: .err encountered
/tmp/cciaYmCJ.s:192: Error: .err encountered
/tmp/cciaYmCJ.s:193: Error: .err encountered
/tmp/cciaYmCJ.s:194: Error: .err encountered
make[2]: *** [arch/arm/kernel/psci.o] Error 1
make[1]: *** [arch/arm/kernel] Error 2
make: *** [sub-make] Error 2
root@ubuntu:/home/justinguo/linaro/1309#
Could you Please help fix these issues?
Best regards,
Justin Guo
Hi,
After a solid few months of work the QEMU master branch [1] has now reached
instruction feature parity with the suse-1.6 [6] tree that a lot of people
have been using to build various aarch64 binaries. In addition to the
SUSE work we have fixed numerous edge cases and finished off classes of
instructions. All instructions have been verified with Peter's RISU
random instruction testing tool. I have also built and run many
packages as well as built gcc and passed most of the aarch64 specific tests.
I've tested against the following aarch64 rootfs:
* SUSE [2]
* Debian [3]
* Ubuntu Saucy [4]
In my tree the remaining insns that the GCC aarch64 tests need to
implement are:
FRECPE
FRECPX
CLS (2 misc variant)
CLZ (2 misc variant)
FSQRT
FRINTZ
FCVTZS
Which I'm currently working though now. However for most build tasks I
expect the instructions in master [1] will be enough.
If you want the latest instructions working their way to mainline you
are free to use my tree [5] which currently has:
* Additional NEON/SIMD instructions
* sendmsg syscall
* Improved helper scripts for setting up binfmt_misc
* The ability to set QEMU_LOG_FILENAME to /path/to/something-%d.log
- this is useful when tests are failing N-levels deep as %d is
replaced with the pid
Feedback I'm interested in
==========================
* Any instruction failure (please include the log line with the
unsupported message)
* Any aarch64 specific failures (i.e. not generic QEMU threading flakeiness).
If you need to catch me in real time I'm available on #qemu (stsquad)
and #linaro-virtualization (ajb-linaro).
Many thanks to the SUSE guys for getting the aarch64 train rolling. I
hope your happy with the final result ;-)
Cheers,
--
Alex Bennée
QEMU/KVM Hacker for Linaro
[1] git://git.qemu.org/qemu.git master
[2] http://download.opensuse.org/ports/aarch64/distribution/13.1/appliances/ope…
[3] http://people.debian.org/~wookey/bootstrap/rootfs/debian-unstable-arm64.tar…
[4] http://people.debian.org/~wookey/bootstrap/rootfs/saucy-arm64.tar.gz
[5] https://github.com/stsquad/qemu/tree/ajb-a64-working
[6] https://github.com/susematz/qemu/tree/aarch64-1.6
Hello,
I am building an ELF image using aarch64-linux-gnu-ld from linaro:
GNU ld (crosstool-NG linaro-1.13.1-4.8-2014.02 - Linaro GCC 2014.02)
2.24.0.20131220
I am linking in the libstc++.a, which contains in particular a GOT
entry for __gthread_active_ptr that is of interest to me, pointing to
__pthread_key_create, used for detecting pthread support for
std::thread,
and while I get the relocations for the GOT itself in a .rela.dyn
section, and a nice pointer to it from the dynamic section (RELA), the
dynamic RELASZ entry contains zero:
Here is the comparison of the Dynamic section (note RELASZ) with the
following .rela.dyn relocations:
loader.elf: file format elf64-littleaarch64
loader.elf
architecture: aarch64, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x00000000400b0000
Program Header:
LOAD off 0x0000000000000000 vaddr 0x0000000040090000 paddr
0x0000000040090000 align 2**16
filesz 0x0000000000407084 memsz 0x00000000004aa504 flags rwx
TLS off 0x0000000000407080 vaddr 0x0000000040497080 paddr
0x0000000040497080 align 2**3
filesz 0x0000000000000004 memsz 0x0000000000000580 flags rw-
DYNAMIC off 0x0000000000001000 vaddr 0x0000000040091000 paddr
0x0000000040091000 align 2**3
filesz 0x0000000000000120 memsz 0x0000000000000120 flags rw-
EH_FRAME off 0x00000000003ce5fc vaddr 0x000000004045e5fc paddr
0x000000004045e5fc align 2**2
filesz 0x000000000000bae4 memsz 0x000000000000bae4 flags r--
NOTE off 0x0000000000000000 vaddr 0x0000000000000000 paddr
0x0000000000000000 align 2**3
filesz 0x0000000000000000 memsz 0x0000000000000000 flags ---
Dynamic Section:
NEEDED dummy-shlib.so
INIT_ARRAY 0x00000000404841b8
INIT_ARRAYSZ 0x0000000000000330
HASH 0x000000004044bd58
STRTAB 0x00000000403e3320
SYMTAB 0x00000000403a4110
STRSZ 0x0000000000068a33
SYMENT 0x0000000000000018
DEBUG 0x0000000000000000
RELA 0x00000000404780c0
RELASZ 0x0000000000000000
RELAENT 0x0000000000000018
private flags = 0:
...
10 .rela.dyn 00002058 00000000404780c0 00000000404780c0 003e80c0 2**3
CONTENTS, ALLOC, LOAD, READONLY, DATA
...
and now the .rela.dyn.relocations from aarch64-linux-gnu-readelf -r
loader.elf :
Relocation section '.rela.dyn' at offset 0x3e80c0 contains 345 entries:
Offset Info Type Sym. Value Sym. Name + Addend
0000404832d0 002b00000401 R_AARCH64_GLOB_DA 00000000405339c8
_ZNSt8time_getIwSt19is + 0
0000404832d8 004400000401 R_AARCH64_GLOB_DA 000000004047e450
_ZTISt7codecvtIcc11__m + 0
0000404832e0 004b00000401 R_AARCH64_GLOB_DA 00000000405338c8
_ZGVNSt8numpunctIcE2id + 0
0000404832e8 005800000401 R_AARCH64_GLOB_DA 000000004047c460
_ZTISt8messagesIcE + 0
0000404832f0 006200000401 R_AARCH64_GLOB_DA 000000004047df40
_ZTVSt9strstream + 0
0000404832f8 007200000401 R_AARCH64_GLOB_DA 00000000402870dc
_ZNSt17bad_function_ca + 0
000040483300 008500000401 R_AARCH64_GLOB_DA 0000000040534e58
_ZGVN9__gnu_cxx16bitma + 0
000040483310 00c300000401 R_AARCH64_GLOB_DA 0000000040533a18
_ZNSt6locale2id11_S_re + 0
000040483318 00dd00000401 R_AARCH64_GLOB_DA 000000004047c160
_ZTISt5ctypeIwE + 0
000040483320 00ea00000401 R_AARCH64_GLOB_DA 0000000040534e18
_ZZN9__gnu_cxx9free_li + 0
000040483328 011700000401 R_AARCH64_GLOB_DA 0000000040533968
_ZGVNSt8time_getIwSt19 + 0
000040483330 013500000401 R_AARCH64_GLOB_DA 000000004047cfd8
_ZTISt7num_getIwSt19is + 0
000040483338 017300000401 R_AARCH64_GLOB_DA 000000004021d51c
__pthread_key_create + 0
...
^^...note the __pthread_key_create relocation I am interested in...
I would expect the RELASZ in the dynamic section to be 0x2058 instead of 0.
Any tips to what could be wrong?
Thank you,
Claudio Fontana
Hi,
I'm trying to build the native compiler to a arm a9 using this tutorial,https://wiki.linaro.org/WorkingGroups/ToolChain/Using/GCCNative.Ho…, I need to compile in a x86_64 platform ubuntu, like this --target=arm-unknown-eabi --build=i686-pc-linux-gnu --host=arm-unknown-eabi, but without success.There is any possible solution?
Thank you.Felipe Rocha da Rosa.
Hi all,
We are using Linaro 13.03 toolchain(gcc-linaro-arm-linux-gnueabihf-4.7-2013.03-20130313_linux We are trying to execute a simple test code to check whether ARM assembly code executes on board or not. Execution is on Arndale Board. Every time We include assembly function, We get segmentation fault. Kindly check if I We are missing any arm related flags in makefile.
We have attached the 'helloworld' test code and makefile.
Regards,
Vishwa
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If your code is sensitive to the size of long long, can you use the predefine:
__SIZEOF_LONG_LONG__
If that doesn't work, then you can use:
gcc -dM -E - < /dev/null
to tell you what predefines a gcc compiler has (I would probably look for predefines more specific to what your code is sensitive to than look for a particular compiler).
I also wonder a little about your original problem statement since "%lld" should be a way to always print "long long" and if you have a matched set of compiler and library, then it should adjust both together. If you are using "%ld" instead, this works in situations where "long" is the same size as "long long" but may not work when these are different sizes.
--mev, Mike Vermeulen
Hi there!
On Linaro gcc 4.6, I am facing an issue due to "long long" integers
not being 64 bit as they are on other platforms I'm targeting,
which causes different issues, most importantly with printf format
strings. I am now circumventing these by using the C/C++ preprocessor
in order to choose the right format strings. In order to minimize the
necessity for users to manually configure things, I'm wondering if
there is a way to detect the Linaro gcc compiler through preprocessor
macros. Is this possible?
Thanks.
Best regards,
Isidor
Hi all,
We are using Linaro 13.03 toolchain(
gcc-linaro-arm-linux-gnueabihf-4.7-2013.03-20130313_linux We are trying to
execute a simple test code to check whether ARM assembly code executes on
board or not. Execution is on Arndale Board. Every time We include assembly
function, We get segmentation fault. Kindly check if I We are missing any
arm related flags in makefile.
We have attached the ‘helloworld’ test code and makefile.
Regards,
Vishwa
Is that supposed to be possible? When I add --disable-multilib to the
configure options, the build fails on the install, because it hasn't built
any of src/gcc-linaro-4.8-2014.02/libgcc:
/bin/sh ../../../../src/gcc-linaro-4.8-2014.02/libgcc/../mkinstalldirs
/home/ubuntu/work483/build/sysroot/home/ubuntu/opt/cross-gcc-linaro/lib/gcc/arm-linux-gnueabi/4.8.3
/usr/bin/install -c -m 644 libgcc_eh.a
/home/ubuntu/work483/build/sysroot/home/ubuntu/opt/cross-gcc-linaro/lib/gcc/arm-linux-gnueabi/4.8.3/
/usr/bin/install: cannot stat `libgcc_eh.a': No such file or directory
make[3]: *** [install-shared] Error 1
make[3]: Leaving directory
`/home/ubuntu/work483/build/gcc/arm-linux-gnueabi/libgcc'
make[2]: *** [install-target-libgcc] Error 2
make[2]: Leaving directory `/home/ubuntu/work483/build/gcc'
make[1]: *** [install] Error 2
make[1]: Leaving directory `/home/ubuntu/work483/build/gcc'
make: *** [stamp/gcc-install] Error 2
I don't want or need multilib, so I'd rather build the toolchain without
it, but before I try to make that happen, I wanted to make sure it's
supposed to be able to get built correctly that way.
Thanks,
Diane
== Progress ==
* IAS (TCWG-377)
- Long discussions about magic in inline asm
- Bottomline is: we're still validating anyway
* AArch64 (TCWG-387)
- Making it build with CMake, discarding some tests
- Similar changes to the test-suite
- All green except sphereflake
* Buildbots
- Investigating one failure on test-suite due
to register allocator changes
- Will continue this during or after Connect
* Background
- Connect preparations
- EuroLLVM 14 sync call, paper discussions
- Researching some kernel C/ASM syntax
- Studying __builtin_constant_p usage
- Patch reviews, etc.
* Time
- CARD-862 8/10
- Others 2/10
== Plan ==
* Connect
(slightly delayed)
== Progress ==
* 3 day week (annual leave Thursday and Friday)
* QEMU ARMv8 CRC instructions (4/10, TCWG-52)
* Slides for Connect (1/10)
* Further work on longjmp/setjmp Systemtap probes on ARM (1/10, TCWG-378)
== Issues ==
* None
== Plan ==
* Complete QEMU CRC instruction work
* Preparation for Connect
--
Will Newton
Toolchain Working Group, Linaro
== This week ==
- US Holiday on Monday, January 17th
- Backported 202407 - Fix parameter to vrsqte_f64
- Backported 202259 (on read/write branch) - AARCH64, fix return types
for vaddvq_s64, vaaddvq_u64
- Backported 202321 - Fix vdup<bhsd>_lane<q>_* instrinsics' lane parameter
- Backported 202322 - Fox register constraints for lane intrinsics
- Installed Qemu64 simulator and attempted to test aarch64 backports.
- Shared library issue is preventing qemu64 from executing; Rob Savoy
is investigating
== Next week ==
- Test pending git review backports with Qemu64 if issues resolved
- Test backports completed this week on Qemu64
- New backports
== Future ==
--
Michael Collison
Linaro Toolchain Working Group
michael.collison(a)linaro.org
== Issues ==
* none
== Progress ==
* LRA on AArch32:
o TCWG-343 : Make LRA the default for the ARM backend (0/10)
- No progress this week on my side.
o TCWG-345 : Analyse performance of LRA for ARM. (4/10)
- Analysed Spec2K figures on Cortex-a15.
* Backports review: (1/10)
o Start to look at the Gerrit review process.
o Lack of testsuite results
* Misc:
o LCA'14 : AArch64 toolchain status session. (3/10)
o Various meetings. (2/10)
== Next ==
* Backports review
* https://bugs.launchpad.net/bugs/1169164
* Connect
== Progress ==
* Completed testing and submitted patches upstream. [TCWG-251] [TCWG-252] [1/10]
* Travel to capital Islamabad for Macau visa follow up. [3/10]
* Shifting to new office space and setting up office [6/10]
== Plan ==
* Study aarch64 code and create task breakdown for record/replay
support. [TCWG-389]
* Setup gdb for aarch64 and try to run a demo application. [TCWG-389]
* Write how-to for using scripts to compare two gdb testsuite runs. [TCWG-96]
* Setup network and internet etc in new office space.
== Issues ==
* None
== Progress ==
* CCMP for AARCH64.
- Design cases to cover most conditional compare combinations.
- Set up qemu environment and run regression tests. And fix all the new FAILs.
* Respawn 2014.01-01 baremental toolchains by setting
CT_TARGET_LDFLAGS=" --specs=rdimon.specs "
* Rebuild arm-linux-gnueabi toolchain and ran spec2k. But can not
reproduce the regression about Linaro 4.8 based on 2014.01 release.
== Plans ==
* Send out the CCMP patches for community review.
== Progress ==
- TCWG-394 (5/10)
- Found one more issue, regression tested and posted the patch
upstream for review
- http://gcc.gnu.org/ml/gcc-patches/2014-02/msg01282.html.
- TCWG-395 (1/10)
- Started with a google doc for wiki update
- Speck regression analysis with 4.7, 4.8 Nov and Dec releases (2/10)
- Native build of these versions and rank spec2k benchmarking for all
of them
- Not able to reproduce it on a15 as reported
== Misc ==
1 Day off sick
== Plan ==
- Get all the information required for wiki - TCWG-395
- Start working on TCWG-396
== Progress ==
* Fixed remote testing via Cbuildv2 (TCWG 324 - 3/10). Currently it
supports multiple build farms, it uses my local hardware and the
TCWG build farm, and when run via Jenkins it uses the TCWG build
farm.
* Got qemu-aarch64 built and working, added to the DejaGnu site.exp
file used by Cbuildv2, so now aarch64 execution tests actually
work. Then cloned qemu-aarch to the x86_64 tcwg build farm
machines so Jenkins can use it. (TCWG 393 - 3/10)
* Meetings and misc. (4/10)
- Worked on LCA14 presentation.
- Write documentation on how to tweak the config file for DejaGnu
used by Cbuildv2 for remote test execution.
- Got Gerritt and Jenkins integrated (thanks Paul!) so merge
requests fire up Jenkins to do builds on everything in the TCWG
build farm.
- Had ITS create a new list 'tcwg-test-results', which soon will
get buid failure notifications from Jenkins and any test
regressions.
- Added support for emailing test results to Cbuildv2.
== Plan ==
* Test the Gerrit/Jenkins integration.
* Improve new test analysis script to compare builds from more than
the same day, since now some test runs take 32hours with all the
execution tests running on a chromebook an Beagle Board.
* Travel to Connect!
== Issues ==
* Somebody needs to upgrade the crouton install on all our
chromebooks, as the current version won't build GCC native.