== Progress ==
* spec2k comparison between ARM and x86
- Trying to reproduce some of the earlier optimization studies
- Set up Acovea Trying milepost gcc
* VRP based zero/sign extension elimination
- Posted the modified patch
== Plan ==
* Continue with spec2k comparison between ARM and x86
* Wiki Cleanup
== Progress ==
* Made it back from the Tetons after a rainy climbing trip
* Helped Vish with #357
* Cbuildv2 improvements for cross builds and binary releases
* Wrote script to for better Jenkins support
* Added more user parameters to Jenkins config page for building
toolchains.
== Plans ==
* More work on Cbuildv2 for building binary releases
* Write more Cbuildv2 docs
* More help on #357
* Start going through Wiki pages
* Investigate lava-tool so Cbuildv2 can use Jenkins slaves remotely
== Progress ==
* Short week (3 days off to move house)
* Submitted outstanding glibc patches after 2.18 release
* Wrote some glibc allocator tests which have exposed some minor issues
== Issues ==
* None
== Plan ==
* Complete glibc allocator tests and submit them
* Get malloc implementation functionally complete
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* 2013.08 4.8 release:
- completed achievable backports (postponed some with problems to
next release)
- created & uploaded release. Will be announced next week along with 4.7
- Matthias a reported a problem in c++/java
* Aarch64 frame layout: submitted sample code for internal discussion.
* Wiki cleanup: started
* trunk validation:
- continued to work on internal validation of trunk using our
compute farm (build+cross validation) to help catch regressions early.
- validating every commit seems too heavy currently
== Plan ==
next week off
== Progress ==
* Connect / LLVM Meeting
- Checking times, booking tickets, etc
* Divmod
- Some more divmod work, SelectionDAG changed enough to break my merge
- Since it's only 64-bit support, we'll postpone implementation for a
later date
- Internal discussions with ARM, trying to approach it in a different way
* Buildbots
- Investigating MCJIT test failure in buildbot
- Some other random breakages
- Testing an ODroid U2 as a buildbot, will leave it running for a week
non-stop
- Checking why ClamAV has different output on Chromebook vs.
ODroid/Panda/x86
* ODroid U2
- Testing ODroid vs. Chromebook / SDCard vs. External HD
- ODroid with SDCard is faster than Chromebook with External HD!
- The huge heat-sink, the possibility of adding a fan and its form factor
make it a really good candidate for a buildbot
* Background
- Meetings with ARM, LLVMLinux
- Interviewing potential candidates
- Reviewing & committing patches, discussions, etc.
* Cross-compilation
- Preparing the terrain to start investigation
== Plan ==
Another week off! :D
Progress:
* v7 mach-virt upstreaming:
** sent out an RFC patchset implementing '-cpu host' for QEMU for v7 CPUs
* QEMU maintenance:
** versatile-pb PCI issues came up again; testing kernel patches etc
-- PMM
Is there a way to generate A32 code with the gcc-linaro-aarch64- compilers? I looked at the bare metal and linux 2013.07 versions, but didn't see a way to do this.
Also, the compiler doesn't complain about -mcpu=cortex-a53 or -mcpu=cortex-a57, but I get unknown cpu errors from the assembler for these options. It looks like it is the case today that there is just generic v8 code generation and more specialized code generation will come later. Is that right?
Thanks, Don
== Issues ==
* None
== Progress ==
* Investigate and close lp:1208945 and lp:1210713.
- For lp:1208945, libc.so.6 should be at /lib/arm-linux-gnueabihf.
- For lp:1210713, aufs is not a part of standard linux kernel release.
But aufs is supported by Ubuntu release. So maybe need it for future
releases.
* Conditional compare
- Enhance reassoc pass to handle conditional compare
- Investigating bootstrap issue when expanding conditional compare to
optimized RTL.
* Investigate LDTS tickets about multilib build issues.
- Local builds are OK for Linaro GCC 4.7 and 4.8.
== Plan ==
* Send out the conditional compare patches for review.
== Panned leaves ==
* Aug. 19-20: annual leaves
* Sept. 3-5: internal meeting.
Folks,
This week I acquired an ODroid U2, which is an Exynos4 (quad-core A9 at
1.7GHz each), 2GB RAM, and a massive heat-sink (which even has power supply
for a fan).
I ran some ball-park compilation time benchmarks, comparing to the
Chromebook, and the results are interesting. The ODroid with an SDCard
(32GB Sandisk Ultra HC-1) is faster than the Chromebook with an external
USB 3.0 / SATA hard-drive.
LLVM Build Times (min)ChromebookODroidODroid-USBBuild1008180Check-all545
Test-suite424038
The test-suite and check-all results are statistically equivalent, but the
build time is better because of the number of CPUs, but not twice better.
Disk is more of an issue on the test-suite, which can be clearly seen above
(-j2 for Chromebook, -j4 for ODroid, but same time).
My USB stick is not the best, so that doesn't mean much. Also, I can't get
the ODroid to even recognize the SATA disk when I plug in because of the
power it needs. So, we'll have to do with those numbers. I'm using the
ODroid Ubuntu image (based on 13.04), which worked out of the box (except
the SATA disk and HDMI).
I'll let the board run for a week at home (room temperature ~ 25C) as a
buildbot, with the fan on all the time and see if it copes with constant
load for such a long time. Pandas couldn't do that, Chromebooks can.
Since the ODroid U2 is a dev board, which has a small form-factor, can be
turned on/off remotely and won't sleep when the lid is closed, has a decent
Ethernet port (Chromebook's wired adapters are *horrible*, and having
dozens of Wireless clients in the lab is just not possible), and don't have
the risk of being turned off by someone else, like the Calxedas, I'd say
that it might end up as the best buildbot yet. (The new XU is an Exynos5
octo-core monster, might be even better).
After the initial week load test, if all goes well, I want to bootstrap GCC
and run some tests on it, so I'll be calling for volunteers to help me.
cheers,
--renato
== Progress ==
* 2013.08 4.8 release:
-- merged many backports
- sorted a few dependencies problems between patches
- spawned all intermediate jobs (ie merge commits) to make sure
there was no regression
* 2013.08 4.7 release:
- made a trial branch merge to confirm that all builds succeed
(Matthias reported a build failure for aarch64)
* trunk validation:
- continued to work on internal validation of trunk using our
compute farm (build+cross validation) to help catch regressions early.
== Plan ==
* 2013.08 4.8 release:
- final backports
- actual release
* Resume work on aarch64 frame layout.
* Resume work on disabling peeling.
Last week
* tried cbuildv2 and sent Rob some bug fixes, bug reports, and feature requests
* ported previous testsuite fixes to trunk
This week
* send patch to gcc-patches
* find the next thing to fix
Issues
* need to take desktop PC back to supplier to fix CPU overheating
== Progress ==
* Finished gdb catch syscall support work and performed testing on ARM
and x86. Trying to eliminate a couple of testsuite failures on arm.
* Short week due to Eid Holidays.
== Plan ==
* Evaluate arm catch syscall support patch recently submitted by some
other developer.
* Work on reverse debug support on arm.
* Independence Day Public Holiday on 14th August.
* Getting documents ready and attend UK Visa appointment on 15th August.
== Progress ==
* Libssp support for AArch64 TCWG 23:
Patch was tested for aarch64-none-elf and passed. Sent for internal review.
Looking at supporting stack guard in glibc. Understanding TCB data structure
and looking at ports on how they initialize the stack guard in th TCB.
* TCWG-20 gprof support patches.
Reply to Marcus comments and rework and code mcount routine in assembly.
Ref: http://gcc.gnu.org/ml/gcc-patches/2013-08/msg00148.html
== Plan ==
* Continue Libssp support for AArch64 in GCC and glibc TCWG-23
* Update review comments and upstream gprof patches
== Issues ==
* LTO/PGO work stopped now since libssp support priority is more
Misc
------
15-August Public holiday in India.
== Issues ==
* No idea to fix eglibc backtrace issue.
== Progress ==
* Commit (FSF 4.8 and trunk) the fix for lp: 1189445/1208676.
* Enhance Linaro crosstool-ng:
- Fix gcc respin version issue in README.
- Update big-endian multiarch triplet name.
* Investigate eglibc backtrace issue:
- Test case: linaro-crosstool-ng/contrib/linaro/tests/misc/sort.c.
- gdb report: Backtrace stopped: previous frame identical to this
frame (corrupt stack?)
- Try to rebuild eglibc with gcc 4.7 and -gdwarf-2. But still not work.
* Conditional compare
- Send for Linaro internal review.
- Workaround a new fail case.
- Test the prototype on x86-64 port.
== Plan ==
* Conditional compare RFC review.
== Panned leaves ==
* Aug. 19-20: annual leaves
* Sept. 3-5: ARM internal meeting.
== Progress ==
* spec2k comparison between ARM and x86
- Read papers/documents that list gcc optimization/problem for arm
- Acovea runs fails in Chromebook; Looking into it
- continuing with analysing individual results
* VRP based zero/sign extension elimination
- Final checks ongoing before posting the patch
== Plan ==
* Continue with spec2k comparison between ARM and x86
* post VRP based zero/sign extension elimination patch
== Misc ==
* Was on Leave Thursday/Friday (3 Day week)
* Watched Cauldron 2013 archives
== Progress ==
* Lots more malloc work, slowly progressing
* Created a patch queue in preparation for glibc coming out of freeze
* New strlen code
* Other bugfixes and minor improvements
== Issues ==
* None
== Plan ==
* Move house (Wednesday and Thursday off)
* Submit glibc patches
* Get malloc implementation functionally complete
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* v7 mach-virt upstreaming:
** sent out mach-virt patchset for v7
** thinking/discussions about how to handle the host maybe not being
able to provide a guest CPU; this has converged on a sensible design
based around using "-cpu host" to mean "please give me a VCPU that's
the same as the host's CPU"
** review of the OVS v2 aarch64-kvm-support patchset
* QEMU maintenance:
** rebased qemu-linaro on upstream master
** fixed some minor bugs revealed by clang warnings
** wrote and sent out a cleanup patchset which removes the now
unnecessary 'arm_pic' shim around the CPU
** implemented debug logging of exceptions/interrupts for ARM TCG
(helpful for identifying when a guest has gone into an infinite
loop of taking exceptions)
-- PMM
== Progress ==
* Cbuildv2 can now do a full cross toolchain build ala crosstool-ng.
* Cbuildv2 integrated to work under LAVA team's Jenkins for
automated cross builds.
* Cbuildv2 now allows one to select the version of each toolchain
component.
== Plans ==
* Add support to Cbuildv2 to run 'make check' and create XML files
for MySQL and Junit (which Jenkins uses).
* Add newlib building support to Cbuildv2 as part of "--build all".
== Leave ==
* Off to climb Grand Teton in Wyoming, taking long weekend.
- rob -
When the OMAP I2C controller is operated in master mode, setting the
STP bit in the CON register instructs the controller to generate an I2C
stop condition only after the programmed number of bytes has been sent
on the I2C bus. The current code in QEMU ends the I2C transfer without
first sending the pending data instead.
Fix the above issue, and let the I2C transfer be ended in
omap_i2c_fifo_run(), after the count of bytes to send has reached zero.
Signed-off-by: Francesco Lavra <francescolavra.fl(a)gmail.com>
---
Without this patch, the controller driver in Linux is unable to send
data on the I2C bus, and when the controller triggers an IRQ after
having started an I2C transfer, the XRDY flag in the STAT register
remains always asserted, leading to an endless loop which eventually
results in a kernel oops.
hw/i2c/omap_i2c.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c
index cfaac07..17d4037 100644
--- a/hw/i2c/omap_i2c.c
+++ b/hw/i2c/omap_i2c.c
@@ -521,10 +521,6 @@ static void omap_i2c_write(void *opaque, hwaddr addr,
omap_i2c_fifo_run(s);
}
omap_i2c_interrupts_update(s);
- } else if (value & 2) { /* STP, but not STT */
- i2c_end_transfer(s->bus);
- s->control &= ~0x0602; /* MST | TRX | STP */
- s->count_cur = s->count;
}
}
break;
--
1.7.5.4
Last week
* Wrote up notes on gcc cross-compiler building (WIP:
https://wiki.linaro.org/WorkingGroups/ToolChain/BuildingGNUToolchains)
* started looking at gcc test suite
This week
* produce at least one fix for a gcc testsuite test problem
* book LCU13
* with luck, receive new laptop
== Progress ==
* 2013-08 4.8 release:
- Reviewed merge requests sent by Yvan.
A few instabilities in x86/x86_64: re-spawned jobs came back clean.
Unexpected improvements in a9: actually the reference had
unexpected regression; re-spawned reference job came back clean.
- prepared another series of backports; had to dig history to find
missing dependencies.
== Plan ==
* 2013.08 4.8 release:
- merge approved backports
- merge fsf-4.8 branch
* 2013.08 4.7 release:
- merge fsf-4.7 branch
* Resume work on aarch64 frame layout.
* Resume work on disabling peeling.
== Progress ==
* Generated arm syscall xml file for gdb and made few code changes in
arm-linux-tdep for catch syscall support on arm TCWG-182.
* Ran reverse debugging test suites on arm with arm/thumb and mix mode.
== Plan ==
* Short week due to EID holidays
* Try to Complete code changes and perform testing on arm/x86 for gdb
catch syscall support for arm TCWG-182.
== Progress ==
* Libssp support for AArch64 TCWG 23:
Basic support is enabled by default when frame is made to grow downwards.
Wrote machine descriptions for stack_protect_set and
stack_protect_test to override this default behavior.
Testing the patch internally.
Plan is to emit instructions as RTL instead of template and see
which approach is better.
* Look at builtin return address behavior in the absence of frame pointer:
For X86_64 usage if __builtin_return_address(n) n>0 and
-fomit-frame-pointer results in undefined behavior.
Discussed with Marcus and Andrew (mail chain) and decided not to
touch __builtin_return_address(n) where n>0.
Decided to leave it as return 0 for frame number other than current frame.
* TCWG-20 gprof support patches.
Re-implemented gprof patches without builtin_return_address usage
for frame number n >0.
The "mcount" in glibc needs two arguments. The "mcount" routine
will be emitted by GCC with an argument to previous frame return
address.
And in the glibc "mcount" routine will be modified to use
builtin_return_address(0) for the second argument.
http://gcc.gnu.org/ml/gcc-patches/2013-08/msg00148.html
Waiting for comments.
Matt suggested to try and return a label address inside the function
while generating mcount. But profiling code is expanded before any
local labels are generated.
Also need to research more on this approach. So stopped and decided
to use simpler approach.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Update review comments and upstream gprof patches
==issues==
* LTO/PGO work stopped now since libssp support priority is more
Misc
------
09-August Public holiday in India.
== Progress ==
* Worked on integrating Cbuildv2 with Jenkins, an automated build
system used by the LAVA team.
- Uses cbuildv2 to fetch, configure, build, and install a C
toolchain
cross or native build.
* Wrote a script to convert DejaGnu sum files into Junit format, which
can be imported into Jenkins for viewing. Initial test is online at:
https://ci.linaro.org/jenkins/view/toolchain/job/junit-parsing/.
A work
in progress, and Jenkins is a bit limited in the allowed test
results.
* Did expense reports for Connect - Cauldron trip.
== Plans ==
* Refactor how cbuildv2 dependencies for packages are handled so
they work more than one level deep.
* Have cbuildv2 build C++ after eglibc.
* More Jenkins integration.
* Work on wiki pages.
- rob -
== Progress ==
- Addressed VRP based zero/sign extension elimination review comments
- Make check passes but spec2k gcc fails in results comparison;
investigating it
- Started again with spec2k comparison for ARM to see potential
optimization opportunities
- Installed libacovea in Chromebook with some tweaks to study affects
of optimization options
== Plan ==
- post the VRP based zero/sign extension elimination patch
- continue with pec2k comparison for ARM
== Misc ==
- Was on holiday until 29th (4 day week)
== Issues ==
* None
== Progress ==
* Validate and release Linaro toolchain binaries 2013.07.
* Commit the fix for pr57637.
* Revise patch and test case for lp1189445.
* Separate conditional compare changes to small patches and test.
* Send out the patch of "Reassociate X == CST1 || X == CST2 if
popcount (CST2 - CST1) == 1 into ((X - CST1) & ~(CST2 - CST1)) == 0"
for internal review.
* R/M toolchain internal release work.
== Plan ==
* Send out the conditional compare patches for review.
== Planned leaves ==
* Aug 19-20.
== Progress ==
* Divmod 64
- Got generic lowering working, with an ugly hack
- Working on custom lowering with new node types
* Testing the SLP vectorizer on O3 and O2
- Found some regressions, need to investigate
- It's going to be on by default on O3 from now on
* SLP vectorizer introduced by default on O3
- Lots of failures in ARM test-suite due to illegal vector types
- Fixed on patch r187658
== Issues ==
Had a bit of a problem with my tooth, had to stay away for a while... put
me away from working on divmod properly... :(
== Plan ==
HOLIDAYS!!!
Progress:
* v7 mach-virt upstreaming:
** implemented architected timer support for TCG, sent patches
** nearly finished cleanup of mach-virt including adding virtio support
** ran into an odd bug where putting RAM not at address zero results in
the kernel not booting -- need to debug
** once that is fixed should just need to do final testing and send patches
Plans:
* look at OVS' v2 a8-kvm-support patches
-- PMM
== Progress ==
* Libssp support for AArch64 TCWG 23
Discussed with Matt and decided to assume "glibc" will export canary
guard variable in TCB, for aarch64.
It will export it as global variable for 32 bit. Working on top of
Christophe patch that make frame grows downward.
* Look at builtin return address behavior in the absence of frame pointer.
For X86_64 usage if __builtin_return_address(n) n>0 and
-fomit-frame-pointer results in undefined behavior.
In Ubuntu 12.04 the native GCC 4.7.1 resulted in segmentation fault
on x86_64 machine for such a test.
Currently planning to close this as undefined behavior in aarch64 as well.
Discussing with Marcus on this.
* TCWG-20 gprof support patches.
Re based with latest trunk and regression tested.
http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01352.htmlhttp://gcc.gnu.org/ml/gcc-patches/2013-07/msg01333.html
Misc
* Tuesday spent on Internal (AMD) work.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Update review comments and upstream gprof patches
==issues==
* LTO/PGO work stopped now since libssp support priority is more.
== Progress ==
* Completed initial investigation on catch syscall support on arm TCWG-182.
* Looked into dwarf assembler to generated architecture independent
debug information for dwarf2 test cases.
* Resolved some gdb.mi configuration issues due to which some test
cases were failing.
* Review status of GDB testing on arm and filled up JIRA with proposed
future work.
== Plan ==
* Continue work on gdb catch syscall support for arm TCWG-182.
* Background task: Understanding dwarf assembler to generate dwarf2
debug information for architecture test cases.
* File UK visa for meetings in September after receiving invitations.
== Progress ==
* Produced spec2000 benchmark data on panda for fsf-4.7, fsf-4.8,
gcc-linaro-4.7, and gcc-linaro-4.8.
* Helped Charlie get stared with building the toolchain.
* Found "experimental" option that got crosstool-ng actually working.
* Got cbuildv2 now doing much of the process crosstool-ng does for
a complete stage1 build.
* Improved native and cross toolchain builds via cbuildv2.
== Plans ==
* Continue working on cbuildv2 till it's usable by others.
* Looks like I have a pile of new wiki pages to write.
== Progress ==
* Induction and set up work environment
* Started investigating how to build gcc cross compilers, so that it can be
documented clearly [TCWG-190 <http://cards.linaro.org/browse/TCWG-190>]
* I can build a working arm-none-linux-gnueabi crosscompiler, and
understand each of the steps involved
* Using the same method, aarch64-none-linux-gnu does not build
== Issues ==
* None
== Plan ==
* Write up knowledge gained so far
* Find out why aarch64 doesn't work
* Find out more about other build variations (multilib/multiarch etc) and
how that affects what I've done so far
== Progress ==
* Backported aarch64 string functions and ARM gcc 4.8 fix in eglibc.
* Released eglibc 2.17 2013.07-2.
* Forward ported binutils AArch64 IFUNC patches to HEAD so Marcus can test them.
* Closed stack guard JIRA card and made a new one for pointer guard.
* More malloc benchmarking, reading etc.
* Started work on malloc code.
* Booked flights for LCU13!
== Issues ==
* None.
== Plan ==
* Deal with any test feedback on IFUNC patches.
* malloc
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Looking at 64-bit divmod on two fronts:
- Clean, but intrusive on target-independent code
- Dirty and duplicated, but restricted to target-specific code
* Long discussion about the purpose of the IR on the LLVMLinux list
* Watching some GNU Caldron videos
== Plan ==
* Continue looking at divmod for 64-bit values
* Start investigating cross-compilation issues
* When Rob is ready, have a look at CBuild2 for LLVM+Benchmarks
Progress:
* started on getting v7 mach-virt into shape for upstreaming:
doesn't currently work on TCG due to missing architected timers emulation
* sent fixes for some minor bugs in virtio-mmio noticed by reviewers
* support for various people for "I tried to boot linux in QEMU/KVM
and nothing happens" issues. This is usually because of a misconfigured
kernel which is either not sending serial output to the right place
or stopped with an error before the point where serial is set up.
However it's pretty awkward for users to debug especially compared
with x86 which doesn't generally have these issues because all x86
hardware is sufficiently the same that console and/or earlyprintk
just about always works.
* started the conversation on kvmarm about what the CPU in a KVM VM
ought to look like (always same as host? always an A57? always some
"generic VM CPU"? do we care (does the OS care?) that it has a GICv2
when the same CPU in h/w has a v3)
* came up with a clever hack for making QEMU QOM object struct fields
be only accessible to the object's implementation and not its users,
using gcc's "deprecated" attribute and some CPP macros.
-- PMM
### About Linaro eglibc
Linaro eglibc is a release of the eglibc C library with bug fixes and
enhancements for ARM platforms. eglibc is a variant of the GNU libc
designed to work well on embedded systems.
### Linaro eglibc 2.17 2013.07-2
The Linaro Toolchain Working Group is pleased to announce the 2013.07-2
release of Linaro eglibc 2.17, the second release in the 2.17 series.
This release is based on the latest upstream eglibc 2.17 stable branch,
but with additional features and bug fixes.
#### Additional Features
* Faster ARM memcpy implementation for hardware with NEON or VFP support.
* Optimized string functions for AArch64: memcmp, memset, memcpy, memmove,
bzero, strcmp, strlen, strnlen, strncmp.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.07/components/toolchain/eglibc-linaro
#### Development Tree
* git://git.linaro.org/toolchain/eglibc.git
This release was built from the `linaro_eglibc-2_17-2013_07-2_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
Hi,
I am new to the linaro toolchain and have two questions don't find an
explicit answer. Help you experts can help.
1. Can I use linaro arm toolchain to build application for armv5t core?
My box is a arm926ejs.
2. Does anyone has experience in making linaro current version work with
buildroot? I tried, but got a lot of strange error. (maybe it is the
same problem as question 1, since I set my cpu as arm925t in buildroot).
Thanks in advance.
--
I can't go back to yesterday - because I was a different person then
The Linaro Toolchain Working Group announce the 2013.07-1 Linaro GCC
4.8 release. This is a respin of the 2013.07 release because of an
issue with internal memcpy and -mno-unaligned-access.
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07-1
Please find the original 2013.07 announcement below.
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.8 and Linaro GCC 4.7.
Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based
off the latest GCC 4.8.0+svn200355 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.1+svn200355
* Address Sanitizer support for ARM.
* New -mrestrict-it option support.
* Backport of support for further AArch64 instructions.
* Backport of support for further ARMv8 AArch32 instructions.
* Reverted recent changes to shrink-wrapping and tail-calls.
Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7
series. Based off the latest GCC 4.7.3+svn200408 release, this is the
third release after entering maintenance.
Interesting changes include:
* Updates to GCC 4.7.3+svn200408
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? http://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
== Progress ==
Was on vacation most of the week Mon - Wed leave (Thursday half day).
* Libssp support for AArch64 TCWG 23
Restarted the work. Looked at how X86 GCC generated code. Looking at
per thread support for libssp and compiler support.
== Plan ==
* Continue Libssp support for AArch64 TCWG-23
* Look at builtin return address behaviour in the absence of frame pointer.
==issues==
* LTO/PGO work stopped now since libssp support priority is more.
== Issues ==
* None.
== Progress ==
* Attended linaro Connect (Wk 28)
* OE Launchpad bug #1200620 :
[ICE while building Exynos5 kernel with current 4.8 branch]
- Issue due to a bad usage of unaligned load/store in HI mode
- Fix approved and committed upstream
- Release respin ongoing.
* Launchpad bug #1186218 :
[kernel doesn't boot on Arndale/Nexus with Linaro GCC 4.8]
- Discussed the issue at Connect
- Waiting for a reduce testcase from the kernel team.
* LRA on AArch64:
- Some regressions in the testsuite
- Debugging ongoing.
* LRA on AArch32:
- Still some issues with libgcc build in Thumb
- Back on this issue.
* 2013-08 4.8 release:
- Backports from trunk ongoing.
== Plan ==
* 4.8 Backports
* Summer break
== Progress ==
* Debugged gdb.mi and linux-nat code to investigate issues on arm.
* Cleared pending gdb patches.
* Listened to Connect sessions and key notes on youtube
* Follow up on travel hick ups and UK/US visa application
== Plan ==
* Review GDB current status and fill up JIRA with proposed future work
* Windup work on gdb test suite updates and submit remaining patches.
* Follow up on gdb patches
* Clear/Update JIRA cards
* File UK visa for meetings in September.
== Progress ==
* Attended Connect, did presentation and other stuff.
* Left Connect early to attend the Gnu Tool Cauldron. Ran BOF on
testing the toolchain, attended many talks including the one on
Graphite.
* Worked on modularizing cbuildv2 package parsing into functions so
bzr,svn,git URLs and tarball snapshots from toolchain64 work the
same.
* Added LLVM support to cbuildv2, Clang and the testsuites only work
if built separately for now.
* Reproduced build problem Viswanath was having with crosstool,
Zhenqiang knew the missing package(s) that kept C++ builds from
working.
* Built fsf 4.7 and 4.8 as well as Linaro GCC releases for July on Panda
board.
* Got spec200 benchmarks working on panda, ran them for the above
branches and releases.
== Plans ==
* Help Charlie come up to speed on building GCC.
* Run more benchmarks on the above branches and do graphs on
performance.
* See why for me on a panda, all the tests fail with make check.
* Find time to work on cbuild2 so Charlie can beta test it sometime
soon.
- rob -
== Issues ==
* None
== Progress ==
* Enable multi-arch for Linaro aarch64-linux-gnu build.
- Configure gcc with --enable-multiarch.
- Backport eglibc patches for rtlddir.
- Configure eglibc to set libdir, slibdir and rtlddir.
* Follow up the patch for pr57637.
* Reassociate X == CST1 || X == CST2 if popcount (CST2 - CST1) == 1
into ((X - CST1) & ~(CST2 - CST1)) == 0.
- Test is ongoing.
* Rebase conditional compare changes to trunk.
== Leave ==
* July 17.
== Plan ==
* Send out the conditional compare changes for Linaro internal review.
== Progress ==
Short week (3 days)
* Divmod
- Finished most of the work, patch upstream (r186390)
- Trying to lower remainder as divmod without sacrificing the div+mod
merge during legalization
* Buildbots
- One panda fails even at 920MHz, replaced with a new one
- Using decent power supplies now, should work a whole week
- Lab config is messed up, need to start from scratch
- Failed at 920MHz with decent power supply
- Giving up on Pandas as buildbots...
* Background
- Not many code reviews last two weeks, as Connect and the Pandas took
most of my spare time
- Test-suite's Lencod bug fixed upstream, no more need of dirty hacks on
stack offset calculation
== Plan ==
* Continue on divmod lowering, finding a way to merge Custom with Expand
lowering, so not to break the div+rem merge during legalization, but still
lower divmod as Custom. 64-bit types still use them.
* Study cross-compilation issues in Clang and LLVM, prepare a document on
how it works (or not), and what paths we can take to make it better in the
short/medium term.
* Follow up on Phoronix results and CBuild2 benchmarks, time allowing
== Progress ==
* Investigating glibc stack guard support
* Developed initial patches
* Raised ABI issue
* More malloc work
* Integrated tcmalloc into benchmark framework
* Improved benchmark repeatability
* Added Python benchmark script and graphing script
* Respin and commit gdb TLS testsuite patch (my gdb patch queue now empty)
* Committed two of Omair's gdb patches
== Issues ==
* None.
== Plan ==
* Produce some malloc benchmark graphs
* Progress the stack guard work
* Start writing some malloc code
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* attended Linaro Connect (wk 28)
* sent pull requests for target-arm/arm-devs queues
* resent virtio-mmio patchset; this is now ready for commit
and I will send a pullreq with it in next week
* finished off a cleanup of linux-user to remove the support
for configuring targets without threading support
* resorted todo list against cards
* started on getting v7 mach-virt into shape for upstreaming
-- PMM
Hi All,
I am new to linaro. so would like to know more about linaro.
Is linero alternative to yocto project.
does the tool chain support armv5te based SOC.
Ratheendran
Hi Folks,
I'm running two buildbots here at home and am getting consistent failures
from the Pandas because of overheating. I've set up a monitor that will
tell me the current CPU temperature and the allowed maximum, and when the
bot passes 90%, it shuts itself off.
The problem is that I'm running with heat-sinks and the boards are on top
of three fans, so there really isn't much more I can do to solve this
problem.
I personally think this is a hardware problem, since everything is in the
same die, CPU, GPU and RAM, and the physical dimensions of the chip are
quite small. I remember when Intel started overheating (around 486DX66) and
the die was huge (more head dissipation), plus RAM and GPU were separate,
and it still needed a hefty heat-sink.
It's true that gates are far smaller today, but it's not true that a dual
core 1.3GHz + GPU + RAM will produce less heat on a small die than a 66KHz
CPU on a huge die, so why anyone think it's a good idea to release a 1+GHz
chip without *any* form of heat dissipation is beyond my comprehension.
Manufacturers only got away with it, so far, because people rarely use 100%
of the CPU power for extended periods of time, because ARM devices end up
as set-top boxes, mobile phones and tablets. However, even those devices
will heat up when playing 2 h films or games, and they do have some form of
heat sink.
We, at the toolchain group, make things worse by using 100% CPU, 24 / 7,
something that Panda boards, or Arndales were not designed to do. However,
with ARM moving into the server space, their designs will have to be
re-thought, and what a better place than Linaro for making sure we get it
right?
For the time being, I believe we *must* have air conditioning in the Lab
all the time, and we *must* have heat-sinks on every board, and we *must*
monitor the CPU temperature of the boards, at least until we're comfortable
that they're not failing all the time.
Can we make a temperature monitor (like the one attached) a default feature
on Linaro Ubuntu distributions? We could dump that info to the syslog/dmesg
whenever it crosses the (say) 75% threshold, and report more often when it
crosses the 95%, possibly dumping the processe(s) that are consuming more
CPU at the time, to enable post-mortem debugging.
cheers,
--renato
As a side note, the quad-A9 ODroid does ship with a massive heat-sink,
which also serves as a fancy case. Quite clever, really.
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.8 and Linaro GCC 4.7.
Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based
off the latest GCC 4.8.0+svn200355 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.0+svn200355
* Address Sanitizer support for ARM.
* New -mrestrict-it option support.
* Backport of support for further AArch64 instructions.
* Backport of support for further ARMv8 AArch32 instructions.
* Reverted recent changes to shrink-wrapping and tail-calls.
Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7
series. Based off the latest GCC 4.7.3+svn200408 release, this is the
third release after entering maintenance.
Interesting changes include:
* Updates to GCC 4.7.3+svn200408
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? http://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
Hi Linaro toolchain team,
I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
everything works fine except GDB.
The error message is "Im sorry, Dave, I can't do that. Symbol format
`elf32-littlearm' unknown'."
I searched on google, and leads me to the page
https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
I configured linaro-toolchain to build a native gdb for arm platform, both
native gdb and cross-gdb can't work, they report the same error message.
Is there any way I can get the patch?
Please help me on this!
Thank you very much!
Yupeng Chang
July 05, 2013
Hi Michael,
I have fixed this issue.
I think there is a bug in crosstool-ng-1.13.1-2013.06.
In
crosstool-ng-1.13.1-2013.06/contrib/linaro/patches/gdb/linaro-7.6-2013.05,
there is a patch libintl-as-lib.patch, which adds -lintl to LDFLAGS of gdb,
however, in the 300-gdb.sh,
--without-included-gettext is used, this option makes libintl inside gdb
quit building, in this case, when checking ELF support in BFD, -lintl
cannot be found, this leads to fail.
In eglibc-2.17, intl lib is included in libc, --without-included-gettext is
reasonable to apply to gdb, which means libintl-as-lib.patch is no longer
needed, because this patch adds an option which will be no longer needed
for building gdb with eglibc-2.17
After I removed the patch, every thing works fine now, in gdb/config.log,
checking ELF support in BFD reports OK now.
Yupeng Chang
July 06 2013
On 6 July 2013 03:21, Michael Hope <michaelh(a)juju.net.nz> wrote:
> Hi there. I'm afraid I'm not working on gdb these days but it sounds like
> a configuration error. I suggest asking on
> linaro-toolchain(a)lists.linaro.org as they should be able to help.
>
> -- Michael
> On Jul 5, 2013 8:03 PM, "常桓" <changyp6(a)gmail.com> wrote:
>
>> Hi Michael,
>> Sorry for bothering you about a GDB issue.
>> I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
>> everything works fine except GDB.
>> The error message is "Im sorry, Dave, I can't do that. Symbol format
>> `elf32-littlearm' unknown'."
>> I searched on google, and leads me to the page
>> https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
>>
>> On that page, you posted this is fixed, could you show me the fix?
>>
>> I configured linaro-toolchain to build a native gdb for arm platform,
>> both native gdb and cross-gdb can't work, they report the same error
>> message.
>>
>> Please help me on this!
>>
>> Thank you very much!
>>
>> Yupeng Chang
>> July 05, 2013
>>
>>
>>
>>
== Progress ==
* 2013.07 release preparation:
* remaining backports
* reverted 2 sets of patches from 2013.06
* started release process
* Worked on setting up an internal build + validation to monitor FSF
trunk on ARM
* Internal support
== Next ==
* All week at Connect
== Progress ==
* 4 day week (leave on Thursday)
* Pushed memcpy improvement to newlib.
* Found and fixed ARM IFUNC issue in glibc.
* memcpy merged into bionic but not yet used (see gerrit review).
* Pinged and applied gdb testsuite patch, only one left to apply.
* More work on malloc benchmarking.
* Preparation for Connect.
== Issues ==
* None.
== Plan ==
* Connect all week
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Buildbots
- Prepared buildbot images, tested, setup is very quick and efficient
- Set up local buildmaster, two buildslaves doing self-hosting tests
- Each slave took 20 minutes setup time, including flashing SDCard
- Failures after a few hours running at 100% @ 1.2GHz @ < 26C
- Reducing to 920MHz does fix the problem, but this is not a solution
- Leaving the two pandas alive during Connect in hope they won't fail
* LNT Lencod
- Following up on Lencod stack corruption, we're closer to a solution
* Dibmod
- Didn't have much time to look at it properly, but my solution was over
simplified
- Will probably only look at it better after Connect
* Chromebook
- Had to re-install Ubuntu on it, using Raring (Saucy didn't work)
- Glad all my data is in the external hard-drive
* Others
- Added a doc about platform-specific tests that usually break the bots
http://llvm.org/docs/TestingGuide.html#platform-specific-tests
- LLVMLinux meeting, cross-compilation with Clang is almost impossible
- Haven't been able to review many patches, thanks to Tim, they kept going!
== Plan ==
* Connect whole next week
== After Connect ==
* Finish implementation AEABI divmod/udivmod calls
* Check why Phoronix result pages are not working
* Put self-hosting bots back on 920MHz mode in the Lab
Progress:
* misc:
** went through "aarch64 preparation" patchset (originally Alex's,
then modified by John), fixed a lot of issues/nits, and sent out
an updated version; this is now I think upstreamable-quality
except that it doesn't provide anything useful on its own.
** looked at the VirtualOpenSystems patchset for v8 KVM support in
QEMU; needs to be reconciled with John's work in the same area.
** Mans' LDA/STL patches now queued in target-arm.next to go upstream
** preparation for Connect
Plans:
* mach-virt
-- PMM
== Issues ==
* None
== Progress ==
* Investigate library dir issue in aarch64-linux-gnu release.
- Crosstool-ng should not link lib64 to lib.
- Eglibc used in Linaro release is too old. No configure to change
lib to lib64.
- Runtime tarball should not assume multiarch (aarch64 gcc does not
support it yet).
- When creating runtime tarball, use lib or lib64 bases on the TARGET.
* Fix misc issues in local conditional compare changes.
* Investigate how to optimize "c == '+' || c == '-'".
== Plan ==
* LCE13: July 8-12.
== Progress ==
* Short week (3 days off sick)
* Aarch64 frame growing downward: sent patch
* A few merges on Rob's behalf after approval by Yvan
* Prepared one more merge request
* Prepared for Connect
* Internal support
== Next ==
* Handle remaining backports for 4.8 release
* Disable peeling: resume work
== Issues ==
* None.
== Progress ==
* OE Launchpad bug #1192953 :
[g++ compilation terminated with error on Linaro-openembedded lamp image]
- Doko submitted a patch for that issue one year ago
- Mailing list pinged
* Launchpad bug #1186218 :
[kernel doesn't boot on Arndale/Nexus with Linaro GCC 4.8]
- Reproduced the build locally
- Need to have access to some hardware for further investigations
* LRA on ARM and AArch64:
- Fixed the issue, compiler now bootstrap
- Testing on-going before submission
* 2013-07 release:
- merge reviews
* LCE13:
- Connect registration done
- flight and hotel booked.
== Plan ==
* Merge review and release preparation
* LRA
== Progress ==
* Re-wrote gdb.dwarf2/dw2-error.exp and gdb.dwarf2/clztest.exp for arm.
* Investigated catch syscall patch in gdb patches to narrow down changes
required for arm.
* Continued with gathering documentation for future visas.
== Plan ==
* Test and fix failures due to optimization code in gdb.dwarf2/clztest.exp
for arm.
* Figure out a way to generate arm assembly for dwarf2/fission* gdb tests
using gcc.
* Further investigation arm requirements by going through catch syscall
patch for gdb on x86.
* Work with James to start UK and US visas for future visits.
Most of Last week spent on internal AMD work.
== Progress ==
* AArch64 LTO and PGO support.
LTO run for coremark and ran coremark on V8 model with and without the patch.
Ran perf on the model against the both the coremark binaries.
For non LTO, retired instructions seems to be less than the LTO one.
And PGO run for coremark did not emit any gcda file. Need to drill down further.
* AAarch64 testing
GCC runs still on going. Experimenting on spawning subtarget tests to
more than one V8 model.
== Plan ==
* Complete gcc testsuite with runs with trunk and trunk+gprof GCC patches.
* Continue LTO and PGO runs for AArch64
==issues==
* libssp support for AArch64
This work is currently in hold. Needed frame layout changes before
restarting.
== Progress ==
* spec2k comparison between ARM and x86
- Specfp on x86 has some failures in trunk
- Trying 4.8 now
- Analysed some of the benchmarks and documenting them
- continuing with the rest.
== Plan ==
* Continue with spec2k comparison between ARM and x86
== Issues ==
* None
== Progress ==
* Investigate big endian toolchain build in Linaro crosstool-ng.
- Fix an aarch64 triple name issue.
- Add Linaro armeb-linux-gnueabihf, aarch64_be-linux-gnu and
aarch64_be-none-elf configs for big endian builds.
- Please find the reference builds at:
http://cbuild.validation.linaro.org/build/crosstool-ng-linaro-1.13.1+bzr258…
* Design a test case for lp1189445 and revise the patch for review.
* Revise the shrink-wrap related fix for pr57637 and send out for review.
* Investigate lp:1194501 and lP:1194123
- lp:1194501 is confirmed a "tail call" issue, and also in trunk pr57731.
- lP:1194123 seams shrink-wrap related, since the case pass with
option -fno-shrink-wrap.
== Plan ==
* Continue on conditional compare.
Best Regards!
-Zhenqiang
== Progress ==
* Divmod patch
- Trying to regain knowledge about the SelectionDAG infrastructure
- Working with Tim and Joey, got a patch working, but seen some failures
in test-suite
- Will investigate and submit when all is clear
* Lencod in LNT
- Bug is a mix of ByVal with wrong spill offset, teams interacting
- Bug fixed by a side effect of another change, can't guarantee future
stability
* CBuild
- Patch merged, fired another LLVM benchmark, which failed the same way
- Not sure how to proceed here...
- Should I dig deep on the old CBuild?
- Or should I wait for CBuild2?
* Release Maintenance
- Talks about maintenance of old/current releases sparking on the list
- Bots, tests, benchmarks, release process will have to be followed for
those releases
- Binary & API compatibility kept, performance doesn't matter much, only
serious bugs fixed
- This will increase the cost of background duty on our team
* Other
- Reviewing some more patches
- Checking impact of a new alias analysis in the loop vectorizer, all good
- EuroLLVM 2014 meeting
- Long discussions about pre-UAL support in LLVM: Short answer: no.
- Someone else will look at PerfDB analysis, one less thing to do
- Got the Buildbot Pandas home, will look at them next week
== Issues ==
* After using all my RAM all the time, for a week, I found a fault on it
which prompted kernel panic and stopped my laptop from booting. Luckily, it
was just one of the two chips, and even better, it has a lifetime
guarantee! But I'll only get a new one after Connect... :(
== Plan ==
* Finish implementation AEABI divmod/udivmod calls
* Carefully analyse what's the best configuration for the pandas and
produce a pre-packed image
* NOT put them back before they're stable, snapshot a known good
configuration
* But put TWO pandas as self-hosting (and leave Galina's alone)
Time allowing...
* Check why Phoronix result pages are not working
* Write about target-specific tests on TestingGuide.rst
* Write a thing or two about the optimization levels in LLVM for the
official docs
== Progress ==
* Some further work on AArch64 ifunc failure, no progress.
* Add some extra features to cortex-strings plotting capability.
* More memcpy gerrit review.
* Basic framework for testing and benchmarking malloc.
* Extracted glibc malloc from glibc.
* Pushed memcpy performance tweak to cortex-strings and newlib for review.
== Issues ==
* None.
== Plan ==
* Prepare for Connect.
* Resubmit memcpy to gerrit as requested.
* Respin AArch64 ifunc patches against latest head.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* VIRT-49 closed out (cp15 migration patches committed upstream)
* virtio:
** virtio-mmio patchset v1 now sent out to qemu-devel
* misc:
** fixed some instances of undefined behaviour (mostly shift related)
diagnosed by clang -fsanitize=undefined
** worked through upstream review backlog, sent target-arm and arm-devs
pullreqs
Plans:
* VirtualOpenSystems (sponsored by Huawei) have sent a patchset for
KVM support in QEMU for ARMv8; need to review this and reconcile it
with the Linaro work in progress in this area
* mach-virt
* preparation for Connect
-- PMM
== Issues ==
* None
== Progress ==
* Investigate conditional compare RTL representation.
- Fix new fails when expanding conditional compare to cmp_and/cmp_ior.
* Identify the root cause for pr57637.
== Plan ==
* Continue on conditional compare.
== Issues ==
* None.
== Progress ==
* OE Launchpad bug #1192953
- 4.8 g++ failed to find c++ included headers because of the
combined usage of --with-sysroot and --with-g++-include-dir
- Investigated the issue with Andrew McDermott
- found an existing OE workaround
* LRA on ARM and AArch64:
- Fixed AArch64 failure
- Moved to the new one
* Cbuild Babysitting
== Plan ==
* Merge review
* LRA
== Progress ==
* Started re-writing x86 assembly language gdb test cases for arm.
* Debugging watchpoints code to investigate issues on arm.
* Upgraded chromebook Ubuntu installation to a faster SD card.
* Tried to resolve various travel hurdles. Gathering different kind of
documents for future travel, submitted passport for extension etc.
== Plan ==
* Submit more gdb patches to mailing list.
* Wind up work on translation of gdb test cases in arm assembly.
* Further investigation about watchpoint issues on arm.
* Work on filing US and UK visit visas.
== Progress ==
* AArch64 LTO and PGO support.
Tweaked make file to run coremark on V8/openembedded model
Experimenting with PGO runs for coremark.
* AAarch64 testing
Set up Cross build and test in V8 model for GCC testsuites on one of
workstation in lab.
Completed g++ testsuite with V8 model for gcc trunk. Running gcc tests now.
* Installed Ubuntu 13.04 on Chrome book.
== Plan ==
* Complete gcc testsuite with runs with trunk and trunk+gprof GCC patches.
* Continue LTO and PGO runs for AArch64
* Linaro connect preparation, check VISA status.
==issues==
* libssp support for AArch64
This work is currently in hold. Needed frame layout changes before
restarting.
* Waiting for some inputs from Rob on Bootstrap issue with GCC on V8 model
== Progress ==
* Generate single call to divmod
- Addressed review comments
- Proposed a new patch for discussion
* spec2k comparison between ARM and x86
- Obtained Profile results for both architectures
- Analysing gzip and found some register allocation issues.
* VRP based zero/sign extension
- Still no review for rtl changes
- Pinged again
== Plan ==
* Continue with spec2k comparison between ARM and x86
== Progress ==
* Added support to cbuildv2 to handle merges from GCC trunk.
* Merged backports of 199694 199705 199733 199734 199739
199810 199814 199533 200019 200020 200061 200062 200096
200148 200152.
* Managed to survive making complex travel plans for the next few
weeks.
* Fixed eembc and denbench benchmarks so they work again.
== Plan ==
* Work on benchmarking & testing database, more graphs, write up
presentation.
* Fix running spec2000 benchmark, produce some results.
* Commit backports to svn as merges approved.
* Off on leave Wed till Connect. Will be 100% offline.
== Issues ==
* Backports of 199792, 199959 have major conflicts. Required patches
for these to be merged not in backports list.
* Turns out benchmarks have not worked for several months,
particularly spec2000 still doesn't want to run.
Still having the issue of FM/semi-hosting not catching seg-faults using
2013.06. With "aem-ve.specs", a fault seems to call main() repeatedly.
With "dimon.specs", FM hangs. Any ideas how to properly compile/deal with
faults in semi-hosting mode?
thanks,
Rory
=== hello.c ===
#include <stdio.h>
int
main(int argc, char *argv[])
{
printf("hello.\n");
* ((unsigned int *) 0) = 0; // cause seg-fault
return 0;
}
=== compile/run ===
.../gcc-linaro-aarch64-none-elf-4.8-2013.06_linux/bin/aarch64-none-elf-gcc -specs=aem-ve.specs -march=armv8-a -c hello.c
.../gcc-linaro-aarch64-none-elf-4.8-2013.06_linux/bin/aarch64-none-elf-gcc -o hello -specs=aem-ve.specs -march=armv8-a hello.o
.../Foundation_v8 --image hello --quiet --semihost-cmd=hello
hello.
hello.
hello.
hello.
hello.
...
== Progress ==
* Completed list of backports from trunk to linaro-4.8 for 2013.07
release and sent it to Rob.
* Merged backport of address sanitizer in linaro-4.8 branch
* Aarch64 frame growing downward: checking what really needs to be
changed in GCC. Documentation not very verbose :-)
* Various attemps to resurrect my old testsuite patch to be stricter
at excluding some unsupported configurations.
* Internal support
== Next ==
* Aarch64 frame growing downard.
* Disable peeling: make the vectorizer less aggressive
* Neon intrinsics/vuzip/veor: resume work
* Book hotel/flight for Connect.
== Progress ==
* Release 3.3
- Finally public
http://llvm.org/releases/download.html#3.3http://llvm.org/releases/3.3/docs/ReleaseNotes.html
* Pandaboard
- We lost two bots this week:
- linaro-panda-01: buildslave binary segfaults, needs fresh re-install?
- linaro-panda-02: GCC installation is broken, needs fresh install!!
- This means we need:
- At least two boards for each bot
- At least one extra board of each type, off-line to save power/space
- A standard Image on a gz file to flash & boot quickly, for each type
* Chromebook LNT
- Binary search on patch that broke the buildbot, found the culprit
- Reduced the problem, bug posted, discussing
http://llvm.org/bugs/show_bug.cgi?id=16393
* CBuild
- Built Clang+LLVM in CBuild, need benchmarks, sent a patch, waiting for
merge
* Phoronix results
- Adding them to internal (pw protected) website to avoid public confusion
- The numbers are meaningless for now and we don't want panic within the
general public:
http://people.linaro.org/toolchain-benchmarks/llvm/
- Visualization still broken. Works well only locally on Firefox. Why not
HTML? Why not PNG? Sigh...
* Administrativia / Others
- Lots of patches to review
- Auto-vectorizer now turned on by default on -O2 and -Os!
- Meeting with LLVMLinux folks, good progress, good plans, trying to get
more traction in that direction on Connect
- Trial of "ARM maintenance" backlog item:
http://llvm.org/bugs/show_bug.cgi?id=16387
== Plan ==
* Fix LNT bug
* Implement AEABI divmod/udivmod calls
* Try CBuild benchmark again (when patch merged)
* Carefully analyse what's the best configuration for the pandas and
produce a pre-packed image
* NOT put them back before they're stable
* But put TWO pandas as self-hosting (and leave Galina's alone)
* Check why Phoronix result pages are not working
Time allowing...
* Have a look at PerfDB
* Write a thing or two about the optimization levels in LLVM for the
official docs
== Progress ==
* Reverted AArch64 ifunc change while investiigation continues.
* Created TCWG-177 for gdb.thread testsuite failures.
* Merged new strlen code into cortex-strings and newlib.
* Applied a few more gdb patches upstream.
* Fixed a few bugs and added a few features to cortex-strings benchmarks.
* gerrit review of memcpy change ongoing.
== Issues ==
* None.
== Plan ==
* Reproduce AArch64 ifunc issue.
* Resolve gerrit memcpy review if possible.
* Start work on malloc test and benchmark framework.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* virtio:
** have some patches that work (including modifying the device tree
to tell the kernel where the virtio transports are)
** more cleanup still required; in particular need to figure out
nice way of having the board model tell boot.c where the transports
are and what the interrupt routing info should look like
** virtio spec needs clarification about what a virtio-mmio transport
with no backend is supposed to look like
* misc:
** fixed linux-user utimensat breakage caused by a patch of mine
from last week
** helped Grant Likely with debugging problems running UEFI on QEMU
(and caught a QEMU bug in the process)
** reviewed another round of LDA/STL patches and a VSEL patch
Plans:
* continue mach-virt/virtio work
-- PMM
The Linaro Toolchain and Platform Working Groups are pleased to announce
the 2013.06 release of the Linaro Toolchain Binaries, a pre-built version
of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.8 2013.06
* Linaro Newlib 2.0 2013.06
* Linaro Binutils 2.23 2013.06
* Linaro Eglibc 2.17-2013.06 (Aarch64 only)
* Linaro GDB 7.6 2013.05
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link your
programs against.
Interesting changes include:
* Linaro versions of Binutils, Newlib and Eglibc are included
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2,
Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and
later, and should run on any Linux Standard Base 3.0 compatible
distribution. Please see the README about running on x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2013.05
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Note: This will likely be the last release built with support for (e)glibc
2.15 on armv7. With future releases, you will have to either use a newer
(e)glibc on the target system, or link statically.
On Thu, Jun 20, 2013 at 2:41 PM, Thomas Petazzoni
<thomas.petazzoni(a)free-electrons.com> wrote:
> Hello,
>
> I'm facing a bizarre problem with an armeb toolchain built by
> Buildroot. I'm also posting this to the crossgcc@ list since there are
> some gcc/binutils experts out there.
>
> First, a little bit of background. ARM Big Endian comes into two
> variants:
>
> * BE32, which was used up to ARMv5, where both the instructions and
> the data are Big Endian.
>
> * BE8, which is used since ARMv6, where the instructions remain
> little-endian and only the data are big-endian.
>
> See
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0338g/ch06s0…
> for some details about this.
>
> So, I've built an ARMv7 Cortex-A8 toolchain, with the armeb
> architecture selected. The CROSS-gcc -v shows that it was configured as
> follows:
>
> --target=armeb-buildroot-linux-uclibcgnueabi
> --with-abi=aapcs-linux
> --with-arch=armv7-a
> --with-tune=cortex-a8
>
> Then, I wrote a simple program that contains some data and
> instructions, built it under several conditions, and observed with
> hexdump whether the data and code was little-endian or big-endian.
>
> And the results are somewhat surprising: when I explicitly pass
> -mbig-endian, I get the proper behavior (BE8 code with code in little
> endian and data in big endian), but when I don't pass any flags to the
> compiler, I get an incorrect behavior: both the code and data are big
> endian, as if the BE8 wasn't used (and readelf confirms that it wasn't
> used). See below the detailed results.
>
> Note that the compiler is supposed to automatically use BE8 on
> ARMv6/ARMv7 and BE32 on ARMv5 and earlier cores.
>
> The data is DEADBEEF, and the instruction is E52DB004.
>
> Flags used Observed data Observed code Comment
> ======================= =============== =============== =========================================
>
> -mlittle-endian EFBEADDE 04B02DE5 Code and data in LE -> OK
> -mbig-endian DEADBEEF 04B02DE5 Code LE, data BE, binary marked BE8 -> OK
> no flags DEADBEEF E52DB004 Data BE (ok!), code BE (*NOT* ok) -> NOK
> -march=armv5t -mbig-endian DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
> -march=armv5t DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
>
> As can be seen in this table:
>
> (*) On ARMv5, regardless of whether -mbig-endian is passed or not, the
> code produced is correct (both code and data are big endian, which is
> correct for ARMv5 where the big endian mode is BE32)
>
> (*) On ARMv7 however, the code is different whether -mbig-endian is
> passed or not, even though an "armeb-linux" compiler is supposed to
> generate big endian code by default. When no flags is passed, both the
> data *and* code are big-endian (so it's BE32 like on ARMv5), but
> passing -mbig-endian makes the thing behave properly (code is
> little-endian, data is big-endian).
>
> I'm using binutils 2.23.2 and gcc 4.7.3.
>
> Any ideas?
Hi Thomas,
I added linaro-toolchain to CC as there may be someone there who knows
the answer.
I got an app to compile fine for v8 FM with gcc, but I notice that
seg-faults hang the simulator. Using raise() properly exits FM,
but I can't seem to trap the seg-fault with signal() or do anything
intelligent to know about the seg-fault. Normal execution works well.
int
main(int argc, char *argv[])
{
* (unsigned int *) (0) = 0; // seg-fault hangs FM
return(0);
}
thanks,
Rory
-----Original Message-----
From: linaro-toolchain-boun...(a)lists.linaro.org
[mailto:linaro-toolchain-boun...@lists.linaro.org] On Behalf Of Matthew
Gretton-Dann
Sent: Sunday, May 19, 2013 2:47 PM
To: Padgett Don-B43265
Cc: linaro-toolchain(a)lists.linaro.org
Subject: Re: Semi-hosting on v8 Foundation Model using gnu tools
Don,
On 17/05/13 20:57, Padgett Don-B43265 wrote:
> The v8 Foundation Model User Guide has a bare metal hello world example
> that uses semi-hosting. The Makefile uses ARM tools, however. Is there
> equivalent support for this example using a bare metal version of the
> gnu tools, such as
> gcc-linaro-aarch64-none-elf-4.8-2013.04-20130422_linux.tar.xz? I took
> a look, but didn't see a way to do this.
It is possible but not necessarily easy.
Using the binary tools you've downloaded you will want to do something like the
following:
aarch64-none-elf-gcc -specs=elf-aem-ve.specs ...
The -specs option has to be on all your invocations of GCC and G++. You should
also invoke the linker through GCC with this option.
Then you need to invoke the model, given an image called foo.axf:
Foundation_v8 --image foo.axf --semi-host="foo.axf OPT1 OPT2" --quiet
Note that the first option to --semi-host is the name of the image again.
Thanks,
Matt
You'll have better luck sending bug reports to the linaro-toolchain
mailing list.
On 18 June 2013 11:50, Bernhard Rosenkränzer
<bernhard.rosenkranzer(a)linaro.org> wrote:
> Hi,
> the 4.8-2013.06 tarball built without version overrides reports itself as:
> 4.8-2013.06-0~dev
> Looks like the release flag isn't set in the tarball.
>
> ttyl
> bero
--
Mans Rullgard / mru
== Progress ==
* Merges for linaro-4.8-2013.06:
- investigated why the cross-validation lack libpthread and libdl.
- fixed cbuild to make these libs available in the same dir as ld-linux.so
- not sure why it wasn't necessary several weeks ago when I first
spawn libsanitizer tests: we changed the prebuilt tarball since then,
but the libs are still at the same place; the binutils version changed
though.
* Re-spawned a merge request for libsanitizer, using the updated
cbuild (libpthread/libdl support, qemu flags updated) and the updated
gcc-4.8 (with my patch to cope with qemu's output of /proc/self/maps)
* Merges for linaro-4.8-2013.07: updated list
* Aarch64 frame growing downward: started.
* Disable-peeling: restarting looking at vectorizer.
== Next ==
* Merges for linaro-4.[78]-2013.07: update list
* disable peeling: see how to make the vectorizer less aggressive
* Aarch64 frame growing downward.
* Neon intrinsics/vuzip/veor: resume work
* Book hotel/flight for Connect
== Issues ==
* None.
== Progress ==
* Releases merge reviews:
- Finished reviews for releases.
* Launchpad bug #1187247:
- Closed as invalid since the issue was on an
attempt to access at an invalid address.
* Cbuild Babysitting:
- Fixed 4.8 repository update on toolchain64.
- Recreate ancestors tarballs and re-spawned jobs
- Re-started Calxedas...
* LRA on ARM and AArch64:
- Resumed the task.
- Investigation of AArch64 failure on-going.
== Plan ==
* Mainly LRA
== Progress ==
* libssp support for AArch64
Libssp support needed AArch64 frame to grow downward. But it is
currently defined as growing upward.
This work is currently in hold. Needed frame layout changes before
restarting. Waiting for feedback from Matt.
* AAarch64 testing
Drilling down Boot strap failure with GCC 4.9 trunk on open embedded
image with V8 model. Fails at time xg++ is linking. Not much progress.
Set up Cross build and test in V8 model for GCC testsuites.
Also looking at increasing timeout for individual tests.
* AArch64 LTO and PGO support.
Started on understanding PGO and LTO runs with AArch64.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* Continue LTO and PGO runs for AArch64
== Progress ==
* Investigated gdb.dwarf2 unsupported issues wrote two new patches for
gdb.dwarf2 testsuite.
* Read some background on dwarf2 to translate test written in x86
assembly into arm assembly.
* Got refusal of visa from Irish embassy. Ran after visa consultants
for issues related to visa application.
* Calls with Irish consulate officers for appeal process and causes of refusal.
== Plan ==
* Submit ready patches for dwarf2 untested/unsupported problems.
* Translate dwarf2 tests written in x86 to arm asm.
* Chromebook os update on a faster sd card. (Still pending)
* Add JIRA cards for gdb features missing on arm. (Still pending)
* Prepare documentation for future visa applications.
== Issues ==
* None
== Progress ==
* Investigate conditional compare RTL representation.
- Expand conditional compare to cmp_and/cmp_ior.
- Test is ongoing
* Investigate lp: 1189445. Patch is in testing.
* Identify the root cause for lp: 1189448. FSF4.8 does not have the
buggy code. Linaro 2013.06 and trunk have fixed it.
== Plan ==
* Continue on conditional compare.
== Public Holiday ==
* Monday, 10 June (4 day week)
== Progress ==
* VRP based zero/sign extension
- Pinged the patch.
* Generate a single call to divmod
- Builtin based implementation bootstrapped and passes regression.
- posted patch and initiated discussion
(http://gcc.gnu.org/ml/gcc/2013-06/msg00100.html)
- long long is not handled now
* Better end of loop counter optimisation
- Dropped md patch
- Verified that Bin Cheng's RTL change noop_move_p fixes this.
== Plan ==
* Respond to patch review
* Set-up X86 benchmarking locally for Spec2k
== Progress ==
* Did QEMU testing for the release by running several images on a
few platforms.
* Did the GCC 4.7-2013.06 release.
* Did the GCC 4.8-2013.06 release.
* Did a spin of the GCC 4.7-2013.06 release.
* Updated benchmark parsing scripts, downloaded historical
benchmark data and data from the release testing.
* Updated SQL query and gnuplot scripts to work with new data.
* Produced some benchmark graphs.
* Finally figured out how to spawn remote Cbuildv1 tests and
benchmarks.
== Plan ==
* Focus on performance and regression test graphs.
* Do builds of FSF GCC branches to compare with Linaro branches.
* Continue improving Cbuildv2 as use it to do all these builds and
testing.
- rob -
== Progress ==
* Branched and released binutils, newlib and eglibc.
* Wrote up some release process docs on the wiki.
* Fixes and further investigation of AArch64 ifunc issue.
* Submitted memcpy to upstream gerrit and ran more benchmarks.
* Submitted new fix for gdb frexpl issue.
== Issues ==
* None.
== Plan ==
* Fix AArch64 ifunc issue.
* Fix gdb.thread issue.
* strlen
--
Will Newton
Toolchain Working Group, Linaro
[very short week; two days]
Progress:
* misc
** made qemu-linaro 2013.06 release
** remaining VIRT-4 work handed over to other people for now
** Huawei's AArch64 TCG patches now committed upstream
** working through mach-virt and virtio patches to see what
still needs to be done here and in what order
Plans:
* continue mach-virt/virtio work
* set up a new qemu-linaro tree/branch as our CI/LAVA input [to keep it
separate from our "we release this" tree]
* restart work on upstreaming omap3 patches as part of my generic qemu
maintenance work (will reduce our maintenance burden in the long term)
-- PMM
== Progress ==
* Pandaboard
- Using GNU ld didn't help the problem, and made compilation time double
to 5hs!
- Reverting to Gold and will keep an eye on it
* Release 3.3 finished
- Tested and released, just waiting the final email
* Linaro+ARM sync meeting
- Setting priorities, requesting approval for some work items
* Phoronix
- Script to run batch mode ready at:
http://people.linaro.org/~rengolin/llvm/scripts/
- Got some results, generally on par, some big differences could be due to
compilation options
- Some tests still run GCC, even with CC being Clang, Clang-only options
(slp vect) cannot be tested
- No way yet to share this data internally, working with IT to find a
solution
* CBuild
- Merged Clang changes, running job again
- Autodetecting ARMv7
* LLVM administrativia
- many patches to review this week
- vectorizer also being enabled by default on -O2 and -Os
- testing vectorizer with -Os on chromebook, found no big differences
== Issues ==
None
== Plan ==
* Phoronix
- Store the base runs somewhere (people.linaro?) and have the script
install them to compare with any run on the board.
- Think of a way to put bootstrap & phoronix in LAVA/CBuild (whatever is
easier), so I can use the calxeda nodes without worry if they'll be up or
down
* Pandaboard
- Use GCC 4.8 on linaro-panda-02 and hope to solve the problem
* CBuild
- Finish LLVM+Clang change (merge pending) and try to run some benchmarks
with it
* PerfDB
- Install website locally, try to cook some analysis
### About Linaro binutils
Linaro binutils is a release of the GNU binutils with bug fixes and
enhancements for ARM platforms. GNU binutils is a collection of tools
including the `ld` linker and `as` assembler.
### Linaro binutils 2.23.2 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro binutils 2.23.2, the first release in the 2.23 series.
This release is based on the latest GNU binutils 2.23 stable branch, but
with additional features and bug fixes.
#### Additional Features
* None
#### Bug Fixes
* Bug fix for ARM support of GNU indirect functions
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/binutils-linaro
#### Development Tree
* git://git.linaro.org/toolchain/binutils.git
This release was built from the `linaro_binutils-2_23_2-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
### About Linaro newlib
Linaro newlib is a release of the newlib C library with bug fixes and
enhancements for ARM platforms. newlib is a small footprint C library
designed for embedded systems.
### Linaro newlib 2.0.0 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro newlib 2.0.0, the first release in the 2.0.0 series.
This release is based on the latest upstream newlib trunk, but with
additional features and bug fixes.
#### Additional Features
* Faster memcpy implementation for hardware with NEON or VFP support.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/newlib-linaro
#### Development Tree
* git://git.linaro.org/toolchain/newlib.git
This release was built from the `linaro_newlib-2_0_0-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
### About Linaro eglibc
Linaro eglibc is a release of the eglibc C library with bug fixes and
enhancements for ARM platforms. eglibc is a variant of the GNU libc
designed to work well on embedded systems.
### Linaro eglibc 2.17 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro eglibc 2.17, the first release in the 2.17 series.
This release is based on the latest upstream eglibc 2.17 stable branch,
but with additional features and bug fixes.
#### Additional Features
* Faster memcpy implementation for hardware with NEON or VFP support.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/eglibc-linaro
#### Development Tree
* git://git.linaro.org/toolchain/eglibc.git
This release was built from the `linaro_eglibc-2_17-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2013.06.
Linaro QEMU 2013.06 is the latest release of qemu-linaro. Based off
upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
This release has been updated to be based on upstream's recent 1.5.0
release. Interesting ARM related upstream changes include fixes to
the VersatilePB and Realview model PCI controller, improved performance
of emulation of ARM targets, and working VM save/load for vexpress-a15
and vexpress-a9 board models.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2013.06
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
-- PMM