Progress:
* attended Linaro Connect (wk 28)
* sent pull requests for target-arm/arm-devs queues
* resent virtio-mmio patchset; this is now ready for commit
and I will send a pullreq with it in next week
* finished off a cleanup of linux-user to remove the support
for configuring targets without threading support
* resorted todo list against cards
* started on getting v7 mach-virt into shape for upstreaming
-- PMM
Hi All,
I am new to linaro. so would like to know more about linaro.
Is linero alternative to yocto project.
does the tool chain support armv5te based SOC.
Ratheendran
Hi Folks,
I'm running two buildbots here at home and am getting consistent failures
from the Pandas because of overheating. I've set up a monitor that will
tell me the current CPU temperature and the allowed maximum, and when the
bot passes 90%, it shuts itself off.
The problem is that I'm running with heat-sinks and the boards are on top
of three fans, so there really isn't much more I can do to solve this
problem.
I personally think this is a hardware problem, since everything is in the
same die, CPU, GPU and RAM, and the physical dimensions of the chip are
quite small. I remember when Intel started overheating (around 486DX66) and
the die was huge (more head dissipation), plus RAM and GPU were separate,
and it still needed a hefty heat-sink.
It's true that gates are far smaller today, but it's not true that a dual
core 1.3GHz + GPU + RAM will produce less heat on a small die than a 66KHz
CPU on a huge die, so why anyone think it's a good idea to release a 1+GHz
chip without *any* form of heat dissipation is beyond my comprehension.
Manufacturers only got away with it, so far, because people rarely use 100%
of the CPU power for extended periods of time, because ARM devices end up
as set-top boxes, mobile phones and tablets. However, even those devices
will heat up when playing 2 h films or games, and they do have some form of
heat sink.
We, at the toolchain group, make things worse by using 100% CPU, 24 / 7,
something that Panda boards, or Arndales were not designed to do. However,
with ARM moving into the server space, their designs will have to be
re-thought, and what a better place than Linaro for making sure we get it
right?
For the time being, I believe we *must* have air conditioning in the Lab
all the time, and we *must* have heat-sinks on every board, and we *must*
monitor the CPU temperature of the boards, at least until we're comfortable
that they're not failing all the time.
Can we make a temperature monitor (like the one attached) a default feature
on Linaro Ubuntu distributions? We could dump that info to the syslog/dmesg
whenever it crosses the (say) 75% threshold, and report more often when it
crosses the 95%, possibly dumping the processe(s) that are consuming more
CPU at the time, to enable post-mortem debugging.
cheers,
--renato
As a side note, the quad-A9 ODroid does ship with a massive heat-sink,
which also serves as a fancy case. Quite clever, really.
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
Hello,
I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with
thread-local variables.
Here is an example of my C code:
__thread u32 threadedVar;
void test(void)
{
threadedVar = 0xDEAD;
}
gcc produces the following assembly to access my threaded variable:
threadedVar = 0xDEAD;
72b0: d00000c0 adrp x0, 21000
72b4: f945ac00 ldr x0, [x0,#2904]
72b8: d503201f nop
72bc: d503201f nop
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,x0]
This assembly fits dynamically linked code, but in my case I have
statically linked application that does not load any additional modules.
Since I have exactly one TLS block containing all thread-local variable gcc
should be able to calculate the offset at link time.
Can I make gcc to produce the following assembly ?
threadedVar = 0xDEAD;
72c0: d53bd041 mrs x1, tpidr_el0
72c4: 529bd5a2 movz w2, #0xdead
72c8: b8206822 str w2, [x1,#offset_to_threadedVar]
Thank you,
Vitali
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.8 and Linaro GCC 4.7.
Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based
off the latest GCC 4.8.0+svn200355 release, it includes performance
improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.0+svn200355
* Address Sanitizer support for ARM.
* New -mrestrict-it option support.
* Backport of support for further AArch64 instructions.
* Backport of support for further ARMv8 AArch32 instructions.
* Reverted recent changes to shrink-wrapping and tail-calls.
Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7
series. Based off the latest GCC 4.7.3+svn200408 release, this is the
third release after entering maintenance.
Interesting changes include:
* Updates to GCC 4.7.3+svn200408
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? http://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
Hi Linaro toolchain team,
I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
everything works fine except GDB.
The error message is "Im sorry, Dave, I can't do that. Symbol format
`elf32-littlearm' unknown'."
I searched on google, and leads me to the page
https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
I configured linaro-toolchain to build a native gdb for arm platform, both
native gdb and cross-gdb can't work, they report the same error message.
Is there any way I can get the patch?
Please help me on this!
Thank you very much!
Yupeng Chang
July 05, 2013
Hi Michael,
I have fixed this issue.
I think there is a bug in crosstool-ng-1.13.1-2013.06.
In
crosstool-ng-1.13.1-2013.06/contrib/linaro/patches/gdb/linaro-7.6-2013.05,
there is a patch libintl-as-lib.patch, which adds -lintl to LDFLAGS of gdb,
however, in the 300-gdb.sh,
--without-included-gettext is used, this option makes libintl inside gdb
quit building, in this case, when checking ELF support in BFD, -lintl
cannot be found, this leads to fail.
In eglibc-2.17, intl lib is included in libc, --without-included-gettext is
reasonable to apply to gdb, which means libintl-as-lib.patch is no longer
needed, because this patch adds an option which will be no longer needed
for building gdb with eglibc-2.17
After I removed the patch, every thing works fine now, in gdb/config.log,
checking ELF support in BFD reports OK now.
Yupeng Chang
July 06 2013
On 6 July 2013 03:21, Michael Hope <michaelh(a)juju.net.nz> wrote:
> Hi there. I'm afraid I'm not working on gdb these days but it sounds like
> a configuration error. I suggest asking on
> linaro-toolchain(a)lists.linaro.org as they should be able to help.
>
> -- Michael
> On Jul 5, 2013 8:03 PM, "常桓" <changyp6(a)gmail.com> wrote:
>
>> Hi Michael,
>> Sorry for bothering you about a GDB issue.
>> I compiled linaro-toolchain 2013.06 by myself on fedora 18 x86_64,
>> everything works fine except GDB.
>> The error message is "Im sorry, Dave, I can't do that. Symbol format
>> `elf32-littlearm' unknown'."
>> I searched on google, and leads me to the page
>> https://bugs.launchpad.net/linaro-toolchain-binaries/+bug/918937
>>
>> On that page, you posted this is fixed, could you show me the fix?
>>
>> I configured linaro-toolchain to build a native gdb for arm platform,
>> both native gdb and cross-gdb can't work, they report the same error
>> message.
>>
>> Please help me on this!
>>
>> Thank you very much!
>>
>> Yupeng Chang
>> July 05, 2013
>>
>>
>>
>>
== Progress ==
* 2013.07 release preparation:
* remaining backports
* reverted 2 sets of patches from 2013.06
* started release process
* Worked on setting up an internal build + validation to monitor FSF
trunk on ARM
* Internal support
== Next ==
* All week at Connect
== Progress ==
* 4 day week (leave on Thursday)
* Pushed memcpy improvement to newlib.
* Found and fixed ARM IFUNC issue in glibc.
* memcpy merged into bionic but not yet used (see gerrit review).
* Pinged and applied gdb testsuite patch, only one left to apply.
* More work on malloc benchmarking.
* Preparation for Connect.
== Issues ==
* None.
== Plan ==
* Connect all week
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Buildbots
- Prepared buildbot images, tested, setup is very quick and efficient
- Set up local buildmaster, two buildslaves doing self-hosting tests
- Each slave took 20 minutes setup time, including flashing SDCard
- Failures after a few hours running at 100% @ 1.2GHz @ < 26C
- Reducing to 920MHz does fix the problem, but this is not a solution
- Leaving the two pandas alive during Connect in hope they won't fail
* LNT Lencod
- Following up on Lencod stack corruption, we're closer to a solution
* Dibmod
- Didn't have much time to look at it properly, but my solution was over
simplified
- Will probably only look at it better after Connect
* Chromebook
- Had to re-install Ubuntu on it, using Raring (Saucy didn't work)
- Glad all my data is in the external hard-drive
* Others
- Added a doc about platform-specific tests that usually break the bots
http://llvm.org/docs/TestingGuide.html#platform-specific-tests
- LLVMLinux meeting, cross-compilation with Clang is almost impossible
- Haven't been able to review many patches, thanks to Tim, they kept going!
== Plan ==
* Connect whole next week
== After Connect ==
* Finish implementation AEABI divmod/udivmod calls
* Check why Phoronix result pages are not working
* Put self-hosting bots back on 920MHz mode in the Lab
Progress:
* misc:
** went through "aarch64 preparation" patchset (originally Alex's,
then modified by John), fixed a lot of issues/nits, and sent out
an updated version; this is now I think upstreamable-quality
except that it doesn't provide anything useful on its own.
** looked at the VirtualOpenSystems patchset for v8 KVM support in
QEMU; needs to be reconciled with John's work in the same area.
** Mans' LDA/STL patches now queued in target-arm.next to go upstream
** preparation for Connect
Plans:
* mach-virt
-- PMM
== Issues ==
* None
== Progress ==
* Investigate library dir issue in aarch64-linux-gnu release.
- Crosstool-ng should not link lib64 to lib.
- Eglibc used in Linaro release is too old. No configure to change
lib to lib64.
- Runtime tarball should not assume multiarch (aarch64 gcc does not
support it yet).
- When creating runtime tarball, use lib or lib64 bases on the TARGET.
* Fix misc issues in local conditional compare changes.
* Investigate how to optimize "c == '+' || c == '-'".
== Plan ==
* LCE13: July 8-12.
== Progress ==
* Short week (3 days off sick)
* Aarch64 frame growing downward: sent patch
* A few merges on Rob's behalf after approval by Yvan
* Prepared one more merge request
* Prepared for Connect
* Internal support
== Next ==
* Handle remaining backports for 4.8 release
* Disable peeling: resume work
== Issues ==
* None.
== Progress ==
* OE Launchpad bug #1192953 :
[g++ compilation terminated with error on Linaro-openembedded lamp image]
- Doko submitted a patch for that issue one year ago
- Mailing list pinged
* Launchpad bug #1186218 :
[kernel doesn't boot on Arndale/Nexus with Linaro GCC 4.8]
- Reproduced the build locally
- Need to have access to some hardware for further investigations
* LRA on ARM and AArch64:
- Fixed the issue, compiler now bootstrap
- Testing on-going before submission
* 2013-07 release:
- merge reviews
* LCE13:
- Connect registration done
- flight and hotel booked.
== Plan ==
* Merge review and release preparation
* LRA
== Progress ==
* Re-wrote gdb.dwarf2/dw2-error.exp and gdb.dwarf2/clztest.exp for arm.
* Investigated catch syscall patch in gdb patches to narrow down changes
required for arm.
* Continued with gathering documentation for future visas.
== Plan ==
* Test and fix failures due to optimization code in gdb.dwarf2/clztest.exp
for arm.
* Figure out a way to generate arm assembly for dwarf2/fission* gdb tests
using gcc.
* Further investigation arm requirements by going through catch syscall
patch for gdb on x86.
* Work with James to start UK and US visas for future visits.
Most of Last week spent on internal AMD work.
== Progress ==
* AArch64 LTO and PGO support.
LTO run for coremark and ran coremark on V8 model with and without the patch.
Ran perf on the model against the both the coremark binaries.
For non LTO, retired instructions seems to be less than the LTO one.
And PGO run for coremark did not emit any gcda file. Need to drill down further.
* AAarch64 testing
GCC runs still on going. Experimenting on spawning subtarget tests to
more than one V8 model.
== Plan ==
* Complete gcc testsuite with runs with trunk and trunk+gprof GCC patches.
* Continue LTO and PGO runs for AArch64
==issues==
* libssp support for AArch64
This work is currently in hold. Needed frame layout changes before
restarting.
== Progress ==
* spec2k comparison between ARM and x86
- Specfp on x86 has some failures in trunk
- Trying 4.8 now
- Analysed some of the benchmarks and documenting them
- continuing with the rest.
== Plan ==
* Continue with spec2k comparison between ARM and x86
== Issues ==
* None
== Progress ==
* Investigate big endian toolchain build in Linaro crosstool-ng.
- Fix an aarch64 triple name issue.
- Add Linaro armeb-linux-gnueabihf, aarch64_be-linux-gnu and
aarch64_be-none-elf configs for big endian builds.
- Please find the reference builds at:
http://cbuild.validation.linaro.org/build/crosstool-ng-linaro-1.13.1+bzr258…
* Design a test case for lp1189445 and revise the patch for review.
* Revise the shrink-wrap related fix for pr57637 and send out for review.
* Investigate lp:1194501 and lP:1194123
- lp:1194501 is confirmed a "tail call" issue, and also in trunk pr57731.
- lP:1194123 seams shrink-wrap related, since the case pass with
option -fno-shrink-wrap.
== Plan ==
* Continue on conditional compare.
Best Regards!
-Zhenqiang
== Progress ==
* Divmod patch
- Trying to regain knowledge about the SelectionDAG infrastructure
- Working with Tim and Joey, got a patch working, but seen some failures
in test-suite
- Will investigate and submit when all is clear
* Lencod in LNT
- Bug is a mix of ByVal with wrong spill offset, teams interacting
- Bug fixed by a side effect of another change, can't guarantee future
stability
* CBuild
- Patch merged, fired another LLVM benchmark, which failed the same way
- Not sure how to proceed here...
- Should I dig deep on the old CBuild?
- Or should I wait for CBuild2?
* Release Maintenance
- Talks about maintenance of old/current releases sparking on the list
- Bots, tests, benchmarks, release process will have to be followed for
those releases
- Binary & API compatibility kept, performance doesn't matter much, only
serious bugs fixed
- This will increase the cost of background duty on our team
* Other
- Reviewing some more patches
- Checking impact of a new alias analysis in the loop vectorizer, all good
- EuroLLVM 2014 meeting
- Long discussions about pre-UAL support in LLVM: Short answer: no.
- Someone else will look at PerfDB analysis, one less thing to do
- Got the Buildbot Pandas home, will look at them next week
== Issues ==
* After using all my RAM all the time, for a week, I found a fault on it
which prompted kernel panic and stopped my laptop from booting. Luckily, it
was just one of the two chips, and even better, it has a lifetime
guarantee! But I'll only get a new one after Connect... :(
== Plan ==
* Finish implementation AEABI divmod/udivmod calls
* Carefully analyse what's the best configuration for the pandas and
produce a pre-packed image
* NOT put them back before they're stable, snapshot a known good
configuration
* But put TWO pandas as self-hosting (and leave Galina's alone)
Time allowing...
* Check why Phoronix result pages are not working
* Write about target-specific tests on TestingGuide.rst
* Write a thing or two about the optimization levels in LLVM for the
official docs
== Progress ==
* Some further work on AArch64 ifunc failure, no progress.
* Add some extra features to cortex-strings plotting capability.
* More memcpy gerrit review.
* Basic framework for testing and benchmarking malloc.
* Extracted glibc malloc from glibc.
* Pushed memcpy performance tweak to cortex-strings and newlib for review.
== Issues ==
* None.
== Plan ==
* Prepare for Connect.
* Resubmit memcpy to gerrit as requested.
* Respin AArch64 ifunc patches against latest head.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* VIRT-49 closed out (cp15 migration patches committed upstream)
* virtio:
** virtio-mmio patchset v1 now sent out to qemu-devel
* misc:
** fixed some instances of undefined behaviour (mostly shift related)
diagnosed by clang -fsanitize=undefined
** worked through upstream review backlog, sent target-arm and arm-devs
pullreqs
Plans:
* VirtualOpenSystems (sponsored by Huawei) have sent a patchset for
KVM support in QEMU for ARMv8; need to review this and reconcile it
with the Linaro work in progress in this area
* mach-virt
* preparation for Connect
-- PMM
== Issues ==
* None
== Progress ==
* Investigate conditional compare RTL representation.
- Fix new fails when expanding conditional compare to cmp_and/cmp_ior.
* Identify the root cause for pr57637.
== Plan ==
* Continue on conditional compare.
== Issues ==
* None.
== Progress ==
* OE Launchpad bug #1192953
- 4.8 g++ failed to find c++ included headers because of the
combined usage of --with-sysroot and --with-g++-include-dir
- Investigated the issue with Andrew McDermott
- found an existing OE workaround
* LRA on ARM and AArch64:
- Fixed AArch64 failure
- Moved to the new one
* Cbuild Babysitting
== Plan ==
* Merge review
* LRA
== Progress ==
* Started re-writing x86 assembly language gdb test cases for arm.
* Debugging watchpoints code to investigate issues on arm.
* Upgraded chromebook Ubuntu installation to a faster SD card.
* Tried to resolve various travel hurdles. Gathering different kind of
documents for future travel, submitted passport for extension etc.
== Plan ==
* Submit more gdb patches to mailing list.
* Wind up work on translation of gdb test cases in arm assembly.
* Further investigation about watchpoint issues on arm.
* Work on filing US and UK visit visas.
== Progress ==
* AArch64 LTO and PGO support.
Tweaked make file to run coremark on V8/openembedded model
Experimenting with PGO runs for coremark.
* AAarch64 testing
Set up Cross build and test in V8 model for GCC testsuites on one of
workstation in lab.
Completed g++ testsuite with V8 model for gcc trunk. Running gcc tests now.
* Installed Ubuntu 13.04 on Chrome book.
== Plan ==
* Complete gcc testsuite with runs with trunk and trunk+gprof GCC patches.
* Continue LTO and PGO runs for AArch64
* Linaro connect preparation, check VISA status.
==issues==
* libssp support for AArch64
This work is currently in hold. Needed frame layout changes before
restarting.
* Waiting for some inputs from Rob on Bootstrap issue with GCC on V8 model
== Progress ==
* Generate single call to divmod
- Addressed review comments
- Proposed a new patch for discussion
* spec2k comparison between ARM and x86
- Obtained Profile results for both architectures
- Analysing gzip and found some register allocation issues.
* VRP based zero/sign extension
- Still no review for rtl changes
- Pinged again
== Plan ==
* Continue with spec2k comparison between ARM and x86
== Progress ==
* Added support to cbuildv2 to handle merges from GCC trunk.
* Merged backports of 199694 199705 199733 199734 199739
199810 199814 199533 200019 200020 200061 200062 200096
200148 200152.
* Managed to survive making complex travel plans for the next few
weeks.
* Fixed eembc and denbench benchmarks so they work again.
== Plan ==
* Work on benchmarking & testing database, more graphs, write up
presentation.
* Fix running spec2000 benchmark, produce some results.
* Commit backports to svn as merges approved.
* Off on leave Wed till Connect. Will be 100% offline.
== Issues ==
* Backports of 199792, 199959 have major conflicts. Required patches
for these to be merged not in backports list.
* Turns out benchmarks have not worked for several months,
particularly spec2000 still doesn't want to run.
Still having the issue of FM/semi-hosting not catching seg-faults using
2013.06. With "aem-ve.specs", a fault seems to call main() repeatedly.
With "dimon.specs", FM hangs. Any ideas how to properly compile/deal with
faults in semi-hosting mode?
thanks,
Rory
=== hello.c ===
#include <stdio.h>
int
main(int argc, char *argv[])
{
printf("hello.\n");
* ((unsigned int *) 0) = 0; // cause seg-fault
return 0;
}
=== compile/run ===
.../gcc-linaro-aarch64-none-elf-4.8-2013.06_linux/bin/aarch64-none-elf-gcc -specs=aem-ve.specs -march=armv8-a -c hello.c
.../gcc-linaro-aarch64-none-elf-4.8-2013.06_linux/bin/aarch64-none-elf-gcc -o hello -specs=aem-ve.specs -march=armv8-a hello.o
.../Foundation_v8 --image hello --quiet --semihost-cmd=hello
hello.
hello.
hello.
hello.
hello.
...
== Progress ==
* Completed list of backports from trunk to linaro-4.8 for 2013.07
release and sent it to Rob.
* Merged backport of address sanitizer in linaro-4.8 branch
* Aarch64 frame growing downward: checking what really needs to be
changed in GCC. Documentation not very verbose :-)
* Various attemps to resurrect my old testsuite patch to be stricter
at excluding some unsupported configurations.
* Internal support
== Next ==
* Aarch64 frame growing downard.
* Disable peeling: make the vectorizer less aggressive
* Neon intrinsics/vuzip/veor: resume work
* Book hotel/flight for Connect.
== Progress ==
* Release 3.3
- Finally public
http://llvm.org/releases/download.html#3.3http://llvm.org/releases/3.3/docs/ReleaseNotes.html
* Pandaboard
- We lost two bots this week:
- linaro-panda-01: buildslave binary segfaults, needs fresh re-install?
- linaro-panda-02: GCC installation is broken, needs fresh install!!
- This means we need:
- At least two boards for each bot
- At least one extra board of each type, off-line to save power/space
- A standard Image on a gz file to flash & boot quickly, for each type
* Chromebook LNT
- Binary search on patch that broke the buildbot, found the culprit
- Reduced the problem, bug posted, discussing
http://llvm.org/bugs/show_bug.cgi?id=16393
* CBuild
- Built Clang+LLVM in CBuild, need benchmarks, sent a patch, waiting for
merge
* Phoronix results
- Adding them to internal (pw protected) website to avoid public confusion
- The numbers are meaningless for now and we don't want panic within the
general public:
http://people.linaro.org/toolchain-benchmarks/llvm/
- Visualization still broken. Works well only locally on Firefox. Why not
HTML? Why not PNG? Sigh...
* Administrativia / Others
- Lots of patches to review
- Auto-vectorizer now turned on by default on -O2 and -Os!
- Meeting with LLVMLinux folks, good progress, good plans, trying to get
more traction in that direction on Connect
- Trial of "ARM maintenance" backlog item:
http://llvm.org/bugs/show_bug.cgi?id=16387
== Plan ==
* Fix LNT bug
* Implement AEABI divmod/udivmod calls
* Try CBuild benchmark again (when patch merged)
* Carefully analyse what's the best configuration for the pandas and
produce a pre-packed image
* NOT put them back before they're stable
* But put TWO pandas as self-hosting (and leave Galina's alone)
* Check why Phoronix result pages are not working
Time allowing...
* Have a look at PerfDB
* Write a thing or two about the optimization levels in LLVM for the
official docs
== Progress ==
* Reverted AArch64 ifunc change while investiigation continues.
* Created TCWG-177 for gdb.thread testsuite failures.
* Merged new strlen code into cortex-strings and newlib.
* Applied a few more gdb patches upstream.
* Fixed a few bugs and added a few features to cortex-strings benchmarks.
* gerrit review of memcpy change ongoing.
== Issues ==
* None.
== Plan ==
* Reproduce AArch64 ifunc issue.
* Resolve gerrit memcpy review if possible.
* Start work on malloc test and benchmark framework.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* virtio:
** have some patches that work (including modifying the device tree
to tell the kernel where the virtio transports are)
** more cleanup still required; in particular need to figure out
nice way of having the board model tell boot.c where the transports
are and what the interrupt routing info should look like
** virtio spec needs clarification about what a virtio-mmio transport
with no backend is supposed to look like
* misc:
** fixed linux-user utimensat breakage caused by a patch of mine
from last week
** helped Grant Likely with debugging problems running UEFI on QEMU
(and caught a QEMU bug in the process)
** reviewed another round of LDA/STL patches and a VSEL patch
Plans:
* continue mach-virt/virtio work
-- PMM
The Linaro Toolchain and Platform Working Groups are pleased to announce
the 2013.06 release of the Linaro Toolchain Binaries, a pre-built version
of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.8 2013.06
* Linaro Newlib 2.0 2013.06
* Linaro Binutils 2.23 2013.06
* Linaro Eglibc 2.17-2013.06 (Aarch64 only)
* Linaro GDB 7.6 2013.05
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link your
programs against.
Interesting changes include:
* Linaro versions of Binutils, Newlib and Eglibc are included
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2,
Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and
later, and should run on any Linux Standard Base 3.0 compatible
distribution. Please see the README about running on x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2013.05
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Note: This will likely be the last release built with support for (e)glibc
2.15 on armv7. With future releases, you will have to either use a newer
(e)glibc on the target system, or link statically.
On Thu, Jun 20, 2013 at 2:41 PM, Thomas Petazzoni
<thomas.petazzoni(a)free-electrons.com> wrote:
> Hello,
>
> I'm facing a bizarre problem with an armeb toolchain built by
> Buildroot. I'm also posting this to the crossgcc@ list since there are
> some gcc/binutils experts out there.
>
> First, a little bit of background. ARM Big Endian comes into two
> variants:
>
> * BE32, which was used up to ARMv5, where both the instructions and
> the data are Big Endian.
>
> * BE8, which is used since ARMv6, where the instructions remain
> little-endian and only the data are big-endian.
>
> See
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0338g/ch06s0…
> for some details about this.
>
> So, I've built an ARMv7 Cortex-A8 toolchain, with the armeb
> architecture selected. The CROSS-gcc -v shows that it was configured as
> follows:
>
> --target=armeb-buildroot-linux-uclibcgnueabi
> --with-abi=aapcs-linux
> --with-arch=armv7-a
> --with-tune=cortex-a8
>
> Then, I wrote a simple program that contains some data and
> instructions, built it under several conditions, and observed with
> hexdump whether the data and code was little-endian or big-endian.
>
> And the results are somewhat surprising: when I explicitly pass
> -mbig-endian, I get the proper behavior (BE8 code with code in little
> endian and data in big endian), but when I don't pass any flags to the
> compiler, I get an incorrect behavior: both the code and data are big
> endian, as if the BE8 wasn't used (and readelf confirms that it wasn't
> used). See below the detailed results.
>
> Note that the compiler is supposed to automatically use BE8 on
> ARMv6/ARMv7 and BE32 on ARMv5 and earlier cores.
>
> The data is DEADBEEF, and the instruction is E52DB004.
>
> Flags used Observed data Observed code Comment
> ======================= =============== =============== =========================================
>
> -mlittle-endian EFBEADDE 04B02DE5 Code and data in LE -> OK
> -mbig-endian DEADBEEF 04B02DE5 Code LE, data BE, binary marked BE8 -> OK
> no flags DEADBEEF E52DB004 Data BE (ok!), code BE (*NOT* ok) -> NOK
> -march=armv5t -mbig-endian DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
> -march=armv5t DEADBEEF E52DB004 Code and data in BE, on ARMv5 -> OK
>
> As can be seen in this table:
>
> (*) On ARMv5, regardless of whether -mbig-endian is passed or not, the
> code produced is correct (both code and data are big endian, which is
> correct for ARMv5 where the big endian mode is BE32)
>
> (*) On ARMv7 however, the code is different whether -mbig-endian is
> passed or not, even though an "armeb-linux" compiler is supposed to
> generate big endian code by default. When no flags is passed, both the
> data *and* code are big-endian (so it's BE32 like on ARMv5), but
> passing -mbig-endian makes the thing behave properly (code is
> little-endian, data is big-endian).
>
> I'm using binutils 2.23.2 and gcc 4.7.3.
>
> Any ideas?
Hi Thomas,
I added linaro-toolchain to CC as there may be someone there who knows
the answer.
I got an app to compile fine for v8 FM with gcc, but I notice that
seg-faults hang the simulator. Using raise() properly exits FM,
but I can't seem to trap the seg-fault with signal() or do anything
intelligent to know about the seg-fault. Normal execution works well.
int
main(int argc, char *argv[])
{
* (unsigned int *) (0) = 0; // seg-fault hangs FM
return(0);
}
thanks,
Rory
-----Original Message-----
From: linaro-toolchain-boun...(a)lists.linaro.org
[mailto:linaro-toolchain-boun...@lists.linaro.org] On Behalf Of Matthew
Gretton-Dann
Sent: Sunday, May 19, 2013 2:47 PM
To: Padgett Don-B43265
Cc: linaro-toolchain(a)lists.linaro.org
Subject: Re: Semi-hosting on v8 Foundation Model using gnu tools
Don,
On 17/05/13 20:57, Padgett Don-B43265 wrote:
> The v8 Foundation Model User Guide has a bare metal hello world example
> that uses semi-hosting. The Makefile uses ARM tools, however. Is there
> equivalent support for this example using a bare metal version of the
> gnu tools, such as
> gcc-linaro-aarch64-none-elf-4.8-2013.04-20130422_linux.tar.xz? I took
> a look, but didn't see a way to do this.
It is possible but not necessarily easy.
Using the binary tools you've downloaded you will want to do something like the
following:
aarch64-none-elf-gcc -specs=elf-aem-ve.specs ...
The -specs option has to be on all your invocations of GCC and G++. You should
also invoke the linker through GCC with this option.
Then you need to invoke the model, given an image called foo.axf:
Foundation_v8 --image foo.axf --semi-host="foo.axf OPT1 OPT2" --quiet
Note that the first option to --semi-host is the name of the image again.
Thanks,
Matt
You'll have better luck sending bug reports to the linaro-toolchain
mailing list.
On 18 June 2013 11:50, Bernhard Rosenkränzer
<bernhard.rosenkranzer(a)linaro.org> wrote:
> Hi,
> the 4.8-2013.06 tarball built without version overrides reports itself as:
> 4.8-2013.06-0~dev
> Looks like the release flag isn't set in the tarball.
>
> ttyl
> bero
--
Mans Rullgard / mru
== Progress ==
* Merges for linaro-4.8-2013.06:
- investigated why the cross-validation lack libpthread and libdl.
- fixed cbuild to make these libs available in the same dir as ld-linux.so
- not sure why it wasn't necessary several weeks ago when I first
spawn libsanitizer tests: we changed the prebuilt tarball since then,
but the libs are still at the same place; the binutils version changed
though.
* Re-spawned a merge request for libsanitizer, using the updated
cbuild (libpthread/libdl support, qemu flags updated) and the updated
gcc-4.8 (with my patch to cope with qemu's output of /proc/self/maps)
* Merges for linaro-4.8-2013.07: updated list
* Aarch64 frame growing downward: started.
* Disable-peeling: restarting looking at vectorizer.
== Next ==
* Merges for linaro-4.[78]-2013.07: update list
* disable peeling: see how to make the vectorizer less aggressive
* Aarch64 frame growing downward.
* Neon intrinsics/vuzip/veor: resume work
* Book hotel/flight for Connect
== Issues ==
* None.
== Progress ==
* Releases merge reviews:
- Finished reviews for releases.
* Launchpad bug #1187247:
- Closed as invalid since the issue was on an
attempt to access at an invalid address.
* Cbuild Babysitting:
- Fixed 4.8 repository update on toolchain64.
- Recreate ancestors tarballs and re-spawned jobs
- Re-started Calxedas...
* LRA on ARM and AArch64:
- Resumed the task.
- Investigation of AArch64 failure on-going.
== Plan ==
* Mainly LRA
== Progress ==
* libssp support for AArch64
Libssp support needed AArch64 frame to grow downward. But it is
currently defined as growing upward.
This work is currently in hold. Needed frame layout changes before
restarting. Waiting for feedback from Matt.
* AAarch64 testing
Drilling down Boot strap failure with GCC 4.9 trunk on open embedded
image with V8 model. Fails at time xg++ is linking. Not much progress.
Set up Cross build and test in V8 model for GCC testsuites.
Also looking at increasing timeout for individual tests.
* AArch64 LTO and PGO support.
Started on understanding PGO and LTO runs with AArch64.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* Continue LTO and PGO runs for AArch64
== Progress ==
* Investigated gdb.dwarf2 unsupported issues wrote two new patches for
gdb.dwarf2 testsuite.
* Read some background on dwarf2 to translate test written in x86
assembly into arm assembly.
* Got refusal of visa from Irish embassy. Ran after visa consultants
for issues related to visa application.
* Calls with Irish consulate officers for appeal process and causes of refusal.
== Plan ==
* Submit ready patches for dwarf2 untested/unsupported problems.
* Translate dwarf2 tests written in x86 to arm asm.
* Chromebook os update on a faster sd card. (Still pending)
* Add JIRA cards for gdb features missing on arm. (Still pending)
* Prepare documentation for future visa applications.
== Issues ==
* None
== Progress ==
* Investigate conditional compare RTL representation.
- Expand conditional compare to cmp_and/cmp_ior.
- Test is ongoing
* Investigate lp: 1189445. Patch is in testing.
* Identify the root cause for lp: 1189448. FSF4.8 does not have the
buggy code. Linaro 2013.06 and trunk have fixed it.
== Plan ==
* Continue on conditional compare.
== Public Holiday ==
* Monday, 10 June (4 day week)
== Progress ==
* VRP based zero/sign extension
- Pinged the patch.
* Generate a single call to divmod
- Builtin based implementation bootstrapped and passes regression.
- posted patch and initiated discussion
(http://gcc.gnu.org/ml/gcc/2013-06/msg00100.html)
- long long is not handled now
* Better end of loop counter optimisation
- Dropped md patch
- Verified that Bin Cheng's RTL change noop_move_p fixes this.
== Plan ==
* Respond to patch review
* Set-up X86 benchmarking locally for Spec2k
== Progress ==
* Did QEMU testing for the release by running several images on a
few platforms.
* Did the GCC 4.7-2013.06 release.
* Did the GCC 4.8-2013.06 release.
* Did a spin of the GCC 4.7-2013.06 release.
* Updated benchmark parsing scripts, downloaded historical
benchmark data and data from the release testing.
* Updated SQL query and gnuplot scripts to work with new data.
* Produced some benchmark graphs.
* Finally figured out how to spawn remote Cbuildv1 tests and
benchmarks.
== Plan ==
* Focus on performance and regression test graphs.
* Do builds of FSF GCC branches to compare with Linaro branches.
* Continue improving Cbuildv2 as use it to do all these builds and
testing.
- rob -
== Progress ==
* Branched and released binutils, newlib and eglibc.
* Wrote up some release process docs on the wiki.
* Fixes and further investigation of AArch64 ifunc issue.
* Submitted memcpy to upstream gerrit and ran more benchmarks.
* Submitted new fix for gdb frexpl issue.
== Issues ==
* None.
== Plan ==
* Fix AArch64 ifunc issue.
* Fix gdb.thread issue.
* strlen
--
Will Newton
Toolchain Working Group, Linaro
[very short week; two days]
Progress:
* misc
** made qemu-linaro 2013.06 release
** remaining VIRT-4 work handed over to other people for now
** Huawei's AArch64 TCG patches now committed upstream
** working through mach-virt and virtio patches to see what
still needs to be done here and in what order
Plans:
* continue mach-virt/virtio work
* set up a new qemu-linaro tree/branch as our CI/LAVA input [to keep it
separate from our "we release this" tree]
* restart work on upstreaming omap3 patches as part of my generic qemu
maintenance work (will reduce our maintenance burden in the long term)
-- PMM
== Progress ==
* Pandaboard
- Using GNU ld didn't help the problem, and made compilation time double
to 5hs!
- Reverting to Gold and will keep an eye on it
* Release 3.3 finished
- Tested and released, just waiting the final email
* Linaro+ARM sync meeting
- Setting priorities, requesting approval for some work items
* Phoronix
- Script to run batch mode ready at:
http://people.linaro.org/~rengolin/llvm/scripts/
- Got some results, generally on par, some big differences could be due to
compilation options
- Some tests still run GCC, even with CC being Clang, Clang-only options
(slp vect) cannot be tested
- No way yet to share this data internally, working with IT to find a
solution
* CBuild
- Merged Clang changes, running job again
- Autodetecting ARMv7
* LLVM administrativia
- many patches to review this week
- vectorizer also being enabled by default on -O2 and -Os
- testing vectorizer with -Os on chromebook, found no big differences
== Issues ==
None
== Plan ==
* Phoronix
- Store the base runs somewhere (people.linaro?) and have the script
install them to compare with any run on the board.
- Think of a way to put bootstrap & phoronix in LAVA/CBuild (whatever is
easier), so I can use the calxeda nodes without worry if they'll be up or
down
* Pandaboard
- Use GCC 4.8 on linaro-panda-02 and hope to solve the problem
* CBuild
- Finish LLVM+Clang change (merge pending) and try to run some benchmarks
with it
* PerfDB
- Install website locally, try to cook some analysis
### About Linaro binutils
Linaro binutils is a release of the GNU binutils with bug fixes and
enhancements for ARM platforms. GNU binutils is a collection of tools
including the `ld` linker and `as` assembler.
### Linaro binutils 2.23.2 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro binutils 2.23.2, the first release in the 2.23 series.
This release is based on the latest GNU binutils 2.23 stable branch, but
with additional features and bug fixes.
#### Additional Features
* None
#### Bug Fixes
* Bug fix for ARM support of GNU indirect functions
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/binutils-linaro
#### Development Tree
* git://git.linaro.org/toolchain/binutils.git
This release was built from the `linaro_binutils-2_23_2-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
### About Linaro newlib
Linaro newlib is a release of the newlib C library with bug fixes and
enhancements for ARM platforms. newlib is a small footprint C library
designed for embedded systems.
### Linaro newlib 2.0.0 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro newlib 2.0.0, the first release in the 2.0.0 series.
This release is based on the latest upstream newlib trunk, but with
additional features and bug fixes.
#### Additional Features
* Faster memcpy implementation for hardware with NEON or VFP support.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/newlib-linaro
#### Development Tree
* git://git.linaro.org/toolchain/newlib.git
This release was built from the `linaro_newlib-2_0_0-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
### About Linaro eglibc
Linaro eglibc is a release of the eglibc C library with bug fixes and
enhancements for ARM platforms. eglibc is a variant of the GNU libc
designed to work well on embedded systems.
### Linaro eglibc 2.17 2013.06
The Linaro Toolchain Working Group is pleased to announce the 2013.06
release of Linaro eglibc 2.17, the first release in the 2.17 series.
This release is based on the latest upstream eglibc 2.17 stable branch,
but with additional features and bug fixes.
#### Additional Features
* Faster memcpy implementation for hardware with NEON or VFP support.
#### Bug Fixes
* None
### Source
#### Release Tarball
* https://releases.linaro.org/13.06/components/toolchain/eglibc-linaro
#### Development Tree
* git://git.linaro.org/toolchain/eglibc.git
This release was built from the `linaro_eglibc-2_17-2013_06_release` tag.
### Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
* Linaro Toolchain Development [mailing
list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain)
* Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg`
* Questions? [ask Linaro](http://ask.linaro.org/).
* Interested in commercial support? inquire at [Linaro
support](mailto:support@linaro.org)
--
Will Newton
Toolchain Working Group, Linaro
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2013.06.
Linaro QEMU 2013.06 is the latest release of qemu-linaro. Based off
upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
This release has been updated to be based on upstream's recent 1.5.0
release. Interesting ARM related upstream changes include fixes to
the VersatilePB and Realview model PCI controller, improved performance
of emulation of ARM targets, and working VM save/load for vexpress-a15
and vexpress-a9 board models.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2013.06
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
-- PMM
== Progress ==
* Merges for linaro-4.8-2013.06 and linaro-4.7-2013.06
- Spent most of my time on this activity, with Yvan
- A few cbuild issues, local disk full, and other local disk crash
- Investigating why the cross-validations lack libpthread and libdl
(required since libsanitizer backport). The libs are present, but not
found by the compiler.
* Registered for Connect/Dublin
== Next ==
* Complete merges quickly, to enable release this week.
* Disable-peeling: resume work
* Better end of loop counter optim: discuss with Kugan
* libsanitizer/aarch64: resume work
* Neon intrinsics/vzup/veor: resume work
* Book hotel/flight for Connect/Dublin
== Issues ==
* None.
== Progress ==
* Releases merge reviews:
- Most of the week spent on this activity
- Lot of reviews and cbuild issues
- some reviews still on-going
* Jira cards:
- Closed card #108 on Tiny memory model support.
- Created Card #167 for TLS support in the Tiny memory model.
* LRA on ARM and AArch64:
- Raise the issue to LRA maintainer (Vladimir Makarov)
- will iterate with him in the coming weeks.
* Launchpad bug #1187247
- started to look at it.
== Plan ==
* Finishing reviews
* Bug #1187247
* LRA
== Progress ==
* AARCH64 testing
Drilling down Boot strap failure with GCC 4.9 trunk on open embedded
image with V8 model
Sent the steps to reproduce boot strap failure in the model to team.
Renoto suggestion to add libgcc_eh.a explicilty is not working well at
all places.
Trying few other options (LDFLAGS, --with-stage1-libs ) to pass
libgcc_eh.a to the xg++ build.
* libssp support for Aarch64
Wrote down the steps needed to implement the support in Aarch64. Sent
mail to Matt for a review.
Working on machine descriptions for stack_protect_set and stack_protect_test.
* Filled online VISA Application form. Collected Relevent documents needed.
Hotel rooms are not available via online booking. Sent follow up mail
to the hotel and informed James and Arwen.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* Implement Libssp GCC back end hooks.
* Linaro connect travel prep, book tickets hotel and apply visa.
== Progress ==
* Did builds of GCC 4.6, 4.7, 4.8, 4.9-svn on x86_64, i686, arm7l to
load more recent data into testing database plus test source builds
for the release at the same time.
* Did builds of GDB 7.6 & 7.5 on x86_64, i686, arm7.
* Added wiki page on how to run DejaGnu in a chroot.
* Cbuildv2 work continuing, works well enough to do the above
builds plus bootstrapping infrastructure.
* Change how the index for the testing database gets calculated,
so it's now possible to delete bogus records without screwing
up existing data when importing.
== Plan ==
* Produce some new graphs with the data from the above builds and
test runs.
* Make GCC & GDB release tarballs.
* Update wiki pages on Cbuildv2, release process.
== Issues ==
* Figure out why make check for GDB fails for everything on
chromebook running 13.04.
- rob -
== Progress ==
* Investigated gdb.threads and gdb.multi failures and submitted patch
to enable tests requiring multiple hardware breakpoints on arm
targets.
* Investigate gdb.base failures and submitted patch to enable
disp-step-syscall.exp for arm targets.
* Investigate gdb.mi and gdb.trace failures, some of problems are
feature requests on arm.
* Investigate gdb.base failures and submitted patch to enable
disp-step-syscall.exp for arm targets.
* Submitted gdb.dwarf2 pending patch.
== Plan ==
* Try to fix remaining gdb failures.
* Generate a fresh copy of gdb test suite results on arm and x86
* Chromebook os update on a faster sd card.
* Add JIRA cards for gdb features missing on arm.
* Follow up on Ireland visa application.
== Progress ==
* Better end of loop counter optimisation
- Experimented with fixing the extra instruction.
- Found a possible way to fix it. Discussing it with Christophe.
* Generate a single call to divmod
- Looked at the code including how sin()/cos() -> sincos() handling
in gcc.
- Implemented a prototype and experimented.
== Plan ==
* VRP based zero/sign extension
- Ping the patch.
* Generate a single call to divmod.
- Finish the prototype implementation and get the regression working
- Discuss in gcc mailing list for a good way to implement and get
consensus with the results from prototype.
== Issues ==
* None
== Progress ==
* Test and send out shrink wrapping improvement patch for review (TCWG-133).
* Update aarch64-none-elf TARGET_CFLAGS to " -g -O2 ".
* Enable aarch64 gdb build for Windows (lp:1187862).
* Investigate conditional compare RTL representation.
- Trying to expand it to cmp_and/cmp_ior like instruction.
== Plan ==
* Continue on conditional compare.
== Planed leaves ==
* June 10-12: Dragon Boat Festival.
== Progress ==
* Fixed gdb.cp testsuite failures and committed upstream.
* Worked with ITS to get git mirrors for libraries & tools.
* Started documenting branch and merge policy on the wiki.
* Respin AArch64 binutils ifunc patch and commit.
* Looked into AArch64 assembler issue.
* Assorted other gdb testsuite fixes.
* Some research into malloc.
== Issues ==
* None.
== Plan ==
* Create release branches for libraries & tools and improve docs.
* More gdb fixes.
* More malloc reading.
--
Will Newton
Toolchain Working Group, Linaro
`== Progress ==
* Release 3.3
- Testing and packaging RC3
http://llvm.org/pre-releases/3.3/rc3/
* Bootstrap Script
- Check dependencies, checkout sources, bootstraps, test-suite, package
- Works well on Intel (1h20min bootstrap twice + test-suite)
- Works on Claxeda, Chromebook (10hs each)
- Should work out-of-the-box anywhere:
http://people.linaro.org/~rengolin/llvm/scripts/
* Buildbot
- Following up on GCC/LD failure on linaro-panda-02
* CBuild
- Adding Clang/Extra/RT to toolchain64.lab + update scripts, waiting for
merge
- Hopefully next build will get the whole pack
* Phoronix
- Setting up environment on my Chromebook, I'll have to think how to do
that automatically
- Running some base runs (gcc 4.6), still not automatic enough
* LLVM administrativia
- Reviewing patches, support, etc
== Issues ==
* Network QoS is required to run buildbots, many failures due to timeout
every week. The more bots we run, the more urgent will be this issue.
== Plan ==
* Find a way to run Phoronix without human interaction (batch mode), and
write a script to do that
* Store the base runs somewhere (people.linaro?) and have the script
install them to compare with any run on the board.
* Test and release 3.3 Final
* Use GCC 4.8 on linaro-panda-02 and hope to solve the problem
* Finish LLVM+Clang change in CBuild (merge pending) and try to run some
benchmarks with it
* Think of a way to put bootstrap & phoronix in LAVA/CBuild (whatever is
easier), so I can use the calxeda nodes without worry if they'll be up or
down
Hi,
I am looking at best approach for
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43721 - Failure to optimise
(a/b) and (a%b) into single __aeabi_idivmod call in ARM architecture
In sumary, the following c code results in __aeabi_idivmod() call and
one __aeabi_idiv() call even though the former already calculates the
quotient.
int q = a / b;
int r = a % b;
return q + r;
My question is what would be the best way to handle it. As I see there
are few options with some issues.
1. Handling in gimple level, try to reduce the operations to equivalent
of this. We should do this for the targets without integer divide.
{q, r} = a % b;
Gimple assign stmts have only one lhs operation (?). Therefore, lhs has
to be made 64bit to signify return values of R0 and R1 returned
together. I am not too sure of any implications on other architectures here.
2. Handling in expand_divmod. Here, when we see a div or mod operation,
we will have to do a linear search to see if there is a valid equivalent
operation to combine. If we find one, we can generate __aeabi_idivmod()
and cache the result for the equivalent operation. As I see, this can
get messy and might not be acceptable.
3. An RTL pass to process and combine these library calls. Possibly
using cse. I am still looking at this.
4. Ramana tried a prototype to do the same using target pattens. He has
ruled this out. (if you want more info, please refer to at
https://code.launchpad.net/~ramana/gcc-linaro/divmodsi4-experiments)
Any suggestion for best way to handle this?
Thanks,
Kugan
Hi all,
I am facing build error, when I try to bootstrap GCC trunk for native
aarch64-unknown-linux-gnu configuration in openemedded/V8 model.
Linker error occurs while building stage 1 GCC.
(Snip)
/usr/lib/gcc/aarch64-oe-linux/4.7.3/../../../../aarch64-oe-linux/bin/ld:
gcov: hidden symbol `__deregister_frame_info' in
/usr/lib/gcc/aarch64-oe-linux/4.7.3/../../../aarch64-oe-linux/4.7.3/libgcc_eh.a(unwind-dw2-fde-dip.o)
is referenced by DSO
/usr/lib/gcc/aarch64-oe-linux/4.7.3/../../../../aarch64-oe-linux/bin/ld:
final link failed: Bad value
collect2: error: ld returned 1 exit status
(Snip)
The steps to reproduce the issue is attached.
Need some help to solve this.
regards,
Venkat.
== Progress ==
* Neon intrisincs: compiled my testsuite with GCC/trunk and filed
bugzilla 57431 for ICE.
* Merges for linaro-4.8-2013.06: started actual merges
- fixed a cbuild reporting problem
- faced calxeda and e2c problems, fixed by Matt.
* Jira: a few updates
* Libsanitizer: patched upstream, to be backported in GCC/trunk, then
in gcc-linaro-4.8.
== Next ==
* Merges for linaro-4.8-2013.06: complete them.
* Disable-peeling: resume
* Look at Kugan question about trunk regression
* Libsanitizer/aarch64: resume
* PGO/LTO/python bug: resume
* Neon intrinsics/vzup/vero: resume
== Progress ==
* Investigated attach to process and threads failures
(TCWG-95<http://cards.linaro.org/browse/TCWG-95>).
Almost all problems were fixed with any patch by making an os configuration
change on chromebook.
* Ran GDB test suites after OS configuration change on chromebook and
updated test results.
* Investigated inline-break.exp test suite failures on arm. GDB seems to be
missing one inlined instance on two different functions. Obtained debug
info and dumps of obj file without any luck to find the possible cause and
fix.
* Started work on integration of different testing scripts. Initially added
commandline options in bash script to test let user choose target/host,
native-none/native-gdbserver/remote, and testsuite/testcase configurations.
== Plan ==
* Figure out a reason/solution for inline-break.exp failures on arm.
* Investigate and Fix more ARM bugs shown in gdb 7.6 testsuite results.
* Chromebook os update on a faster sd card.
* Side activity work on automation of testing gdb in different
configurations and uploading comparison result.
== Issues ==
* None.
== Progress ==
* LRA on ARM and AArch64:
- Tried to workaround the issue with new insns (reload_outdi,...).
- But it doesn't seem to be handle by LRA.
- Debug still ongoing.
* Internal meetings
== Plan ==
* Releases merge reviews
* LRA
== Progress ==
Very short week (monday and wednesday off).
* AARCH64 testing
Got boot strap failure with GCC 4.9 trunk on open embedded image with
glibc changes. Retired with latest openembedded image on V8 model
Noted down the steps to reproduce boot strap failure in the model for
broadcasting.
* libssp support for Aarch64
Read documentation to understand and evaluate the work.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* Implement Libssp GCC back end hooks.
* Linaro connect travel prep, book tickets hotel and apply visa.
== Progress ==
* VRP based zero/sign extension
- Tested and posted the latest patch
* Better end of loop counter optimisation
- Tree level optimization are optimized in mainline
- Christophe noted a slight change in asm generated from earlier
version
- tracked down the patch causing this and communicated this.
* Generate a single call to divmod
- Looked at expand_divmod to understand how __aeabi_idiv and
__aeabi_idivmod are generated.
== Plan ==
* Better end of loop counter optimisation
- Change the pattern to remove this additional instruction if
necessary.
* Generate a single call to divmod
- Come up with a solution
== Issues ==
* None
== Progress ==
* Shrink wrapping improvement (TCWG-133)
- Call copyprop to optimized the parameter register move instructions.
- Test is ongoing.
* Update aarch64-none-elf toolchain newlib version to 2.0~20130530 (lp:1185711).
== Plan ==
* Collect performance data for TCWG-133.
* Continue on conditional compare.
Best Regards!
-Zhenqiang
== Progress ==
* Monday holiday here too, so went mountain climbing
* Finally fixed Lava token for cbuild
* Dug into EC2 issues, still confused
* Cloned infrastructure files from gcc.gnu.org, which turned out to be
out of date, so updated them to the current releases. That then
required fixing a few minor configure bugs in libppl. Files in
~/cbuild/var/snapshots/infrastructure. Infrastructure libs are
statically linked so they're consistent across platforms.
* Worked on cbuildv2, it now downloads a tarball or does a
bzr|git|svn checkout, configures, compiles, and installs them in
a sysroot as other packages depend on them. Also added a function
to download, build, and install all the toolchain infrastructure
libraries in a sysroot for binutils & GCC to use at build time
https://git.linaro.org/gitweb?p=people/rsavoye/cbuild2;a=summary
* Automated import of all historical test results till running.
Currently
the DB has 137,687,996 test results, 1909 separate test runs of GCC,
and covering 544 versions.
== Plan ==
* Add remote SSH support to DejaGnu for remote testing on
Chromebook. (carried over from this week)
* Figure out the EC2 mess and document it better
* Clone gcc_release.sh script but enhance so a similar process can be
applied to releasing Eglibc, Newlib, and the Binutils.
* Start gearing up for the releases
* Finish cross build and testing support in Cbuildv2, which would
basically eliminate the need for crosstool-ng.
== Progress ==
* 4 day week due to bank holiday.
* Merged binutils arm ifunc changes onto stable branch.
* Worked on getting some git mirrors setup for various toolchain deliverables.
* A certain amount of planning and JIRA card work in preparation for
the next iteration.
* Fixed aarch64_be-* and aarch64-elf testsuite issues with AArch64 ifunc patch.
* Investigated glibc malloc and alternatives.
== Issues ==
* None.
== Plan ==
* Submit new AArch64 ifunc patch after testing complete.
* Finish getting git mirrors setup.
* Look at some gdb testsuite failures.
--
Will Newton
Toolchain Working Group, Linaro
[very short week; two days]
Progress:
* misc
** handover from John Rigby: got a QEMU+KVM+AArch64 setup running with
his work-in-progress patchset
** tracked down weird behaviour when ^C'ing qemu on aarch64
to a bug in glibc's getcontext() implementation (it doesn't
clear the PSTATE field and ends up passing a garbage pstate
to the rt_sigreturn syscall)
Plans:
* VIRT-55: talk to Andre about testing; investigate testing migration
using LAVA
* set up a new qemu-linaro tree/branch as our CI/LAVA input [to keep it
separate from our "we release this" tree]
* restart work on upstreaming omap3 patches as part of my generic qemu
maintenance work (will reduce our maintenance burden in the long term)
-- PMM
== Progress ==
* 3.3 Release
- RC2 is out, we'll have an RC3 (critical bug on X86_64/Darwin)
- Adding some docs to the release
* Infrastructure
- Installing Ubuntu on Chromebook, automating bootstrap+test-suite
- Running the test-suite on a BeagleBoard (LLVM 3.2 and 3.3), no
regressions
- Trying to run an LLVM CBuild job
* Buildbots
- Chasing GCC internal failure on self-host bot
- Chasing more MCJIT failures on all bots
== Issues ==
- Upgrading to 13.04 was a big mistake, had to rollback to 12.10 and
re-configure my whole environment
- Office network/power grid is insufficient for the current population,
I'll be working from home from now on
== Plan ==
* Continue with CBuild for LLVM
* Setup continuous build for bootstrap+test-suite
* Automate Phoronix, setup CI
* If CBuild is done, try running benchmarks with LLVM on it
* As hardware become available, set them up as buildbots
We are using the Linaro prebuilt binary 2013.03 toolchain.
We have a program that does a memcpy of 6 bytes and the source and
destination pointers are both 6 byte arrays (through multiple levels of
struct & union etc).
At -O2 we get the memcpy inlined.
The code area in question is:
22840: f8b7 2054 ldrh.w r2, [r7, #84] ; 0x54
22844: f853 1d12 ldr.w r1, [r3, #-18]!
22848: f042 0202 orr.w r2, r2, #2
2284c: 889b ldrh r3, [r3, #4]
2284e: b292 uxth r2, r2
->22850: f8c7 101a str.w r1, [r7, #26]
22854: f8a7 2054 strh.w r2, [r7, #84] ; 0x54
22858: 83fb strh r3, [r7, #30]
2285a: f8da 3000 ldr.w r3, [sl]
And we get an alignment fault at the str.w marked above.
Looking at the types involved and their location in the containing
structures I don't see how the compiler could think that the destination
was word aligned
(I believe it is guaranteed that dest % 8 == 6)
There are no -march -mcpu or -mtune params passed to the compiler. The
code is running in user space on a A15.
Basic question before we look further:
Is the compiler assuming that cp15 SCTLR.A is 0 so that it is free to
generate unaligned loads and stores?
If the answer to the above is "no" we can isolate the code more and
bring it back to the list.
Thanks,
Bill
---------------------------------------
William A. Mills
Chief Technologist, Open Solutions, SDO
Texas Instruments, Inc.
20450 Century Blvd
Germantown MD 20878
240-643-0836
The Linaro Toolchain and Platform Working Groups are pleased to announce
the 2013.05 release of the Linaro Toolchain Binaries, a pre-built version
of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.8 2013.05
* Linaro GDB 7.6 2013.05
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link your
programs against.
Interesting changes include:
* gcc 4.7 is no longer included
* gdb is updated to 7.6
* Linux release file names no longer include a date to make life easier
for scripted downloads
* ISL/CLooG support is enabled in all builds
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2,
Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and
later, and should run on any Linux Standard Base 3.0 compatible
distribution. Please see the README about running on x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2013.05
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Hi,
I have a usecase where linaro toolchain is used to build my executables and
the sysroot is copied and used as glibc for running my embedded system.
Reason for this is, I want to use the same glibc what the application is
compiled against.
I found a bug fix from glibc community which I want to cherry pick and
rebuild the sysroot to include this fix. But, in the README.txt published
with linaro toolchain binary, there are no instructions for rebuilding
sysroot.
Can anyone point me to info on rebuilding sysroot? If formal steps don't
exist, could you point me to the current process being followed by linaro
so that I can observe the build log and attempt to do the same?
Thanks
Bharath
All,
In the Toolchain Working Group Mans has been doing some examination of SPEC
2000 and SPEC 2006 to see what C Library (glibc) routines impact performance
the most, and are worth tuning.
This has come up with two areas we consider worthy of further investigation:
1) malloc performance
2) Floating-point rounding functions.
This email is interested with the first of these.
Analysis of malloc shows large amounts of time is spent in executing
synchronization primitives even when the program under test is single-threaded.
The obvious 'fix' is to remove the synchronization primitives which will
give a performance boost. This is, of course, not safe and will require
reworking malloc's algorithms to be (substantially) synchronization free.
A quick Google suggests that there are better performing algorithms
available (TCMalloc, Lockless, Hoard, &c), and so changing glibc's algorithm
is something well worth investigating.
Currently we see around 4.37% of time being spent in libc for the whole of
SPEC CPU 2006. Around 75% of that is in malloc related functions (so about
3.1% of the total). One benchmark however spends around 20% of its time in
malloc. So overall we are looking at maybe 1% improvement in the SPEC 2006
score, which is not large given the amount of effort I estimate this is
going to require (as we have to convince the community we have made
everyone's life better).
So before we go any further I would like to see what the view of LEG is
about a better malloc. My questions boil down to:
* Is malloc important - or do server applications just implement their own?
* Do you have any benchmarks that stress malloc and would provide us with
some more data points?
But any and all comments on the subject are welcome.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
Greetings,
I'm using the Linaro tool chain with Eclipse (Juno) (under Windows) and
openOCD to write firmware for an STM32F20x based design (using an ST-Link2
debugger).
In general, that all works fairly well.
The part I'm having problems with is debugging (step-in, etc) from Eclipse.
The execution flow seems chaotic when single stepping through C code: it
skips statements, it jumps into the middle of a function, then returns to
the start of a function, it loops over certain statements (while there's no
loop in the code), etc. (It's close to useless).
I have seen this behavior with other IDE's and tool chains when code was
built with optimization turned on.
However, I specify 'no optimization' (-O0) when I build my code.
My questions:
a) Is there some implicit optimization being done in the compiler, even
though I tell it not to do so, which may affect proper debugging?
b) Are other people using Eclipse (Juno) and are they seeing the same
issue? Are there any known ways to fix this chaotic debugger behavior?
Kind regards,
~ Paul Claessen
== Progress ==
* Performed investigation on gdb7.6 test suite failures and untested test
cases.
* Updated JIRA enteries with test suite failures on arm to track progress.
* Wrote an automation script for selection of individual test cases from a
text file.
* Got the gdb.dwarf2 test suite patch reviewed from Matt and Will.
* Day off on Friday.
== Plan ==
* Finish up initial investigation on gdb7.6 test suite results.
* Complete updates of JIRA enteries after investigation on test suite
results in complete.
* Start work on integration of different testing scripts written in past
couple of months.
* Send gdb.dwarf2 test suite patch upstream.
Hi Richard,
After adding some new ops, I can keep the conditional compare to the
end of tree-level optimization. As tests, I expand conditional compare
to BIT_AND_EXPR/BIT_IOR_EXPR, which still depend on later "combine"
pass to combine them.
Is it possible to expand it to *cmp_and/*cmp_ior like patterns?
What's the expected RTL representation for conditional compare after
expand and before combine?
Thanks!
-Zhenqiang
== Progress ==
4 day week was ill on Friday.
* AARCH64 gprof –c option support.
Completed and submitted patch in binutils and got it upstreamed.
http://sourceware.org/ml/binutils/2013-05/msg00265.htmlhttp://sourceware.org/ml/binutils/2013-05/msg00264.html
The committer has changed the logic and seems it is not working for
backward addresses. Sent him an offline mail to correct it.
http://sourceware.org/ml/binutils/2013-05/msg00279.html
* AARCH64 gprof –glibc support.
Submitted patch and got is approved
http://sourceware.org/ml/libc-ports/2013-05/msg00098.html
* AARCH64 gprof – gcc support
Tested with removing test clause as suggested by Marcus (Aarch64 maintainer).
Marcus wants me to send two separate patches. Will be posting it.
* AARCH64 testing
Got boot strap failure with GCC 4.9 trunk on open embedded image with
glibc changes.
To confirm it is not a regression I ran with the openembedded image
available at Linaro download site.
Bootstrap failure can be reproduced. I am documenting the steps to
increase the size of image and also
Steps to reproduce boot strap failure in the model.
== Plan ==
* Continue bootstrap testing and push patches to GCC
* libssp support for Aarch64
* Linaro connect travel prep.
Misc
------
Planned leave 29-5-2013.
== Issues ==
* None.
== Progress ==
* LRA on ARM and AArch64:
- Reduced the ARM test case.
- The issue occurs during the constraints alternatives choice.
- Debug still ongoing.
== Plan ==
* LRA, LRA and LRA
== Progress ==
VRP based zero/sign extension
- Got some review comments for the patch and started addressing them
- split the patch into two; 1. propagating value range and 2. do rtl
expansion
- testing in progress
specfp regression
- Benchmarked spec2k for A15 with trunk and couldn't reproduce it.
- benchmarked spec2k for A9 with trunk and couldn't reproduce between
24th and 28th
== Leave ==
- Monday off Sick
== Plan ==
VRP based zero/sign extension
- Send patch for review
specfp regression
- benchmark for trunk version on 23rd
- Resolve regression
Sorry, this covers the last two weeks, not just one.
== Progress ==
* Created database schema for DejaGnu test results
* Created data schema for benchmarks
* Wrote scripts to convert benchmark and test data into a form that
can be imported into a database, added them to DejaGnu branch
* Imported all historical benchmark data
* Imported most historical test results (GCC still importing)
* Did some experimental graphs of test results
* Read lots of web pages to come up to speed on Linaro, registered
for lots of web pages and accounts
* Learned about Cbuild and LAVA
* Started on Cbuild v2
* Installed Ubuntu on Chromebook
== Plan ==
* Write Cbuild 2 design doc
* Continue work on Cbuild v2 to be able to use it for the June release
* Get remote testing working with Chromebook & foundation model
* More support tasks resulting from move off launchpad
- rob -
Greetings,
I'm using the Linaro tool chain with Eclipse (Juno) (under Windows) and
openOCD to write firmware for an STM32F20x based design (using an ST-Link2
debugger).
In general, that all works fairly well.
The part I'm having problems with is debugging (step-in, etc) from Eclipse.
The execution flow seems chaotic when single stepping through C code: it
skips statements, it jumps into the middle of a function, then returns to
the start of a function, it loops over certain statements (while there's no
loop in the code), etc. (It's close to useless).
I have seen this behavior with other IDE's and tool chains when code was
built with optimization turned on.
However, I specify 'no optimization' (-O0) when I build my code.
My questions:
a) Is there some implicit optimization being done in the compiler, even
though I tell it not to do so, which may affect proper debugging?
b) Are other people using Eclipse (Juno) and are they seeing the same
issue? Are there any known ways to fix this chaotic debugger behavior?
Kind regards,
~ Paul Claessen
== Progress ==
* binutils on ARM testsuite finally green in cbuild!
* Tested and pushed to gerrit bionic memcpy patches.
* Investigated binutils native AArch64 testsuite failures (not IFUNC related).
* Made a start on the DeveloperTools/LibraryPerformance wiki.
* Started looking at the Android memcpy problem on Galaxy Nexus.
== Issues ==
* binutils make ; make check takes over 24 hours on foundation model!
== Plan ==
* Respin AArch64 IFUNC binutils patch once relocation number allocated.
* Setup git mirrors for binutils, glibc and newlib.
* Android memcpy issue.
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Disable-peeling: looking at how to have less aggressive vectorization
* Libsanitizer/aarch64: initiated upstream discussion
* PGO/LTO bug reported by Doko: SD card too small to reproduce the problem
* Merges for linaro-gcc-2013.06: started looking at what to backport,
started merges
* Jira/wiki: started cleanup/collecting new cards
* Internal support
== Next ==
* Jira: update status on cards/blueprints backported from launchpad
* Merges for linaro-gcc-2013.06: continue collecting relevant merges
* Disable-peeling: continue investigating vectorizer behaviour
*Libsanitizer/aarch64: look at frame implementation
* PGO/LTO: complete build of python
* Neon intrinsics: continue improving crc with vuzp/veor
Progress:
* misc
** got raring/aarch64 cross build set up
** reducing number of places that need changing for a new qemu
target: sent some simple configure patches
** some 32 bit cleanup work that will help with getting John's
AArch64 patches to work
** tested Huawei's aarch64 patches and confirmed they work
** rebased qemu-linaro (and passed the results to Serge H for Ubuntu)
** sent patches which make QEMU builds for arm/ppc/microblaze guests
require libfdt, since a non-FDT-aware ARM QEMU is becoming
rapidly less and less useful
Plans:
* handover from John Rigby
* VIRT-55: talk to Andre about testing; investigate testing migration
using LAVA
* set up a new qemu-linaro tree/branch as our CI/LAVA input [to keep it
separate from our "we release this" tree]
* restart work on upstreaming omap3 patches as part of my generic qemu
maintenance work (will reduce our maintenance burden in the long term)
-- PMM
== Progress ==
* Buildbots
- Self-hosting bot online
- Fiddling with MCJIT tests to get bots green
* Benchmarks
- Running Phoronic benchmarks: GCC vs. LLVM, good results
- Got a sample of the PerfDB SQLite database, writing some queries
* Jira/Wiki farming
- Creating loads of new cards, blueprints, sub-tasks
- Adding content to the wiki pages about processes, cards, etc
* Release 3.3
- RC2 is out, no regressions, already on official repository
* EuroLLVM 2013
- Monthly call, wrap-up, preview of next year's
== Plan ==
* Try running a CBuild benchmark with LLVM 3.3 (Rob?)
* Automate release process, maybe we can do that every month
* Automate Phoronix test (GCC+LLVMrel+LLVMsvn)
* Follow up on Panda/Arndale ordering, needed for buildbots
* Try to extract useful information from perf database
Hi all,
I've spent a little while porting an optimization from Python 3 to
Python 2.7 (http://bugs.python.org/issue4753). The idea of the patch is
to improve performance by dispatching opcodes on computed labels rather
than a big switch -- and so confusing the branch predictor less.
The problem with this is that the last bit of code for each opcode ends
up being the same, so common subexpression elimination wants to coalesce
all these bits, which neatly and completely nullifies the point of the
optimization. Playing around just building from source directly, it
seems that -fno-gcse prevents gcc from doing this, and the resulting
interpreter shows a small performance improvement over a build that does
not include the patch.
However, when I build a debian package containing the patch, I see no
improvement at all. My theory, and I'd like you guys to tell me if this
makes sense, is that this is because the Debian package uses link time
optimization, and so even though I carefully compile ceval.c with
-fno-gcse, the common subexpression elimination happens anyway at link
time. I've tried staring at disassembly to confirm or deny this but I
don't know ARM assembly very well and the compiled function is roughtly
10k instructions long so I didn't get very far with this (I can supply
the disassembly if someone wants to see it!).
Is there some way I can tell GCC to not compile perform CSE on a section
of code? I guess I can make sure that the whole program, linker step
and all, is compiled with -fno-gcse but that seems a bit of a blunt
hammer.
I'd also be interested if you think this class of optimization makes
little sense on ARM and then I'll stop and find something else to do :-)
Cheers,
mwh
The v8 Foundation Model User Guide has a bare metal hello world example that uses semi-hosting. The Makefile uses ARM tools, however. Is there equivalent support for this example using a bare metal version of the gnu tools, such as gcc-linaro-aarch64-none-elf-4.8-2013.04-20130422_linux.tar.xz? I took a look, but didn't see a way to do this.
Of course, running the Linaro linux port on the v8 Foundation Model allows one to run hello world and much more, but I'm currently only interested in a bare metal target using gnu tools.
Thanks, Don
== Progress ==
* Backed up laptop data and did new ubuntu installation which crashed for
some reason.
* Wrote python script with googledoc API to automate fill up of
googlespread sheet.
* Created and tested patch for arm assembler compatibility fixes for
gdb.dwarf test suite assembly files.
== Plan ==
* Identify arm bugs out of gdb7.6 test results and work towards fixing them.
* Update JIRA enteries with test suite failures on arm to track progress.
* More work on automating googledoc spreadsheet writing using python.
* 2 Day off on coming Friday and Monday.
== Progress ==
* AARCH64 - gprof support.
Completed gprof -c support for aarch64.
Got reviewed internally by Matt and Will.
Patch yet to be posted. Waiting for some feedback on copyright message.
*Testing GCC bootstrap and regression suite.
Created a large image with help of Bero.
Bootstrap fails with GCC trunk libgcc_eh.a (unwind-dw2-fde-dip.o)
hidden symbol __register_frame_info is referenced bu DSO
ld final link Bad value.
Drilling down
== Plan ==
* Post patches in gcc and binutils for gprof work
* Continue handling builtin_return_address when -fomit-frame-pointer
is enabled.
* Continue gcc bootstrap and regression test.
== Issues ==
* Cbuild down most of the week.
== Progress ==
* 4.6 and 4.7 releases
- Released after a painful week !
* LRA on ARM and AArch64:
- Enabled on AArch64, but it leads to an ICE too.
- Applied Brice's ARM patches didn't solved the issue.
- Looked at the documentation/comments to understand the process.
- Debug ongoing.
== Plan ==
* Continue on LRA
== Issues ==
* None
== Progress ==
* Continue on conditional compare.
- Mix fixes for bootstrap.
* Update shrink-wrap patches according to comments and retest them on
Pandaboard and Chromebook.
* Prebuild 2013.05 Linaro toolchain locally.
- gdb related local patches need rework.
== Plan ==
* Continue on conditional compare to bootstrap.
* Linaro toolchain 2013.05 binary release.
Best Regards!
-Zhenqiang
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro GDB 7.6.
Linaro GDB 7.6 2013.05 is the first release in the 7.6 series.
***NOTE*** Linaro GDB 7.6 2013.05 is identical to the FSF GDB 7.6 release,
except for the change in version number and Linaro branding, since all
Linaro GDB features were already accepted upstream and are included in
the FSF release as-is. Future releases in the Linaro GDB 7.6 series may
include additional ARM-focused bug fixes and enhancements.
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.6-2013.05
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org