- linaro-toolchain - lists.linaro.org

[ACTIVITY] 18-22 March 2013

by Venkataramanan Kumar

== Progress == - Looking at TLS relocs and coming up with test cases for garbage collecting them. - Patch for missedout testcases in gc section is up streamed. Thanks to Marcus. == Plan == - Complete gc section test cases for TLS relocs. - Understand and evaluate gprof support work for Aarch64 Misc ----- Leave on Wednesday and Thursday (27th and 28th)

13 years, 3 months

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[ACTIVITY] 18-22 March 2013

by Kugan

== Progress == - Worked on VRP based zero/sign extension elimination at tree level - Some regression test cases are failing; investigating them == Plan == - Analyse the reason for test case failure and fix them - Extend the code to handle all the possible cases (currently implemented for subset to get the framework working)

13 years, 3 months

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Regehr: GCC 4.8 Breaks Broken SPEC 2006 Benchmarks

by Mans Rullgard

This post is making the rounds today: http://blog.regehr.org/archives/918 -- Mans Rullgard / mru

13 years, 3 months

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[ACTIVITY] Week 12

by Yvan Roux

== Issues == * None == Progress == * Libunwind AArch64 support: - basic implementation for building lib and testsuite done - but even a simple test case doesn't work for the moment == Plan == * Libunwind AArch64 support: - continue AArch64 specific implementation and informtation gathering

13 years, 3 months

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[ACTIVITY] Week 12

by Renato Golin

== Progress == * EuroLLVM paper review * Disabled EH tests on ARM for now * Fixed TSVC: NEON vs. VFP VMUL.f32 (and IEEE 754 correctness) * Changed FeatureNEONForFP to false on EABI ARM targets unless unsafe-math * Trying Arndale again, with u-boot patched, not good * Broken Panda buildbots, trying to fix == Issues == Got ill on Tuesday and only worked partially, if at all, the rest of the week Hopefully will be better next week... == Plan == * Fix our panda buildbot, maybe add more * Final try on Arndale GCC bootstrap before giving up * Continue fixing test-suite failures (only 5 left)

13 years, 3 months

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[ACTIVITY] report week 12

by Peter Maydell

Progress: * VIRT-4 [Guest migration support for KVM] ** VIRT-51: vexpress migration: ** wrote and submitted patches for all the devices that need fixes ** tracked down a painful bug where the guest just hung on vmload to a missing state-save for a timer device, submitted patch ** remaining work for this item is just responding to patch review -- PMM

13 years, 3 months

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LLVM ARM NEON VMUL.f32

by Renato Golin

Hi folks, I found an issue while fixing a test using the wrong VMUL.f32, and I'd like to know what should be our choice on this topic that is slightly controversial. Basically, LLVM chooses to lower single-precision FMUL to NEON's VMUL.f32 instead of VFP's version because, on some cores (A8, A5 and Apple's Swift), the VFP variant is really slow. This is all cool and dandy, but NEON is not IEEE 754 compliant, so the result is slightly different. So slightly that only one test, that was really pushing the boundaries (ie. going below FLT_MIN) did catch it. There are two ways we can go here: 1. Strict IEEE compatibility and *only* lower NEON's VMUL if unsafe-math is on. This will make generic single-prec. code slower but you can always turn unsafe-math on if you want more speed. 2. Continue using NEON for f32 by default and put a note somewhere that people should turn this option (FeatureNEONForFP) off on A5/A8 if they *really* care about maximum IEEE compliance. Apple already said that for Darwin, 2 is still the option of choice. Do we agree and ignore this issue? Or for GNU/EABI we want strict conformance by default? GCC uses fmuls... cheers, --renato

13 years, 3 months

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ARMV8 gcc toolchain issue while compiling for a foundation model

by pavan p m

Hello, I am having an issue with using the gcc toolchain for armv8. I am trying to cross compile a simple program (helloworld.c) as suggested in the link : https://wiki.linaro.org/HowTo/HelloAarch64. But when I try executing the binary on the simulated armv8 (using foundation model), I am getting error in GLIBC, specifically "/lib/libc.so.6: version `GLIBC_2.16' not found" . Could you please help me as to what could be wrong here? Thanks, Pavan

13 years, 3 months

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[ACTIVITY] 11-15 March 2013

by Will Newton

== Progress == * Analyzed Android kernel linker issue and created LP #1154165 to track it. * Triaged remaining binutils Launchpad tickets. * Setup my Pandaboard with Linaro 13.01 (13.02 oopses on boot) to run tests. * binutils: Committed fix for LP #517081 (Floating-point assembly and disassembly bugs on armel) upstream. * binutils: Committed a fix for ARM EABI tests upstream. * Lots of admin stuff. == Plan == * Get binutils testsuite green in a native configuration (fix LP #812276). * Investigate getting binutils testuite automated via cbuild/Lava. * More bugs... -- Will Newton Toolchain Working Group, Linaro

13 years, 3 months

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[ACTIVITY] 11 - 15 March 2013

by Omair Javaid

== Progress == Reviewing GDB tests that FAIL due to timeout problems in remote configuration. Made some changes to some of the GDB tests that FAIL on arm targets to check if they work by minor modifications. Sick Days: Had been sick due to cough n fever and a drop in blood pressure made me take most part of Thursday and Friday off. == Plan == Get with Matt for Post- Connect work targets. Review remaining GDB tests that FAIL due to timeout problems in remote configuration. Further experiments with GDB test suite to check support for unsupported tests on arm.

13 years, 3 months

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Linaro Toolchain Binaries 2013.03 released

by Bernhard Rosenkränzer

The Linaro Toolchain and Platform Working Groups are pleased to announce the 2013.03 release of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and targets the glibc Linaro Evaluation Build. Uses include: * Cross compiling ARM applications from your laptop * Remote debugging * Build the Linux kernel for your board What's included: * Linaro GCC 4.7 2013.03 * Linaro GDB 7.5 2012.12 * A statically linked gdbserver * A system root * Manuals under share/doc/ The system root contains the basic header files and libraries to link your programs against. Interesting changes include: * gcc updated to 4.7-2013.03: * Updates to GCC 4.7.2+svn196272 * Includes arm/aarch64-4.7-branch up to svn revision 196225 * A fix for LP #1135633: [linaro regression] alsa-tools FTBFS with error "unable to find a register to spill in class ‘AREG’" The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and later, and should run on any Linux Standard Base 3.0 compatible distribution. Please see the README about running on x86_64 hosts. The Windows version is supported on Windows XP Pro SP3, Windows Vista Business SP2, and Windows 7 Pro SP1. The binaries and build scripts are available from: https://launchpad.net/linaro-toolchain-binaries/trunk/2013.03 Need help? Ask a question on https://ask.linaro.org/ Already on Launchpad? Submit a bug at https://bugs.launchpad.net/linaro-toolchain-binaries On IRC? See us on #linaro on Freenode. Other ways that you can contact us or get involved are listed at https://wiki.linaro.org/GettingInvolved.

13 years, 3 months

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[ACTIVITY] 13-15 March 2013

by Yvan Roux

Short week to ... == Progress == * Configured GCC testsuite to run on the Foundation model. * Boehm GC AArch64 support: - Submitted gc integration patch in GCC upstream for review. - libatomic_ops AArch64 support branch re-tested and merged in mainline. == Next == * AArch64 libunwind support.

13 years, 3 months

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[ACTIVITY] 11-15 March 2013

by Venkataramanan Kumar

== Progress == - Closed the blue print for gc-sections implementation since the patch got upstreamed. - Opened new blue print for adding more test coverage to gc-sections tests. - Submitted a patch to enable missed out gc-sections test cases from ld-elf group. - Wrote gc-sections test cases for few GOT related relocs. == Plan == - Understand equivalences created during CFG traversal for jump threading. - Look at GCC code for a simple test case where jump threading is missed out. - Continue writing gc-sections test cases for remaining relocs.

13 years, 3 months

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[ACTIVITY] 12-15 March 2013

by Kugan

== Progress == - Monday was a public holiday - Studied benchmarks and analysed the rtl/asm for redundant sign extensions - Came up with simple test cases based on this (have 6 test cases now) - Looked at gcc tree documentations and helper macros; tried it by adding more debug dumps for types at tree level == Plan == - Start with the algorithm for sign extension elimination - Skipping manual changes at source level/asm level to see the performance improvement for now.

13 years, 3 months

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[ACTIVITY] 13-15 March 2013

by Christophe Lyon

Short week... == Progress == * Catch up on internal tasks / email that piled up during holidays + Connect * Resumed work on disable-peeling: - local benchmarking on snowball - restarting benchmarks via cbuild for an additional check == Next == * Check benchmark results on disable-peeling * Have a look at how to dejagnu-ize my Neon intrinsic tests * Check results of libsanitizer branch * Check results of 'revert-coalesce' branch * Check bench results of '4.7-backport-vect-cost-model' * Check bench results of '4.7-turnoff-64bits-ops' * Investigate why cbuild did not generate all the comparisons I expected (*-diff.txt files) * Check whether 2013.03 release process exposed the same problems I observed with 2013.02.

13 years, 3 months

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[ACTIVITY] report week 11

by Peter Maydell

Progress (in a 1 day week...): * qemu maintenance: ** released qemu-linaro 2013.03 ** arm-devs pullreq * VIRT-4 [Guest migration support for KVM] ** audited vexpress code for migration issues: there are a few devices needing minor cleanup, and one (pflash_cfi01) which has no migration support at all and needs it writing * KVM other: ** reviewed virtio-blk refactoring patchset -- PMM

13 years, 3 months

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[ACTIVITY] Week 11

by Renato Golin

== Progress == * Recuperating from Connect, catching up on email * Attended David's and Maddog's presentation on Monday * Investigating Arndale bug (seems to work with new kernel) - Bootstrapping LLVM works, GCC doesn't * Reviewing patches upstream (Mans', Tim's, others) * Fixed three bugs on test-suite that depended on RNGs - Only two more tests broken only in ARM - Five others broken on both (but only visible on our bot) - Nine EH tests that need disabling, for now == Plan == * Tackle the two last ARM specific bugs * If time allows, clear the other 5 * Try to disable any EH-specific test on ARM * Start talks about getting an internal binary distribution process going

13 years, 3 months

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lists.linaro.org maintenance completed

by IT Services

This is to let you know that the migration of lists.linaro.org has been successfully completed. As per the email I sent on Wednesday, it may take some time for the new address of the server to be seen by your computer. You can check this by trying to connect to the web site: http://lists.linaro.org/ If you are able to connect and you do not get an error, this means you are connecting to the new server and you can send email to the lists. If you experience any problems after the weekend and you find that you still cannot connect to the server, please reply to this email to let us know. Regards Philip IT Services Manager Linaro

13 years, 3 months

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Linaro GCC 4.7 and 4.6 2013.03 released

by Matthew Gretton-Dann

The Linaro Toolchain Working Group is pleased to announce the 2013.03 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.03 is the twelth release in the 4.7 series. Based off the latest GCC 4.7.2+svn195745 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn196272 * Includes arm/aarch64-4.7-branch up to svn revision 196225 * A fix for LP #1135633: [linaro regression] alsa-tools FTBFS with error "unable to find a register to spill in class ‘AREG’" Linaro GCC 4.6 2013.02 is the 25th release in the 4.6 series. Based off the latest GCC 4.6.3+svn196247 release, this is the twelth release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn196247 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.03 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.03 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.03 https://launchpad.net/gcc-linaro/4.6/4.6-2013.03 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 3 months

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[ANNOUNCE] Linaro QEMU 2013.03 released

by Peter Maydell

The Linaro Toolchain Working Group is pleased to announce the release of Linaro QEMU 2013.03. Linaro QEMU 2013.03 is the latest release of qemu-linaro. Based off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes and enhancements. This release has been updated to be based on upstream's recent 1.4.0 release. It also includes ARM KVM support patches which are in sync with the ABI as committed to the upstream Linux kernel for 3.9. This feature is still under development but will no longer be subject to kernel-vs-userspace ABI breaks. The source tarball is available at: https://launchpad.net/qemu-linaro/+milestone/2013.03 More information on Linaro QEMU is available at: https://launchpad.net/qemu-linaro -- PMM

13 years, 3 months

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Planned maintenance - lists.linaro.org

by IT Services

Hello You are receiving this email because you are subscribed to one or more mailing lists provided by the lists.linaro.org server. IT Services are announcing planned maintenance for this server scheduled for *Friday 15th March 2013, starting at 2pm GMT*. The purpose of the work is to move the service to another server. There will be some disruption during this maintenance. In order to ensure that you do not accidentally try to use the service while it is being moved, the current server will be shut down at 2pm. A further email will be sent on Friday afternoon to confirm that the migration of the service is completed. However, due to the way servers are found, it may take a while before your computer is able to connect to the relocated service. After the old server has been shut down, email sent to any of the lists will be queued, but it is possible that the sending server will still trying to deliver the email to the old server rather than the new one when it is started. It is therefore *strongly* recommended that you do not send any email to an @lists.linaro.org email address until you can connect to the new service, which you will be able to test by trying to use a web browser to connect to http://lists.linaro.org after you receive the email confirming that the migration has been completed. Since the old service will be shut down, if you are able to connect, you can be sure you have connected to the new service. If by Monday you are still unable to connect to the service or you are not able to send email to an @lists.linaro.org email address, please send an email to its(a)linaro.org. Thank you. Regards Philip IT Services Manager Linaro

13 years, 3 months

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compile using -mfloat-abi=soft option

by 서재권

13 years, 3 months

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4th March 2013 - 8th March 2013

by Omair Javaid

== This Week === * Couldnt help my luck and wasnt able to reach Hong Kong due to delay in visa processing by Hong Kong immigration department. * Remotely attended live streams of Linaro Connect Asia * Tried to reproduce all open bugs under linaro-gdb project on launchpad and created a review sheet. * Created a comparison sheet to figure out why certain gdb tests are failing or not being run in different configurations. == Next week == * Try to enable some native only tests and see if the functionality can be tested for remote configurations as well. * Set out some priority on blue prints and bugs under linaro-gdb project and start with some stuff with higher priority. * Caught some flu over the weekend and still a bit down with fever n headache.

13 years, 3 months

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[ACTIVITY] report week 10

by Peter Maydell

Progress: * Linaro Connect Asia (Hong Kong) * Lots of discussions with virtualization team (first time we've all been able to meet up!), making sure we all understand our TODO list, priorities, etc, and getting these details written up in JIRA * Presentation of KVM current status and discussion of next steps; we tried to keep the focus on the discussion/audience input part and I thought it was pretty good * Several linked conversations on UEFI and how it boots hypervisors (including KVM); came to a conclusion everybody was happy with (UEFI mostly runs in SVC mode but provides mechanisms so UEFI bootloader code can start the kernel in Hyp mode as it requires); Grant Likely will be moving this forward * KVM/ARM support patchset for QEMU was accepted into upstream this week! * looked at fixing QEMU's totally broken model of the versatile PCI controller -- PMM

13 years, 3 months

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[ACTIVITY] 25th Feb 2013 - 1st March 2013

by Omair Javaid

== This Week === * Compiled GDB graphical report and test-case statistics out of the results generated by running gdb-test suite in different configurations. * Worked on release testing of QEMU. All configurations mentioned in release template have been tested alongwith an extra configuration of 13.01 ubuntu on vexpress. * Kept running around for my Hong Kong visa which is still not with me. == Next week == * Try to make it to The Connect in Hong Kong or at least attend remotely. * Participate in various activities at The Connect.

13 years, 3 months

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[ACTIVITY] report week 09

by Peter Maydell

Progress: * qemu-linaro: rolled tarball, sent it off for testing * investigated and reviewed fixes for upstream regressions in ADC/SBC instruction implementation * sent updated versions of various patchsets * fixed review comments on QEMU KVM support patchset, resent * reviewed a pile of ARM patches from other people and sent arm-devs pullreq -- PMM

13 years, 4 months

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[ACTIVITY] 25 - 28 Feb

by Renato Golin

My taxi arrives in a few hours and I still have to buy the wine, so that's all for me for the week... See you guys in Hong Kong!! == Progress == * Vectorizer - Adding more tests to the global structure vectorizer - http://llvm.org/viewvc/llvm-project?view=revision&revision=175964 - http://llvm.org/viewvc/llvm-project?view=revision&revision=175898 - Adding it to the docs - http://llvm.org/viewvc/llvm-project?view=revision&revision=175965 * LLVM Docs - Changing docs here and there - http://llvm.org/viewvc/llvm-project?view=revision&revision=176096 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176090 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176033 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176209 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176211 * Buildbot - Upgraded Pangolin to Ubuntu 12.10, linaro-panda-01 back to life - Investigating breaks on the build, chasing people around - Trying to fix ARMv5 buildbot - http://llvm.org/viewvc/llvm-project?view=revision&revision=176095 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176219 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176243 - http://llvm.org/viewvc/llvm-project?view=revision&revision=176246 - Creating a way to re-spawn broken bots (still very crude) - Discussing about ways for improving uncertainties on LNT benchmarks - Proposed GSoC project to create regression analysis on results * GCC 4.6.3 - Investigating broken LLVM build on Panda/4.6.3 - O3 breaks differently than O2, O1/O0 doesn't break - Works with 4.7 and 4.6.3 on x86_64 even at O3 - Debug step doesn't show much info (mostly optrimized out) * LAVA - Checking with Dave Piggot why git.linaro.org doesn't work with LAVA - Possibly the way I'm doing (clone of a clone of a clone) == Plan == Connect

13 years, 4 months

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crosstool-ng

by Kalai Narayanan-SSI

Hi, I got the crosstool-ng from the 2013.02 release and wanted to build the linaro-aarch64-linux-gnu target locally. During the build, I'm encountering errors. I didn't do any menuconfig for the above target before starting the build. I'm seeing the following errors with the first during the ppl build ... [INFO ] Installing PPL [EXTRA] Configuring PPL [ERROR] configure: error: Cannot find GMP version 4.1.3 or higher. [EXTRA] Saving state to restart at step 'cloog'... ... (from build-ppl/config.log .... ... configure:11257: result: no configure:11392: error: Cannot find GMP version 4.1.3 or higher. GMP is the GNU Multi-Precision library: see http://www.swox.com/gmp/ for more information. ....) ... [INFO ] Installing CLooG/ppl [EXTRA] Configuring CLooG/ppl [ERROR] checking for version 0.10 (or later revision) of PPL... configure: error: Can't find correct version of PPL. [EXTRA] Saving state to restart at step 'mpc'... ... (from build-cloog-ppl/cobnfig.log ... ... configure:11237: error: Can't find correct version of PPL. ...) If I'm building a known target with the released version, why am I seeing these errors? Thanks, Kalai

13 years, 4 months

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Linaro Toolchain Binaries 2013.02 released

by Bernhard Rosenkränzer

The Linaro Toolchain and Platform Working Groups are pleased to announce the 2013.02 release of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and targets the glibc Linaro Evaluation Build. Uses include: * Cross compiling ARM applications from your laptop * Remote debugging * Build the Linux kernel for your board What's included: * Linaro GCC 4.7 2013.02-01 * Linaro GDB 7.5 2012.12 * A statically linked gdbserver * A system root * Manuals under share/doc/ The system root contains the basic header files and libraries to link your programs against. Interesting changes include: * binutils is upgraded to 2.23.1 * eglibc is upgraded to 2.17 * kernel header is upgraded to 3.7 The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and later, and should run on any Linux Standard Base 3.0 compatible distribution. Please see the README about running on x86_64 hosts. The Windows version is supported on Windows XP Pro SP3, Windows Vista Business SP2, and Windows 7 Pro SP1. The binaries and build scripts are available from: https://launchpad.net/linaro-toolchain-binaries/trunk/2013.02 Need help? Ask a question on https://ask.linaro.org/ Already on Launchpad? Submit a bug at https://bugs.launchpad.net/linaro-toolchain-binaries On IRC? See us on #linaro on Freenode. Other ways that you can contact us or get involved are listed at https://wiki.linaro.org/GettingInvolved.

13 years, 4 months

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AArch64 asm statement question

by Yvan Roux

Hi, in the example below I want to explicitly generate a "store exclusive pair" instruction with an asm statement: typedef struct { long unsigned int v1; long unsigned int v2; } mtype; int main () { mtype val[2] ; val[0].v1 = 1234; val[0].v2 = 5678; int status; do { __asm__ __volatile__( " stxp %0, %2, %3, %1" : "=&r" (status), "=Q" (val[1]) : "r" (val[0].v1), "r" (val[0].v2) ); } while (status != 0); if (val[1].v1 == 1234 && val[1].v2 == 5678) return 0; return 1; } The generated assembly is: .L7: ldr x0, [sp] ldr x1, [sp,8] .L3: add x3, sp, 16 stxp x2, x0, x1, [x3] cbnz w2, .L7 and the issue is that the assembler is not happy of the register x2 used to store the exclusive access status, it should be w2, but looking at constraint.md it seems that there is no constraint to say that we want the 32bit version of the register. Any idea ? Many thanks Yvan

13 years, 4 months

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[ACTIVITY] 18th Feb 2013 - 22nd Feb 2013

by Omair Javaid

== This Week === * Wrote a python script that parses GDB Testsuite log file and filters out all results and tests which were not passed. * Wrote another python script that compares filtered output of GDB log taken out from different configurations. This script compares results of various tests which didn't pass in current configuration with their corresponding results in GDB log of other configurations. * Generated various comparison pie charts and bar charts to show the testing results of GDB in different configurations. * Updated Wiki pages with help for people getting started with remote Pandaboards. * Updated wiki pages with help for people getting started with GDB development and testing remotely. * Ran after my visa agent for quick processing of my Hong Kong visa. == Next week == * Manual analysis of GDB test results for any possible issues on ARM platform. * Finish up the comparison document of all GDB test suite log files. * Follow up on hong kong visa application. * Flying to Karchi this Friday to catch flight to Hong Kong permitting visa.

13 years, 4 months

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[ACTIVITY] 19-22 Feb 2013

by Venkataramanan Kumar

== Progress == * Implementing GC sections support in binutils. Tested the patch for enabling gc section. "make ld-check" now passes after setting compiler in the PATH. Used the patched binutils source and built GCC for aarch64-none-elf. Ran gcc tests on V8 foundation model. Submitted the patch to FSF binutils for a review. * Analysis on jump threading in GCC. Not much progress this week. Identified few areas where we can improve. - In Normal jump threading see if we can thread across loop latch and loop header. - Lowering switch cases in simple and see if threading benefits. - Improve threading in VRP. Misc ------ * Was on leave Friday 22nd. * Attend tool chain weekly meet, and stand up call * Had a look at one x86_64 related patch. == Next week == * Update review comments if any and upstream gc sections support patch . * Continue analysis on jump threading in GCC.

13 years, 4 months

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How to compiled code with 32-bit lib

by Tien-Pao Shih

Hi, I tried to generate a binary containing only ARM 32-bit ISA. The toolchain I used is gcc-linaro-arm-linux-gnueabihf-4.7-2013.01-20130125_linux. The compilation options are -O3 -mcpu=Cortex-A15 -marm -static. I could get 32-bit ARM ISA for my own C code, but not the C lib functions, such as strcpy. Is there a way to invoke 32-bit ARM ISA C library code? Thanks, Tien-Pao

13 years, 4 months

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[ACTIVITY] 19-22 Feb 2013

by Kugan Vivekanandarajah

== Progress == - Fix EPILOGUE_USES regression in CoreMark - CBUILD tasks had to be respwaned. Zhenqiang sent me links and instructions. Build tasks are still in the queue. - Tried with some simple test cases mostly to understand dataflow and register allocator modules in gcc. - Remove Unnecessary Zero/Sign Extensions - Looked in detail a patch http://old.nabble.com/new-sign-zero-extension-elimination-pass-to29991676.h… which does extension elimination with sudo registers. This patch is not part of gcc mainstream. There were some concerns of runtime, using existing passes to handle this and not catching all the extension in the discussion. - Looked at gcc pass ree which does elimination after register allocation. As it is, it does not eliminate some of the cases I tried. Looking into it. == Plan for next week == - Work on Remove Unnecessary Zero/Sign Extensions and get ready to discuses this in connect. It might not be possible to run this with CBUILD therefore going to try with simple test cases already discussed and considered by others.

13 years, 4 months

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[ACTIVITY] 19-22 Feb 2013

by Yvan Roux

== Progress == * February 4.7 release: - Released a respin of 4.7 2013.02, which fixes an issue with multiarch on x32 and kfreebsd builds. * Boehm GC AArch64 support: - Fixed 128-bit atomic load/store and 'compare and swap' functions - Testsuite is now OK * AArch64 porting meeting: - No new requirements * Infrastructure: - Wifi now usable on my laptop == Next == * vacation * Connect

13 years, 4 months

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[ACTIVITY] 19-22 Feb

by Renato Golin

Some days sick, reduced output... == Progress == * Vectorization - Global Structures now vectorizing (some access) - http://llvm.org/viewvc/llvm-project?view=revision&revision=175818 - http://llvm.org/viewvc/llvm-project?view=revision&revision=175898 - Working on remaining cases * Buildbots - First overnight testing buildbot on ARM up and running - 19 failures: 11 real ones + Exception Handling (expected) - http://lab.llvm.org:8011/builders/clang-native-arm-lnt - 4 failures are bad tests (on ARM), 1 is failing in X86 - Performance monitoring on its infancy - http://llvm.org/perf/db_default/v4/nts/machine/10 == Plan == * Continue working on global structure vectorization * Update blueprints/cards with James pre-Connect * Investigate if it's possible to do regressions with the performance data * Try some LAVA jobs, raise concerns for Connect

13 years, 4 months

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[ACTIVITY] 19-22 Feb 2013

by Christophe Lyon

== Progress == * smin-umin: waiting for benchmark results with 'coalesce-vars' patch reverted on trunk. * libsanitizer: its backtrace printing facility relies on unwinding info not present by default in binaries. Adding -funwind-tables improves the results in GCC testsuite. There is still an interaction between runtest/qemu and isatty() which confuses dejagnu. Forcing libsanitizer's internal_isatty to return 0 fixes it. TBC. * vectorizer cost model: backport in 4.7 required to remove a part, for lack of new vectorizer infrastructure (arm_add_stmt_cost). * 'turnoff 64bits ops in Neon': waiting for benchmark results after backporting on 4.7. * internal tasks == Next == * holidays next week * Connect week after

13 years, 4 months

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[ACTIVITY] report week 8

by Peter Maydell

Progress: * updated various Virtualization category cards in cards.linaro.org with my comments and clarifications * rebased qemu-linaro on upstream 1.4.0 * upstream code review: pl330 and others * prompted by LP:1129571 into another look at the linux-user threading issues. I dusted off an ancient patch I'd written to address one part of these, rebased it and rewrote it to work properly. * KVM/ARM kernel patches are now upstream, so we can submit the QEMU patches; started on a final rebase, polish and test Absences: * NB: I now work a 4 day week, excluding Wednesdays * 4-8 March: Linaro Connect Asia (Hong Kong) -- PMM

13 years, 4 months

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Linpack Benchmark - Vectorizer

by Renato Golin

Hi folks, Attached is the Linpack benchmark, which I ran GCC and Clang with and without vectorization (though most of the loops are not vectorized). Reading the output of LLVM loop vectorizer, it also doesn't do much, but the net gain is due to the basic-block vectorizer. Does GCC has a similar concept? The results are also attached. cheers, --renato

13 years, 4 months

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[ANNOUNCE] Linaro GCC 4.7 2013.02-01 released.

by Yvan Roux

The Linaro Toolchain Working Group announce the 2013.02-01 Linaro GCC 4.7 release. This is a respin of the 2013.02 release because of an issue with multiarch for x32 and kfreebsd builds in the previous one. Please find the original 2013.02 announcement below. The Linaro Toolchain Working Group is pleased to announce the 2013.02 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.02 is the eleventh release in the 4.7 series. Based off the latest GCC 4.7.2+svn195745 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn195745 * Includes arm/aarch64-4.7-branch up to svn revision 195716 * Support for Cortex-A7 backported from trunk Linaro GCC 4.6 2013.02 is the 24th release in the 4.6 series. Based off the latest GCC 4.6.3+svn195744 release, this is the eleventh release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn195744 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.02 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.02 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.02 https://launchpad.net/gcc-linaro/4.6/4.6-2013.02 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/

13 years, 4 months

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Re: [PATCH] ARM: decompressor: clear SCTLR.A bit for v7 cores

by Michael Hope

On 6 November 2012 02:48, Rob Herring <robherring2(a)gmail.com> wrote: > > On 11/05/2012 05:13 AM, Russell King - ARM Linux wrote: > > On Mon, Nov 05, 2012 at 10:48:50AM +0000, Dave Martin wrote: > >> On Thu, Oct 25, 2012 at 05:08:16PM +0200, Johannes Stezenbach wrote: > >>> On Thu, Oct 25, 2012 at 09:25:06AM -0500, Rob Herring wrote: > >>>> On 10/25/2012 09:16 AM, Johannes Stezenbach wrote: > >>>>> On Thu, Oct 25, 2012 at 07:41:45AM -0500, Rob Herring wrote: > >>>>>> On 10/25/2012 04:34 AM, Johannes Stezenbach wrote: > >>>>>>> On Thu, Oct 11, 2012 at 07:43:22AM -0500, Rob Herring wrote: > >>>>>>> > >>>>>>>> While v6 can support unaligned accesses, it is optional and current > >>>>>>>> compilers won't emit unaligned accesses. So we don't clear the A bit for > >>>>>>>> v6. > >>>>>>> > >>>>>>> not true according to the gcc changes page > >>>>>> > >>>>>> What are you going to believe: documentation or what the compiler > >>>>>> emitted? At least for ubuntu/linaro 4.6.3 which has the unaligned access > >>>>>> support backported and 4.7.2, unaligned accesses are emitted for v7 > >>>>>> only. I guess default here means it is the default unless you change the > >>>>>> default in your build of gcc. > >>>>> > >>>>> Since ARMv6 can handle unaligned access in the same way as ARMv7 > >>>>> it seems a clear bug in gcc which might hopefully get fixed. > >>>>> Thus in this case I think it is reasonable to follow the > >>>>> gcc documentation, otherwise the code would break for ARMv6 > >>>>> when gcc gets fixed. > >>>> > >>>> But the compiler can't assume the state of the U bit. I think it is > >>>> still legal on v6 to not support unaligned accesses, but on v7 it is > >>>> required. All the standard v6 ARM cores support it, but I'm not sure > >>>> about custom cores or if there are SOCs with buses that don't support > >>>> unaligned accesses properly. > >>> > >>> Well, I read the "...since Linux version 2.6.28" comment > >>> in the gcc changes page in the way that they assume the > >>> U-bit is set. (Although I'm not sure it really is???) > >> > >> Actually, the kernel checks the arch version and the U bit on boot, > >> and chooses the appropriate setting for the A bit depending on the > >> result. (See arch/arm/mm/alignment.c:alignment_init().) > > > > That is in the kernel itself, _after_ the decompressor has run. It is > > not relevant to any discussion about the decompressor. > > > >> Currently, we depend on the CPU reset behaviour or firmware/ > >> bootloader to set the U bit for v6, but the behaviour should be > >> correct either way, though unaligned accesses will obviously > >> perform (much) better with U=1. > > > > Will someone _PLEASE_ address my initial comments against this patch > > in light of the fact that it's now been proven _NOT_ to be just a V7 > > issue, rather than everyone seemingly buring their heads in the sand > > over this. > > I tried adding -munaligned-accesses on a v6 build and still get byte > accesses rather than unaligned word accesses. So this does seem to be a > v7 only issue based on what gcc will currently produce. Copying Michael > Hope who can hopefully provide some insight on why v6 unaligned accesses > are not enabled. This looks like a bug. Unaligned access is enabled for armv6 but seems to only take effect for cores with Thumb-2. Here's a test case both with unaligned field access and unaligned block copy: struct foo { char a; int b; struct { int x[3]; } c; } __attribute__((packed)); int get_field(struct foo *p) { return p->b; } int copy_block(struct foo *p, struct foo *q) { p->c = q->c; } With -march=armv7-a you get the correct: bar: ldr r0, [r0, #1] @ unaligned @ 11 unaligned_loadsi/2 [length = 4] bx lr @ 21 *arm_return [length = 12] baz: str r4, [sp, #-4]! @ 25 *push_multi [length = 4] mov r2, r0 @ 2 *arm_movsi_vfp/1 [length = 4] ldr r4, [r1, #5]! @ unaligned @ 9 unaligned_loadsi/2 [length = 4] ldr ip, [r1, #4] @ unaligned @ 10 unaligned_loadsi/2 [length = 4] ldr r1, [r1, #8] @ unaligned @ 11 unaligned_loadsi/2 [length = 4] str r4, [r2, #5] @ unaligned @ 12 unaligned_storesi/2 [length = 4] str ip, [r2, #9] @ unaligned @ 13 unaligned_storesi/2 [length = 4] str r1, [r2, #13] @ unaligned @ 14 unaligned_storesi/2 [length = 4] ldmfd sp!, {r4} bx lr With -march=armv6 you get a byte-by-byte field access and a correct unaligned block copy: bar: ldrb r1, [r0, #2] @ zero_extendqisi2 ldrb r3, [r0, #1] @ zero_extendqisi2 ldrb r2, [r0, #3] @ zero_extendqisi2 ldrb r0, [r0, #4] @ zero_extendqisi2 orr r3, r3, r1, asl #8 orr r3, r3, r2, asl #16 orr r0, r3, r0, asl #24 bx lr baz: str r4, [sp, #-4]! mov r2, r0 ldr r4, [r1, #5]! @ unaligned ldr ip, [r1, #4] @ unaligned ldr r1, [r1, #8] @ unaligned str r4, [r2, #5] @ unaligned str ip, [r2, #9] @ unaligned str r1, [r2, #13] @ unaligned ldmfd sp!, {r4} bx lr readelf -A shows that the compiler planned to use unaligned access in both. My suspicion is that GCC is using the extv pattern to extract the field from memory, and that pattern is only enabled for Thumb-2 capable cores. I've logged PR55218. We'll discuss it at our next meeting. -- Michael

13 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Christophe Lyon

== Progress == * smin-umin: spawned build jobs for gcc-trunk with 'coalesce-vars' patch reverted (from A.Oliva), so that I can then run benchmarks to compare its effect with the one observed on gcc-4.7. * libasan: thanks to Peter, I am able to run sample programs under qemu. Ran GCC testsuite, observed some failures, to be investigated. * vectorizer cost model: committed upstream in 4.8. * Released gcc-linaro-4.6-2013.02 and gcc-linaro-4.7-2013.02. * backported 'turnoff 64 bits ops in Neon' from upstream to gcc-linaro-4.7. Waiting for builds to complete to launch benchmark jobs. * internal tasks == Next == * smin-umin: look at benchmarks results if available * libasan: analyse testsuite results * 64bits ops in Neon; look at benchmarks results if available * get more codec samples Christophe.

13 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Yvan Roux

== Progress == * February merge 4.6 and 4.7 - Another issue raised by Matthias, fix merged. - The merge request exposed a new failure on i686 (ld seg. fault) which looks like the ones we had on i686 before the release, re-spawned the job to see if we can reproduce. * Boehm GC AArch64 support: - Fixed some defect, identified some cases not implementable by atomic builtins, worked on inline asm versions. - re-installed working environment to be able to test the gcc integration (thanks to Matt) * Aarch64 porting meeting: - No new requirements. == Next == * Review roster. * Boehm GC AArch64 support: - fix libatomic_ops - validate GCC's Boehm gc integration * libunwind aarch64 support: - continue.

13 years, 4 months

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[ACTIVITY] 11th Feb 2013 - 15th Feb 2013

by Omair Javaid

== This Week === * Got the remote Pandaboard RootFS updates, Thanks to Dave again. * Got the SSH tunnels going for remote GDB test suite executions, thougt a single remote run takes eternity to complete. * Analysis of GDB test suite log files separated the failures and other test cases which were not passed as for the analysis. * Preliminary analysis done on GDB logs for remote configuration on ARM in comparison with native configuration. == Next week == * Try to complete log file analysis and post results. * Try to run GDB test suite using QEMU. * Follow up on hong kong visa application -- *** Sorry about spamming I got the subject wrong in the first email.

13 years, 4 months

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[ACTIVITY] 4th Feb 2013 - 8th Feb 2013

by Omair Javaid

== This Week === * Tried running GDB test suite with QEMU linux user-mode with not much success * Configured Pandaboard and ran GDB test suite in native and native-gdbserver configurations. * More of office setup and purchase of some bits and pieces * Gateway set up and Pandaboard access finally worked after some help from Dave and Matt. * Finally purchased Ticket for the Connect and also filled visa application * Attended Weekly toolchain call * Still suffering from a bad run of cough n flu, done with antibiotics now. * Public Holiday on 5th Feburary == Next week == * Continue with Analysis of GDB status on ARM in different configurations possible. * SSH tunnels and port forwarding setup to gateway and lab for smooth access. * Follow up on hong kong visa application

13 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Venkataramanan Kumar

== Progress == * Implementing GC sections support in binutils Wrote a patch to update some AARCH64 GOT and PLT symbol ref counts while sweeping sections. During "make ld-check" some tests are not running. Checking the issue. Discussed with Matt and decided to use default gc_mark hook. Most ports care BFD_RELOC_VTABLE_INHERIT and BFD_RELOC_VTABLE_ENTRY relocs during gc section marking. Now these relocs are not supported in AARCH64. * Analysis on jump threading in GCC Switch cases are not lowered in GCC till RTL expand stage. Looking at a patch on lowering switch to GIMPLE and see jump threading behaves. Misc ------ * Attend tool chain weekly meet, and stand up call * Had a look at one x86_64 related GCC build error. == Next week == * Continue Implementing GC sections support in binutils and test the patch. * Continue analysis on jump threading in GCC. Planning to look at Tree VRP as per Andrew pinski suggestion.

13 years, 4 months

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Hard Floating Point Question

by Derek Rollend

Hello, I am currently trying to determine how much I can optimize OpenCV using the ARM's VFP and the Linaro nano image. I have downloaded the arm-linux-gnueabihf-gcc & arm-linux-gnueabihf-g++ compilers, successfully cross-compiled OpenCV using those compilers (with -O3 -mfloat-abi=hard -ftree-vectorize -funroll-loops), and compiled an example OpenCV program with the arm-linux-gnueabihf-g++ compiler (with the same flags). However, when I try and run my executable within Linaro (running on a gumstix overo) I get "/lib/arm-linux-gnueabihf/libm.so.6: version `GLIBC_2.15' not found (required by /usr/lib/libopencv_core.so.2.2). I assume that this is because on my build machine (x86 Ubuntu 10.04) where I cross compiled the OpenCV libraries I am using libc-2.15, and on the target (gumstix) the loader can't find libc-2.15. However, within the gcc-linaro-arm-linux-gnueabihf-4.7 tar ball I downloaded today, there is a libc-2.15.so file in there that I copied into /lib/ on the gumstix. Still no success though when I try running my executable. Any recommendations on things to try? I am hesitant to just put a newer version of glibc in Linaro as it seems like that could screw a lot of things up. Should I attempt to re-build OpenCV somehow with an older version of glibc (namely libc-2.13)? Also, please let me know if this is the wrong forum for this question and where I should post it instead. Thanks, Derek

13 years, 4 months

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[ACTIVITY] 11 - 15 Feb

by Kugan Vivekanandarajah

== Progress == -Spawned CBUILD tasks with and without the patch proposed by Chung-Lin Tang to test current status of "Fix EPILOGUE_USES regression in CoreMark". Job is still in the queue. -Read references listed in gcc/ira.c to understand gcc IRA and went through the source code. -Experimented with simple test cases to analyse IRA debug output. == Plan for next week == - Analyse CoreMark results if ready and work on improvements. - Start with research for Removing unnecessary zero/sign extends when not working on "Fix EPILOGUE_USES regression in CoreMark.

13 years, 4 months

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[ACTIVITY] 11 - 15 Feb

by Renato Golin

== Progress == * Vectorizer - Progressing on the global structure alias analysis (discussions, drafts, failed attempts) - Interesting Linpack results for vectorizer, investigating performance - http://www.systemcall.org/blog/2013/02/llvm-vectorizer/ - http://llvm.org/bugs/show_bug.cgi?id=15247 * Buildbots - Took Chromebook out, since Pandas are fast enough - Creating LNT test-suite buildbot - http://llvm.org/viewvc/llvm-project?view=revision&revision=175081 - http://lab.llvm.org:8011/builders/clang-native-arm-lnt - Still a few rounds until it works properly * Distributed Builds - Distributed compilation works somewhat on Pandas - http://www.systemcall.org/blog/2013/02/distributed-compilation-on-a-pandabo… - It's better, cheaper and easier to use Chromebooks / Arndales, though... * LAVA - Tracking LLVM git repo in git.linaro.org - Trying to build from that repo, LAVA doesn't like it... :/ * EuroLLVM - We're not sponsoring it any more, will still help organize == Plan == * Continue Global Alias Analysis, I seem to be getting close to something worth sending (and learning a lot in the process) * Make sure LNT buildbot is up and running with vectorizer (O3) * Check with Dave Piggot why git.linaro doesn't work with LAVA * Inspect why some (loop+bb) vectorized results are poor on ARM

13 years, 4 months

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[ACTIVITY] report week 7

by Peter Maydell

Progress: * rebased qemu-linaro and sorted out with Serge what he requires in the way of patches for Ubuntu's upcoming code freeze. I plan to set up and test the 2013.03 release a week or two early both so that there is a patchset ready for the Ubuntu freeze and also to avoid clashing with Connect week. * some patches to clean up QEMU's logging functions so they can be used more widely in place of ad-hoc printf * cleanup patchset to get rid of sysbus_add_memory() function * LP:1079080 -- fixed serious bug in QEMU's Thumb-mode srs insn * upstream discussion about what to do about QEMU's disassembler license-clash issues: http://lists.gnu.org/archive/html/qemu-devel/2013-02/msg02122.html * NB: I now work a 4 day week, excluding Wednesdays -- PMM

13 years, 4 months

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[ANNOUNCE] Linaro GCC 4.7 and 4.6 2013.02 released

by Christophe Lyon

The Linaro Toolchain Working Group is pleased to announce the 2013.02 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.02 is the eleventh release in the 4.7 series. Based off the latest GCC 4.7.2+svn195745 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn195745 * Includes arm/aarch64-4.7-branch up to svn revision 195716 * Support for Cortex-A7 backported from trunk Linaro GCC 4.6 2013.02 is the 24th release in the 4.6 series. Based off the latest GCC 4.6.3+svn195744 release, this is the eleventh release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn195744 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.02 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.02 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.02 https://launchpad.net/gcc-linaro/4.6/4.6-2013.02 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org

13 years, 4 months

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aarch64 does not run

by Wink Saville

I downloaded the aarch64 binaries to a ubuntu machine: wink@ssi-primary:~$ uname -a Linux ssi-primary 3.5.0-21-generic #32-Ubuntu SMP Tue Dec 11 18:51:59 UTC 2012 x86_64 x86_64 x86_64 GNU/Linux And when I try to run gcc-4.7.3: wink@ssi-primary:~$ ls -al ~/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 -rwxr-xr-x 1 wink wink 553068 Oct 18 14:21 /home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 I get a file not found: wink@ssi-primary:~$ strace /home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 -v execve("/home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3", ["/home/wink/aarch64-toolchain/gcc"..., "-v"], [/* 19 vars */]) = -1 ENOENT (No such file or directory) dup(2) = 3 fcntl(3, F_GETFL) = 0x8002 (flags O_RDWR|O_LARGEFILE) fstat(3, {st_mode=S_IFCHR|0620, st_rdev=makedev(136, 0), ...}) = 0 mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7fa688be5000 lseek(3, 0, SEEK_CUR) = -1 ESPIPE (Illegal seek) write(3, "strace: exec: No such file or di"..., 40strace: exec: No such file or directory ) = 40 close(3) = 0 munmap(0x7fa688be5000, 4096) = 0 exit_group(1) = ? I must have done something real stupid, any help appreciated. -- Wink

13 years, 4 months

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[ACTIVITY] 11-12 February 2013

by Matthew Gretton-Dann

== Progress == * Very short working week. * Discussions about next steps in Lava integration. * Followed up on Arndale/GCC build issues. == Next week == * Review pending Backports * Investigate bootstrap ICE PR56184 further == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Linaro Toolchain Working Group matthew.gretton-dann(a)linaro.org

13 years, 4 months

1
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[ACTIVITY] 4-8 Feb 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: upstream accepted the patch for gcc-4.9-stage1 * smin-umin: several benchmarks runs necessary to confirm that the generic patch I suspected actually caused the regression. However, it also brings improvements in other benches (office-type). * looked at libasan: very little configuration seems necessary, but running a sample program under qemu leads to asan runtime complains. * internal tasks == Next == * smin-umin: run benchmarks on trunk to confirm the regression is also present. * vectorizer cost model: handle Richard's feedback. * get more codecs sample codes. * libasan: understand error messages Christophe.

13 years, 4 months

1
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[ACTIVITY] 4-8 Feb 2013

by Yvan Roux

== Progress == * February merge 4.6 and 4.7 - backport a patch from upstream to resolve conflicts - this backport introduced some merge issues - fix pushed and merge request ongoing * Boehm GC AArch64 support: - libatomic_ops maintainer rework the patch to make the usage of gcc atomic builtins available on the other targets - test exhibit some failures * libunwind aarch64 support - bug status moved to critical - configuration and machine description done - implementation ongoing * Aarch64 porting meeting: - Cancelled this week == Next == * February merge 4.6 and 4.7 - log new testsuite failures in launchpad * Boehm GC AArch64 support: - fix libatomic_ops - validate GCC's Boehm gc integration * libunwind aarch64 support - conitnue.

13 years, 4 months

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gcc-4.7 fsf merge has some issues

by Matthias Klose

looking at http://bazaar.launchpad.net/~linaro-toolchain-dev/gcc-linaro/4.7/revision/1… the first chunk of gcc/Makefile.in was wrongly merged. The first "# Multiarch support" should be removed. Same for gcc/configure.ac. gcc/configure needs to be regenerated. Thanks, Matthias

13 years, 4 months

2
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[ACTIVITY] 4-8 Feb 2013

by Venkataramanan Kumar

== Progress == * Implementing GC sections support in bintuils Looking at aarch64 relocations to consider while sweeping. * Cbuild experiments to test gcc svn aarch64 4.7 branch. Connection problems to the cbuild machines are solved now. Thanks to Matt. Spawned the build. Misc ------ * Attend tool chain weekly meet, and stand up call * Had a look at one x86_64 related patch that gone into GCC trunk. == Next week == * Continue Implementing GC sections support in binutils. * Start analysis on jump threading in GCC.

13 years, 4 months

3
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[ACTIVITY] 4-8 Feb 2013

by Kugan Vivekanandarajah

== Progress == -Attended 1:1 and other team meetings -Read linaro wiki and on boarding instructions -Backported Cortex A7 pipeline description to Linaro 4.7 gcc from fsf trunk and got it reviewed == Plan for next week == - Look into CoreMark regresses in Thumb-2 mode when using the LR regnum. - Start with research for Removing unnecessary zero/sign extends

13 years, 4 months

1
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[ACTIVITY] report week 6

by Peter Maydell

Progress: * Linaro's KVM/QEMU mini-summit, aimed at summarising current status, identifying what needs to be done and what Linaro should be doing: https://wiki.linaro.org/LEG/Engineering/Virtualization/201302MiniSummit * implemented support for variable-length qdev array properties in QEMU and sent out patch for this plus vexpress fixes which use it * investigated how to run the Linux Test Project syscall tests under QEMU to improve the quality of our linux-user mode testing (wrote up a howto for the QEMU wiki: http://wiki.qemu.org/Testing/LTP many thanks to fabo for whipping up a Jenkins job to run these nightly) * couple of trivial linux-user patches as example low-hanging fruit revealed by the LTP test results -- PMM

13 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Renato Golin

== Progress == * Buildbots - Setting up Chromebook with a buildbot - http://llvm.org/viewvc/llvm-project?view=revision&revision=174421 - http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a15 - 1h25min builds (3x faster than Pandas) * LAVA - Trying LLVM builds on Arndale - GCC segfaults: - "The bug is not reproducible, so it is likely a hardware or OS problem." * Distributed Panda - Setting up the boards, getting distcc on them - Speedup is squat (1.9%) because of too many parallel linking - Need to add LD to a group with less resources on Ninja * Vectorization - Reviewing some patches, discussing implementation details - Vectorization vs. O3 speedup: 2.5x ~ 3.0x (on both ARM and x86_64) - Working on global structure alias analysis * LLVM - Campaigning for integrates-as to be turned on by defaultfor ARM - ARM seems interested in fixing the eventual bugs - Adding 'armv7l' triple to default to 'cortex-a8' - http://llvm.org/viewvc/llvm-project?view=revision&revision=174466 - Campaining for buildbots to use CMAke/Ninja * EuroLLVM - Followup meeting, securing funding == Plan == * Change buildbots to not "make clean", try cmake * Try to reduce parallel linking flood, try one more panda * Continue with global structure alias analysis * Try to setup a test-suite buildbot

13 years, 4 months

1
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[ACTIVITY] 4-8 Feb 2013

by Matthew Gretton-Dann

== Progress == * Welcomed Kugan to the team working on GCC * Welcomed James Elliott to the team as project manager * Found Cortex-A9 bootstrapping issue raised as PR56184 * Fixed build issues in GCC and GDB. * Patch reviews. == Next week == * Investigate PR56184 further. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 4 months

1
0
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using linaro toolcahin to cross compile simple .c file

by Swati Deshmukh

hi, i am using linaro toolcahin binaries to execute simple .c file , so that it creates ARM executable output file i can run on Linaro installed on Hackberry board. this are the all steps i follwed from beginnng.. please let me know if i am missing something here.. 1. i have downloaded gcc for ubuntu from this link https://launchpad.net/linaro-toolchain-binaries/+milestone/2012.04 2. on ubuntu, i did tar xjf gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux.tar.bz2 export ARM_CROSS_TOOLS=pwd/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/arm-linux-gnueabi- export ARMCC=${ARMEL_CROSS_TOOLS}gcc & then $ARMCC hello.c it created a.out (which is simple executable file and not ARM executable) What i am doing wrong here? i am not getting how do i need to configure gcc . please revert back ASAP! Thanks & regards, Swati The contents of this e-mail and any attachment(s) may contain confidential or privileged information for the intended recipient(s). Unintended recipients are prohibited from taking action on the basis of information in this e-mail and using or disseminating the information, and must notify the sender and delete it from their system. L&T Infotech will not accept responsibility or liability for the accuracy or completeness of, or the presence of any virus or disabling code in this e-mail"

13 years, 4 months

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Multiarch

by Christopher Covington

Hi, It seems to me that your current toolchain releases [1] don't default to a multiarch layout. Am I looking in the right place? Do you anticipate enabling multiarch in the future? Is doing this currently blocked by limitations in tools such as crosstool-ng? 1. http://releases.linaro.org/13.01/components/toolchain/binaries Thanks, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation

13 years, 4 months

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AArch64 built by default in LLVM

by Renato Golin

As of revision 174322, AArch64 back-end is compiled by default on all architectures. This means it'll be built and tested on all platforms and it'll get heavy bombardment of the changes in the front- and middle-end without breaking for too long. Thanks Tim for the hard work! cheers, --renato

13 years, 4 months

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[ACTIVITY] 28 January - 1 February 2013

by Yvan Roux

== Progress == * Boehm GC AArch64 support: - Added information to the libatomic_ops patch, stiil under review - backported AArch64 support to the GCC boehm-gc, test on-going * Libunwind AArch64 support: - started. * Aarch64 porting meeting: - request to move to eglibc 2.17 (done by Zhenqiang) * LCA13: - hotel and plane booked == Next == * Validate boehm-gc GCC integration * Libunwind AArch64 support

13 years, 4 months

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[ACTIVITY] 28th Jan 2013 - 1st Feb 2013

by Omair Javaid

== This Week === * Joined Linaro, had welcome meeting with Matt * Set up my office at home * Laptop purchased and had it ready for development * Exchanged emails with various people for getting started and read a lot of administrative material on the wiki pages. * Registered for the connect, figured out visa process and sent request to Arwen for required documents. * Attended Weekly toolchain call, stand-up call and 1:1 with Matt. * Started work on GDB Testing in various configurations for analysis of current GDB status on ARM. * Build GDB on x86_64 machine and had test suite run in local and remote configuration. * Suffered from a bad run of cough n fever. == Next week == * Continue with Analysis of GDB status on ARM, hopefully get to access a pandaboard remotely and setup QEMU as well. * Apply for Hong Kong Visa for the connect. * Visit local market to resolve pending office setup and hardware requirements. * More Wiki reading and getting to know different processes at Linaro. * 5th February public holiday in Pakistan.

13 years, 4 months

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[Activity] Week 05

by Zhenqiang Chen

Summary: * Linaro toolchain binary 2013.01 release * Move to using EGLIBC 2.17 in aarch64 build Details: 1. Linaro toolchain binary. * Document on how to do release test. * Help Bero on 2013.01 release. * Investigate lp:1107659. Crosstool-ng upstream has a workaround fix. 2. Move to using EGLIBC 2.17 in aarch64 build. * Update Linux version to 3.7.0 since eglibc 2.17 configure "checking for kernel header at least 3.7.0". * Migrate local patches for eglibc 2.16 to 2.17 and update the config to 2.17 * Package build is OK. Test on simulation is ongoing. 3. Collect SPEC performance for different branch costs. * The total results wave less than 0.5%. * Three cases have 1-2% regression for smaller branch cost. Will analyze the detail impact for the three cases. Plan: * Investigate coremark performance impact for different branch costs. * Commit EGLIBC 2.17 changes Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

13 years, 4 months

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[ACTIVITY] 28 January - 1 February 2013

by Venkataramanan Kumar

== Progress == * Backport Tested and backported patch written to CSE optmize compares. http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00015.html Ran GCC regression suite with ARMV8 foundation model for aarch64-none-elf * Implementing GC sections support in bintuils Had a quick look at changes need to be added. Reading about relocations that needed to considered for elf_backend_gc_sweep_hook * Tried using Cbuild for buildign and testing gcc4.7 aarch64 branch. ssh keys are not in sync. I am getting permission denied. Cheking with David and Andy in valdation team. Misc * Attend tool chain weekly meet, and stand up call * Attend usual AMD meetings * Performed one x86_64 AMD task * Booked tickets, hotel and got invite letter for Linaro connect. == Next week == * Complete Cbuild experiments to test gcc svn aarch64 4.7 branch. * Continue gc section support. Implement elf_backend_gc_sweep_hook

13 years, 4 months

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[ACTIVITY] 28 January - 1 February 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: No news from upstream. * vectorizer cost model: added possibility to tune the problem by processor type. * smin-umin: regression actually caused by a previous patch brought when merging bswap16 support. Investigation on-going. * managed to run spec2k on local board. Need to upload tools compiled for hf platform. * tcpanda heat problems: GCC testsuite passed. * hot-cold partitioning: posted a follow-up to google patches on gcc-patches. * looked at some codecs needing improvements (Neon intrinsics usage) * feedback on lava/cbuild integration * hotel/plane booked for Connect. == Next == * handle 64-bits bitops in Neon feedback from upstream if any * smin-umin: check bench results with probable culprit patch reverted. Will need investigation on trunk too. * vectorizer cost model: check bench results * get more codecs sample codes.

13 years, 4 months

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[ACTIVITY] report week 5

by Peter Maydell

Activity: * calls and meetings * last bits and pieces of ARM QEMU patches sent prior to upstream 1.4 hardfreeze * continuing fixes for running a 3.8-rc4 vexpress kernel on QEMU: * refactored the way we handle SYS_CFG vexpress registers so it's possible to reasonably add support for more of them * put together a basic implementation of the various regs we're missing (oscillator, voltage, and some misc) * ideally this would be done via variable-length qdev array properties; started looking at how hard those would be to implement * investigated linux-user bug where an edge case in use of get_user_u32() had accidentally been broken; sent patch * all travel/hotels now booked for Connect -- PMM

13 years, 4 months

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[ACTIVITY] 31 Jan - 1 Feb

by Matthew Gretton-Dann

== Progress == * Welcomed Omair to the team working on GDB * Starting investigating cortex-a9 bootstrap failure * Blueprints updating * Preparing for two new starters next week == Next week == * Welcome two new members to the team. * Finish cortex-a9 bootstrapping investigations == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 4 months

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[ACTIVITY] 28-31 Jan

by Renato Golin

== Progress == * Maintenance - Fixing ARM buildbots, poking people to fix bugs, keeping them green - http://llvm.org/viewvc/llvm-project?view=rev&revision=173510 * Cost Model - Fixing some bugs on the generic code - http://llvm.org/viewvc/llvm-project?view=rev&revision=173691 - Adding some simple free cast (plus some infrastructure) - http://llvm.org/viewvc/llvm-project?view=rev&revision=173849 * LLVM - Investigating APFloat issue on Chromebook (bad libraries?) - Clang miscompiles and show same synthoms, will play with options next week - AArch64 back-end in, to be built by default * LAVA - Got three last errors due to include path ('bits/predefs.h' file not found) - libc6-dev + libstdc++-dev have no effect, problem doesn't show on buildbots - Testing heating problem with multiple images (only 12.02 is good) - Testing other boards, other images (with Dave) * Friday Holiday == Plan == * Try a bit more on the APFloat issue in Chromebook, but I think that's just bad distro (ChrUbuntu), since no one else has this problem. Has anyone put any Linaro image on a Chromebook? * Continue working on getting faster builds on LAVA (quad-core origen, Arndale, etc) with Dave Pigot. * Continue micro-benchmarking the vectorization and updating the cost-model. Start discussing the side-effects that are not modelled at all.

13 years, 4 months

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[ANNOUNCE] Linaro Toolchain Binaries 2013.01 released

by Bernhard Rosenkränzer

The Linaro Toolchain Working Group and Platform Team are pleased to announce the 2013.01 release of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and targets the glibc Linaro Evaluation Build. Uses include: * Cross compiling ARM applications from your laptop * Remote debugging * Build the Linux kernel for your board What's included: * Linaro GCC 4.7 2013.01 * Linaro GDB 7.5 2012.12 * A statically linked gdbserver * A system root * Manuals under share/doc/ The system root contains the basic header files and libraries to link your programs against. The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and later, and should run on any Linux Standard Base 3.0 compatible distribution. Please see the README about running on x86_64 hosts. The Windows version is supported on Windows XP Pro SP3, Windows Vista Business SP2, and Windows 7 Pro SP1. The binaries and build scripts are available from: https://launchpad.net/linaro-toolchain-binaries/trunk/2013.01 Need help? Ask a question on https://ask.linaro.org/ Already on Launchpad? Submit a bug at https://bugs.launchpad.net/linaro-toolchain-binaries On IRC? See us on #linaro on Freenode. Other ways that you can contact us or get involved are listed at https://wiki.linaro.org/GettingInvolved.

13 years, 4 months

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Newbie question

by Kalai Narayanan-SSI

Hi, I have a few armv7 assembly tests. I'm trying to compile these using the linaro aarch64 toolchain and I'm getting errors. Is there any specific flag that I have to pass to enable backward compatibility to allow v7 assembly to be compiled for a v8 model? reset.s: Assembler messages: reset.s:32: Error: operand 1 should be an integer register -- `mov r0,#0' reset.s:33: Error: unknown mnemonic `mcr' -- `mcr p15,0,R0,C13,c0,1' reset.s:36: Error: unknown mnemonic `mrc' -- `mrc p15,0,r0,c1,c0,0' reset.s:40: Error: operand 1 should be a SIMD vector register -- `orr r0,r0,#0x00001000' .... Relevant assembly code: .... _reset: // init Context ID Register MOV r0, #0 MCR p15, 0, R0, C13, c0, 1 // Enable Instruction cache mrc p15, 0, r0, c1, c0, 0 /* set bits: 12 = I i-cache */ orr r0, r0, #0x00001000 mcr p15, 0, r0, c1, c0, 0 ..... This is my assembler command: aarch64-linux-gnu-as -march=armv8-a+fp --keep-locals -o "reset.o" "reset.s" Thanks, Kalai

13 years, 5 months

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[ACTIVITY] 21-25 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: waiting for upstream. * vectorizer cost model: initial activation with unaligned load/store cost equal to aligned ones; benchmarking shows no significant difference. * smin-umin: a few benchmarks show a few unexpected regressions (10-15%). * setting up spec2k on local board * tcpanda heat problems: GCC built OK. Don't know how hot it became. == Next == * handle 64-bits bitops in Neon feedback from upstream if any. * analyze regressions in smin-umin * check if more tuning of the vectorizer cost model is desirable. * finish local board setup * tcpanda: run gcc testsuite to check heat

13 years, 5 months

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[ACTIVITY] 21-25 January 2013

by Yvan Roux

== Progress == * Boehm GC AArch64 support: - Tested on Foundation model - Patches sent to mailing list - Boehm GC has been accepted and merged into mainline - Libatomic_ops under review, some improvements are needed. == Next == * Boehm GC AArch64 support: - Fix libatomic_ops for mainline merge * Start gc sections support for AArch64 binutils * Review roster

13 years, 5 months

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[Activity] Week 04

by Zhenqiang Chen

Summary: * Investigate Automotive benchmark performance on different branch cost. Details: 1. Automotive benchmark performance analysis for different branch cost on Pardaboard ES. * Design small test cases to simulate bitmnp01 to compare the performance between ITTT and conditional branch. Test results show - If branch prediction does not work (put the codes in a function), ITTT is always better than conditional branch. - If branch prediction works (inline the codes t in the loop body), for most cases, conditional branch is better than ITTT. * Code alignment has big impact for tblook01. By default IT block has better performance. When adding __attribute__((aligned (16))) for function t_run_test, performance of conditional branch is better than IT block. 2. Prepare Linaro toolchain binary release. * Update Linaro crosstool-ng local patches due to the fix of lp:1067766 in source package. * Spawn all builds and smoke tests. Plan: * Investigate SPEC2k performance for different branch costs. * Work with Bero for 2013.01 toolchain binary release . Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

13 years, 5 months

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[ACTIVITY] 21-25 Jan

by Renato Golin

== Progress == * Buildbot - Taking buildbot to Linaro - Had wireless/GPU overheating, disabled kernel modules - Running smooth again (most of the time) - Debugging errors that only appear on ARM. * Building and Testing LLVM - Compiling on Intel with only the ARM backend helps a lot - Sent a call for Action to people clean up cross-compilation failures * LAVA - Progress on LAVA LLVM job - Got it checking out, configuring and building - Got PASS/FAIL/SKIP patterns working - https://validation.linaro.org/lava-server/scheduler/job/46027 - Need to get a patch from a specific place to apply * Cost Model - Re-wrote table lookup patch a few times, finally in for good - http://llvm.org/viewvc/llvm-project?rev=173382&view=rev - Studying costs of instructions, all seem good enough - Better approach now is to change the target description (less code, more gain) * EuroLLVM - 136 people so far == Plan == * Test distcc (or similar) on Pandas * Get a buildbot running with cross-compilation * Internal git repository for LAVA LLVM job * Confirm Linaro's sponsorship for EuroLLVM * Continue cost model changes in between == Background == * Monitor list for ARM changes * Monitor buildbot for failures

13 years, 5 months

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[ACTIVITY] report week 04

by Peter Maydell

Activity: * calls and meetings (about 20% of my working week this week ;-)) * finished rebasing and testing the KVM QEMU patches (thanks to Pawel for getting me an updated RTSM device tree), sent out updated version to go with -v17 kernel * minor qemu maintenance patches (including a minor cfi01 flash model bugfix) * trying to track down issues running a 3.8-rc4 vexpress kernel on QEMU. Among other things: * looks like we need to emulate some more of the oscillator and voltage config registers now (if only to make the kernel a bit quieter) * the kernel doesn't like the way qemu's boot loader puts the DTB blob after the initrd but beginning in the same page as the initrd ends [free_initrd_mem will trash memory outside the initrd proper but inside that last page] * a15 reports the wrong board model number -- PMM

13 years, 5 months

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AArch64 cross compile

by naveen yadav

Dear All, Is it possible to compile ARCH "AArch64 " for 32 mode, like if I have x86 64 bit machine and I install 32 bit OS on it, and machine is compatible with 32 bit binary. So is it possible to use AARCH64 (Cortex-V8) with installation of kernel 32 bit and use 32 bit tool chain. If answer is yes, can I build tool chain or is there option available in linaro cross-compile available from https://launchpad.net/linaro-toolchain-binaries/+milestone/2012.12 Thanks

13 years, 5 months

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[ACTIVITY] report week 03

by Peter Maydell

Activity: * usual set of calls and meetings (and there is another KVM related weekly meeting in the pipeline...) * reviewed virtio patches * rebased qemu-linaro on upstream * rebased KVM patches; couldn't get updated kernel to run on RTSM (probably a device tree or config issue; need to attack problem again this week) NB: I'm currently working a reduced set of hours due to RSI, though I am trying to remain responsive to email etc. -- PMM

13 years, 5 months

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[ACTIVITY] 14-18 January 2013

by Yvan Roux

== Progress == * Prepared Venkat on-boarding. * Aarch64 porting meeting: - libunwind is in the pipe * Boehm GC AArch64 support: - basic port done, test on-going == Next == * Boehm GC AArch64 support: - test and ask for up stream review.

13 years, 5 months

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[Activity] Week 03

by Zhenqiang Chen

Summary: * Investigate automotive benchmark. * Linaro gcc 4.6 release Details: 1. Automotive benchmark performance analysis for different branch cost for Cortex-A9. * Debug function WriteOut, which is called 12 times on average, leads common performance issue since the IF-THEN in the function is converted to IT block, which TRUE probability is less than 4%. * Identify the root cause of performance regression with IT block for bitmnp01, rspeed01, pntrch01 and ttsprk01. Overall, - The performance of a taken bpl is better than an ITTT. If this is a common sense, for IF-THEN, we'd set branch-cost to 1. - For IF-THEN-ELSE, we'd take branch probability into account when converting it to IT block. - ifcvt might generate useless IT block. 2. Try to do Linaro GCC release. But meet several issues: * Can not branch a clean lp:gcc-linaro/4.7. As a workaround, I had downloaded a clean bzr tree from other site. For next release, I can use the local tree to create the release tarball. * All a9hf-builder ubutests fail due to test environment issue. Plan: * Investigate more benchmarks for different branch costs. Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

13 years, 5 months

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[ACTIVITY] 14-18 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: pinged patch proposal. * vectorizer cost model: received results from spec2k. Prepared initial tuning to submit to benchmarking again. * smin-umin: tests OK, benchmarks ran, but did not generate the diff over a valid ancestor. I didn't make the manual comparison yet. * updated board for local benchmarking * tcpanda heat problems: built a new kernel with the thermal driver; need to reboot the board with it == Next == * handle 64-bits bitops in Neon feedback from upstream if any * analyze results of benchmarking with vectorizer cost model * analyze results of benchmarking with smin-umin idiom patch * continue board setup/update; I will probably try to cross-build the benchmarks to avoid having the build GCC itself on the board and save time. * followup on tcpanda heat problems

13 years, 5 months

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[ACTIVITY] 14-18 Jan

by Renato Golin Linaro

== Progress == * Buildbots - Added a Panda ES buildbot on clang-native-arm-cortex-a9 group - Reporting and helping fix bot bugs on ARM - ARM buildbots are green again! - Each ARM buildbot takes 4h15min to complete, versus 15min on Intel - We're still testing up to 12-15 patches on each build, on peak times (PST) * LAVA - Created a test run for llvm check-all, infrastructure is there - Need to make it actually do some work * Vectorization - Refactored cost model's temp tables - http://llvm.org/viewvc/llvm-project?view=rev&revision=172658 - Studying NEON costs, changing ARM target lowering * test-suite A15 - Building LLVM on Chromebook, check-all (1h, 181 failures) - Self-hosting LLVM on Chromebook, check-all (50min, many more) - Found some floating point type errors, only on Chromebook (libs?) * AArch64 back-end - Reviewed patches, look ok, some comments - Should be all in by next week * LLVM cross-compilation woes - Had to define include path for c, c++ and arm locations - It calls the wrong assembler, even defining the right gnu toolchain - Someone needs to fix these cross-compilation bugs!! :) == Plan == * Finish basic NEON costs for vectorization * Finish LAVA bot compiling clang + check-all * Install Panda buildbot on rack * Continue investigating Chromebook failures * Continue thinking about the long term plan for LLVM

13 years, 5 months

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[ANNOUNCE] Linaro GCC 4.7 and 4.6 2013.01 released

by Zhenqiang Chen

The Linaro Toolchain Working Group is pleased to announce the 2013.01 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.01 is the tenth release in the 4.7 series. Based off the latest GCC 4.7.2+svn194772 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn194772 * Includes arm/aarch64-4.7-branch up to svn revision 194808 * Support for the rev16 and revsh instructions * A15 Neon pipeline backported from trunk * FMA intrinsic backported from trunk * Better extending core to NEON transfers * Fused multiply-add support Fixes: * LP #1088898 regression of x86 gcc bootstrap with Linaro sourcebase * LP #1067766 Backport support for arm-linux-gnueabihf to GCC Linaro * LP #1084010 __atomic_load doesn't match ACQUIRE memory model Linaro GCC 4.6 2013.01 is the 23st release in the 4.6 series. Based off the latest GCC 4.6.3+svn194771 release, this is the tenth release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn194771 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.01 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.01 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.01 https://launchpad.net/gcc-linaro/4.6/4.6-2013.01 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org

13 years, 5 months

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Thursday 17th January 2013 1600 UTC Performance Call cancelled

by Matthew Gretton-Dann

All, Due to items in the performance call being covered in other meetings, travel and other issues I have decided to cancel today's 1600 UTC call. Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 5 months

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[PATCH] Cortex Strings AArch64 strnlen.S fix

by Marcus Shawcroft

This patch fixes an issue in the AArch64 strncmp implementation which occurs if ULONG_MAX-15 <= n <= ULONG_MAX. Matt, this is the last of my outstanding patches for cortex-strings. /Marcus

13 years, 5 months

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[PATCH] Cortex Strings AArch64 fix for strncmp.S

by Marcus Shawcroft

This patch fixes an issue in the AArch64 strncmp implementation which occurs if ULONG_MAX-15 <= n <= ULONG_MAX. /Marcus

13 years, 5 months

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AArch64 NEON polynomial types

by Renato Golin Linaro

Hi folks, On the LLVM list, Tim (ARM) is trying to push a patch to update the polynomial types on NEON to unsigned, on both 32-bits and 64-bits, since AArch32 says nothing and AArch64 specifies unsigned (char and short). Is there any such movement on the GCC end? The LLVM folks would rather this be a common move (or GCC first), than going solo and risk losing ABI compatibility. Any comments? cheers, --renato

13 years, 5 months

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Linking error - VFP register arguments

by Anup Kini

Hi All, I am trying to build OpenNI drivers and stuck with the following linker error. /usr/bin/ld: error: ../../Bin/Arm-Release/libOpenNI.so uses VFP register arguments, ./Arm-Release/XnBaseNode.o does not /usr/bin/ld: failed to merge target specific data of file ./Arm-Release/XnBaseNode.o /usr/bin/ld: error: ../../Bin/Arm-Release/libOpenNI.so uses VFP register arguments, ./Arm-Release/XnDump.o does not /usr/bin/ld: failed to merge target specific data of file ./Arm-Release/XnDump.o and many more of similar errors with VFP. System : ZYNC ZC702 board with ARM Cortex A9 dual core. OS: Linaro 12.04 LTS GCC - 4.6.3 Is there some flag i have to set in the Makefile to correct the Hard/Soft float type ? How do i figure out the correct one ? -- *Anup Kini *Systems Engineer**** * ------------------------------ * *Synapticon** * | Cyber-Physical System Solutions **** Direct:**** +49 7335 / 186 999 17**** Fax:**** +49 7335 / 186 999 1 **** **** synapticon.com <http://www.synapticon.com/> | @synapticon_co<https://twitter.com/#!/synapticon_co> **** Synapticon GmbH | Hohlbachweg 2 | 73344 Gruibingen, DE Secretary +49 7335 / 186 999 0 | General Manager: Nikolai Ensslen Registry Court Ulm HRB 725114 | USt-ID DE271647127**** This message and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. Please notify the sender immediately if you have received this e-mail by mistake and delete it from your system.

13 years, 5 months

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Possible toolchain bug with handling return value of read()

by Riku Voipio

Hi, The testcase at https://launchpadlibrarian.net/128616769/compare-test.c With aarch64: aarch64-oe-linux-gcc -o a-test ./compare-test.c ./a-test: fail ret: -1: Bad address With X86_64: gcc -o test ./compare-test.c ./test correct. ret: -1: Bad address setting -D_FILE_OFFSET_BITS=64 doesn't make a difference. This is with: gcc version 4.7.3 20121205 (prerelease) (Linaro GCC 4.7-2012.12) This was found while debugging: https://bugs.launchpad.net/linaro-aarch64/+bug/1099896 Riku

13 years, 5 months

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[MINUTES] Toolchain Working Group Weekly Meeting 14/Jan/2013

by Matthew Gretton-Dann

All, The minutes for today's calls are here: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2013-01-14 Action items are: TODO: Matt to investigate EEMBC Office gs8 failures ONGOING: Matt to talk to Dave Pigott about HF builders TODO: Matt blueprint backport of binutils 2.23.1 - backport just needs merging TODO: Matt to blueprint options for reducing QEMU based cross test noise TODO: Matt to unreserve Michael Hope's reservations TODO: Matt to look at why Cortex-A9 softfloat bootstraps fail in Stage2. TODO: Zhenqiang to do GCC Release: https://wiki.linaro.org/WorkingGroups/ToolChain/GCC/ReleaseProcess TODO: Matt to do Cortex Strings release. TODO: Matt chase up EEMBC Networking License TODO: Matt chase up with morvek who is leading KVM Virtual team. TODO: All to think of proposals for GNU Tools Caudron The agenda for next week's call is here: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2013-01-21 Please feel free to add your own agenda items before hand. Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 5 months

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[Activity] Week 02

by Zhenqiang Chen

Summary: * Rebase and test the shrink-wrap patches. * Learn how branch cost impact on code generation. Details: 1. Rebase and test the shrink-wrap patches. * For pretend arguments, it is hard to generate correct dwarf info for case: * Add dwarf info for ldrd_pop. Testing is ongoing. * Expose an interface from regcpprog and do copy propagation for the entry block. Benchmark logs show there are much more functions can be shrink-wrapped. 2. Read codes and enhance ifcvt.c. * For IF-THEN-ELSE, if the last insn of then_bb or else_bb is ANY_RETURN_P, we can save one JUMP. In this, we'd keep max MAX_CONDITIONAL_EXECUTE, not "max *= 2". A patch is sent out for review. * Take the branch probability into account. Test is ongoing. 3. R/M toolchain related work. Plan: * Follow up the shrink-wrap dwarf info issue. * Investigate benchmarks which is impacted by different branch cost. Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

13 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Yvan Roux

== Progress == * Short week again (leading compilation courses) * Merge request review - finished 4.6 and 4.7 requests. * Boehm GC AArch64 support - Back on this topic == Next == * Continue Boehm GC activity

13 years, 5 months

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[ACTIVITY] 7-11 Jan 2013

by Renato Golin Linaro

== This Week == * Livermore Loops - Test was badly adapted, failures were due to undefined behaviour - Removed from test-suite until a propper adaptation can be done - LTO and Static Analysis issues raised - http://llvm.org/bugs/show_bug.cgi?id=14851 - http://llvm.org/bugs/show_bug.cgi?id=14852 * LLVM Builds - Builds fine on Chromebook, same check-all failures as other ARM targets - test-suite fails, haven't had time to properly investigate - Getting a pandaboard to act as a buildbot - Creating a LAVA job to run often and on-demand internally * AArch64 in LLVM - reviewing lots of patches from ARM (Tim Northover) - full back-end just sent, will review over the weekend * Loop Vectorize - Some discussions with Tao Wang about cost models - Got some ideas on what are the best changes for LLVM's cost model - Not much on this front * EuroLLVM 2013 - Trying to define the level of sponsorship Linaro can provide - CFP will go out next week, committee created, conference confirmed * Commits http://llvm.org/viewvc/llvm-project?view=rev&revision=171642 http://llvm.org/viewvc/llvm-project?view=rev&revision=171859 == Next Week == * Get the LAVA job running - need account at people.linaro.org, RT created * Get at least one buildbot in sync with LLVM's lab * Get some traction on the cost model * Cambridge LLVM Social, liaise with ARM == Future == * Try to draft an LLVM story for Linaro (and understand why I'm here in the first place) ;) * Have builds with vectorization turned on

13 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Brice Dobry

== Blueprints == gcc-investigate-lra-for-arm == Progress == * Built "lra" gcc branch of gcc for x86 * Collected and compared SPEC benchmark results with and without LRA enabled * Bootstrapped ARM toolchain with last reported working revision from lra branch * Tracked down and resolved ICE * Bootstrapped ARM toolchain with head revision from lra branch * Tracked down and resolved another ICE * Verified two patches (from above ICEs) have no regressions on trunk * Began investigation into target hooks for LRA for ARM to improve performance * Admin * Connect registration and trip preparations == Next week == * Collect benchmark results from SPEC for LRA on ARM * Complete target hooks and benchmark again * Review roster

13 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: pinged patch proposal. * disable peeling/vectorzer cost model: initial benchmarking done wth cost-model on (now default). Received some results with cost model off, waiting for spec2k. * started looking at smin-umin idiom patch from Ramana. Rebased and launched build to make some benchmarking. * restarted working on local board setup for benchmarking * discussed bug reports on ARM-Neon instrinsics testsuite == Next == * handle 64-bits bitops in Neon feedback from upstream if any * analyze results of benchmarking with vectorizer cost model * analyze results of benchmarking with smin-umin idiom patch * continue board setup/update

13 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Matthew Gretton-Dann

== Blueprints == Initial Current Actual fix-gcc-multiarch-testing 31 Dec 2012 31 Jan 2013 == Progress == * Infrastructure * Investigations of why Cortex-A9 HF boards are failing * Admin * Booked tickets to Connect * 'Onboarding' prep for new starters and assignees * Cortex Strings * Applied patches == Next week == * Prepare Cortex Strings release * Ensure GCC backports are up to date. * Release week. * Catch up on outstanding cards. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

13 years, 5 months

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Help on epilogue dwarf info

by Zhenqiang Chen

Hi, Would you please help on how to generate correct epilogue dwarf info? Without correct dwarf info, when shrink-wrap is enabled, it tends to ICE at dwarf2cfi.c: function maybe_record_trace_start. /* We ought to have the same state incoming to a given trace no matter how we arrive at the trace. Anything else means we've got some kind of optimization error. */ gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row)); Issues: 1) pretend_args The attached pretend_arg.c shows an example about pretend_args dwarf info push {r2, r3} .cfi_def_cfa_offset 8 .cfi_offset 2, -8 .cfi_offset 3, -4 use r3 push {r4, r5, lr} ... pop {r4, r5, lr} add sp, sp, #8 //No instruction here to restore r2 and r3 Can we RESTORE r2 and r3? * If we notes to RESTORE r2 and r3, it might lead to wrong info for GDB since no instruction restores them. * If we do not RESTORE them, the reg_save dwarf info will not be cleared. Then the dwarf check will fail when the function is shrink-wrapped. 2) frame_pointer_needed In prologue, we set fp like fp = sp + INT After this instruction, cfi_def_cfa_register is set to fp In epilogue. we have fp += INT sp = fp Can we reset cfi_def_cfa_register back to sp? * If we set it back to sp, how to handle it in arm_unwind_emit_set, which assumes sp can not be set from other register? /* A stack increment. */ if (GET_CODE (e1) != PLUS || !REG_P (XEXP (e1, 0)) || REGNO (XEXP (e1, 0)) != SP_REGNUM || !CONST_INT_P (XEXP (e1, 1))) abort (); * If we do not set it back, to get correct dwarf info for POP after "sp = fp", we have to add notes " sp = fp + INT" for dwarf-info while we have "sp = sp + INT" in the insn. Here is the workaround POP RTL example for the attached alloca,c: (insn/f 62 61 66 3 (parallel [ (set/f (reg/f:SI 13 sp) // sp = sp + 8 (plus:SI (reg/f:SI 13 sp) (const_int 8 [0x8]))) (set/f (reg:SI 3 r3) (mem/c:SI (reg/f:SI 13 sp) [3 S4 A32])) (set/f (reg/f:SI 7 r7) (mem/c:SI (plus:SI (reg/f:SI 13 sp) (const_int 4 [0x4])) [3 S4 A32])) ]) alloca.c:8 329 {*load_multiple_with_writeback} (expr_list:REG_UNUSED (reg:SI 3 r3) (expr_list:REG_CFA_ADJUST_CFA (set (reg/f:SI 13 sp) (plus:SI (reg/f:SI 7 r7) // sp = fp + 8 (const_int 8 [0x8]))) (expr_list:REG_CFA_RESTORE (reg/f:SI 7 r7) (expr_list:REG_CFA_RESTORE (reg:SI 3 r3) (nil)))))) (3) No idea for if (crtl->calls_eh_return) emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM))); Currently I have no shrink-wrapped test case which crtl->calls_eh_return is true. Thanks! -Zhenqiang

13 years, 5 months

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