The Linaro Toolchain Working Group is pleased to announce the release of
Linaro GDB 7.5.
Linaro GDB 7.5 2012.09 is the first release in the 7.5 series.
***NOTE*** Linaro GDB 7.5 2012.09 is identical to the FSF GDB 7.5 release,
except for the change in version number and Linaro branding, since all
Linaro GDB features were already accepted upstream and are included in
the FSF release as-is. Future releases in the Linaro GDB 7.5 series may
include additional ARM-focused bug fixes and enhancements.
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.5-2012.09
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2012.09.
Linaro QEMU 2012.09 is the latest monthly release of qemu-linaro. Based
off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
There are no major changes in this month's release, but it has
been updated to be based on upstream's recent 1.2.0 release.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2012.09
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
The Linaro Toolchain Working Group is pleased to announce the 2012.09
release of both Linaro GCC 4.7 and Linaro GCC 4.6.
Linaro GCC 4.7 2012.09 is the sixth release in the 4.7 series. Based
off the latest GCC 4.7.1+svn191123 release, it includes ARM-focused
performance improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.7.1+svn191123
* Adds support for the NEON vext instruction when shuffling
* Backports improvements to scheduling transfers between VFP and core registers
* Backports support for the UBFX instruction on certain bit extract idioms
Fixes:
* PR54252 ICE with too wide alignment assertion on vectorised code
* PR54212 ICE due to generating a predicated NEON vdup instruction
Linaro GCC 4.6 2012.09 is the nineteenth release in the 4.6 series.
Based off the latest GCC 4.6.3+svn191000 release, this is the sixth
release after entering maintenance.
Interesting changes include:
* Updates to 4.6.3+svn191000
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2012.09https://launchpad.net/gcc-linaro/+milestone/4.6-2012.09
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.7/4.7-2012.09
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
-- Michael
Summary:
* Test shrink-wrap code
Details:
1. Add simple_return support in function thumb2_expand_return for
shrink-wrap. Here is the make check status
* One new fail is due to code size increase. We'd disable it when
optimizing function for size on THUMB2.
* Other new fails is due to dwarf info. Root cause is ICE at function
maybe_record_trace_start
gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
Here is the failed code segment:
tst ... L1
push {r4}
...
ldr r4, ...
L1:
bx lr // common simple return from two branches.
Here are the results for cur_row and ti->beg_row of trace starting at L1:
{cfa = {offset = 0, base_offset = 0, reg = 13, indirect = 0, in_use =
0}, cfa_cfi = 0x0, reg_save = 0x0}
{cfa = {offset = 4, base_offset = 0, reg = 13, indirect = 0, in_use =
0}, cfa_cfi = 0x0, reg_save = 0x7ffff726ab70}
Try gcc-linaro-4.5-2011.03. It does not generate the common bx lr.
test L1
push {r4}
...
pop {r4}
bx lr
L1:
bx lr
There is similar bug about it. But the fix is useless for us:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50833
Plans:
* Continue shrink-wrap task.
Best regards!
-Zhenqiang
== Progress ==
* Neon vext support for builtin_shuffle:
* Committed vext patch upstream, as well as a small cleanup patch.
* Merged vext support into gcc-linaro/4.7 branch.
* Posted upstream a follow-up patch to make vext tests support
big-endian.
Filed PR 54517: wrong code generation in big-endian with inline in
these tests.
* Updated patch to fix 3 testcases in big-endian after upstream comments.
* Implement builtin_bswap16:
* Posted upstream a patch to implement bswap16. Discussion on-going,
to have less duplication between arm and thumb patterns.
* Investigating how to make GCC catch the (x<<8)|(x>>8) construct
(where x is unsigned short) and map it to rev16, like
builtin_bswap16.
== Next ==
* Continue with bswap16 support.
Current Milestones:
|| || Planned || Estimate || Actual ||
|| clean up kvm-qemu cp i/f || 2012-09-20 || 2012-09-20 || ||
|| fake-trustzone || 2012-10-15 || 2012-10-15 || ||
Also planned: general keeping up with kernel changes; upstream patch
review; qemu-linaro releases. May change dates to align with overall
KVM plan for the quarter when that is finalised.
Previous Milestones:
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
== track-kvm-abi-changes ==
* merged in Christoffer's patches altering the IRQ delivery ABI
== other ==
* resent some patches as qemu trunk has reopened after 1.2 release
* misc upstream review work
* prep for qemu-linaro 2012.09 release
* AFDS (annual review) season again
KVM blueprint progress tracker:
http://ex.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&pr…
-- PMM
== Progress ==
* Started looking at symbol_ref splitting benchmark results
* One big regression ~18%
* Started to investigate whether code alignment was the problem as before
* Hot/Cold partitioning in PGO:
* https://blueprints.launchpad.net/gcc-linaro/+spec/hot-cold-partitioning-in-…
* Sent fixes so far upstream
* Spent most of the week looking at a Silent Code Gen fault in reload.
* Admin
* Some interviewing
== Next Week ==
* symbol_ref splitting
* Test code alignment hypothesis
* Test v2 patch.
* Hot/Cold Partitioning:
* Investigate remaining silent code-gen faults and non-termination
issue in SPEC
* If failures are fixed start profiledbootstraps and tests on the
central boards.
== Future ==
* Look at Cards for Vectorization, PGO and LTO with Michael.
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
All,
I have run into a(nother) problem with reload with
-freorder-blocks-and-partition.
Attached is my WIP patch (some of this has been sent up to gcc-patches
for review), and also the profile information (tarred up) I have
gathered in the train session
I get a segfault when executing crafty, which seems to come from
incorrect code generation in iterate.c.
The following shows some of the RTL dump after IRA
(insn 3087 1471 3088 163 (clobber (reg:DI 682 [ D.7985 ])) -1
(nil))
(insn 3088 3087 3085 163 (set (subreg:SI (reg:DI 682 [ D.7985 ]) 0)
(sign_extend:SI (mem/c:QI (reg/f:SI 1417) [0
transposition_id+0 S1 A8]))) 735 {*thumb2_extendqisi_v6}
(expr_list:REG_DEAD (reg/f:SI 1417)
(nil)))
...
(insn 3089 1477 1478 163 (set (subreg:SI (reg:DI 682 [ D.7985 ]) 4)
(ashiftrt:SI (subreg:SI (reg:DI 682 [ D.7985 ]) 0)
(const_int 31 [0x1f]))) 130 {*arm_shiftsi3}
(nil))
...
(insn 2898 2622 2899 203 (set (reg:SI 1677)
(mem/u/c:SI (symbol_ref/u:SI ("*.LC60") [flags 0x2]) [2 S4
A32])) 635 {*thumb2_movsi_vfp}
(insn_list:REG_LABEL_OPERAND 1525 (expr_list:REG_EQUIV (label_ref:SI 1525)
(nil))))
(insn 2899 2898 3491 203 (set (reg:SI 1678)
(ior:SI (reg:SI 1677)
(const_int 1 [0x1]))) 98 {*iorsi3_insn}
(expr_list:REG_DEAD (reg:SI 1677)
(nil)))
(insn 3491 2899 3492 203 (set (reg:DI 1734 [orig:682 D.7985 ] [682])
(reg:DI 682 [ D.7985 ])) 636 {*movdi_vfp}
(nil))
...
(jump_insn 2900 3499 2625 203 (set (pc)
(reg:SI 1678)) 727 {*thumb2_indirect_jump}
(expr_list:REG_DEAD (reg:SI 1678)
(expr_list:REG_CROSSING_JUMP (nil)
(nil))))
...
Insns 2898, 2899, and 2900 form the standard Thumb-2 indirect jump
sequence. Insn 3491 is a move that has been generated as part of
emit_moves in IRA for the loop it belongs to (effectively copying r682
into r1734).
Now despite thinking that r1678 is live throughout insn 3491 after
reload this part of the RTL dump looks like
(insn 2898 2622 2899 212 (set (reg:SI 4 r4 [1677])
(mem/u/c:SI (symbol_ref/u:SI ("*.LC60") [flags 0x2]) [2 S4
A32])) 635 {*thumb2_movsi_vfp}
(insn_list:REG_LABEL_OPERAND 1525 (expr_list:REG_EQUIV (label_ref:SI 1525)
(nil))))
(insn 2899 2898 3491 212 (set (reg:SI 4 r4 [1678])
(ior:SI (reg:SI 4 r4 [1677])
(const_int 1 [0x1]))) 98 {*iorsi3_insn}
(nil))
(insn 3491 2899 3493 212 (set (reg:DI 4 r4 [orig:682 D.7985 ] [682])
(mem/c:DI (plus:SI (reg/f:SI 13 sp)
(const_int 24 [0x18])) [9 %sfp+-672 S8 A64])) 636 {*movdi_vfp}
(nil))
...
(jump_insn 2900 3497 2625 212 (set (pc)
(reg:SI 4 r4 [1678])) 727 {*thumb2_indirect_jump}
(expr_list:REG_CROSSING_JUMP (nil)
(nil)))
That is all of r682, r1678, and r1734 have been assigned to hard
register r4. This is incorrect - as insn 2900 wants to be using r1678
from insn 2899.
Looking at the logs it seems to me that r1734 because its original is
r682 and that is assigned r4.
The reload dump says the following about the liveness of the registers
for various insns:
insn=3087, live_throughout: ..., dead_or_set: 682
insn=3088, live_throughout: ..., dead_or_set: 682
insn=3089, live_throughout: ..., dead_or_set: 682
insn=2898, live_throughout: ..., 682, ..., dead_or_set: 1677
insn=2899, live_throughout: ..., 682, ..., dead_or_set: 1677, 1678
insn=3491, live_throughout: ..., 682, 1678, ..., dead_or_set: 1734
insn=2900, live_throughout: ..., 682, 1734, ..., dead_or_set: 1678
This suggests to me that the compiler should know assigning the same
hard-register to r682 and r1678 is incorrect as they have overlapping
live-ranges, and are not duplicates of each other.
The compiler is configured as follows:
Target: arm-none-linux-gnueabi
Configured with:
/work/sources/gcc-fsf-enable-hot-cold-partitioning/configure
--target=arm-none-linux-gnueabi
--prefix=/work/builds/gcc-fsf-enable-hot-cold-partitioning-arm-none-linux-gnueabi/tools
--with-sysroot=/work/builds/gcc-fsf-enable-hot-cold-partitioning-arm-none-linux-gnueabi/sysroot
--disable-libssp --disable-libgomp --disable-libmudflap
--enable-languages=c,c++,fortran --with-cpu=cortex-a9 --with-fpu=neon
--with-float=softfp --enable-build-with-cxx : (reconfigured)
/work/sources/gcc-fsf-enable-hot-cold-partitioning/configure
--target=arm-none-linux-gnueabi
--prefix=/work/builds/gcc-fsf-enable-hot-cold-partitioning-arm-none-linux-gnueabi/tools
--with-sysroot=/work/builds/gcc-fsf-enable-hot-cold-partitioning-arm-none-linux-gnueabi/sysroot
--disable-libssp --disable-libgomp --disable-libmudflap
--enable-languages=c,c++,fortran --with-cpu=cortex-a9 --with-fpu=neon
--with-float=softfp --enable-build-with-cxx
Thread model: posix
gcc version 4.8.0 20120821 (experimental) (GCC)
The gcc command line looks like:
./xgcc -B`pwd` -march=armv7-a -mtune=cortex-a9 -mthumb -mfpu=neon
-mvectorize-with-neon-quad -mfloat-abi=softfp
-fprofile-use=.../186.crafty -freorder-blocks-and-partition
-fno-common -fdump-noaddr -O3 -dp -save-temps iterate.c -o iterate.o
Does anyone have any hints as to where I should go looking?
Thanks,
Matt
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
First I am trying to learn and am in no way an expert.
I have searched and searched for a walkthrough on how to compile LKMs for my
pandaboard ES. My target is the pandaboard running Linaro 12.08. I am using
Linaro toolchain binary 12.08. My confusion comes from me not knowing where
the kernel sources are (really how to get them) and the target libraries. I
guess what I expect is the target's rootfs with kernel source to be
somewhere on my Ubuntu Host so I can link to them.
I have tried the following make file configs. But obviously, I don't have
the correct path for KERNDIR as I don't know if it even exists on my host.
And the second make file seems like a native compile.
My previous experience with buildroot:
KERNDIR=/opt/buildroot/build_arm/linux-2.6.20.7/
export CROSS_COMPILE=arm-linux-
export ARCH=arm
obj-m += pwr_led.o
all:
make -C $(KERNDIR) M=$(PWD) modules
clean:
make -C $(KERNDIR) M=$(PWD) clean
Web examples:
obj-m = foo.o
KVERSION = $(shell uname -r)
all:
make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(KVERSION)/build M=$(PWD) clean
Could you please set my head straight by pointing me to a webpage or briefly
walking through the steps?
Thanks,
Todd
Assaf,
Just to let you know that linaro-toolchain-dev(a)lists.launchpad.net is
a closed list, a better place for this question is
linaro-toolchain(a)lists.linaro.org.
On 3 September 2012 11:41, Assaf Hoffman <hoffman(a)marvell.com> wrote:
> Hi,
>
> Where can I find Linaro toolchain manuals?
The manuals are distributed as *.info files, as per FSF GCC. These
are found in .../share/info/ under wherever you installed your
toolchain.
One way to view these is to run info as follows:
info -f .../share/info/gcc.info
> I’m looking for Linaro supported optimization flag list.
>
> Is it a super set of FSF GCC?
Linaro GCC 4.X supports all the options of FSF GCC 4.X, it may also
support options that were added in later versions of FSF GCC if the
appropriate functionality has been backported. The info files will
document these new options.
Unfortunately, I do not have an easy to read list of these options (if
indeed there are any), so I can't provide you with any further
pointers at the moment.
Thanks,
Matt
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
Summary:
* Release Linaro binary toolchain 2012.08
* Start shrink-wrap task
Details:
1. Validate and release Linaro binary toolchain 2012.08.
2. Start shrink-wrap task
https://launchpad.net/gcc-linaro/+spec/shrink-wrapping:
* Learn the background from the mail-list discussion:
http://old.nabble.com/Shrink-wrapping%3A-Introduction-to31220423.html
* Build X86/MIPS trunk toolchain to check the changes.
* Try to apply ARM backend related patches. It can get correct
result for several small cases. But lots of new fails in gcc
make-check. "pop_multiple_with_writeback_and_return" is not handled
correctly.
Plans:
* Continue the shrink-warp work.
Best regards!
-Zhenqiang
(Short week: 4 days, bank holiday)
Current Milestones:
|| || Planned || Estimate || Actual ||
|| clean up kvm-qemu cp i/f || 2012-09-20 || 2012-09-20 || ||
|| fake-trustzone || 2012-10-15 || 2012-10-15 || ||
Also planned: general keeping up with kernel changes; upstream patch
review; qemu-linaro releases. May change dates to align with overall
KVM plan for the quarter when that is finalised.
Previous Milestones:
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
== track-kvm-abi-changes ==
* working through design of how we do sync of register state between
QEMU and the kernel and how we handle migration (the two turn out
to be related and I now have a nice looking design that resolves
both of these at once)
* both the interrupt injection ABI and the coprocessor access
ABI are changing (again!)
== other ==
* fixed an embarrassing bug which made qemu-system-arm segfault
on 32 bit hosts; luckily spotted just in time for QEMU 1.2 release
* AFDS (annual review) season again
KVM blueprint progress tracker:
http://ex.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&pr…
-- PMM
== Progress ==
* Bank Holiday on Monday
* Got symbol_ref split benchmarking going
* Hot/Cold partitioning in PGO:
* https://blueprints.launchpad.net/gcc-linaro/+spec/hot-cold-partitioning-in-…
* Investigated and fixed all compile-time failures in SPEC
* Investigated and fixed a silent code-gen fault in SPEC
== Next Week ==
* Look at symbol_ref split benchmarking results
* Hot/Cold Partitioning:
* Investigate remaining silent code-gen faults and non-termination
issue in SPEC
* If failures are fixed start profiledbootstraps and tests on the
central boards.
== Future ==
* Look at Cards for Vectorization, PGO and LTO with Michael.
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
== Progress ==
* Validation of my vext patch in big-endian mode proved that proper
support would be non-trivial.
Spent a lot of time writing a self-testing executable test, which
works in both big and little endian modes.
Posted an updated patch which makes no optimization in big-endian.
After discussion with Ramana, I will post a 2nd patch which improves
the testing in big-endian mode.
* In the process, wrote a patch to fix 3 other testcases which used to
fail in big-endian mode.
* Received no answer from the original contributor of bswap16 support patch.
== Next ==
* Have my vext patch accepted on trunk.
* Continue with bswap16 support.
(Short week: 3 days)
Current Milestones:
|| || Planned || Estimate || Actual ||
|| clean up kvm-qemu cp i/f || 2012-09-20 || 2012-09-20 || ||
|| fake-trustzone || 2012-10-15 || 2012-10-15 || ||
Also planned: general keeping up with kernel changes; upstream patch
review; qemu-linaro releases. May change dates to align with overall
KVM plan for the quarter when that is finalised.
Previous Milestones:
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
== clean-up-kvm-patches ==
* patches as they stand look good; currently blocked waiting
for changes to go into kernel side
== track-kvm-abi-changes ==
* thinking about some interesting corner cases in accessing
cp15 state via KVM, notably how userspace should get at the
cache ID registers, which are exposed by hardware as a "select"
and "read value of selected register" cp15 register pair.
Consensus seems to be that the kernel should deal with converting
this into a simple interface that userspace can use to just
read all the ID register state at once.
== other ==
* fixed breakage in ARM TCG host support (recent changes had failed
to account for the ABI requirement that 64 bit arguments to functions
must be passed in even-odd register pairs)
* KVM bootwrapper: pushed 64-bit-addresses-in-dtb patch to main repo;
reviewed patch from Guodong Xu adding uInitrd support
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
The Linaro Toolchain Working Group is pleased to announce the 2012.08
release of the Linaro Toolchain Binaries, a pre-built version of
Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.7 2012.08
* Linaro GDB 7.4 2012.06
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link
your programs against.
Interesting changes include:
* Enable threaded gold linker in Linux package
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian
6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation
5.7 and later, and should run on any Linux Standard Base 3.0
compatible distribution. Please see the README about running on
x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2012.08
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Summary:
* Identify the root cause of performance regression for the "split2" patch.
* Validate Linaro binary toolchain prerelease.
Details:
1. Identify the root cause of performance regression for the "split2" patch.
* Code alignment is the root cause for the performance regression
(Michael reproduced it with "__attribute__ ((aligned(16)))").
* "build-id" section is the root cause of result difference from
cbuild test (the additional section makes the function address
different).
* Workout a small case to show the impact of code alignment on performance.
2. Linaro binary toolchain 2012.08 prerelease validation. All tests pass.
Absence:
* Annual leave: Aug. 24.
Plans:
* Linaro binary toolchain 2012.08 release.
* Start shink-wrap work.
Best regards!
-Zhenqiang
== Progress ==
* Fixed problems with my patch for "constant vec permute operation for
the vext instruction" blue-print, validated in cbuild.
* Ported it to trunk and submitted for review. R.Earnshaw requested
validation on big-endian. I need to upgrade my qemu to have it
supported.
* Compiled my Neon intrinsics testsuite with LLVM (version 3.2 trunk 160543).
It compiles at O0/O1/O2/O3, but only O0 produces the expected results.
Errors include: vset_lane, vld3, and vld4.
* Started looking a bswap16 support
== Next ==
* Have my "constant vec permute operation for the vext instruction"
patch accepted on trunk
* Continue with bswap16 support.
== Progress ==
* Follow up from 2012.08 Toolchain release
* Updated Wiki pages
* Start working on symbol_ref split benchmarking.
* Backport to PR54212 done upstream to 4.6 and 4.7
* Started picking up Hot/Cold partitioning in PGO blueprint:
* https://blueprints.launchpad.net/gcc-linaro/+spec/hot-cold-partitioning-in-…
* Got SPEC running locally and I think I have reproduced Ramana's failures.
== Next Week ==
* Bank Holiday on Monday
* Investiagte SPEC failures in Hot/Cold PGO
* Get symbol_ref benchmarking going properly
== Future ==
* Look at Cards for Vectorization, PGO and LTO with Michael.
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
(cc'd to linaro-toolchain to archive)
Hi Matt. I've had a look at the manual builds you tried to spawn.
Here's what I did to run cbuild locally to test it:
* cd linaro
* bzr branch lp:cbuild
* cd cbuild/slaves
* cp -a example `hostname`
* cd `hostname`
* make -f ../../lib/build.mk final/gcc-4.8+svn190558.stamp
I'm not proud of the whole 'slaves/$hostname' setup, but it is what it is.
Results are in $version, such as gcc-4.8+svn190558. The build tree is
in $version/gcc/default/build. Nuke using rm -rf final results
$version. See lib/common.mk and override the email address etc in
local.mk to stop build results going out You should put a proxy in
$http_proxy or ~/.wgetrc to reduce the download cost. Please add to
the cbuild README.
A nit: we use the Debian versioning scheme so the version should be
4.8~svn190558, i.e. a SVN checkout leading up to 4.8. Compare with
4.7+svn1234, which is a SVN checkout of the 4.7 branch.
The tarballs look generally good. I've spawned them into the a9hf
queue as that's what we benchmark on. Note that they're low priority
due to not having 'linaro' in the name.
-- Michael
Zhenqiang's been working on the later split 2 patch which causes more
constants to be built using a movw/movt instead of a constant pool
load. There was an unexpected ~10 % regression in one benchmark which
seems to be due to function alignment. I think we've tracked down the
reason but not the action.
Compared to the baseline, the split2 branch took 113 % of the time to
run, i.e. 13 % longer. Adding an explicit 16 byte alignment to the
function changed this to 97 % of the time, i.e. 3 % faster. The
reason Zhenqiang and I got different results was the build-id. He
used the binary build scripts to make the cross compiler, which turn
on the build ID, which added an extra 20 bytes ahead of .text, which
happened to align the function to 16 bytes. cbuild doesn't use the
build-id (although it should) which happened to align the function to
an 8 byte boundary.
The disassembly is identical so I assume the regression is cache or
fast loop related. I'm not sure what to do, so let's talk about this
at the next performance call.
-- Michael
All,
I have updated the minutes from today's Performance Call here:
https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2012-08-21
The following are the actions from the meeting:
* michaelh to folow-up and ping Mans on getting a hold of his benchmark runs
* michaelh to investigate regression with movw/movt patch by hand
* mgrettondann to run current symbol ref splitting patch over SPEC
against FSF trunk
* michaelh to point mgrettondann to existing cards
* michaelh and mgrettondann to start writing card for PGO work
* mgrettondann to pick up Hot/Cold Partitioning patch from ramana,
cross-test against SPEC for correctness, and then do a benchmarking
run
* ramana to create a Blueprint for min-idion in middle-end and
update Todo list with link
* mgrettondann to update todo list with changes in 2012.08 release.
* zchen to work on shrink-wrapping
* clyon to update his vext patch
The next meeting is on 4 September and a proposed Agenda is here:
https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2012-09-04
Please add any items you wish to discuss to the agenda.
Thanks,
Matt
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
On 18 August 2012 12:06, Ramana Radhakrishnan
<ramana.radhakrishnan(a)linaro.org> wrote:
> This should have been fixed by this patch . I'm a bit surprised that
> we are seeing these failures still ?
>
> ../ports/sysdeps/unix/sysv/linux/arm/ldsodefs.h:41:0: warning:
> "MORE_ELF_HEADER_DATA" redefined [enabled by default]
>
> http://permalink.gmane.org/gmane.comp.lib.glibc.ports/1428
>
> which should have made it back to eglibc 2.16 ?
Well, that's embarrassing. The eglibc script is used to both build
eglibc and to use a fixed eglibc to test GCC. The latter was winning
so every snapshot build was actually building eglibc 2.12.
Fixed and testing,
-- Michael
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
== clean-up-kvm-patches ==
* started on driving "read/write cp15 regs from kernel" from the existing
QEMU hashtable of cp regs it knows about. First cut seems to work,
but needs more testing and also qemu's ARMCPRegInfo struct needs to
provide raw_read/write methods which bypass access permission and
similar checks.
== other ==
* shepherded various things into upstream QEMU for 1.2 release freeze:
arm-devs patch queue, linux-user patches, some minor stuff
* qemu-linaro 2012.08 released
* travel booked for Connect/ELC-E/KVM Forum; rest is blocked on
the Connect conference hotel discount rate/booking info appearing
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
The Linaro Toolchain Working Group is pleased to announce the 2012.08
release of both Linaro GCC 4.7 and Linaro GCC 4.6.
Linaro GCC 4.7 2012.08 is the fifth release in the 4.7 series. Based
off the latest GCC 4.7.1+svn189992 release, it includes many
ARM-focused performance improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.7.1+svn189992
* An ABI fix for vectors with the wrong layout
* Backports improvements to the NEON vdup instruction with immediates
* Backports a fix to performance regressions in partial redundancy
elimination at high optimisation
* Backports faster 64 bit core register adds with immediates
A bug has been fixed in GCC's implementation of the AAPCS rules for
the layout of vectors that could lead to wrong code being generated.
Vectors larger than 8 bytes in size are now by default aligned to an
8-byte boundary. This is an ABI change: code that makes explicit use
of vector types may be incompatible with binary objects built with
older versions of GCC. Auto-vectorized code is not affected by this
change.
Fixes:
* LP: #1020601 Strange behaviour with __builtin_unreachable()
* PR38785 huge performance regression on EEMBC bitmnp01
* PR53447 missed optimization of 64bit ALU operation with small constant
Linaro GCC 4.6 2012.08 is the eighteenth release in the 4.6 series.
Based off the latest GCC 4.6.3+svn189991 release, this is the fifth
release after entering maintenance.
Interesting changes include:
* Updates to 4.6.3+svn189991
* An ABI fix for vectors with the wrong layout
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2012.08https://launchpad.net/gcc-linaro/+milestone/4.6-2012.08
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.7/4.7-2012.08
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
-- Michael
== Progress ==
* Out of office Friday 17
* Attended Virtual Connect sessions:
* Vectorization
* PGO/LTO: provided benchmarking results on Webkit computed in ST last
year.
* At last managed to have bzr working
* Prepared a patch for "constant vec permute operation for the vext
instruction" blue-print, based on linaro-gcc/4.7
* Some pending internal work
== Next week ==
* Out of office Monday 20
* Check reviews for my patch to have it accepted.
Hi Matt. I've fleshed out the Etherpad for the PGO and LTO session at:
http://pad.linaro.org/GzRj35tXFt
It's a topic list that needs some specifics. Could you make sure we
have basic answers to any correctness or performance questions?
Ramana, could you add the specifics from the performance call? I
can't seem to find the right meeting in the logs.
-- Michael
== Progress ==
* Out of office Friday 17
* Attended Virtual Connect sessions
* Vectorization
* Ran PGO/LTO session
* Lurked on AArch64/OpenEmbedded and Dalvik Performance sessions
* Did the 2012.08 release of the Toolchain
* Ran into infrastructure problems with armv5 builds
* Most of the build process is now done
* Start working on symbol_ref split benchmarking.
* Struggled to get my jobs to spawn
* Started to backport Ramana's fix to PR54212
* Submitted merge request for 4.7 backport
== Next Week ==
* Ensure 2012.08 release is completed
* Get symbol_ref benchmarking going properly
* Complete backports of PR54212
* Follow up to Virtual Connect Sessions
== Future ==
* Get my name against some blue-prints
* Find a small patch to GCC to use to pipeclean the submission process
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2012.08.
Linaro QEMU 2012.08 is the latest monthly release of qemu-linaro. Based
off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
There are no major changes in this month's release, though
it has been updated to track the latest upstream QEMU changes.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2012.08
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
On 15 August 2012 00:45, Matthew Gretton-Dann
<matthew.gretton-dann(a)linaro.org> wrote:
> So looking at the logs this seems to be a transient data transfer error:
>
> The logs (http://builds.linaro.org/toolchain/gcc-linaro-4.7-2012.08/logs/armv7l-natty…)
> have:
>
> make[4]: Entering directory `/scratch/cbuild/slave/slaves/tcpanda02'
> make -s -f ../../lib/fetch.mk
> gcc-linaro-4.7-2012.08/gcc-linaro-4.7-2012.08.tar-spawn 2>&1 | grep -v
> '^make\['
> Trying http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7/gcc-linaro-4.7-…
> Trying http://ex.seabright.co.nz/snapshots/gcc-linaro-4.7/gcc-linaro-4.7-2012.08.t…
> Trying http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7-2012.08.tar.xz
> Trying http://ex.seabright.co.nz/snapshots/gcc-linaro-4.7-2012.08.tar.xz
> Trying http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7/gcc-linaro-4.7-…
> Trying http://ex.seabright.co.nz/snapshots/gcc-linaro-4.7/gcc-linaro-4.7-2012.08.t…
> Trying http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7-2012.08.tar.bz2
> Trying http://ex.seabright.co.nz/snapshots/gcc-linaro-4.7-2012.08.tar.bz2
> bunzip2: gcc-linaro-4.7-2012.08/gcc-linaro-4.7-2012.08.tar.bz2: data
> integrity (CRC) error in data
Not sure here. ex.seabright is the authoritative source. Perhaps
there was a fault with the proxy in the control lab?
The good news is that the test fired and the build failed early. I've
logged LP: #1036867 to see if it happens again.
> The x86_64 build has succeeded OK though, so I (well Ramana really)
> have, eventually, restarted that build. We did encounter some issues
> with restarting the build as follows:
>
> 1) My Launchpad ID doesn't have permissions to spawn jobs through the
> web interface at ex.seabright.co.nz
Fixed.
> 2) So I attempted to spawn the job manually as follows:
>
> $ ssh -p7023 cbuild(a)ex.seabright.co.nz ./cbuild/tools/spawn.sh
> gcc-linaro-4.7-2012.08 armv5-builder
> Spawning gcc-linaro-4.7-2012.08 into the queue benchmarks
> Spawned into a9-builder
>
> This wasn't exactly what I expected. What are the correct runes
> here to get a build?
Spawn picks the closest spawn class based on the filename or, if
supplied, the second argument. Here you supplied 'armv5...' which is
closest to 'benchmarks'.
What you want is to click 'Release' beside the job name in the
scheduler view, to respawn through the /spawn interface, or to touch
the .job file in cbuild@orion:~/queue/armv5-builder.
> I've left this job in place as I've probably done enough damage already...
>
> 3) Ramana then attempted to use the web-interface at
> http://ex.seabright.co.nz/helpers/recent to get the job to rebuild
> (http://ex.seabright.co.nz/helpers/scheduler/spawn?queue=armv7l&job=gcc-lina…).
> However, this results in a Python exception.
Real men don't use user-friendly argument checking :) Well, not on
hacks like this tool. There is no armv7l queue so an assert fired.
> 4) Finally we used Ramana's credentials on the spawn interface, and
> that seems to have spawned the rebuild correctly.
Good.
> I'll let this run and see what happens.
>
> Michael, can you just check that things are progressing properly
> please, and also give me appropriate permissions on the web interface?
Checking:
http://ex.seabright.co.nz/helpers/buildlog/gcc-linaro-4.7-2012
shows that the build finished on x86_64 and i686. Checking /scheduler
shows that ARM builds are in progress on a9hf, a9, and armv5. Most
are in the testsuite and have ~6 hours to go.
-- Michael
== Progress ==
Linaro tasks.
* Some work on the intrinsics patches.
* Looked into auto-inc-dec stuff. Not enough improvements with scheduler
changes.
* Helped Matt get up to speed and wrote up some stuff for Christophe
with the vext examples.
* Investigated a bug that Mans reported upstream with the compiler
generating vdupeq . Have a patch being tested.
== Plans ==
* Finish up pending patches upstream. (neon intrinsics patches need to
be committed)
* Finish handing over patches.
* Fix PR54212.
Looks like I missed sending this for 2 weeks in a row.
== Progress ==
Linaro tasks.
* Some upstream discussions on neon testsuite bug. Poked at ML for
quite a bit. Looks like regexps in the neon intrinsics testsuite is
just wrong.
* Looking at a better way of doing the 64 bit arithmetic patches that
carrot proposed. Don't like them.
* Discussed with Richard about ubfx for a while.
* Reviewed the backlog and came up with suggestions for things for
people to do . Thought a bit about some stuff that Michael asked me to
look at .
== Plans ==
* Look at auto-inc-dec patches more and investigate benchmark results.
* Follow up on Intrinsics work.
* Follow-up on my intrinsics patches upstream.
* Finish looking at PR53664 and clean up testsuite further.
* Set up a TC2 for Linaro for benchmarking in the validation lab.
== Absences ==
* 17th Sept - 5th Oct - Vacation approved.
* 29th Oct - 5th Nov - Copenhagen Linaro Connect. Travel and hotel to
be booked.
All,
Is there anything left to go into the branches that needs to be in the
releases this week?
I believe Uli's patches have gone in - is there anything else required?
I will start spinning the releases around 0800 UTC tomorrow if nothing
else is needed for the release.
Thanks,
Matt
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
I would like to run Ubuntu 12.04 on a A9 Cortex-MP/armv7-a
development system that has *no FPU* hardware floating point unit.
Does this mean the entire toolchain needs to be recompiled?
Could you please shed light on appropriate settings
(toolchain and/or kernel) soft FPU emulation related options
for armv7-a without a FPU?
Thank...Peter
== Progress ==
* Started Linaro ramp up process
* Lots of admin, PC setup, Linaro docs reading
* Still unable to make bzr work. Investigating proxy restrictions.
* Started working on "constant vec permute operation for the vext
instruction"
* Still some pending internal work
== Next week
* Out of office Wed 15, Friday 17 and Monday 20
* Attend appropriate Virtual Connect sessions
* Progress on "constant vec permute operation for the vext instruction"
Virtual Connect is up next week. We've got two sessions lined up: the
first on profile guided optimisation and link time optimisation, and
the second on next steps with the vectoriser. Some other highlights
are the ones on system trace, Dalvik, and Aarch64 via OpenEmbedded
bootstrap.
The schedule is up at:
http://www.linaro.org/linaro-blog/2012/08/07/linaro-announces-virtual-conne…
Our sessions are "Analyzing vectorizer performance regressions in GCC
4.7 and 4.8" at 1000 UTC on Monday and "Exploring The Performance
Impact of PGO and LTO on ARM" at 1000 UTC on Thursday.
You'll need Google Hangout set up to join. For those who can't make
it, the sessions also get recorded out to the Linaro OnAir YouTube
channel.
I've cancelled the Monday regular and Thursday stand up calls. See
you next week!
-- Michael
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
Overall KVM plan for 'do by end August': QEMU parts of this are a mix
of clean-up-kvm-patches and track-kvm-abi-changes blueprints, mostly.
http://cards.linaro.org/browse/CARD-167
== clean-up-kvm-patches ==
* did enough cleanup to be able to send a coherent initial RFC
patchset to qemu-devel/kvmarm.
== other ==
* upstream patch review, in preparation for QEMU 1.2 freeze next week
* put together qemu-linaro 2012.08 tarball (release next week)
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
== GCC ==
* Back-ported patch to change vector alignment to 8
to FSF GCC 4.6 and 4.7 and Linaro GCC 4.6 and 4.7.
* Investigated mp3player benchmark regression with
Linaro GCC 4.7 backport of vector alignment patch.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
== Progress ==
* Started Linaro ramp up process
* Lots of admin, paperwork, and PC setup
* Successfully built compilers from Linaro and upstream trees
* Out of office Friday 10
== Next Week ==
* Out of office Friday 17
* Attend appropriate Virtual Connect sessions
* Do the 2012.08 release of the Toolchain
* Start working on symbol_ref split benchmarking.
== Future ==
* Find a small patch to GCC to use to pipeclean the submission process
--
Matthew Gretton-Dann
Linaro Toolchain Working Group
matthew.gretton-dann(a)linaro.org
Hello,
I've had a look at the mp3player performance regressions (just with *some*
data sets) with the vector-alignment patch. Interestingly it turns out
that the patch basically does not change the generated code for the hot
spot (inv_mdct routine) at all. (The *only* change is which bits of the
incoming pointer the run-time alignment check generated by the vectorizer
tests for. But this has no practical consequences, since the check itself
is not hot, and the *decision* made by the check is the same anyway --
everything is in fact properly aligned at runtime.)
The other difference, outside of code, introduced by the vector-alignment
patch is that some global arrays used to be forcibly aligned to 16 bytes by
the vectorizer, and they are now only aligned to 8 bytes. To check whether
this makes a difference, I've modified the compiler as a hack to always
force all global arrays to be 16 byte aligned. And interestingly enough,
this appears to fix this particular performance regression ...
Any thoughts as to why this might be the case? What are the
recommendations on the ARM hardware side as to what alignment is prefered?
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzende des Aufsichtsrats: Martina Koederitz | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
I have noticed gcc has a preference for generating UXTB instructions
when an AND with #255 would do the same thing. This is bad, because
on A9 UXTB has two cycles latency compared to one cycle for AND. On
A8 both instructions have one cycle latency.
--
Mans Rullgard / mru
== GCC ==
* Checked in patch to change vector alignment to 8
to GCC mainline.
* Started investigating benchmark regressions with
Linaro GCC 4.7 backport of vector alignment patch.
== GDB ==
* Checked in patch to fix hardware breakpoints on
non-4-byte aligned (Thumb) instructions.
* Checked in patch to properly report unsupported
watchpoint address/length combinations in gdbserver.
* Checked in patch to fix regression accessing /proc
files on older Linux kernels.
* Checked in 5 more patches to fix miscellaneous
test suite regressions.
* Re-tested GDB 7.5 pre-release on multiple platforms.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
[ Also posted to debian-arm; not cross-posted to avoid subscription
complaints... ]
Hi folks,
We're currently carrying patches in glibc in Debian (and Ubuntu) that
I wrote which are used to work out whether an ELF binary is hard-float
or soft-float. We're using these to allow us to do the right thing on
a multi-arch system, which is to pick a consistent set of binaries
(programs and libraries) at runtime; if you try to mix binaries using
different ABIs, you're prone to all kinds of weird and wonderful
results but generally badness occurs.
Upstream glibc have generally not been welcoming of these patches, and
I understand this; the approach taken (reading ARM-specific build
attributes) is far from clean and doesn't fit well in the design of
ld.so in particular. So, I've been looking into alternative methods
for achieving the goal of identifying ABI. After a couple of false
starts and discussion with some of the helpful toolchain and ABI folks
in ARM, I think we have a solution that will work well in the long
term. I just wish we'd thought about this *way* back when we first
started the armhf port, as it would have been much easier to work on
and standardise this back then. Modulo availability of time machines,
there's not much we can do on that front... :-)
What I'm proposing is to use two new values in the OSABI field in the
ELF header:
#define ELFOSABI_LINUX_ARM_AEABI_SF 65
#define ELFOSABI_LINUX_ARM_AEABI_HF 66
and use these values in the future for soft- and hard-float binaries
so that can unambiguously identify them.
There's already precedent for binaries using different values in this
field, with support in glibc for parsing and understanding
them. Adding more possible values is quite easy, assuming that the
maintainers are amenable. I'm about to post a similar message there.
I have a plan of attack for how to make a staged switch over,
deliberately to minimise any potential compatibility problems. See the
attached doc for that. It's deliberately not very specific in terms of
timeline, as that's something I'm hoping to get feedback
about. Comments very welcome; please point out if you think there are
problems with this approach, or if there are any more implementations
of toolchain / linker that will need to be addressed.
Cheers,
--
Steve McIntyre steve.mcintyre(a)linaro.org
<http://www.linaro.org/> Linaro.org | Open source software for ARM SoCs
For reference, if you see link time errors about a missing
'__dso_handle' symbol when building Android, then check if you're
using any global class instances in your multimedia libraries.
Each shared library has a __dso_handle symbol which is filled in on
load by the dynamic loader. Global class instances use this unique
value to make sure the destructor is called when the library is
unloaded. The symbol itself is defined in crtbegin_so.o, but the
multimedia rules forbid using this for an unknown reason. Either
create your global instances in a different way or change the
multimedia rules :)
-- Michael
== Progress ==
* Fixed PR54051
* Improved neon intrinsics testsuite. While still not an execution
based testsuite atleast we get compile time tests that are sensible C.
Exposed issues - wrote patches.
that improve vabal , vaba intrinsics. Fix an issue with costs,
fixed an issue with splitters for large mode moves for Neon with
hardfp port etc.
* Some upstream patch and bug review.
* Fixed a minor testism for vld1q_s64 tests.
== Plans ==
* Write a patch to check md5sums between local tarball and uploaded
tarball in the release script.
* Look at auto-inc-dec patches more and investigate benchmark results.
* Submit intrinsics work upstream and sheperd it through.
* Finish looking at PR53664 and clean up testsuite further.
* Follow-up on my intrinsics patches upstream.
== Absences ==
* 17th Sept - 5th Oct - Vacation approved.
== GCC ==
* Checked in fix fix for incorrect pool placement with -O0
by splitting all insns in machine-dependent reorg.
* Created blueprint to investigate -funroll-loops and
-fvariable-expansion-in-unroller.
* Took over patch to change vector alignment to 8 from
Richard; reworked according to review comments; found
and fixed two vectorizer bugs triggered by the change;
submitted for mainline approval.
* Continued investigation of reload bug reported by ARM.
Posted potential fix to gcc-patches for discussion.
== GDB ==
* Worked on fixing HW breakpoint/watchpoint regressions.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
Overall KVM plan for 'do by end August': QEMU parts of this are a mix
of clean-up-kvm-patches and track-kvm-abi-changes blueprints, mostly.
http://cards.linaro.org/browse/CARD-167
== clean-up-kvm-patches ==
* sent patch series to try to clean up some QEMU kvm x86isms
that block cleanup of some of the ARM KVM support code;
dealt with review comments and sent v2
== other ==
* started on cleaning up the QEMU benchmarking setup so we
can put it on a server machine somewhere
* fixed a crash in the QEMU ARMv7M models which was introduced
by one of my earlier GIC/NVIC refactoring series
* upstream review/maintainer duties
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
FYI GCC trunk r189808 fails to build with a bootstrap comparison error:
Comparing stages 2 and 3
warning: gcc/cc1-checksum.o differs
warning: gcc/cc1plus-checksum.o differs
warning: gcc/cc1obj-checksum.o differs
warning: gcc/cc1objplus-checksum.o differs
Bootstrap comparison failure!
arm-linux-gnueabi/libgcc/unwind-arm.o differs
arm-linux-gnueabi/libgcc/unwind-arm_s.o differs
189575 was fine on hard float. 189745 is fine on softfp.
-- Michael
---------- Forwarded message ----------
From: Linaro Toolchain Builder <michael.hope+cbuild(a)linaro.org>
Date: 25 July 2012 15:59
Subject: [cbuild] gcc-4.8~svn189808 armv7l failed
To: "michael.hope+notify(a)linaro.org" <michael.hope+notify(a)linaro.org>
ursa3 finished running job gcc-4.8~svn189808 on
armv7l-precise-cbuild348-ursa3-cortexa9hfr1.
The results are here:
http://builds.linaro.org/toolchain/gcc-4.8~svn189808
This email is sent from a cbuild (https://launchpad.net/cbuild) based
bot which is administered by Michael Hope <michael.hope(a)linaro.org>.
Hello Ramana,
For your PGO list:
* please note that I've been working on PGO for switch code, and also
for chains of if-statements with a common condition variable (with Tom
de Vries)
* turning conditional execution off will not make a difference, your
profile information will be exactly the same. Profile instrumentation
happens very early in the pipe line (on purpose, PGO is more
accurately "coverage guided optimization", not profiling in the
prof/gprof/oprofile sense). And the parts of the CFG that have profile
instrumentation cannot be if-converted anyway.
* you can use the script "analyze_brprob" in contrib/ to measure the
accuracy of the branch predictors. The script needs some TLC, fixing
it is on my TODO list but let me know if linaro folks are going to
take care of that. You'll find that the predictors are heavily tuned
towards the original Opteron, I'm not aware of much tuning for other
architectures.
* The heuristics for profile-guided optimizations are also not tuned
for arm. In the past we found that some params have more influence
than others (the TRACER* parameters for example).
Hope this helps,
What do you mean with "Only conditionalise those parts that benefit"?
Ciao!
Steven
== Progress ==
* Looking at auto-inc-dec patches.
* sched-pressure now on by default in FSF 4.8
* Background look into neon costs and vdup improvements.
* Some upstream patch review.
* Discovered http://gcc.gnu.org/PR54051 while testing a neon
intrinsics patch and wrote a patch to fix it.
== Plans ==
* Write a patch to check md5sums between local tarball and uploaded
tarball in the release script.
* Look at auto-inc-dec patches more and investigate benchmark results.
* Finish submitting PR54051 patch upstream.
* Finish vdup folding patch.
The Linaro Toolchain Working Group is pleased to announce the 2012.07
release of the Linaro Toolchain Binaries, a pre-built version of
Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.7 2012.07
* Linaro GDB 7.4 2012.06
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link
your programs against.
Interesting changes include:
* Change c++, gcc and ld to symlinks in Linux package
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian
6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation
5.7 and later, and should run on any Linux Standard Base 3.0
compatible distribution. Please see the README about running on
x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2012.07
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
We've just started running a weekly benchmark of GCC trunk and Linaro
GCC tip. I've written a short script that compares against a baseline
and spits out a graph:
http://ex.seabright.co.nz/benchmarks/gcc-4.8~svn.pnghttp://ex.seabright.co.nz/benchmarks/gcc-linaro-4.7%2bbzr.png
I'll switch the baseline to GCC 4.7.0 once the build and benchmark run
completes. The gcc-linaro results need more data before they'll make
sense.
Part way there. An automatic email would be next. We should check
the graphs before each performance call.
-- Michael, who needs to get moving on LAVA
== GCC ==
* Checked in fix to LP bug 1020601 (missed optimization with
multiple __builtin_unreachable calls) to Linaro GCC 4.7.
* Implemented and tested alternative fix for incorrect pool
placement with -O0 by splitting all insns in machine-
dependent reorg.
* Continued investigation of reload bug reported by ARM.
== GDB ==
* Tested GDB 7.5 branch on ARM, found a couple of regressions.
Worked on fixing HW breakpoint/watchpoint regressions.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || 2012-07-20 ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
Overall KVM plan for 'do by end August': QEMU parts of this are a mix
of clean-up-kvm-patches and track-kvm-abi-changes blueprints, mostly.
http://cards.linaro.org/browse/CARD-167
== a15-lpae-support ==
* LPAE patches now merged upstream
* v2 of vexpress-large-ram-size sent upstream, code reviewed
and put into arm-devs pullreq. Hasn't hit master yet but
I expect that to happen over the next week.
== clean-up-kvm-patches ==
* squashed together some kvm patches in the qemu-linaro tree
* sent upstream a few patches where we can avoid an ARM-KVM
specific change by instead generalising the upstream code not
to have an explicit list of KVM supporting architectures
* started looking at how best to clean up some working-but-ugly
code handling interrupts in the QEMU KVM-ARM patchset. Among
other problems, this is messy to fix because at the moment
upstream is overloading "is there an in kernel irqchip?" to
mean both "should we use QEMU's irqchip model or not?" and
"is the interrupt injection model synchronous or asynchronous?"
because on x86 they are (for historical reasons) the same.
For ARM we only want to decide which irqchip model to use,
not anything else...
== other ==
* upstream review (various exynos patches, mostly)
* some patches fixing problems with compiler warnings in
configure test fragments
* arm-devs pullreq
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
Hi Ramana, Ulrich. Could I have some help with an unexpected
testsuite failure while backporting Carrot's adddi patch?
testsuite/gcc.misc-tests/gcov-7.c builds and runs but aborts during
leave() due to unexpected results.
The merge request is here:
https://code.launchpad.net/~michaelh1/gcc-linaro/core-adddi/+merge/113111
The testsuite diff is here:
http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115001~michaelh1~core-add…
The build tree is at:
cbuild@tcpanda02.v:/scratch/cbuild/slave/slaves/tcpanda02/gcc-linaro-4.7+bzr115001~michaelh1~core-adddi/gcc/default/build
The failing and working versions are on tcpanda02 as ~/gcov-7.exe and
~/gcov-7-ok.
Here's the details:
* The test is fine when built from the command line
* The test is fine on the hard float Precise build
* The failing binary works fine when run on Precise
* The disassembled body (not libraries) is identical modulo changes
in addresses
* The fault goes away with a static linking via adding "--tool_opts '-static'"
* The fault persists with binutils 2.22
* The fault persists with the eglibc 2.15 loader
I assume the testsuite picks up a different libgcc and libgcov somehow
which gives a different executable. It's strange that the static
linked version is fine, and that the failing binary works fine on a
different host.
Could you have a poke in the build tree?
-- Michael
== GCC ==
* Tom de Vries fixed root cause of LP bug 1020601 (missed
optimization with multiple __builtin_unreachable calls)
on mainline. Backported to Linaro GCC 4.7 and tested.
Fixed bug exposed by backport (latent in mainline).
* Continued investigation of reload bug reported by ARM.
== Misc ==
* Attended GNU Tools Cauldron in Prague. Presented on
GDB remote/native feature parity work.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-20 || ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
Overall KVM plan for 'do by end August': QEMU parts of this are a mix
of clean-up-kvm-patches and track-kvm-abi-changes blueprints, mostly.
http://cards.linaro.org/browse/CARD-167
== a15-lpae-support ==
* LPAE patchset in latest target-arm pullreq sent upstream
* Kernel patch to get it not to throw away high bits of RAM
size Acked by Will and sent to RMK's patch system
* vexpress patchset for large RAM sizes had a few review
issues which I think I've sorted; need to roll a v2
* push back estimate date a week to account for: large-ram-size
work wasn't in my original list of work here; code review wait
times [ie not much real work remaining, but some time delay]
== other ==
* updated to new fast model and kernel and rechecked that my local
setup still works OK
* qemu-linaro 2012.07 released
* usual upstream patch review
* finally bit the bullet and upgraded my ancient Ubuntu desktop
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
The Linaro Toolchain Working Group is pleased to announce the 2012.07
release of both Linaro GCC 4.7 and Linaro GCC 4.6.
Linaro GCC 4.7 2012.07 is the fourth release in the 4.7 series. Based
off the latest GCC 4.7.0+svn189098 release, it includes performance
improvements around choice of auto-increment based addressing modes
for floating point values.
Interesting changes include:
Updates to GCC 4.7.0+svn189098
Implements improvements to ivopts selection of addressing modes of
floating point values.
Fixes:
LP: #1010826 - Invalid unaligned loads in vectorized code.
Linaro GCC 4.6 2012.07 is the seventeenth release in the 4.6 series.
Based off the latest GCC 4.6.3+svn189058 release, this is the fourth
release after entering maintenance.
Interesting changes include:
Updates to 4.6.3+svn189058
Fixes:
LP: #1010826 - Invalid unaligned loads in vectorized code. LP:
#1013209 - Internal compiler error when building neon intrinsics.
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2012.07https://launchpad.net/gcc-linaro/+milestone/4.6-2012.07
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
More information on the features and issues are available from the release page:
https://launchpad.net/gcc-linaro/4.7/4.7-2012.07https://launchpad.net/gcc-linaro/4.6/4.6-2012.07
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2012.07.
Linaro QEMU 2012.07 is the latest monthly release of qemu-linaro. Based
off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
There are no major changes in this month's release, though
it has been updated to track the latest upstream QEMU changes.
Known issues:
- Graphics do not work for OMAP3 based models (beagle, overo)
with 11.10 Linaro images.
- Audio may not work on Versatile Express models with the latest
Linaro kernel/hardware packs (LP:977610).
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2012.07
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
== GCC ==
* Investigated bootstrap comparison failure with neon-shifts
branch; tracked down root cause to pre-existing bug in GCC
common code. Fix checked in to FSF mainline and 4.7 branch.
* Investigated di-sync-multithread test case failure with
neon-shifts branch; root cause was missing length attributes
for sync.md insn&split patterns. Implemented fix and
restarted tests.
* Investigated LP bug 1020601, missed optimization with multiple
__builtin_unreachable calls. Tracked down root cause and
started discussion of possible fixes on gcc-patches.
* Investigated potential reload bug reported by ARM.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
RAG
Amber: 4.7 2012.07 source release for reasons described below.
Green : 4.6 2012.07 source release done.
== Progress ==
* Worked on auto-inc-dec scheduler changes.First cut patch looking reasonable.
* Committed the neon permute intrinsics upstream.
* Release week : release tarballs prepared for 4.6 . The 4.6 release
is GREEN. I will upload the release on Thursday morning after I am
back in the office.
The 4.7 release had some issues - I had to rerun the release script
because the merge contained some artifacts which were a result of
merge conflicts. Having respun the release it turned out that the
rsync from my machine to cbuild failed, which meant that I ended up
testing the same snapshot twice.Given that the 2 tarballs only differ
in the .rej and the .orig files and nothing more I'm not too worried
about this because it should ideally just work. The good news is that
ubutest and everything else went through ok. The bad news is that the
oe build appears to be borked. We need to investigate that further.
Having looked inside the tarballs and seen that the .rej and .orig
files were the only things different between the 2 tarballs I don't
think it's a huge problem for the release. I;ve spawned off another
set of builds to be absolutely sure .
* Looked at neon costs and vdup improvements . The neon cost changes
could cause regressions with 64 bit arithmetic and hence need to be
looked at carefully. The vdup improvements cause carnage in
gcc.target/arm/neon and tests for intrinsics have to be improved.
== Plans ==
* GNU Tools cauldron next week.
* Deal with release week fall-out.
* Write a patch to check md5sums between local tarball and uploaded
tarball in the release script.
* Look at auto-inc-dec patches more.
* Background look into improving some of the tests that now fail with
the vdup patches.
== Absences ==
* 8th - 11th July - GNU Tools Cauldron.
* 17th Sept - 5th Oct - Vacation planned, yet to be approved.
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-13 || ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
Overall KVM plan for 'do by end August': QEMU parts of this are a mix
of clean-up-kvm-patches and track-kvm-abi-changes blueprints, mostly.
http://cards.linaro.org/browse/CARD-167
== a15-lpae-support ==
* did the basic benchmarking of the LPAE series; using 64 bits for
guest physical addresses has between 0 and 0.5% hit to performance,
which IMHO is sufficiently minimal that it is not a problem.
* wrote a set of follow-up patches which allow the vexpress-a15
model to accept large RAM sizes (mostly turning off the "too big"
user-error message, fixing some over-small types in the QEMU boot
loader and adding support for handling device tree blobs with
64 bit address/size fields).
* discovered that Linux will happily throw away the top 32 bits
of a device tree memory node's size field. Wrote a patch for this,
which works but needs redoing to fix in a cleaner way.
== other ==
* qemu-linaro 2012.07 release prep: bug triage, investigation,
rolling tarball, testing
* arm-devs pullreq
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
Hi,
I didn't look if the files were correctly merged or not. but the .orig and .rej
files don't belong here.
It might be worth to update the merge to r189186, reverting the c++98/c++11 ABI
incompatibility in std::list.
Matthias
revno: 115001 [merge]
committer: Michael Hope <michael.hope(a)linaro.org>
branch nick: 4.7
timestamp: Tue 2012-07-03 20:16:55 +1200
message:
Merge from FSF (GCC SVN branches/gcc-4_7-branch:189098)
added:
gcc/config.gcc.rej
gcc/config/arm/arm.c.orig
gcc/config/arm/arm.c.rej
gcc/config/avr/avr-stdint.h
gcc/configure.ac.rej
gcc/configure.rej
[...]
== Progress ==
* Testing costs changes for Neon intrinsics.
* Fixed the regression I added to the Linaro 4.6 tree - committed
there. Looked at a few vagaries around testresults.
* Started looking at auto-inc-dec scheduler changes.
* 1/2 a day lost to visa application process
* Usual 1:1s .
* Upstream patch review.
== Plans ==
* Work on auto-inc-dec scheduler changes.
* Ping current neon intrinsics patches and get them in.
* Release week dry-run to be done next week - and finish creating the
release tarballs by 6th of July
* Upstream patch review.
* Collect passport on Tuesday / Wed afternoon.
== Absences ==
* 8th - 12th July - GNU Tools Cauldron.
* 17th Sept - 5th Oct - Vacation planned, yet to be approved.
We've had a few testsuite failures recently which were due to the auto
builder itself. I've started a log at:
https://wiki.linaro.org/WorkingGroups/ToolChain/CBuild/FailureLog
so we can track the incident rate and see if there's a pattern.
Zhenqiang, if you see an unexpected failure could you respawn the
build and notify me?
-- Michael
Hi all,
Right now, it's impossible to merge from lp:gcc/4.7 to
lp:gcc-linaro/4.7. This is due to a BZR bug of some kind, so hopefully
we won't have to work around it for too much longer.
According to the nice folks at #bzr, here's how to do the same merge
manually:
bzr branch lp:gcc-linaro/4.7
cd gcc-linaro
bzr log | less
# find the last merge revision (it should be clear from the message)
# grab the *SVN* revision number
bzr log --show-ids lp:gcc/4.7 | less
# search for the *SVN* revision number
# (it should appear on the end of a "revision-id" line, not "parent")
# grab the corresponding *BZR* revision number ("revno")
bzr diff -r <bzr-revno> lp:gcc/4.7 > ../patch
patch -p0 -i ../patch
# resolve conflicts, rejected hunks, etc.
bzr add --file-ids-from lp:gcc/4.7
# if it's doing the right thing you'll get messages like:
# "adding <file> w/ file id from <file>"
# if it just says "adding file" then you got something wrong
# edit Changelog.linaro, as usual
bzr ci
bzr push lp:~.........gcc-linaro/merge-from....
After all that, a future "bzr merge" should just work (once the bug has
been fixed).
Anyway, I doubt there's anybody else needs to know this: I've just
posted it in case I get hit by a bus before next month.
Andrew
== GCC ==
* GCC PR 53636 fix caused regression on powerpc64 and sparc64;
committed fix upstream and to Linaro GCC 4.7.
* Backported GCC PR 53636 fix --including regression fix--
to Linaro GCC 4.6.
* Reworked Andrew's neon-shifts branch to reliably use NEON
for "left shift by register"; fix typo in "left shift by 1";
overall simplification of implementation. Tests restarted.
== GDB ==
* Investigated remaining GDB/Android work; reviewed card.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || 2012-06-24 ||
||a15-lpae-support || 2012-07-13 || 2012-07-13 || ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
The blueprints clean-up-kvm-patches and track-kvm-abi-changes include
dependencies on kernel side work which makes it hard to set a date;
however I'm hoping to get them either done or mostly done within the
next two months.
== cp15-rework ==
* patches were committed to master, blueprint complete
== a15-lpae-support ==
* worked on a set of patches to lay groundwork for this: mostly
this is extending the size of QEMU's 'target physical address'
type to 64 bits for ARM (potentially a small perf hit for the
32 bit only ARM cores; benchmarking still to be done)
* wrote patches to implement all the various pieces of LPAE,
confirmed that Linux with LPAE enabled boots, sent patches to list
* started looking into whether there are any bits of LAVA that make
sense to use for QEMU benchmarking
== other ==
* fixed a missing Makefile line that meant qemu-linaro wouldn't build
on ARM targets with KVM enabled
* reviewed a pile of outstanding patches (including SDHCI, i.MX31)
and am now caught up with the post-holiday backlog
KVM blueprint progress tracker:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
-- PMM
Hello,
I tried codesourcy
arm-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu.tar.bz2, and get
below err infos.
Error: selected processor does not support ARM mode `sdiv R2,R0,R1'
Error: selected processor does not support ARM mode `udiv R2,R0,R1'
Does it mean this toolchain version don't support both instructions? and
which toolchain can support them?
Thanks a lot!
Xiao
== GCC ==
* GCC PR 53636 fix caused regression on powerpc64 and sparc64;
investigated, determined root cause, and implemented fix.
== GDB ==
* Took over remaining GDB/Android work from Thiago.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
The Linaro Toolchain Working Group is pleased to announce the 2012.06
release of the Linaro Toolchain Binaries, a pre-built version of
Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.7 2012.06
* Linaro GDB 7.4 2012.06
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link
your programs against.
Interesting changes include:
* Refine the system root
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian
6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation
5.7 and later, and should run on any Linux Standard Base 3.0
compatible distribution. Please see the README about running on
x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2012.06
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-06-23 || ||
||clean-up-kvm-patches || || || ||
||track-kvm-abi-changes || || || ||
||fake-trustzone || || || ||
||a15-lpae-support || || || ||
(dates to come next week)
== cp15-rework ==
* sent out pull request including these patches, so it should get
committed to master in the next few days
== a15-lpae-support ==
* started on getting ARM qemu to work with 64 bit physaddrs
(first stage mostly a tedious code audit)
== other ==
* email catchup following holiday
* rebased various trees, sent out pullreqs for outstanding ARM
QEMU patches
Michael H has set up a web page which tracks progress on KVM related
blueprints here:
http://apus.seabright.co.nz/helpers/backlog?group_by=topic&colour_by=state&…
This includes QEMU blueprints related to KVM.
-- PMM
I've gone through and checked the 64 bit operation improvements that
Andrew has made to GCC. For everything but the Cortex-A8, GCC uses
the NEON unit for 64 bit operations and Andrew's improvements mean we
can stay on NEON for longer without having an expensive transfer back
and forth to the core registers.
The results are here:
https://wiki.linaro.org/MichaelHope/Sandbox/64BitOperations
Once we've fixed the shift-left-by-n pattern I'll turn this into an
Outputs[1] page.
Benchmark results have been sent to the linaro-toolchain-benchmarks list.
-- Michael
Hi,
OpenEmbedded-Core/meta-linaro:
* updated OE-Core cbuild to pick up a recent snapshot of meta-linaro
* verified the release candidate of the Linaro binary toolchain 12.06
* prepared meta linaro for the upcoming release of our binary toolchain
* started on a linaro-qemu recipe but didn't finish it
misc:
* boot Linaro Android using QEMU:
https://wiki.linaro.org/KenWerner/Sandbox/AndroidQEMU
Regards,
Ken
== Progress ==
* Tried a number of testcases for the shuffles . Needed to add
support to the C++ frontend for the __builtin_shuffle support.
Fortunately there existed a patch - I tested it and it looked good.
Committed upstream. However the original author had some concerns
whether it would work in C++ or not but we shall see. The OP is
concerned that it might break C++11 and constexpr which need to be
looked at .
* Briefly investigated a regression with Linaro GCC 4.6 with Neon
intrinsics. It looks like my patch to allow LTO to proceed has had
some fall out . We really need some good tests in the GCC testsuite
for intrinsics.
* Looked at the Android documents and commented.
* Some upstream patch review.
== Plans ==
* Follow on the C++11 issues with the __builtin_shuffle patch if any.
* Commit the __builtin_shuffle variation of the neon intrinsics
patch into FSF 4.8. The improvements obtained are real and nice
atleast for the testcases that we could see after finishing up the
testcases.
* There is some follow-up work which should tie in nicely with costs
rework - lower-subreg ends up splitting things a bit badly in some
cases with vld4 style intrinsics and for V4SF copies. So it's better
we try to get the costs right. I suspect this might be harming us in a
few cases with auto-vectorized code as well. Especially where we
vectorize with the large vldn instructions.
* Investigate the 4.6 regression with Neon intrinsics.
* Auto-inc-dec scheduler work.
Hi,
I'm trying to build some shared libraries with the Linaro Android
toolchain.
For all of my libraries I get the following errors from the linker:
|BlaBla.cpp.o: requires unsupported dynamic reloc R_ARM_REL32; recompile with -fPIC
/home/dev/android/android_linaro_toolchain/libexec/gcc/arm-linux-androideabi/4.7.1/real-ld: error: hidden symbol '__dso_handle' is not defined locally
|
I'm using -fPIC in the compiler's flags so I'm not sure why the linker
is complaining.
The |__dso_handle| error is supposed to have been fixed in the NDKr6. I
tried the
Linaro 4.7.1(2012.05) toolchain, the one available for download, one of
the daily
builds from Linaro of the same toolchain(the one from Friday last week)
and I also
rebuilt entirely the toolchain from source but with the same results. I
found a bug
report in the
launchpad(https://bugs.launchpad.net/igloocommunity/+bug/1000200)
which pretty much describes exactly the same problem but unfortunately
none of the
observations made there helped(I do have -fPIC in the compilation flags,
I do not
have any assembly source and I rebuilt the toolchain from source).
Does anyone have any hints on how to fix or overcome the problem?
Thanks,
Marius
== GCC ==
* Fixed vectorizer bug causing unaligned memory accesses
(LP 1010826 / GCC PR 53636); checked in to GCC mainline
and Linaro GCC 4.7. Backports to FSF 4.7 and Linaro
GCC 4.6 are under way.
* Investigated vectorizer performance regression reported
by Mans; main problem seems to be lack of use of the
vectorizer cost model by default on ARM, but other
aspects of the vectorized code could be improved as well.
* Created blueprint to tune vectorizer cost mode on ARM
and enable it by default.
* Ongoing work on reassociation pass.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro QEMU 2012-06.
Linaro QEMU 2012.06 is the latest release of qemu-linaro. Based off
upstream qemu, it includes a number of ARM-focused bug fixes and
enhancements.
There are no major changes with this release, though it has been updated
to the latest (1.1.0) qemu.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2012.06
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
We talked at Connect about finishing up the cortex-strings work by
upstreaming them into Bionic, Newlib, and GLIBC. I've written up one
of our standard 'Output' pages:
https://wiki.linaro.org/WorkingGroups/ToolChain/Outputs/CortexStrings
with a summary of what we did, what else exists, benchmark results,
and next steps. This can be used to justify the routines to the
different upstreams.
The Android guys are going to upstream these to Bionic. I need a
volunteer to do Newlib and GLIBC.
One surprise was that the Newlib plain C routines are very good on
strings - probably due to a good end of string detector.
-- Michael
Hi,
OpenEmbedded-Core/meta-linaro:
* worked on building oe-core+meta-linaro using the 2012.05 release of
the binary toolchain
* minimal sysroot contains libraries that reference the old
ld-linux.so.3 loader
* created #1011671
* otherwise works fine for oe-core+meta-linaro
* setup the build env on tcserver01
* verified the 2012.06 RC of linaro GCC 4.7 and 4.6
* 4.7 looks good
* 4.6 has ICE when building Qt -mfpu=neon
* reduced testcase available at bug #1013209
* updated meta-linaro (master) to pull in version 2012.06 of Linaro
GCC 4.6/4.7
Regards,
Ken
Hello,
I am wondering if there is support for gettext in the linaro toolchain?
How can I check it if it should work or not?
I can compile and link the "setlocale()" and "bindtextdomain()" and
"textdomain()" functions, however, the translation doesn't work.
Best regards
Tom,
--
*Tom Deblauwe*
*R&D Engineer*
Traficon International N.V.
Vlamingstraat 19
B-8560 Wevelgem
Belgium
Tel.: +32 (0)56 37.22.00
Fax: +32 (0)56 37.21.96
URL: www.traficon.com <http://www.traficon.com>
I noticed this bug upstream about C++11 and C++98 ABI
incompatibilities , in case someone is using the C++11 features,
please be aware that there is an ABI bug lurking.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53646
Ramana
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro GDB 7.4 2012.06.
Linaro GDB 7.4 2012.06 is the third release in the 7.4 series. Based off
the latest GDB 7.4.1, it includes a number of bug fixes.
Interesting changes include:
* GDB now expands tildes in solib-search-path entries.
* Updated to the GDB 7.4.1 code base.
https://launchpad.net/gdb-linaro/+milestone/7.4-2012.06
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
--
[]'s
Thiago Jung Bauermann
Linaro Toolchain Working Group
The Linaro Toolchain Working Group is pleased to announce the 2012.06
release of both Linaro GCC 4.7 and Linaro GCC 4.6.
Linaro GCC 4.7 2012.06 is the third release in the 4.7 series. Based
off the latest GCC 4.7.0+svn188038 release, it includes performance
improvements especially around 64 bit operations.
Interesting changes include:
* Updates to GCC 4.7.0+svn188038
* Adds multilib support for use in the binary builds
* Improves performance of 64 bit shifts in core registers
Fixes:
* LP: #949805 GCC doesn't by default use %gnu_unique_object
* LP: #990530 internal compiler error: in convert, at lto/lto-lang.c:1292
* An off-by-one error in vrev
Linaro GCC 4.6 2012.06 is the sixteenth release in the 4.6 series.
Based off the latest GCC 4.6.3+svn188320 release, this is the third
release after entering maintenance.
Interesting changes include:
* Updates to 4.6.3+svn188320
* Uses the new /lib/ld-linux-armhf.so.3 loader for hard float binaries
Fixes:
* LP: #949805 GCC doesn't by default use %gnu_unique_object
* LP: #990530 internal compiler error: in convert, at lto/lto-lang.c:1292
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.7-2012.06https://launchpad.net/gcc-linaro/+milestone/4.6-2012.06
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.7/4.7-2012.06
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
-- Michael
On 12 June 2012 18:53, Akash D <akashd(a)renuelectronics.com> wrote:
> Hello Michael,
>
> Thanks for reply.
>
> The required information is mentioned below.
>
> Compiler Used --->
>
> http://launchpad.net/gcc-arm-embedded
>
> Version number ---->
>
> arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 4.6.2 20110921
> (release) [ARM/embedded-4_6-branch revision 182083]
Yip, this is ARM's Cortex-R & M bare metal toolchain. It doesn't come
directly from Linaro but we've got a good relationship with them.
I'll ping them and see the best place to ask this question.
> The link file is attached with this mail.
I only had a quick read, but you're missing a capture for the
'.text.startup' section in the linker script. You might need
something like:
*(.text.startup)
before the one.o(.text) line or to change the *(.text) capture to
*(.text*). The startup section might need to be at a fixed address.
Please check your chip and toolchain documentation to confirm.
-- Michael
While benchmarking the auto-vectoriser on Libav, I noticed a performance
regression in gcc 4.7 (both FSF and Linaro) compared to gcc 4.6 in the AAC
decoder. I narrowed it down to this function:
static void ps_hybrid_analysis_ileave_c(float (*out)[32][2],
float L[2][38][64],
int i, int len)
{
int j;
for (; i < 64; i++) {
for (j = 0; j < len; j++) {
out[i][j][0] = L[0][j][i];
out[i][j][1] = L[1][j][i];
}
}
}
While gcc 4.6 does not attempt to vectorise this at all, 4.7 goes crazy
with a massive slowdown, about 20x slower than non-vectorised with Linaro
4.7 and much worse with FSF 4.7.
Let me know if you need more information.
--
Mans Rullgard / mru
== Progress ==
* Connect last week.
* Worked through the open issues and open work items related to
performance and we've got a clear list of things that are currently in
flight. Now to keep track of this better.
https://wiki.linaro.org/RamanaRadhakrishnan/Sandbox//RRQ212ConnectNotes
and move this away from the wiki page in a form that we can use to
talk during our regular performance meetings.
* Created blueprints, closed down old issues and reprioritized
issues with Ulrich and others.
* A number of interesting conversations during Connect for a number
of compiler related issues.
* Other sessions that I attended included the Android optimizations
sessions - while there was quite a bit about toolchain performance it
is important that we keep looking out for the performance profiles and
find areas where the toolchain can be improved. However this can't be
done without getting more testcases from other groups. There were a
couple of interesting comments made that skia is CPU bound which would
indicate that the paint function is CPU bound. But why and how ?
Someone should look at reproducing these numbers and see where we get
to in this area. Pointed out that cortex-strings might be good to make
it into bionic ?
* Fixed the vrev off by one error and committed to FSF trunk .
However it couldn't make it in time for FSF 4.7.1 as the merge window
had closed by then.
* Set up my panda board to be identical to what runs on our
validation labs etc.
* This week
* Worked through the merge requests and moved some patches
upstream away from the "toreview" state.
* Landed a few merge requests that were approved but hadn't been
done so. Took care of merging the upstream 4.7 branch.
* Given I only had a few hours back in the office this week I
worked on regenerating arm_neon.h to use __builtin_shuffle with
vrev64, vrev32, vtrn , vzip and vuzp. A follow up patch needs to do
the same for vext but that needs generic support also in
vec_perm_const_ok .Once that is done I think we can safely start
rewriting . It still needs some more testing and polishing up but the
initial results on the testcase from PR48941 is kind of neat. The
result for some of the other testcases that I've looked at also looks
much better than where we were a few weeks back. So all in all nice
progress on that front. However we have to also find a way of getting
these generated at O0 which they don't appear to do so cleanly enough
with this approach.
for one example it does look like this below: Notice those spills
beginning to disappear .... :)
New :
sqrlen4D_16u8:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
vabd.u8 q1, q0, q1
vmull.u8 q0, d2, d2
vmull.u8 q8, d3, d3
vuzp.32 q0, q8
vpaddl.u16 q0, q0
vpadal.u16 q0, q8
bx lr
Old :
sqrlen4D_16u8:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
vabd.u8 q1, q0, q1
stmfd sp!, {r4, fp}
add fp, sp, #4
sub sp, sp, #48
add r3, sp, #15
vmull.u8 q0, d2, d2
bic r3, r3, #15
vmull.u8 q8, d3, d3
vuzp.32 q0, q8
vstmia r3, {d0-d1}
vstr d16, [r3, #16]
vstr d17, [r3, #24]
vpaddl.u16 q0, q0
vpadal.u16 q0, q8
sub sp, fp, #4
ldmfd sp!, {r4, fp}
bx lr
* Attended platform / WG sync-up.
== Plans ==
* Cleanup the ml bits of rewiring the intrinsics and try some proper testcases.
* Work on the auto-inc-dec scheduler patches.
* Rework the sched-pressure patch upstream .
* Review the Android benchmarking writeups.
Summary:
* Bug fixes.
* Tune ivopt for code size.
Details:
1. Reproduce lp:1007353 "kernel build fails with 12.04 and 12.05
toolchain released" and workout a patch to fix it; reopen the related
binutils/gas bug http://sourceware.org/bugzilla/show_bug.cgi?id=12698
and propose the patch to it; push the patch to linaro crosstool-ng to
make sure lp:1007353 is fixed for next binary toolchain release.
2. Setup the SPEC build env and reproduce lp: 886124 "using LDR from
literal pool rather than MOVW/MOVT". After cprop1 replaces lo_sum
(high: symbol_ref bloc) (symbol_ref (block)) with a (symbol_ref
(block)), no later optimization can split it. The solution in linaro
4.5 is to add a split (porting from codesourcery) in arm.md. Then
split1 can split the (symbol_ref (block)). The split is:
(define_split
[(set (match_operand:SI 0 "arm_general_register_operand" "")
(match_operand:SI 1 "general_operand" ""))]
"TARGET_32BIT
&& TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
&& !flag_pic && !target_word_relocations
&& !arm_tls_referenced_p (operands[1])"
[(clobber (const_int 0))]
{
arm_emit_movpair (operands[0], operands[1]);
DONE;
})
3. Tune ivopt for code size. Try to set avg_loop_niter to 1 since loop
iterator number does not impact code size. But test shows there is no
improvement. Need more tuning.
Plans:
* Analyze the failed cases in arm-linux-gnueabihf regression test.
* Tune code size for M0.
Best regards!
-Zhenqiang
Hello Sir/Madam,
I am using MK60FN1M0VLQ12 (COTREX-M4) processor for my development.
I am using float and double data types in my code. When I perform any
mathematical operation on these variables, the processor goes to Hard Fault
Exception.
Earlier I have used GCC 4.5.2 compiler for my compilation
So now I am using Linaro's GNU-GCC Toolchain 4.6.2 for compiling my code
with following command.
arm-none-eabi-gcc -Wall -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mcpu=cortex-m4
-mthumb -Qn -Os -mlong-calls -c main.c -o main.o
But I am getting following error while linking my code
ld: section .text.startup loaded at [00032258,000331cb] overlaps section
.InitializedVariables loaded at [00032258,00032787]
The link file is attached with this mail.
Can you please suggest me some solution for this problem.
Can you also suggest some compiler commands to support float and double data
type using software.
Awaiting for your reply,
Thanks & Regards,
Akash