The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.6 and Linaro GCC 4.5.
Linaro GCC 4.6 is the fourth release in the 4.6 series. Based off the
latest GCC 4.6.0+svn174261, it adds new optimisations and vectoriser
improvements.
Interesting changes include:
* Updates to 4.6.0+r174261
* Blocks can now vectorise into ORN and BIC instructions
* Support for half word to double word multiply and accumulate operations
* Better support for other widening multiply operations
* Further performance improvements in NEON strided loads and stores
* Performance improvements targeted at EEMBC CoreMark
Fixes:
* PR target/48454: Set the lengths correctly for the case with Quad vectors.
Known issues:
* Building Python 2.7 with -mfpu=neon exposes a bug in vmov.i64 in
binutils 2.20.51. Please use 2.21 or later.
The strided load/store improvements allow the vectoriser to
efficiently access values that occur at every n'th address, such as
all of the red values in a RGB image or all of the left channel
samples in a interleaved audio array. For example, a plain C function
that converts between RGB and CYMK now runs 7.3 x faster on an A9.
Linaro GCC 4.5 2011.06 is the eleventh release in the 4.5 series.
Based off the latest GCC 4.5.3+svn174250, it is a maintenance focused
release.
Interesting changes in 4.5 include:
* Updates to 4.5.3+r174250
Fixes:
* LP: #744754: ICE in reload_cse_simplify_operands, at
postreload.c:402 with neon optimized code
* LP: #748138: ICE in redirect_jump, at jump.c:1443
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.6-2011.06-0https://launchpad.net/gcc-linaro/+milestone/4.5-2011.06-0
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
-- Michael
Hi there,
I tried to use android-toolchain-eabi-4.5-2011.05-0-linux-x86.tar.bz2
to enable hard float ABI.
But it built failed on Android 2.3.3. Most errors are like address
alignment issues.
Did you have any patch for that? Successfully tested?
Thanks
Richard
My testing for the widening multiplies patches came back clean. I've
committed it upstream, and merged it to Linaro GCC 4.6.
The testing for my Thumb2 constants patches failed (bootstrap failure on
ARM), so can't commit that right away. The failure is a SIGSEGV in the
stage 2 compiler building it's own libgcc. This is going to be tricky to
pin down!
Continued work on widening operations in the GCC middle-end. I now have
it doing all the arbitrary width widening operations that I want. I've
tested that it didn't do the wrong thing for just about all permutations
of input and output types, but I've yet to do anything like a bootstrap
test or anything. There's still quite a lot more work to do in tidying
it up.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
Tracked a bootstrap failure with SMS flags on ARM machine exposed in
recent trunk.
Fixed and tested a patch for that.
Tested another SMS patch following comments received from gcc ml@
(http://gcc.gnu.org/ml/gcc-patches/2011-05/msg02294.html)
Following conversation with Micheal, added SPEC2006 analysis info to
the benchmarks wiki page
-https://wiki.linaro.org/Internal/ToolChain/Benchmarks
Discussed with Ramana weird RTL pattern generated for
thumb2_movhi_insn with -march=armv7-a -mthumb using trunk. Probably
will open a PR for that.
Hi,
* learning more on andoid (repo tool, some branches, the basics of the
android build system)
* finished to setup my environment to build the android sources
* sucessfully build linaro-android using linaro gcc 4.4, 4.5 and 4.6
* tracked down the libgui.so linaro android issue to the apriori
prelinker
* workaround: disable prelinking for this module (patch -> linaro-dev)
* I still don't understand what exactly is supposed to be prelinked
and what's exactly causing the fail
* Note: next Monday is a public holiday in Germany
Regards
Ken
== String Routines ==
* Completed gathering the SPEC2k6 memcpy results, graphed them, sent them out
* Gathered SPEC2k6 memset results, graphed them, sent them out
== 64bit Atomics ==
* Modified gcc backend to do 64bit Atomic ops - the code looks good,
but I've not
done much testing yet.
== Other ==
* Upstreamed a small ltrace patch
Next week:
Plan is to get gcc tests done and attack libgcc for the pre-v7
fallbacks (the tricky
bit there is runtime deciding what to use)
Also run spec and denbench for strlen and some other string routines
== Progress ==
* Spent some time on the VFP moves and look at ivopts for a bit.
Analysing a couple of options here.
* Committed the DImode moves patch upstream.
* Fixed PR49335 where GCC was generating rsb ip, sp, ip lsl #2
* Proposed a fix for PR48454 (finally being able to reproduce it) -
was a case of a missing length attribute for vec_pack_trunc.
* Investigated some regressions in v1 of a popular embedded benchmark
- leads to BRANCH_COST tuning.
* Merged by neon-vorn-vbic patch into linaro-gcc :4.6
== Plans ==
* Spend some time on the VFP moves and look at ivopts for a bit.
* Merge the fix for lengths to linaro-gcc:4.6 and 4.5 if applicable.
* Merge fix for PR49335 to linaro-gcc:4.5 and 4.6 .
* Find some time for some upstream patch review.
* T2 performance review meeting/
Meetings:
* 1-1s
* TCWG call.
RAG:
Red:
Amber:
Green: USB kbd+mouse finally working on QEMU beagle model
Current Milestones:
|| || Planned || Estimate || Actual ||
||qemu-linaro-2011-06 || 2011-06-16 || 2011-06-16 || ||
Historical Milestones:
||finish qemu-cont-integn || 2011-01-25 || 2011-01-25 || handed off ||
||first qemu-linaro release || 2011-02-08 || 2011-02-08 || 2011-02-08 ||
||qemu-linaro 2011-03 || 2011-03-08 || 2011-03-08 || 2011-03-08 ||
||qemu-linaro 2011-04 || 2011-04-21 || 2011-04-21 || 2011-04-21 ||
||qemu-linaro 2011-05 || 2011-05-19 || 2011-05-19 || n/a ||
||close out 1105 blueprints || 2011-05-28 || 2011-05-28 || 2011-05-19 ||
||complete 1111 planning || 2011-05-28 || 2011-05-28 || 2011-05-27 ||
== upstream-omap3-patches ==
* started on disentangling the patchstack: submitted patches upstream
for a few standalone fixes. First few steps in a big job...
== omap3-usb-model ==
* added QEMU's USB OHCI model to the omap3/beagle, and (after some
debugging and submitting a couple of OHCI bugfixes upstream)
got USB keyboard and mouse working
== linaro-qemu-11.11 ==
* rebased on master and identified gcc 4.6 compiler patches we need
== other ==
* added and tested patches for an overo board model
* added Beagle board support for returning EDID data from a fake
monitor so the kernel will actually turn the display on
* discussions about Android emulator (which looks likely to take the
upstreamed ARMv7 translator with the fixes we've worked on over
the last six months)
* office move
* QEMU 0.15 is not too far in the future: need to make sure all the
ARM stuff we want is in it
Meetings: standup, GSoC student, Christoffer Dall (working on KVM for ARM)
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
1-5 August: Linaro sprint 1111
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Hi,
- vectorization of widening multiplication of unsigned types and
constants - committed to mainline
- fix vectorizer testsuite failures on ARM - submitted
- testing a patch to fix a bug in the vectorizer revealed by the
widen-mult patch
- testing a patch to fix bad peeling heuristic that causes
gcc.dg/vect/vect-72.c to fail on ARM
Ira
I've done a quick write-up on the (almost) continious builds done in
the toolchain group:
https://wiki.linaro.org/WorkingGroups/Builds
It's high level and includes things like what branches we watch, how
often they get built, where the results go, and how things like
testsuite results are shared. This is in follow up to the email on
testsuite diffs yesterday.
-- Michael
Public Holiday on Monday.
Learned that Linaro are reducing their funding to just one CodeSourcery
engineer, myself. Spoke to Chung-Lin to break the news and reassign him
to other work. Chung-Lin will now be working on MIPS16 Eglibc porting.
Pinged my ADDW/SUBW patch, again. Ramana finally reviewed it, so I've
addresses his concerns and reposted. The corrected patch was approved,
so I've set it to test before committing.
Continued work on widening multiplies tree optimizations in GCC. Bernd
made it sound quite easy, but changing the type of some operations means
quite a lot of tweaking and reworking in the rest of the compiler expand
routines. In particular, the widening stuff needs to be broken out of
expand_binop, and recast.
Merged, tested and committed the latest patches from FSF 4.5.
Merged, tested and committed the latest patches from FSF 4.6.
Richard Earnshaw approved my widening multiply RTL patch, so I've set
that to test in the Linaro test system.
Richard also approved my SMLALTB/SMLALTT patch. Set that testing also.
Responded to a question on ask.linaro.org.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
Fixed an SMS patch following comments received in the gcc@ ml.
While testing the fix I discovered another issue-- latest mainline
ICEs with SMS flags while building libgcc on ARM configured with
--with-arch=armv7-a.
This new failure does not seem to be related to the above fix and I'm
now investigating it.
Looked at code generated for spec2006's libquantum, hmmer and
cactusADM_base benchmarks.
== String routines ==
* Wrote a hybrid ARM/Neon memcpy - it uses Neon for non-aligned cases or
large (>=128k) cases
* polished up and sent out write up of workload analysis of denbench and spec
* Ran denbench with all memcpy and memset varients, graphed up results
- SPEC 2k6 is now cooking with the memcpy set - it'll take all weekend.
== 64 bit atomics ==
* Started looking through the Gcc code at the existing non-64bit atomic code;
I need to understand how registers work in DI mode and what's going to be
needed in terms of temporaries.
Dave
== Progress ==
* Finished breaking down the Thumb2 performance blueprint
* Some patch review and bugzilla maintenance.
* Canonicalized vorn and vbic. Bootstrap failure reported . Fixed upstream
* Rewrote parts of the DImode expanders and combined them to two
patterns with alternatives that get enabled based on the architecture
variant. While looking at the bug with adr's possibly going out of
range, it looks like there is a bug in const_ok_for_op with respect to
how it attempts to generate code for a DImode move of 0xffffffff which
can be implemented as a simple mvn but gets split into 3 instructions
More explanations in the patch when it comes out.
* Thumb2 performance meeting this week.
* Talked to RichardS about A8 and Neon / auto-increment issues he was
seeing with scheduler descriptions and looked again at the A8 TRMs and
the examples.
* Looked at lrint and lrintf which are C99 functions for rounding and
created a prototype lrint and lrintf patch for GCC that now appears to
generate the vcvtr instructions.
== Plans ==
* Spend some time on the VFP moves and look at ivopts for a bit.
* Finish testing and submit upstream my other patch with DImode moves
and cases where we are splitting more than necessary.
* Start looking at some of the T2 performance work items.
* Patch review. Finish TLS patch review .
* Try to get vcvtr working and tested with eglibc.
* Look at RichardS's comments and testcase for the A8.
Meetings:
* 1-1s
* Linaro calls.
[Short week: bank holiday]
RAG:
Red:
Amber:
Green:
Current Milestones:
|| || Planned || Estimate || Actual ||
||qemu-linaro-2011-06 || 2011-06-16 || 2011-06-16 || ||
Historical Milestones:
||finish qemu-cont-integn || 2011-01-25 || 2011-01-25 || handed off ||
||first qemu-linaro release || 2011-02-08 || 2011-02-08 || 2011-02-08 ||
||qemu-linaro 2011-03 || 2011-03-08 || 2011-03-08 || 2011-03-08 ||
||qemu-linaro 2011-04 || 2011-04-21 || 2011-04-21 || 2011-04-21 ||
||qemu-linaro 2011-05 || 2011-05-19 || 2011-05-19 || n/a ||
||close out 1105 blueprints || 2011-05-28 || 2011-05-28 || 2011-05-19 ||
||complete 1111 planning || 2011-05-28 || 2011-05-28 || 2011-05-27 ||
== upstream-omap3-patches ==
* started on disentangling the patchstack: submitted patches upstream
for a few standalone fixes. First few steps in a big job...
== omap3-usb-model ==
* added QEMU's USB OHCI model to the omap3/beagle; the kernel detects
the USB controller and hub but not any attached devices; more
debugging required
== other ==
* discussions about Android emulator
* office move
* QEMU 0.15 is not too far in the future: need to make sure all the
ARM stuff we want is in it
Meetings: standup, GSoC student
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
1-5 August: Linaro sprint 1111
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
== This week ==
* Spent about half of the week on auto increment/decrement. There are two
execution failures left.
* Looked at assembly comparisons between the old pass and various forms
of the new pass. The results look reasonable.
* Ran DENbench and my libav microbenchmarks to measure the difference
in performance. Saw that some tests were repeatably worse.
* Looked into those tests and realised that they were being hit by the
lack of an address writeback model in the scheduler (a known limitation).
Dependent stores were being scheduled in a block at the end of the loop
because we said that the dependencies had 0 latency.
* Spent most of the rest of the week on fixing that limitation. One of the
difficulties is that define_bypass currently requires a complete list
of instruction reservations. This is difficult for things like writeback
because the result could in principle be used by many different instructions.
Decided to generalise define_bypass so that it can handle filename-style
globs.
* Wrote a patch to model writeback in NEON.
* Wrote a patch to model writeback in core instructions. However,
while doing this, I noticed that the behaviour I'm seeing on our
Cortex-A8 doesn't match what I'd expected from GCC's A8 scheduler
description (or the documentation). Talked with Ramana about it.
Distilled a benchmark.
* These scheduler changes didn't improve the DENbench and libav
scores much by themselves, but the combination of the scheduler
and auto inc/dec changes did produce noticeable improvements
in some libav benchmarks and rather smaller improvements in
some DENbench ones.
== Next week ==
* Finish scheduler work, in light of observed behaviour.
* More testing prior to submission.
I'm away the week of 13th June.
Richard
Hi,
- bug fixes: PRs 49222, 49199, 49239, 49093
- widening multiplication: submitted a patch to support widen-mul for
unsigned types and constants in the vectorizer's pattern recognizer.
Now considering to move optimize_widening_mul pass before loop
optimizations and improve it to support unsigned and constants
Next week: holiday on Tuesday (half day) and Wednesday.
Ira
2011/5/29 Fathi Boudra <fathi.boudra(a)linaro.org>:
> Hi,
>
> The Linaro Team is pleased to announce the release of Linaro 11.05.
>
> 11.05 is the second public release that brings together the huge amount of
> engineering effort that has occurred within Linaro over the past 6 months.
>
> This is the first release delivering Android, Ubuntu and the Working Group
> components nicely bundled into one release. We will continue to pick up more
> Working Group and Landing Team outputs in the upcoming monthly releases.
>
> We encourage everybody to use the 11.05 release. The download links for all
> images and components are available on our release page:
>
> http://wiki.linaro.org/Cycles/1105/Final
>
> Highlights of this release:
>
> * Linaro GCC 4.5, GCC 4.6 and GDB 7.2 2011.05, recently released components
i have been wondering why always two versions are released at the same
time. what kind of users are expected to use 4.5, and what kind of
users are expected to use 4.6?
my another question is whether we have a policy to maintain old
realease. for example, in case1105 has some bugs, is it possible
linato toolchain team fix those bugs in the old version later. many
users are using old version with bugs, if they move to new version
directly, new feature maybe import new bugs. so people maybe want to
use old version with bug fixes, but without new features.
> created by the Toolchain Working Group.
> * Linaro Kernel 2011.05-2.6.38, the first source tarball release of Linux
> Linaro done by the Kernel Working Group.
> * Linaro Evaluation Builds (LEBs) for Android and Ubuntu on PandaBoard with
> 3D graphics acceleration.
> * Android cross toolchain based on latest gcc-linaro and gdb-linaro
> * Host development tools (cross compiler, image builders) readily integrated
> for the Ubuntu distribution users (Lucid, Maverick and Natty support).
> * And many more...
>
> Using the Android-based images
> ==============================
>
> The Android-based images come in three parts: system, userdata and boot.
> These need to be combined to form a complete Android install. For an
> explanation of how to do this please see:
>
> http://wiki.linaro.org/Platform/Android/ImageInstallation
>
> If you are interested in getting the source and building these images
> yourself please see the following pages:
>
> http://wiki.linaro.org/Platform/Android/GetSource
> http://wiki.linaro.org/Platform/Android/BuildSource
>
> Using the Ubuntu-based images
> =============================
>
> The Ubuntu-based images consist of two parts. The first part is a hardware
> pack, which can be found under the hwpacks directory and contains hardware
> specific packages (such as the kernel and bootloader). The second part is
> the rootfs, which is combined with the hardware pack to create a complete
> image. For more information on how to create an image please see:
>
> http://wiki.linaro.org/Platform/DevPlatform/Ubuntu/ImageInstallation
>
> Getting involved
> ================
>
> More information on Linaro can be found on our websites:
>
> * Homepage: http://www.linaro.org
> * Wiki: http://wiki.linaro.org
>
> Also subscribe to the important Linaro mailing lists and join our IRC
> channels to stay on top of Linaro developments:
>
> * Announcements:
> http://lists.linaro.org/mailman/listinfo/linaro-announce
> * Development:
> http://lists.linaro.org/mailman/listinfo/linaro-dev
> * IRC:
> #linaro on irc.linaro.org or irc.freenode.net
> #linaro-android irc.linaro.org or irc.freenode.net
>
> Known issues with this release
> ==============================
>
> For any errata issues, please see:
>
> http://wiki.linaro.org/Cycles/1105/Final#Known_Issues
>
> Bug reports for this release should be filed in Launchpad against the
> individual packages that are affected. If a suitable package cannot be
> identified, feel free to assign them to:
>
> http://www.launchpad.net/linaro
>
> Cheers,
>
> Fathi Boudra
> --
> Linaro Release Manager | Platform Project Manager
>
> _______________________________________________
> linaro-announce mailing list
> linaro-announce(a)lists.linaro.org
> http://lists.linaro.org/mailman/listinfo/linaro-announce
>
Hi,
* finished the measuring of the overhead of the ARM specific unwind tables
https://wiki.linaro.org/KenWerner/Sandbox/libunwind#overhead_of_the_ARM_spe…
* started to get an environment up and running in order to build the
linaro-android sources
* encountered some build issues (I'm in the process to sort out some
issue with pfalcon of the android team)
* finshed 11.11 cycle planning
* I'll be out of office for the rest of the week (public holiday +
vacation)
Regards
Ken
Progress:
* Some trouble building the SPEC2k tools in the new multiarch world in
natty. Perl refuses to link libm and a number of other things
also end up failing . Appears to be a real pain with the new multiarch
world and SPEC2k's curious build system for its' tools . Will fall back
to an older chroot and get the tools built natively.
* Tried breaking down the T2 performance blueprint - initial breakdown
now available.
* Looked at the binutils vmov.i64 issue again. Looks like natty-updates
will now pick this up.
* Some patch review and bugzilla maintenance.
Plans:
* Get SPEC tools building.
* Look more at the T2 performance blueprint
* Spend some time on the VFP moves and look at ivopts for a bit.
* Merge review duty.
Meetings:
* 1-1s
* Linaro calls.
== Last week ==
* Investigated the CoreMark numbers posted by Michael Hope, mainly the
oddities of a significant Linaro 4.6 regression versus FSF 4.6. Later
verified to be a false alarm.
* Pushed a merge of some of my upstream CoreMark patches to Linaro 4.6.
* Did archeology for PR42017. Traced some history of the ARM prologue
from 2000 to 2007 (DF branch), posted upstream. Hope this clarification
gets my patch an approval soon.
* Tried the above PR42017 patch (which is supposed to release the use of
LR as a general register in leaf functions) on CoreMark, using Linaro
4.6, and was surprised to find that despite many reductions in spill
code and epilogue (now more often directly return by ldmfd), the
generated code still regresses in performance (!).
* Continuing above, suspecting something from experience (cough) added
-falign-functions=8 to the CoreMark compile options. Finally produced a
small improvement, while causing a regression for the
without-PR42017-patch case (victory?).
* Worked on PR48808, PR48792 over the weekend, which are cases where
paradoxical subregs caused ICE in reload. Posted an ARM backend patch
upstream, though now mostly taken over by Richard Sandiford :)
== This week ==
* Some other PRs, ideas, still work in progress.
* Started using the porter boards, will try to get LP:689887 over with
this week.
* Set-up SPEC2006 profile runs on PowerPC with trunk.
* Looked at SPEC2006's 462.libquantum.
* PR745743 - compared different versions mentioned in the PR.
* Wrote a patch to fix another issue related to how SMS handles debug_insn.
== String routines ==
* Finally finished the ltrace analysis of the whole of SPEC 2k6 and
have written it up - I'll proof read it next week and then send it out
to the benchmark list.
* Ran memset and memcpy benchmarks of larger than cache sizes on A9
* memcpy on larger than cache sizes (or probably mainly cache miss
data) does come back to Neon winning over ARM; my suspicion is that
with cache hits we run out of bandwidth on Neon, but that doesn't
happen in the cache miss case; why it's faster in that case I'm not
sure yet.
* memset is still not faster for Neon even on large sizes where
the destination isn't in the cache.
== Other ==
* Started looking at 64 bit atomics
* Looking at the pot of QEmu work with Peter.
Dave
Hi,
* the overhead of the ARM specific unwind tables for some binaries:
https://wiki.linaro.org/KenWerner/Sandbox/libunwind#overhead_of_the_ARM_spe…
* sometimes the size of the .text section differs which worries me a
bit (not necessarily a GCC issue, could be related to the build system)
* tested a couple of linaro-android images on my panda board
* ran into a l-i-t issue (now fixed) and discussed with asac and friends
* and finally got the network up and running :)
* some 11.11 cycle planning (libunwind work items, "in distributions"
spec)
Regards
Ken
RAG:
Red:
Amber:
Green: 1111 QEMU planning complete
Current Milestones:
| Planned | Estimate | Actual |
complete 1111 planning | 2011-05-28 | 2011-05-28 | 2011-05-27 |
qemu-linaro-2011-06 | 2011-06-16 | 2011-06-16 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
qemu-linaro 2011-05 | 2011-05-19 | 2011-05-19 | n/a |
close out 1105 blueprints | 2011-05-28 | 2011-05-28 | 2011-05-19 |
== other ==
* Completed planning work for 1111; all blueprints now created, fleshed
out with work items and assigned:
https://blueprints.launchpad.net/qemu-linaro
[Note that as expected some items under consideration have not made
the list; this includes the trustzone work]
* Some interesting upstream QEMU discussions (list and IRC) on
(a) performance improvements [good to see general interest in
this] and (b) overhauling the memory API [very long thread
but I think the proposed API should be OK for ARM system emulation
purposes]
* LP:768650: QEMU warnings on recent Linaro OMAP3 kernels: tracked down
to the kernel deliberately reading a register it knows doesn't exist
on OMAP2/3. Sent a query via Arnd about whether we can get this changed.
* rebased linaro-qemu to current master
* Sent patchset which starts ARM QEMU moving towards getting rid of the
implicit global CPUState pointer
* sent patch fixing a configure bug causing it to create recursive
symlinks
* sent a patchset which tightens up the compile time TCG value type
checking; this would have detected the build-breaking patch I sent
earlier this week...
* sent patch adding support for active-low interrupts to the LAN9118
model; this is needed when it is used in the Overo OMAP3 board model
Meetings: toolchain, standup, GSoC student, doughnuts
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
1-5 August: Linaro sprint 1111
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Hi,
* PR 49087 - fixed
* PR 49038 - opened by Richard - fixed on 4.7, to be backported to 4.5 and 4.6
* working on widening multiplication for unsigned types and constants
(the signed case works fine)
Ira
Posted a new patch for 16 -> 64 bit multiply and accumulate:
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg05794.html
Pushed the same patch to a Launchpad branch for testing.
Pinged my addw/subw patch as a review didn't seem forthcoming.
Worked on a canonical form for HImode to DImode multiple-and-accumulate.
The problem isn't too hard to fix, but it's hard to do it in a nice way.
Attended Nathan S's reorg call. Followed up by talking to Nathan F about
what he's been working on with Wind River. Read up on the Wiki.
Looked at why the ARM smlal{tb,bt,tt} instructions are not generated.
I've added the proper patterns, but combine doesn't match them, and I've
run out of time this week to check why.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* ARM Thumb2 addw/subw support.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03783.html
* Multiply and accumulate:
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg05794.html
== Last week ==
* Took Monday off, flew back to Taiwan on Tues., got home Wed. night.
* LP:689887, ICE in get_arm_condition_code(). Finally have some new
progress on this. Found my code was rejecting DImode comparisons,
causing uses of __aeabi_lcmp, etc. in expanded RTL. While this still
does not fully explain a bootstrap fail, it may be related, and it's
good I found this here rather then scratch heads on performance
regressions later... :)
* LP:771903: invalid ubfx asm produced by GCC. Mostly got down to the
bottom of this. This bug is rather well hidden, first avoided due to
some inlining heuristic changes after FSF 4.5 was branched (hence 4.6
and trunk doesn't show on the testcase), then hidden again later by
-ftree-bit-ccp. Was able to reproduce on mainline trunk after some
changes to testcase and options. Will send patch later.
* Talked with Ramana on IRC and mail about the '+' constraint modifiers
in the VFP fmul/fdiv patterns. Mostly concluded that these are typos,
and should be fixed.
== This week ==
* Continue with issues.
Hi there. The next two weeks is where we take the technical topics
from the TSC and the discussions had during the summit and turn them
into the concrete engineering blueprints for this cycle. I've created
a page at:
https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
listing all of the TRs. Could you please have a look through these,
find any with your name on them, and fill in the wiki page. I've put
more notes on the page itself. Some of the topics may warrant
specifications.
Let me know if you have questions on what the topics actually mean.
-- Michael
* Profiling SPEC 2k6 still; about 3/4 of the latrace files are
generated but it's taking some hand holding with some of them
(e.g. finding one that makes millions of calls to a library function
that we're not interested in but generates a huge log, and hence
needs it excluding).
* Working through the ones that I have with analysis scripts and
writing the interesting things up.
* Submitted ARM test suite fix for latrace (unsigned characterism)
* Verified Richard's binutils fix in natty-proposed fixed the vtk FTBFS
* Blueprint for 64bit sync primitives.
Dave
Hi,
* started to measure the overhead of -funwind-tables
* libunwind text size increase < 5%
* firefox4 is still building... :)
* found a small glitch when cross compiling the binutils deb package
* made a small patch, talked with doko, fix upstream
* installed android on the pandaboard
https://wiki.linaro.org/KenWerner/Sandbox/AndroidOnPanda
* setup an android development environment on my thinkpad
Regards
Ken
RAG:
Red:
Amber:
Green: 1105 work item status 100% complete
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-05 | 2011-05-19 | 2011-05-19 | n/a |
close out 1105 blueprints | 2011-05-28 | 2011-05-28 | 201--05-19 |
complete 1111 planning | 2011-05-28 | 2011-05-28 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
== merge-correctness-fixes ==
* last few work items for this blueprint either completed or postponed
[For the record, postponed work:
setting Cortex A8r2 device ID etc regs -- moved to omap3 upstreaming
trustzone -- may get its own blueprint this cycle
VCVT fp exception flags -- postponed as rather tricky and an
obscure corner case that is unlikely to be noticed by users]
== other ==
* tracked down bug with QEMU loading of Google Go produced ELF files,
submitted patch
* talked to our local trustzone expert, very useful
* reworked and resent FPSCR exception flags patches based on review
comments
* reviewed a patch for setting IFSR right for BKPT
* more planning effort
* sent patch to suppress SD card model warnings generated when Linux
probes to see if it's an SDIO card
* redid the "check for unused -nic options" patch as it turned out to
cause regressions with NICs created via -device.
Meetings: toolchain, standup, 1-2-1
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
== This week ==
* Spent almost all the week on GCC's auto inc/dec pass. I first
continued with the incremental "clean ups" and recoding that I'd
started during free time at Budapest, with the idea of bolting the new
optimisations on top of that. However, in the end, I decided it would
be better to rewrite the pass entirely, using a different approach.
I've now got an early prototype of that rewrite, and it seems to be
working as expected on the test cases I've tried so far. I'm running
a regression test over the weekend, although TBH, I expect it to fail
at this stage.
* Tested the fix for vzip, vunz and vtrn. Went well, so I'll submit
next week.
* Blueprints.
== Next week ==
* More auto inc/dec:
* Round off some known rough edges in the prototype.
* Fix bugs.
* Run benchmarks.
* Run code comparison tests (diffing assembly code), both on ARM and
on other targets of interest.
Richard
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro GDB 7.2.
Linaro GDB 7.2 2011.05-0 is the sixth release in the 7.2 series. Based
off the latest GDB 7.2, it includes a number of ARM-focused bug fixes.
This release fixes:
* LP: #615972 Neon registers missing in core files
* LP: #615978 Failure to software single-step into signal handler
* LP: #615996 gdb.cp/templates.exp failures
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.2-2011.05-0
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
-- Michael
Can somebody please explain how development happens regarding qemu-linaro ?
I've taken a look here [0] and If I'm not mistaken, there's no code in the
repo. I can see a lot of blueprints, but I don't understand how work is
being done regarding those blueprints or when will it be done! Oh, and what
exactly is the 'qemu-linaro' tarball in the repo ?
I'm not sure how newbie this question is, but please bear with me. :D
Thanks in advance.
[0] https://launchpad.net/qemu-linaro
--
Karim Allah Ahmed.
LinkedIn <http://eg.linkedin.com/pub/karim-allah-ahmed/13/829/550/>
Hello,
* Sent 5 SMS related patches for review upstream.
* Backported two SMS patches from mainline to gcc-linaro and
gcc-linaro/4.6 (fixes for unfreed memory)
Thanks,
Revital
Hi,
* committed a patch that supports reductions in SLP (upstream)
* continued analyzing benchmarks: ffmpeg, EEMBC telecom, office, networking
* started to look into implementation of reverse accesses for Neon
* blueprints
Ira
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.5 and Linaro GCC 4.6.
Linaro GCC 4.5 2011.05 is the tenth release in the 4.5 series. Based
off the latest
GCC 4.5.3+svn173417, it adds new optimisations, much improved support
for strided load/stores, and fixes for many of the issues found in the
last month.
Interesting changes in 4.5 include:
* Updates to 4.5.3+r173417
* Performance improvements in NEON strided loads and stores
* Performance improvements targeted at EEMBC CoreMark
* Precompiled header support on recent Linux kernels
Fixes:
* LP: #660156: Heap randomisation causes PCH testsuite failures
* LP: #784375: vset_lane_u8 intrinsic generates wrong lane number
* LP: #759409: Profiled bootstrap fails in FSF GCC 4.5
* LP: #723086: Test regressions in the Fortran test suite
The strided load/store improvements allow both NEON intrinsics and the
vectoriser to efficiently access values that occur at every n'th
address, such as all of the red values in a RGB image or all of the
left channel samples in a interleaved audio array. Previous versions of GCC
would unpack the values onto the stack instead of using the registers
directly.
The CoreMark improvements improve the code generation for the hot
functions in benchmark. This release is now on par with Linaro GCC
4.4 and significantly ahead of other FSF or Linaro 4.5 based
compilers. This fixes the long-standing problems of ARMv5 being
faster than ARMv7 and 4.4 based compilers being faster than 4.5 based
ones.
Linaro GCC 4.6 is the third release in the 4.6 series. Based off the
latest GCC 4.6.0+svn173480, it adds new optimisations, vectoriser
improvements, and continues with the merge of many ARM-focused
changes.
Interesting changes include:
* Updates to 4.6.0+r173417
* Brings forward more of the performance improvements from Linaro GCC 4.5
* Adds support for swing-modulo scheduling
* Fixes precompiled header support on recent Linux kernels
* Changes the default NEON vector size to quads
* Adds auto-detection of the best vector size
* Adds vectorisation improvements due to better if-conversion
Fixes:
* LP: #714921: Uses an unreasonable amount of memory to compile QEMU on armel
* LP: #723086: Test regressions in the Fortran test suite
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.5-2011.05-0https://launchpad.net/gcc-linaro/+milestone/4.6-2011.05-0
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? inquire at support(a)linaro.org
-- Michael
Hi All,
This is based upon gcc version 4.5.3 (20110221 pre-release)
Any help appreciated
This shows a bug in the Linaro gcc compiler with the Arm NEON
vset_lane intrinsic
Note in the objdump that the vmov.8 instruction that places the
value in the vector for the non-q version uses 1 where it should use
2 and 3:
18: ee410bb0 vmov.8 d17[1], r0
1c: ee420bb0 vmov.8 d18[1], r0
20: ee400b90 vmov.8 d16[0], r0
3c: ee440bb0 vmov.8 d20[1], r0
For the q version the vmov.8 instructions are correct:
40: ee420bf0 vmov.8 d18[3], r0
54: ee420bd0 vmov.8 d18[2], r0
64: ee400b90 vmov.8 d16[0], r0
70: ee420bb0 vmov.8 d18[1], r0
/* Source code */
#include <arm_neon.h>
static uint8x8_t vec[5]
static uint8x16_t qvec[5];
void set(uint8_t value)
{
vec[1] = vset_lane_u8(value, vec[0], 3);
vec[2] = vset_lane_u8(value, vec[0], 2);
vec[3] = vset_lane_u8(value, vec[0], 1);
vec[4] = vset_lane_u8(value, vec[0], 0);
qvec[1] = vsetq_lane_u8(value, qvec[0], 3);
qvec[2] = vsetq_lane_u8(value, qvec[0], 2);
qvec[3] = vsetq_lane_u8(value, qvec[0], 1);
qvec[4] = vsetq_lane_u8(value, qvec[0], 0);
}
Thx
Lee
Hi there. The 2011.05 release has been spun and is testing up well.
The 4.5 and 4.6 branches are now open so feel free to commit any
approved patches.
-- Michael
Progress:
* Attended LDS from 9th -14th May.
Plans:
* Look at Thumb2 performance blueprint and break it down.
* Investigate more headroom for SPEC2k starting this week.
* Thumb2 performance call this week.
Meetings:
* 1-1s
* T2 performance.
Hello,
- Attended Linaro@UDS.
- SMS patches to support ARM do-loop pattern got approved in mainline
and merged into gcc-linaro 4.6 and 4.5.
- Sent merge request for two patches in trunk. (SMS_fixes_for_unfreed_memory)
- Implemented an optimization for the stage-count and now testing it.
Thanks,
Revital
== Last week ==
* At Linaro@UDS; I am still typing this in Budapest. Sparingly did some
work between sessions.
* PR42017, ARM LR register not being used. Discussed the patch with
Richard Sandiford at LDS. Re-tested a bit and about to resend a revised
patch according to his suggestion.
* LP:748138, redirect_jump() ICE. Committed patch to CS stable and
trunk. Submitted merge request to Linaro 4.5 branch.
* LP:689887. Got some suggestions from Revital on how to debug the
bootstrap failure caused by my patch, will look into applying it.
== This week ==
* Taking Monday off, I'll be flying back to Taiwan on Tuesday.
* Continue with issues after getting home.
RAG:
Red:
Amber:
Green: 1105 work item status 99% complete with 2 weeks to go
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-05 | 2011-05-19 | 2011-05-19 | n/a |
close out 1105 blueprints | 2011-05-28 | 2011-05-28 | |
complete 1111 planning | 2011-05-28 | 2011-05-28 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
== merge-correctness-fixes ==
* some of my pending patches have been applied; a number of others are
still under discussion or need further work/testing
== other ==
* We won't be making a qemu-linaro 2011-05 release, since there are no
changes since the 2011-04 release (due to a combination of the Easter
holiday and UDS week).
* Attended UDS
* almost all 1105 work items either complete or confirmed postponed
to next cycle
* Good progress on fleshing out blueprints for next cycle:
https://wiki.linaro.org/PeterMaydell/Qemu1111
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Last week, Ramana pointed me at an upstream bug report about the
inefficient code that GCC generates for vzip, vuzp and vtrn:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48941
It was filed not longer after the Neon seminar at the summit;
I'm not sure whether that was a coincidence or not.
I attached a patch to the bug last week and will test it this week.
However, a cut-down version shows up another problem that isn't related
specifically to intrinsics. Given:
#include <arm_neon.h>
void foo (float32x4x2_t *__restrict dst, float32x4_t *__restrict src, int n)
{
while (n--)
{
dst[0] = vzipq_f32 (src[0], src[1]);
dst[1] = vzipq_f32 (src[2], src[3]);
dst += 2;
src += 4;
}
}
GCC produces:
cmp r2, #0
bxeq lr
.L3:
vldmia r1, {d16-d17}
vldr d18, [r1, #16]
vldr d19, [r1, #24]
vldr d20, [r1, #32]
vldr d21, [r1, #40]
vldr d22, [r1, #48]
vldr d23, [r1, #56]
add r3, r0, #32
vzip.32 q8, q9
vzip.32 q10, q11
subs r2, r2, #1
vstmia r0, {d16-d19}
add r1, r1, #64
vstmia r3, {d20-d23}
add r0, r0, #64
bne .L3
bx lr
We're missing many auto-increment opportunities here. I think this
is due to the limitations of GCC's auto-inc-dec pass rather than to
a problem in the ARM port itself. I think there are two main areas
for improvement:
- The pass only tries to use auto-incs in cases where there is a
separate addition and memory access. It doesn't try to handle
cases where there are two consecutive memory accesses of the
form *base and *(base + size), even if the address costs make
it clear that post-increments would be a win.
- The pass uses a backward scan rather than a forward scan,
which makes it harder to spot chains of more than two accesses.
FWIW, I've got fairly specific ideas about how to do this.
Unfortunately, the pass is in need of some TLC before it's
easy to make changes. So in terms of work items, how about:
1. Clean up the auto-inc pass so that it's easier to modify
2. Investigate improvements to the pass
3. Submit the changes upstream
4. Backport the changes to the Linaro branches
I wrote some patches for (1) last week.
I'd estimate it's about 2 weeks' work for (1) and (2). (3) and (4)
would hopefully be background tasks. The aim would be for something
like:
.L3:
vldmia r1!, {d16-d17}
vldmia r1!, {d18-d19}
vldmia r1!, {d20-d21}
vldmia r1!, {d22-d23}
vzip.32 q8, q9
vzip.32 q10, q11
subs r2, r2, #1
vstmia r0!, {d16-d19}
vstmia r0!, {d20-d23}
bne .L3
bx lr
This should help with auto-vectorised code, as well as normal core code.
(Combining the vldmias and vstmias is a different topic. The fact that
this particular example could be implemented using one load and one
store is to some extent coincidental.)
Richard
== String routines ==
* Gave up on perf on silverbell and redid it on ursa2; now have a
full set of perf figures and have updated the workload report to show
the spec
binaries that use significant time in libc and the routines they spend
it in; a handful of tests spend very significant amounts of time in
libm.
* Have ltrace results from about 75% of spec - some of the others
are fighting a bit
* Optimised the non-neon memcpy; it's now quite respectable except
in one or two cases (2 byte misaligned, and for some odd reason source
offset
by 8 bytes, destination by 12 is way down on any other combination)
(Current result graphs here
https://wiki.linaro.org/Internal/People/DaveGilbert?action=AttachFile&do=ge…
)
Dave
Hi,
* continued looking into ffmpeg/libavcodec:
- dcadsp.c - the inner loop contains reverse accesses which are not
supported on Neon. I think we can handle them using vrev and vswp.
- a lot of loops have unknown memory stride. I am exploring a
possibility of a combination of scalar loads and vmov into a vector
register, but it is probably too expensive.
* looking into telecom/conven
Ira
== Last week ==
* Launchpad #748138: "ICE in redirect_jump, at jump.c:1443". Related to
shrink-wrap, discussed a bit with Bernd off-list. Sent fix today (Mon.)
to gnu-internal; will need to merge to Linaro.
* CoreMark combine canonicalize compares patch set: bootstrapped and
tested with clean results on powerpc, added comments and updated
upstream submission. Machine independent parts okayed by Jeff Law, now
committed upstream. ARM parts still pending review.
* Compiled back-list of upstream patches, and sent to patches(a)linaro.org
* Traveled to Budapest, Hungary for Linaro Developer Summit on Saturday.
== This week ==
* Linaro Developer Summit at Budapest all week.
== GDB ==
* Committed support for NEON registers in core dumps (bug #615972)
to Linaro GDB (not yet in mainline).
* Investigated root cause of bug #615996 (gdb.cp/templates.exp) and
started exploring ways to fix it.
== GCC ==
* Committed fix for bug #759409 (Profiled bootstrap fails in GCC 4.5)
to FSF GCC 4.5 branch and Linaro GCC 4.5.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Worked on the ARM 16 -> 64-bit multiply-and-accumulate problem. Bernd
kindly provided a prototype patch to help. I've tried to understand what
needs to be done, but I didn't have enough time to get to the bottom of
it. So far, I think I know why the existing code doesn't work, and I
think I have a way forward. It does appear that the real problem ought
to be solved in the tree optimizers, though.
Committed the FSF GCC 4.5.3 merge to the Linaro 4.5 branch. Testing did
not show any trouble.
Matthias requested an additional 4.5 merge to pick up a new bug fix, so
I've done the merge, and submitted the merge request for testing.
Committed Maxim's compound conditionals optimization patch - a merge
from Linaro GCC 4.5.
There was some confusion caused by the lp:gcc-linaro/4.6 branch history
accidentally getting re-written. After some discussion on #bzr I managed
to figure out what happened, posted a warning to linaro-toolchain
mailing list, and changed the branch configuration to prevent it
happening again.
Committed Mark Shinwell's BRANCH_COST patch to Linaro GCC 4.6 - another
merge from GCC 4.5.
Merged from FSF GCC 4.6 to Linaro 4.6 and submitted the patch for testing.
Richard Earnshaw approved my recent Thumb2 constants patch, but only if
I modify it slightly. I've begun work on the changes, but I still need
to test them. I won't be able to commit them until the ADDW/SUBW patch
has been approved.
Ramana has reviewed my EABI half-precision function names patch, and
discovered that the return types are wrong. I have no idea how this
happened - the changes are deliberate so they must have been based on
something, but I no longer have the same documents I had when I did the
work, and it clearly doesn't match my current ones. In any case, the
changes make no practical difference as function return values are
always as wide a register anyway.
* Other
Public holiday on Monday.
* Next week
I will be attending UDS in Budapest from 8th - 14th May. I shall
continue to read my email, but will not be attending any calls.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* ARM Thumb2 addw/subw support.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03783.html
== Bug fighting ==
* Tracked bug 774175 (apt segfault on armel on oneiric) down to the
cortex-a8 branch erratum bug that we found as part of the bug jam a
few weeks
ago (affecting the more obscure vtk package) - Richard's existing
binutils fix should fix this.
== String routines ==
* Struggled to get 'perf' to get sane results from profiling spec;
some of the samples are obviously being associated with the wrong
process somewhere
along the process (e.g. it's showing significant samples in the sh
process but in a library that's used by the actual benchmark.
* latrace on spec still running on ursa2
* Wrote a non-neon memcpy; as expected it's aligned performance is
very similar to libc/kernel - it's a bit faster in some places but
slower
in some odd places (e.g. n*32+1 bytes is a lot slower for some
reason). It's also really bad on mis-aligned cases, I tried to take
advantage
of the v7's ability to do misaligned loads - but they really are quite slow.
Dave
== This week ==
* Committed interleaved load/store vectorisation changes upstream.
* Merged the vldN and vstN intrinsic improvements into Linaro 4.5 and 4.6.
(Thanks for the quick reviews here.)
* Backported the interleaved load/store vectorisation changes to Linaro
4.5 and 4.6. This took a while because the patch series touches
turbulent code. Submitted merge requests.
* Merged Sergey Grechanik's NEON reload improvement into Linaro 4.5
and 4.6.
* Got ready for summit.
Richard
Hi,
* finished libunwind support of detection and handling of signal frames on
ARM Linux. RT and non-RT signal frames are handled for both >=2.6.18 and
<2.6.18 kernels. The *test-resume-sig testcases are passing now.
* briefly looked into what needs to be done in order to add 64bit __sync_*
ops
* prepared for LDS
Regards
Ken
RAG:
Red:
Amber:
Green: GSoC QEMU student project approved
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-05 | 2011-05-19 | 2011-05-19 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
(short week, following holiday)
== merge-correctness-fixes ==
* some minor patches committed: SPARC build issues, Neon UNDEFs,
restore base reg properly for Thumb LDMs that abort midway
* v2 of configure patch to print list of valid targets
* some work on fixing QEMU FPSCR status flags (last remaining item
in this blueprint); submitted a patchset fixing everything except
the various VCVT instructions (which have trickier softfloat bugs)
* submitted patch fixing NaN behaviour in VMLA/VMLS/VNMLA/VNMLS
== other ==
* the Google Summer of Code QEMU project to work on upstreaming
some of the Android emulator has been approved; I will be mentoring
Patrick Jackson, who is the student who will be doing this work
* qemu-linaro 2011-05 is unlikely to have any code changes since 2011-04;
we might release it anyway just because it's the final one of the cycle
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
13-19 May: UDS, Budapest
(maybe but unlikely) 15-16 August: QEMU/KVM strand at LinuxCon NA,
Vancouver [LinuxCon proper follows on 17-19th]
There's already a couple of tools-related questions on here. We should
probably make sure we monitor it regularly.
This isn't to hard, once you're signed up, you can mark certain topics
as 'interesting' and then you'll get email notifications when there's a
post.
Andrew
-------- Original Message --------
Subject: Linaro forums replaced by "Ask Linaro"
Date: Fri, 06 May 2011 15:58:53 +0200
From: Michael Opdenacker <michael.opdenacker(a)linaro.org>
Organization: Linaro
To: everyone <everyone(a)linaro.org>
Greetings,
We are pleased to announce the replacement of our forums by a new "Ask
Linaro" service.
Better than forums, we expect this service to bring more questions and
answers, and incite people to join the Linaro community by sharing their
experience.
We count on your participation.
See http://ask.linaro.org/
Cheers,
Michael.
--
Michael Opdenacker - Community Manager
Linaro, http://linaro.org
Cell: +33 621 604 642
IRC: 'opm' in #linaro on irc.freenode.net
Hi all,
We seem to have had an accident!
This morning I merged one of my patches to lp:gcc-linaro/4.6, and this
afternoon I got an email from Launchpad notifying me that a mystery
revision had been deleted.
It seems that Richard has somehow overwritten my change with his.
Luckily I've spotted it and will fix it now, but it could very easily
have got lost.
I'm not sure what's happened here, but I'm pretty sure bzr does not just
do this silently. I thought you needed to specify --overwrite to do this
on purpose, but perhaps there's a bzr bug here?
Anyway, could everyone please be very careful when they do bzr push to
the release branches.
Thanks
Andrew
Hello,
[1] Regarding the patch 'Support closing_branch_deps'
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00350.html
Continued discussions with Ayal Zaks (SMS maintainer) regrading this patch.
(http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00250.html)
I'm now working on simplifying the patch for resubmission according the
recommendation.
[2] Regarding the patch 'Avoid considering debug_insn when calculating SCCs'
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg01294.html The problem exposed
while testing patch [3] and it seems that is part of a bigger problem -- SMS
does not support debug_insn properly.
I've asked Alexandre Oliva who inserted the support for debug_insn to haifa
sched and selective sched to help with that.
[3] Regarding the patch 'Support instructions with REG_INC_NOTE'
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg01309.html
The fix for debug_insn (which the patch [2] tries to solve) is needed for
bootstrapping this patch. So I'm putting it on hold for now.
Thanks,
Revital
Hi,
- backported vzip fix to GCC 4.5 and 4.6 (PR 48252)
- merged auto-detection of vector size patch to gcc-linaro 4.6
- started looking into vectorization of ffmpeg
Ira
Hi,
I am trying add usb gadget mass storage to uboot , and got run-time
abortion on usbmsd.c with the default u-boot Os option. I use linaro
2011.03 4.5.3 version, and my trials as following:
1) During debugging , I found the abort exception in
usbmsd_init_strings(). if declaring it with noinline function, like
static void usbmsd_init_strings (void)
__attribute__((noinline));
it works, however, next steps still failed.
2) compling uboot with O0, everyhing is ok.
3) try other toolchain. It works with codesourcery's 2011.03-41
and ubuntu 4.5 version, while failed with 2011.04 4.5 linaro version.
4) I have dumped the obj files, seeming some funcs optimized
,analysing the details is out of my knowledge, :( . please check the
src and objdump files in one compressed file)
toolchain:
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
arm-none-linux-gnueabi-gcc --v
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/ypluo/work/Current/Tools/toolchain/linaro-201103-csr-build-armv7-vfpv3_x86_32/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.3/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/gcc-linaro-4.5-2011.03-0/configure
--target=arm-none-linux-gnueabi
--prefix=/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/tools
--enable-languages=c,c++ --with-arch=armv7-a --with-float=softfp
--with-fpu=vfpv3-d16 --with-mode=thumb --enable-shared
--enable-multiarch --enable-threads=posix --enable-nls
--enable-clocale=gnu --enable-libstdcxx-debug
--enable-libstdcxx-time=yes --disable-werror
--with-pkgversion='Ubuntu/Linaro 4.5-2011.3-csr-build'
--enable-poison-system-directories
Thread model: posix
gcc version 4.5.3 20110221 (prerelease) (Ubuntu/Linaro 4.5-2011.3-csr-build)
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc --v
Using built-in specs.
COLLECT_GCC=/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/mywork/toolchain/arm-2011.03/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.2/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/scratch/janisjo/arm-linux-lite/src/gcc-4.5-2011.03/configure
--build=i686-pc-linux-gnu --host=i686-pc-linux-gnu
--target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap
--disable-libssp --disable-libstdcxx-pch
--enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as
--with-gnu-ld --with-specs='%{save-temps: -fverbose-asm}
%{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-funwind-tables}
-D__CS_SOURCERYGXX_MAJ__=2011 -D__CS_SOURCERYGXX_MIN__=3
-D__CS_SOURCERYGXX_REV__=41 %{O2:%{!fno-remove-local-statics:
-fremove-local-statics}}
%{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics:
-fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared
--enable-lto --enable-symvers=gnu --enable-__cxa_atexit
--with-pkgversion='Sourcery G++ Lite 2011.03-41'
--with-bugurl=https://support.codesourcery.com/GNUToolchain/
--disable-nls --prefix=/opt/codesourcery
--with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc
--with-build-sysroot=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/libc
--with-gmp=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpfr=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpc=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-ppl=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic
-lm' --with-cloog=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-libelf=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--disable-libgomp --enable-poison-system-directories
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
Thread model: posix
gcc version 4.5.2 (Sourcery G++ Lite 2011.03-41)
Please let me know if other info needed.
Many thanks.
Yuping
Hi,
I am trying add usb gadget mass storage to uboot , and got
run-time abortion on usbmsd.c with the default u-boot Os option. I
use linaro 2011.03 4.5.3 version, and my trials as following:
1) During debugging , I found the abort exception in
usbmsd_init_strings(). if declaring it with noinline function, like
static void usbmsd_init_strings (void) __attribute__((noinline));
it works, however, next steps still failed.
2) compling uboot with O0, everyhing is ok.
3) try other toolchain. It works with codesourcery's 2011.03-41
and ubuntu 4.5 version, while failed with 2011.04 4.5 linaro version.
4) I have dumped the obj files, seeming some funcs optimized ,
analysing the details is out of my knowledge, :( . please check the
attached three files.
toolchain:
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
arm-none-linux-gnueabi-gcc --v
Using built-in specs.
COLLECT_GCC=arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/home/ypluo/work/Current/Tools/toolchain/linaro-201103-csr-build-armv7-vfpv3_x86_32/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.3/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/gcc-linaro-4.5-2011.03-0/configure
--target=arm-none-linux-gnueabi
--prefix=/media/8ccb10fd-862c-47d2-99fb-144e7188e1fb/home/vmuser/development/toolchain/build-toolchain/tools
--enable-languages=c,c++ --with-arch=armv7-a --with-float=softfp
--with-fpu=vfpv3-d16 --with-mode=thumb --enable-shared
--enable-multiarch --enable-threads=posix --enable-nls
--enable-clocale=gnu --enable-libstdcxx-debug
--enable-libstdcxx-time=yes --disable-werror
--with-pkgversion='Ubuntu/Linaro 4.5-2011.3-csr-build'
--enable-poison-system-directories
Thread model: posix
gcc version 4.5.3 20110221 (prerelease) (Ubuntu/Linaro 4.5-2011.3-csr-build)
ypluo@ypluo-dt:~/work/Current/L38EVB/Main/out/prima2cb$
/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc
--v
Using built-in specs.
COLLECT_GCC=/home/ypluo/mywork/toolchain/arm-2011.03/bin/arm-none-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/mywork/toolchain/arm-2011.03/bin/../libexec/gcc/arm-none-linux-gnueabi/4.5.2/lto-wrapper
Target: arm-none-linux-gnueabi
Configured with:
/scratch/janisjo/arm-linux-lite/src/gcc-4.5-2011.03/configure
--build=i686-pc-linux-gnu --host=i686-pc-linux-gnu
--target=arm-none-linux-gnueabi --enable-threads --disable-libmudflap
--disable-libssp --disable-libstdcxx-pch
--enable-extra-sgxxlite-multilibs --with-arch=armv5te --with-gnu-as
--with-gnu-ld --with-specs='%{save-temps: -fverbose-asm}
%{funwind-tables|fno-unwind-tables|mabi=*|ffreestanding|nostdlib:;:-funwind-tables}
-D__CS_SOURCERYGXX_MAJ__=2011 -D__CS_SOURCERYGXX_MIN__=3
-D__CS_SOURCERYGXX_REV__=41 %{O2:%{!fno-remove-local-statics:
-fremove-local-statics}}
%{O*:%{O|O0|O1|O2|Os:;:%{!fno-remove-local-statics:
-fremove-local-statics}}}' --enable-languages=c,c++ --enable-shared
--enable-lto --enable-symvers=gnu --enable-__cxa_atexit
--with-pkgversion='Sourcery G++ Lite 2011.03-41'
--with-bugurl=https://support.codesourcery.com/GNUToolchain/
--disable-nls --prefix=/opt/codesourcery
--with-sysroot=/opt/codesourcery/arm-none-linux-gnueabi/libc
--with-build-sysroot=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/libc
--with-gmp=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpfr=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-mpc=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-ppl=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-host-libstdcxx='-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic
-lm' --with-cloog=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--with-libelf=/scratch/janisjo/arm-linux-lite/obj/host-libs-2011.03-41-arm-none-linux-gnueabi-i686-pc-linux-gnu/usr
--disable-libgomp --enable-poison-system-directories
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
--with-build-time-tools=/scratch/janisjo/arm-linux-lite/install/arm-none-linux-gnueabi/bin
Thread model: posix
gcc version 4.5.2 (Sourcery G++ Lite 2011.03-41)
Please let me know if other info needed.
Many thanks.
Yuping
My MOVW patch from last week left an unused variable that killed -Werror
builds, so I posted a new patch to fix it.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04141.html
Ramana approved that in record time, so I've committed it.
Tom has committed Mark Shinwell's BRANCH_COST patch upstream, so I have
backported it to Linaro GCC 4.6.
Maxim has committed his compound conditionals patch upstream, so I've
backported that to Linaro GCC 4.6 also.
Reviewed what other patches are queued for forward porting to 4.6/7,
hoping that other's might have picked some of them off, and found no
other progress just yet.
Reduced the test case for GCC PR48783. For some reason it is retaining
".global" directives for symbols that have been optimized away, which
leads to link errors in the kernel build.
Tried to find out why the "discourage neon in A8" patch has caused test
failures. I'm still not sure - I've asked Michael Hope to rerun the
tests in case it's just random.
Reposted the EABI half-precision patch with the extra bits Joseph says
it needed in the version scripts.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04251.html
Looked at the linking problem reported by Barry Song on the
linaro-toolchain list.
* Other
Public holidays on Monday and Friday.
* Future
I will be attending UDS in Budapest from 8th - 14th May. I shall
continue to read my email, but will not be attending any calls.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* ARM Thumb2 addw/subw support.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03783.html
* ARM Thumb2 Replicated constants
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03883.html
* ARM EABI half-precision function names (reposted 2011-04-27).
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg04251.html
== Last week ==
* CoreMark ARMv6/v7 regression patch set for combine: exchanged some
comments on upstream list with Jeff Law. Started some testing on
powerpc64, hit some issues with native bootstrap that I
don't think I completely overcome, but at least completed a 32-bit
bootstrap successfully. Unfortunately hit two regressions after running
tests, will work on fixing this week, and update the upstream submission.
* PR48783: unused reference to __aeabi_uldivmod. Investigated and found
this to be a case where during RTL expand, .global directives for the
__aeabi_* runtime symbols are directly inserted after some div optab
didn't have the insns, and a libfunc was to be used. However later
optimizations that removed the divisions left the .global symbols
dangling with no uses. We could probably just avoid adding the
directives completely for the EABI functions.
* PR42017: ARM LR register not used in leaf functions. This is a case
where DF takes EPILOGUE_USES as part of the initial live registers at
end of functionn, and liveness computations never get to kill it, since
there are no function calls to clobber in a leaf function. Submitted a
patch to remove LR from EPILOGUE_USES before reload, awaiting review.
* LP #689887: investigated more; not much progress, but found that the
bootstrap fail happens only under --with-mode=thumb (Thumb-2). Under ARM
mode the native bootstrap succeeds.
== This week ==
* Try to fix the problems with the CoreMark combine patches.
* Investigate more optimizations/bugs.
* Prepare for travel to Budapest on Saturday.
Hello,
- Continued analysing DENbench benchmarks.
- Discussed the SMS patched with Ayal Zaks (SMS maintainer).
- Booked the flights for Budapest summit.
Thanks,
Revital
Hi,
libunwind:
* the initial support for resuming at a certain stack frame went upsream
* learned about the various signal frame layouts on ARM
* RT frames, non-RT frames for present and pre 2.6.18 kernels
* implemented support for RT signal frame detection on ARM
* started to implement support for unw_resume if signal frames are involved
* attended a class on Friday
Note: Monday was a public holiday.
Regards
Ken
== GDB ==
* Committed series of patches to fix bug #615978 (Failure to software
single-step into signal handler) to mainline and Linaro GDB.
* Drafted blueprint linaro-toolchain-o-cross-debug
== GCC ==
* Split bug #771900 (Linaro GCC 4.5 switch optimization breaks profiled
bootstrap) off bug #759409 (Profiled bootstrap fails in GCC 4.5).
Tracked down root cause of bug #759409 / PR middle-end/43085, and
posted fix to gcc-patches.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi All,
I found Jie has committed a patch
"http://sourceware.org/ml/binutils/2010-05/msg00083.html".
I am using the newest binary utils(2.21) and encounted the following ASSERT in
arm_elf32.c:
+ if (out_attr[i].i == 0)
+ {
+ BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
My compiling options are as below,
ASM_FLAGS :=
\
-gdwarf-2 \
-mfpu=vfp \
-mfloat-abi=softfp \
-mthumb-interwork
C_FLAGS :=
\
$(ASM_FLAGS) \
-O3 -Wno-all \
-fno-optimize-sibling-calls \
-mlong-calls \
-ffunction-sections \
CPP_FLAGS :=
\
-fno-rtti \
-fno-exceptions \
LINK_FLAGS :=
\
--gc-sections -nostdlib \
-L ../stdlib \
-Wl,--as-needed \
-Wl,-no-enum-size-warning \
--cref \
ARFLAGS :=
\
rcs
Can anyone give me any tip about why the assert is triggered?
I have reported a bug here:
http://sourceware.org/bugzilla/show_bug.cgi?id=12700
But not sure whether it is a bug.
-barry
Hi All,
I am using 2011.3 4.5 linaro GCC(armv7-a vfpv3d16) to compile kernel
and modules. I select to compile all codecs as modules:
"config SND_SOC_ALL_CODECS
tristate "Build all ASoC CODEC drivers"
"
as M and I2C/SPI too.
Then in the kernel dir, run "make" to get both vmlinux and modules, I
found snd-soc-wm8974.ko, snd-soc-wm8940.ko and snd-soc-wm8510.ko will
fail due to "__aeabi_uldivmod undefined".
If i comment do_div() in these codec drivers, this issue will
disappear. But it is strange there are many codecs which use do_div()
too, for example:
sound/soc/codecs/max98088.c
sound/soc/codecs/max9850.c
sound/soc/codecs/wm8350.c
sound/soc/codecs/wm8400.c
sound/soc/codecs/wm8510.c
sound/soc/codecs/wm8580.c
sound/soc/codecs/wm8753.c
sound/soc/codecs/wm8804.c
sound/soc/codecs/wm8900.c
sound/soc/codecs/wm8904.c
sound/soc/codecs/wm8940.c
sound/soc/codecs/wm8955.c
sound/soc/codecs/wm8960.c
sound/soc/codecs/wm8974.c
sound/soc/codecs/wm8978.c
sound/soc/codecs/wm8985.c
sound/soc/codecs/wm8990.c
sound/soc/codecs/wm8991.c
sound/soc/codecs/wm8993.c
sound/soc/codecs/wm8994.c
sound/soc/codecs/wm8995.c
sound/soc/codecs/wm9081.c
but others can pass the compiling except those 3 modules. Is it due to
a wrong optimization by gcc?
Other information:
1. old tool-chains we are using can pass the compiling of the 3 modules.
2. If i built all codecs into kernel image, these 3 drivers don't
report error while compiling.
Thanks
Barry
2011/4/27 Mark Brown <broonie(a)opensource.wolfsonmicro.com>
>
> On Wed, Apr 27, 2011 at 04:50:12PM +0800, Barry Song wrote:
>
> > Marking pll_factors() as noinline or putting asm("" : "+r"(source)); before the
> > call to do_div() works around the problem.
>
> If we do have to do something in the callers rather than in do_div() the
> annotation seems substantially more taseful than inserting a random asm
> into the code.
I agree. for this patch which will not be applied, people can just get
information about how to workaround the gcc issue while they have the
same problem. google can find there are other people who failed to
compile wm8974 module too. eg.
http://irclogs.ubuntu.com/2010/03/30/%23ubuntu-arm.txt
Andrew Stubbs, Michael Hope in Linaro's toolchain team are working
hard on this gcc issue. there have been many update today:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48783
Hi All,
As i have frequently said, we are using 2011.3 4.5 linaro gcc. For the
following codes, if we compile it by -O2, it will crash with "segment
fault", if we just comment " if(unifi_debug >= level) {", all will be
ok.
If we don't compile it by -O2, all will be ok too.
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#define DEBUG_BUFFER_SIZE 80
int unifi_debug = 5;
void
unifi_trace(void* ospriv, int level, const char *fmt, ...)
{
static char s[DEBUG_BUFFER_SIZE];
va_list args;
unsigned int len;
if(unifi_debug >= level) {
va_start(args, fmt);
len = vsnprintf(&(s)[0],
(DEBUG_BUFFER_SIZE),
fmt, args);
va_end(args);
if (len >= DEBUG_BUFFER_SIZE) {
(s)[DEBUG_BUFFER_SIZE - 2] = '\n';
(s)[DEBUG_BUFFER_SIZE - 1] = 0;
}
printf("%s", s);
}
}
int main(void)
{
char *prog = "/usr/sbin/unififw";
unifi_trace(NULL, 1, "start %s\n", prog);
return 0;
}
Thanks
Barry
Hi there. A first-pass list of summit sessions is up at:
https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
The next step is to investigate these areas and come up with a basic
plan that can be discussed during the summit.
I've put your names against the sessions as follows:
Andrew: Broad tuning
Dave: String routines everywhere
Dave: QEMU topic #2
Doug: STM support
Ira: Vectoriser and NEON performance
Ken: 64 bit sync primitives
Ken: Good backtracing
Ken: End-developer tools bluesky
Michael: Publish benchmarking of the toolchain
Michael: Binary builds
Michael: Deeper validation
Peter: QEMU bluesky
Ramana: Thumb-2 performance brainstorm
Ramana: GCC backend rework
Ulrich: GDB as a cross-debugger
Ira and Dave, I know you won't be at the summit but we'll see about
being able to call in.
Could you all please have a read of the outline, investigate these
topics, and draft up a blueprint-style list of work items to achieve
it? Record any notes in the sandbox page[5] or in a child page if
needed. Larger topics may warrant a specification[1].
I'd like these done by the end of next week. I'd expect to spend up
to a day on the topics you already understand and more on broad
topics.
For reference, the see the draft TRs[2] and spreadsheet [3]. I've
added some GDB topics to the spreadsheet that still need to go onto
the wiki page.
The outlines should touch each of these TRs in some way so let me know
if I've missed anything.
There's more good information on the process and style at:
https://wiki.linaro.org/Process/Blueprintshttps://wiki.linaro.org/Process/WorkItemsHowtohttps://wiki.linaro.org/Resources/FAQ
Questions? Need more detail? Let me know.
-- Michael
[1] https://wiki.linaro.org/Process/SpecTemplate
[2] https://wiki.linaro.org/Cycles/1111/TechnicalTopics/Toolchain
[3] https://spreadsheets.google.com/ccc?key=0Ap7fWLePADFVdHkxYy1INTZmMEd4bkwxSG…
[4] there is no 4...
[5] https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints
Hi,
Agenda for today's performance call . Sorry about the last minute
posting and I'll put this in the wiki soon enough.
1. Sync-up on what's been happening around the group:
a. Coremark regressions.
b. Thumb2 constants patch.
c. divmodsi4 and vfp register moves.
d. DENBench investigations.
2. Planning for the summit and turning some of the ideas into blueprints.
3. AOB.
cheers
Ramana
== Last week ==
* PR48250, rehaul arm_legitimize_reload_address(). Richard Sandiford
caught a bug of mine where I overlooked the valid index range of NEON
quad-word load/stores. Quickly whipped up a fix, soon approved and
committed upstream.
* LP #744754, ICE in NEON struct-mode auto-inc-dec MEMs. Pushed upstream
patch for a merge to Linaro 4.5.
* PR46888, bit-field insert optimization patch. Resumed investigating,
mailed Andrew Pinski for more information on that REG_EQUAL note issue
he mentioned on gcc-patches; can't quite reproduce it myself.
* CoreMark ARMv6/v7 regressions: posted a patch set to gcc-patches.
Still waiting review.
* Reported to Bernd and AndrewS on an issue (LP #748138) which seems to
be related to the shrink-wrap patch. This ICE does not seem to be
avoided by doing -fno-shrink-wrap.
* A few tasks related to Linaro-Budapest event travel.
== This week ==
* Do the merge of the new combine patches to Linaro, and test.
* LP #689887 is still in progress.
* Hope to experiment with a few more optimization ideas.
Michael mentioned that some users reported seeing better preformance from
RVCT using arm_neon.h then they did when coding directly in assembler.
He suggested we try the same thing for GCC. Here's an experiment using
the example that Jim Huang posted to the dev list recently:
https://wiki.linaro.org/RichardSandiford/Sandbox/IntrinsicsPerformance
The summary is that the C version needs to borrow a trick from the
assembly code in order to be competitive. If it does that, though,
the C code can be faster. I think this is mostly down to scheduling,
although I haven't checked in detail yet.
Richard
== String and Memory routines ==
* Profiled denbench with perf and produced a set of stats to show
which programs spent how much time in libc and how
much time was spent in each routine. While some of the
benchmarks are good (like aes) and spend almost no time in libc
some of the others (MPEG codecs especially) seem to spend
significant times in libc.
* Ran all of denbench through latrace to generate sets of library
calls; post processed them to extract the section between the clock()
calls (and hence in the timed portion) and analysed the hot library
calls. I've looked at some of the output but not all of it yet; I
get output like:
Memcpy stats (dst align/src align/length/number of occurrences/total
size copied)
memcpy: 0,0,1 , 1588520, 1588520
memcpy: 16,28,4096 , 1, 4096
memcpy: 4,20,16384 , 855, 14008320
This shows that for a bunch of tests they do an inordinate number of 1
byte memcpy's, and a few hundred larger memcpy's with an address %32
which is 4
(and destination %32 is 20) - so not aligned but at least equally misaligned.
* Started writing up a report on some of the stats
* Also started to try and extract the same stuff from SPEC2k6
== QEMU ==
* Tested Peter's QEmu release earlier in the week (On Lucid so
didn't hit his natty bug)
* Wrote up a couple of specs (one for TrustZone and the other for
Device Tree integration)
== GDB ==
* Created Linaro GDB 7.2-2011.04-0 release.
* Committed patch to fix accessing "fpscr" register to Linaro GDB.
* Failure to disable address space randomization (bug #616001) has been
fixed in the kernel; closed the Linaro GDB bug.
== GCC ==
* Ongoing analysis of bug #759409 (Profiled bootstrap fails). Identified
two independent problems, one related to a new CodeSourcery feature,
and one a mis-optimization of final-stage cc1plus which is also present
in FSF GCC 4.5 (PR 43085). Ongoing investigation to track down the
root cause of the latter problem.
== Schedule ==
* Public holidays 04/22 - 04/25.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
RAG:
Red:
Amber:
Green: another monthly qemu-linaro release out on schedule
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
== maintain-beagle-models ==
* qemu-linaro 2011.04 tested and released
* had to do another last minute -1 respin to fix a problem caught by
ubuntu package builds; we need to come up with a process that lets
us do test package builds prior to release so we can fix this sort
of issue in a less last-minute fashion
== merge-correctness-fixes ==
* sent patch: fix semihosting SYS_HEAPINFO (seems to have issues though)
* sent patch: UNDEFs in Neon load/store space
* sent patches: fix build issues on sparc
* sent patch: bump the initrd load address to work with bigger kernels
* sent patch: set Invalid flag for float-to-int conversion of NaN
* sent patch: move vld/vst multiple to helper functions
* reviewed patches from Aurelien doing some general softfloat cleanup
* sent out a version of my performance counters patch which just does
a basic dummy implementation without the cycle counter (since the
cycle counter bits were going off down a blind alley rather and this
part is the last thing needed to be able to boot Linaro vexpress
images on stock upstream QEMU)
== other ==
* trying to nail down proposed QEMU work for next cycle; work-in-progress:
https://wiki.linaro.org/PeterMaydell/Qemu1111
* meetings: toolchain, standup
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
Holiday: 22 Apr - 2 May
9-13 May: UDS, Budapest
(maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver
[LinuxCon proper follows on 17-19th]
Hi,
libunwind:
* added initial support for resuming at a certain stack frame
* posted unw_resume support plus some some testsuite fixes on the ml
* there are still some issues left if signal handlers/frames are involved
Note: Friday is a public holiday.
Regards
Ken
== This week ==
* Iterated with upstream on some of the vectorisation patches. I think
only half a patch (the ARM implementation of array_mode_supported_p)
is still pending review; everything else has been approved.
* Backported the vldN and vstN intrinsics to Linaro 4.5.
* Finished off the microbenchmarks for libav.
* One of the problems in the original libav output was that the
vectoriser didn't realise that a group of N accesses really did form
a group. It instead generated N separate interleave operations and took
1 vector from each.
Submitted a fix for that, which is now committed upstream. Updated the
libav wiki page with the new, improved output.
(This actually allowed more libav loops to be vectorised, as well
as improving the output from some of the existing ones. I haven't
looked at the new ones. I expect this comes from interleaved stores.)
* Wrote an arm_neon.h version of Android's scanline_t32cb16_neon and
compared it with the original.
* Started (and only started) seeing how the vectorisation stuff
affects DENbench.
* Backported the dwarf2out OOM fix to Linaro 4.6.
== Next week ==
* Do something useful on DENbench.
* If all goes well, commit the vectorisation work upstream and backport
it to Linaro 4.5 and 4.6.
...but it's only a three day week.
Richard
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro QEMU 2011.04-1.
Linaro QEMU 2011.04-1 is the third release of qemu-linaro. Based
off upstream (trunk) qemu, it includes a number of ARM-focused
bug fixes and enhancements.
Interesting changes include:
- Compiling for an ARM host in Thumb mode now works
- As usual, various minor correctness fixes and other upstream changes
Known issues:
- The beagle and beaglexm models do not support USB, so there is no
keyboard, mouse or networking (#708703)
The only change over the shortlived 2011.04-0 is to fix a compilation
failure with gcc 4.5.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2011.04-1
Binary builds of this qemu-linaro release are being prepared and
will be available shortly for users of Ubuntu. Packages will be in
the linaro-maintainers tools ppa:
https://launchpad.net/~linaro-maintainers/+archive/tools/
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
The Linaro Toolchain Working Group is pleased to announce the release
of Linaro GDB 7.2.
Linaro GDB 7.2 2011.04 is the fifth release in the 7.2 series. Based
off the latest GDB 7.2, it includes a number of ARM-focused bug fixes.
This release fixes:
* LP: #684218 Failure to backtrace out of glibc system call stubs
* LP: #667309 failed to single step over bad thumb->arm boundary
* Fix accessing "fpscr" register
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.2-2011.04-0
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
-- Michael
The Linaro Toolchain Working Group is pleased to announce the release
of both Linaro GCC 4.5 and Linaro GCC 4.6.
Linaro GCC 4.5 2011.04 is the ninth release in the 4.5 series. Based
off the latest
GCC 4.5.2+svn171921, it adds new optimisations, support for Android,
and fixes for many of the issues found in the last month.
Linaro GCC 4.6 2011.04 is the second release in the 4.6 series. Based off the
latest GCC 4.6.0+svn171921, it is the first supported release of the
new series and includes a significant number of mainstreamed patches
from 4.5.
Interesting changes in 4.6 include:
* Updates to 4.6.0+r171921
* Adds conditional store sinking to the vectoriser
* Brings in a significant number of the Linaro GCC 4.5 patches that
are in mainline
Interesting changes in 4.5 include:
* Updates to 4.5.2+r172013
* Disables the shrink wrap optimisation by default
* Adds support for swing-modulo scheduling (SMS) on ARM
* Adds support for Android and the Bionic C library
* Optimises -fvar-tracking, greatly reducing memory used when
compiling large files (seen in QEMU)
Fixes:
* 'volatile' being ignored on volatile struct members
* A potential register clobber in arm_negdi2
* An error in libgcc that prevented it being built with -Os
* Multiple shrink wrap bugs (LP: #731665, 721023, 736081, 758082,
730860, 736439, 721023)
* LP: #730440 incorrect immediate for movt (seen in Firebird)
* LP: #728315 extension elimination pass mishandles subregs of
promoted variables (seen on MIPS)
* LP: #675347 volatile int causes inline assembly build failure (seen
in Qt)
SMS is an optimisation that works on innermost loops and reorders the
instructions by overlapping different locations. An example is that
the values for the next loop may be loaded during the current loop,
making the values already ready when the next loop starts.
SMS is disabled by default. To try it, add the options '-fmodulo-sched
-fmodulo-sched-allow-regmoves'.
The source tarball is available from:
https://launchpad.net/gcc-linaro/+milestone/4.5-2011.04-0https://launchpad.net/gcc-linaro/+milestone/4.6-2011.04-0
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
-- Michael
Here's a script for installing TI's DVSDK 3:
https://bitbucket.org/thayne/ti-omap-tools/src
Works with
- CodeSourcery
- OpenEmbedded
- Linaro
It will download the bazillion dependencies scattered across TI's site and
makes it easier to gut the DVSDK's hard-coded paths to work for your setup.
The DVSDK 4 isn't used because it is completely different from the DVSDK 3
and is much more difficult to root the hard paths and checks out of.
AJ ONeal
Hi toolchain, kernel folks,
I'm seeing an interesting thing on .got and .bss sections of
arch/arm/boot/compressed/vmlinux, and really need your expertise to
shed some lights.
I have an uninitialized variable 'uart_base' defined in misc.c.
static unsigned long uart_base;
$ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o
Disassembly of section .bss:
00000000 <uart_base>:
0: 00000000 andeq r0, r0, r0
00000004 <__machine_arch_type>:
4: 00000000 andeq r0, r0, r0
[...]
And section layout looks like the following.
$ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux
SECTIOINS {
...
_etext = .;
_got_start = .;
.got : { *(.got) }
_got_end = .;
.got.plt : { *(.got.plt) }
_edata = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
...
}
$ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux
arch/arm/boot/compressed/vmlinux: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 001c474c 00000000 00000000 00008000 2**5
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .got 00000028 001c474c 001c474c 001cc74c 2**2
CONTENTS, ALLOC, LOAD, DATA
2 .got.plt 0000000c 001c4774 001c4774 001cc774 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 00000020 001c4780 001c4780 001cc780 2**2
ALLOC
4 .stack 00001000 001c47a0 001c47a0 001cc780 2**0
ALLOC
5 .comment 0000002a 00000000 00000000 001cc780 2**0
CONTENTS, READONLY
6 .ARM.attributes 00000031 00000000 00000000 001cc7aa 2**0
CONTENTS, READONLY
I'm able to see uart_base in vmlinux objdump ...
$ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux
[relevant only, and sorted]
00000000 l d .text 00000000 .text
001c474c l d .got 00000000 .got
001c4774 l d .got.plt 00000000 .got.plt
001c4780 l d .bss 00000000 .bss
003968e4 g *ABS* 00000000 _image_size
001c474c g *ABS* 00000000 _got_start
001c4774 g *ABS* 00000000 _got_end
001c4780 g *ABS* 00000000 _edata
001c4780 g *ABS* 00000000 __bss_start
001c4780 l O .bss 00000004 uart_base
001c4798 g O .bss 00000004 malloc_ptr
001c478c g O .bss 00000004 output_ptr
001c479c g O .bss 00000004 malloc_count
001c4794 g O .bss 00000004 free_mem_end_ptr
001c4788 g O .bss 00000004 output_data
001c4784 g O .bss 00000004 __machine_arch_type
001c4790 g O .bss 00000004 free_mem_ptr
001c47a0 g *ABS* 00000000 _end
... but I can not see it in the zImage (all others in .bss seem still
there).
$ xxd arch/arm/boot/zImage | tail
01c4740: 3ef1 1400 be52 9f58 e468 3900 4c47 1c00 >....R.X.h9.LG..
^_got_start (why is it?)
01c4750: 9847 1c00 1043 0000 8c47 1c00 9c47 1c00 .G...C...G...G..
^malloc_ptr ^output_ptr
01c4760: 9447 1c00 080a 0000 8847 1c00 8447 1c00 .G.......G...G..
^free_mem_end_ptr ^__machine_arch_type
01c4770: 9047 1c00 0000 0000 0000 0000 0000 0000 .G..............
^free_mem_ptr
The following is a run-time memdump at _got_start.
Before recalculation:
9056304C: 001C474C 001C4798 00004310 001C478C 001C479C 001C4794 00000A08 001C4788
^_got_start (why is it?)
9056306C: 001C4784 001C4790 00000000 00000000 00000000 EDFE0DD0 4C010000 38000000
After recalculation (for .bss entries, the delta is 9039EA50, for
others in .got, delta is 9039E900):
9056304C: 9056304C 905631E8 903A2C10 905631DC 905631EC 905631E4 9039F308 905631D8
9056306C: 905631D4 905631E0 00000000 00000000 00000000 73FBC000 4C010000 38000000
QUESTION: Where is the .bss section of uart_base?
Now, I remove the 'static' to have 'unsigned long uart_base', and
dump the same stuff to compare.
$ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o
Disassembly of section .bss:
00000000 <__machine_arch_type>:
0: 00000000 andeq r0, r0, r0
00000004 <uart_base>:
4: 00000000 andeq r0, r0, r0
I'm able to see uart_base in vmlinux objdump ...
$ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux
[relevant only, and sorted]
00000000 l d .text 00000000 .text
001c4720 l d .got 00000000 .got
001c474c l d .got.plt 00000000 .got.plt
001c4758 l d .bss 00000000 .bss
003968e4 g *ABS* 00000000 _image_size
001c4720 g *ABS* 00000000 _got_start
001c474c g *ABS* 00000000 _got_end
001c4758 g *ABS* 00000000 _edata
001c4758 g *ABS* 00000000 __bss_start
001c475c g O .bss 00000004 uart_base
001c4770 g O .bss 00000004 malloc_ptr
001c4764 g O .bss 00000004 output_ptr
001c4774 g O .bss 00000004 malloc_count
001c476c g O .bss 00000004 free_mem_end_ptr
001c4760 g O .bss 00000004 output_data
001c4758 g O .bss 00000004 __machine_arch_type
001c4768 g O .bss 00000004 free_mem_ptr
001c4778 g *ABS* 00000000 _end
... and I can also see it in the final zImage.
$ xxd arch/arm/boot/zImage | tail
01c4710: 221f f1b3 3ef1 1400 be52 9f58 e468 3900 "...>....R.X.h9.
01c4720: 5c47 1c00 2047 1c00 7047 1c00 e442 0000 \G.. G..pG...B..
^uart_base
01c4730: 6447 1c00 7447 1c00 6c47 1c00 140a 0000 dG..tG..lG......
01c4740: 6047 1c00 5847 1c00 6847 1c00 0000 0000 `G..XG..hG......
01c4750: 0000 0000 0000 0000 ........
Surely, it's in the run-time memdump.
Before recalculation:
90563020: 001C475C 001C4720 001C4770 000042E4 001C4764 001C4774 001C476C 00000A14
^uart_base
90563040: 001C4760 001C4758 001C4768 00000000 00000000 00000000 EDFE0DD0 4C010000
After recalculation:
90563020: 905631AC 90563020 905631C0 903A2BE4 905631B4 905631C4 905631BC 9039F314
90563040: 905631B0 905631A8 905631B8 00000000 00000000 00000000 EDFE0DD0 4C010000
So it looks the non-static ('g') uninitialized variable sits in .bss
sections well, while static ('l') one is not there. Is this
expected? How the static one is being addressed? Or ask where the
offset for static one is stored?
Any info or comments are appreciated.
--
Regards,
Shawn
I've just submitted a merge request for the vldN and vstN intrinsic
improvements. There are five related patches, so I thought it might
be easier to review the merge if I posted the individual changes here.
See:
http://www.mail-archive.com/linaro-toolchain@lists.linaro.org/msg00969.html
for an example of how this helps.
Richard
I just did `git checkout` for linaro/linux-2.6.38 and tried compiling with
CROSS_COMPILE=arm-linux-gnueabi- and I get this smc #0 error.
The bug filed here is marked as fixed, but it's still broken for me:
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/669912
I ran into this error once before, but I can't find my notes for it.
I think the solution was to append something like $(sec) on a line in the
Makefile.
Any ideas?
AJ ONeal