== Progress ==
* Validation
- cleanup
- reviews
- asserting ABE master vs stable results
- stopped investigation on a huge number of unexpected
regressions, maybe caused by builders crashes
- created a Jenkins job able to detect the base GCC
branch, in order to select the right libc/binutils version
- found why ABE master showed regressions with the
_Pragma3 GCC test. Fix under review.
- investigating recent, numerous build failures
* Backports
- updated backport to fix bug #2185 after Kugan analysis
- drafted a script to parse the spreadsheet and generate
the backflip commands as appropriate
* GCC
- reported a couple of regressions on trunk
- Neon intrinsics tests update: committed.
We are now ready to remove neon-testgen.ml
== Next ==
* Validation
- cleanup
- armv8l vs arm
- ABE master vs stable
* GCC
- trunk monitoring
- more on AdvSIMD intrinsics
== Progress ==
PR40921 -missed optimization: x + (-y * z * z) => x - y * z * z
- Patch committed
PR63586 - x+x+x+x -> 4*x in gimple
- Patch committed
- There were couple of fallouts
PR71179 - ICE fold_convert_loc, at fold-const.c:2360
- Patch committed
PR71170 - ICE in rewrite_expr_tree, at tree-ssa-reassoc.c:3898
- Tried various options to fix this and settled on an implementation
- Patch sent for upstream review
== Plan ==
Follow upon remaining upstream patches
IPA VRP
== This Week ==
* TCWG-528 (2/10)
- Addressed comments from Richard and committed upstream (r236502, r236503)
* TCWG-72 (5/10)
- Updated patch and fixed regressions caused due to patch.
* TCWG-319 (1/10)
- Found why big endian vectorizer was not vectorizing the test-case with -O2.
* Holiday (2/10)
== Next Week ==
- TCWG-319: Post patch upstream and get it committed.
- TCWG-72: Post patch upstream and hopefully get it committed this week.
- TCWG-548: Start re-looking at section anchors.
=== Progress ===
TCWG-591 MOVW incorrectly allowed on ARM v5 committed upstream
TCWG-595 LLD port to ARM architecture
I am getting close to being able to run hello world built with lld.
I'm converging 1 bug at a time.
- The PLT handling code is working and the loader can execute the
image and starts the .init function.
- Currently failing in the weak call to __gmon_start__. At present lld
is removing undefined weak references from executables instead of
passing them on for the dynamic loader to resolve. This may not be
necessary on x86 but it is necessary on ARM.
-- Just finished a hack that should make this work, although it will
need some tidying up.
=== Plan ===
Get hello world working and then take stock of what I've learned and
come up with a plan in Jira for what needs to be done.
== Progress ==
* Add a diag handler for llc so it doesn't exit on the first error it
finds [TCWG-592] [1/10]
- Fixed and rebased the patch, it has been committed upstream
* Inline assembly constraints support for ARM [TCWG-560] [1/10]
- Rebased the patch, it has been committed upstream
* Remove exit-on-error flag from CodeGen tests [TCWG-604] [4/10]
- This is a follow-up of TCWG-592: when changing the diag handler,
some of the tests started to fail, so we had to add an exit-on-error
flag to preserve the old behaviour until we can fix the tests.
- Submitted a patch fixing the MIR tests (PR27770) - in upstream review
- Submitted a patch fixing an AMDGPU test (PR27762) - in upstream review
- Submitted a patch fixing a BPF test (PR27766) - in upstream review
- Investigated the ARM test (PR27765)
* Use git worktree in llvm helper scripts [TCWG-587] [3/10]
- Working on a prototype
* Misc [1/10]
- Meetings, buildbots, IRC issues
- Got LLVM commit access, yay!
== Plan ==
* Remove exit-on-error flag from CodeGen tests [TCWG-604]
- Fix the remaining ARM, BPF and AMDGPU tests (unfortunately the ARM
test seems a bit more involved, so I might pick out the others first
just to get them out of the way)
* Use git worktree in llvm helper scripts [TCWG-587]
- Continue prototyping, start a RFC on it next week
# Progress #
* TCWG-518, [6/10]
fix all bugs, and post them upstreams for review!
* PR 19998, write a patch to fix it. [2/10]
* Some discussions on unstable GDB test results in validation tests.
[1/10]
* Meetings [1/10]
# Plan #
* Respond comments to my patches,
* TCWG-333, think about the right fix.
--
Yao
This may be a better question for the linaro tools group. +cc their list
for the general question of conventions surrounding how shared library
objects identify and access thread-local storage that they need as part of
calling threads.
On Tue, May 17, 2016 at 11:06 AM, Nikhil Agarwal <nikhil.agarwal(a)linaro.org>
wrote:
> Hi All,
>
> I am trying to write a shared library object over ODP. Our ODP library has
> some per thread variables. When my application invokes an API of shared
> object which accesses per thread variable it gives segmentation fault.
>
> My concern is that when a shared object is loaded dynamically, how memory
> is assigned to thread specific variables defined inside shared objects.
> AFAIK we need to compile it with -ftls-model=global-dynamic, which is
> enabled by default when compiled with -fPIC flag, and library loader
> takes care for these issues.
>
> I am not an expert in this area, please help me in getting to some
> suitable reference pointers or some steps I might have missed.
>
> Thanks in advance
>
> Nikhil
>
=== This Week ===
Enable LLDB testsuite to show zero failures on Hikey 96 Board (AArch64
Linux) [TCWG-231] [4/10]
-- Ran multiple builds and testsuite runs to figure out latency issues.
-- Investigated remaining failures and submitted appropriate bugzilla bugs.
-- Committed xfails upstream.
Support for watchpoint un-alligned watchpoint addresses on LLDB
AArch64 [TCWG-367] [1/10]
-- Some investigation on possible solutions and frequently encountered
scenarios.
LLDB Chromebook Test Stability [TCWG-563] [3/10]
-- Investigation of noreturn unwinding test failure
-- Investigation of step over load library call failure
-- Investigation of other failures and commit xfails for reported issues.
Miscellaneous [2/10]
-- Meetings, emails, discussions etc.
-- Portugal visa information gathering
=== Next Week ===
Support for watchpoint un-alligned watchpoint addresses on LLDB
AArch64 [TCWG-367]
-- Add code changes required to manage a watchpoint with multiple
hardware watchpoint resources.
LLDB Chromebook Test Stability [TCWG-563]
-- Fix noreturn unwinding test failure and report relevent bug.
-- Fix step over load library call failure or report relevent bug.
Miscellaneous
-- Portugal visa application documents preparation.
== Progress ==
* Validation
- cleanup
- reviews
- looked a bit a using docker from Jenkins
- investigating how to select toolchain components versions
depending on the gcc version
* GCC
- Sent Neon intrinsics tests patches.
- trunk timeouts: caused by the libcilkrts merge, which has a bug on
arm. Disabled cilkplus to avoid too much noise in the results.
- reported a couple of regressions/bisects
* Misc (conf-calls, meetings, emails, ....)
- support for M-profile related queries ( multilib etc...)
== Next ==
* Validation
- cleanup
- reviews
- armv8l vs arm
- multiple gcc branches vs other components versions handling
* GCC
- trunk monitoring
- some dev if time permits
== Progress ==
o Linaro GCC (5/10)
* Linaro GCC 5.3 2016.05 snapshot
- FSF branch merge + release
* Linaro GCC 6.1 2016.05 snapshot
- Create new branch + release
o Extended validation (3/10)
* Fixed validation issues when binary tarballs are created.
o Misc (2/10)
* Various meetings and discussions.
== Plan ==
o Continue on validation/benchmarking
o Catch up with upstream work.
== Progress ==
* Add a diag handler for llc so it doesn't exit on the first error it
finds [TCWG-592] [5/10]
- Started a discussion about a new diagnostic handler for llc
- Patch accepted upstream, but broke a few things (Renato has
investigated/fixed some of them - thanks)
* Inline assembly constraints support for ARM [TCWG-560] [5/10]
- Patch in upstream review, but should be committed after the new
llc diagnostic is in place (otherwise it's difficult to test it
meaningfully)
== Plan ==
* Add a diag handler for llc so it doesn't exit on the first error it
finds [TCWG-592]
- Fix the remaining issues and get the patch committed again
* Inline assembly constraints support for ARM [TCWG-560]
- Rebase patch and try to get it reviewed
* Investigate exit-on-error on LLC [TCWG-594]
- Track the tests that need the exit-on-error flag with the new
diagnostic handler
== Progress ==
- ldr rt,= implementation transform to MOV committed upstream
[TCWG-468] [PR25722]]
-- Thanks to Renato for committing.
- Started looking at what would be needed to port lld to ARM
-- The ELF lld port looks to have a fairly small amount of
architecture specific hooks. Decided that I would learn fastest by
just trying to do an ARM only prototype port to see if I could get
hello world on linux working.
-- spent too much time trying to think about how to best implement the
group relocations for the PLT sequences then remembered that for a
quick prototype I could use larger sequences that didn't need the
relocations.
== Plan ==
- Continue working on an ARM LLD port. Will hopefully have a good idea
of what the scope of work needed is next week.
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.05 snapshot of both Linaro GCC 5 and Linaro GCC 6 source
packages.
Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.1+svn236106 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.08
stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.1+svn236106
Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.3+svn236108 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.08
maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn236108
* Backport of [Bugfix] [AArch32] PR target/70711 Fix big-endian ARMv8.1-A builds
* Backport of [Bugfix] [AArch64] PR target/70044 -flto turns on
-fomit-frame-pointer
* Backport of [AArch32] Reduce size of arm1020e automaton
* Backport of [AArch64] Fix SIMD predicate
* Backport of [AArch64] Fix thinko in handling of
-momit-leaf-frame-pointer option
* Backport of [Testsuite] [AArch32] Tests for arm_restrict_it patterns
in thumb2.md
* Backport of [Testsuite] gcc-dg: handle all return values when
shouldfail is set
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
== Progress ==
* 3 days off (Mon/Thu/Fri) [6/10]
* Inline assembly constraints support for ARM [TCWG-560] [3/10]
- More investigations for PR24071; found the cause of the bug,
working on a fix.
* Rework LLVM helper scripts [TCWG-571] [1/10]
- Addressed code review comments.
- The interface changes to llvm-projs and llvm-sync are now committed.
== Plan ==
* Inline assembly constraints support for ARM [TCWG-560]
- Come up with a fix for PR24071
* Rework LLVM helper scripts [TCWG-571]
- Investigate git worktree and how it could be factored into our
scripts (llvm-projs, llvm-build)
o 2 days off (4/10)
== Progress ==
o Extended validation (4/10)
* Change extended native job to use multiple scm
* Investigate validation issues when binary tarballs are created
o Linaro GCC (1/10)
* Finalized and submitted new Linaro development branch script.
o Misc (1/10)
* Various meetings and discussions.
== Plan ==
o Create Linaro GCC 6 branches
o Continue on validation and upstream work.
* 2 days off (Thu/Fri)
== Progress ==
* Validation
- restarted validations for pending backports, after the various
branches updates
- started looking at armv8l vs arm results differences
* GCC
- checked trunk regression reports
- updated AArch32 Neon intrinsics tests. Patch series almost ready
for submission
* Misc (conf-calls, meetings, emails, ....)
== Next ==
* Validation
- cleanup
- reviews
- armv8l vs arm
* GCC
- trunk monitoring: check why builds were killed after timeout
- more intrinsics tests
== This Week ==
* LTO (7/10)
a) TCWG-548 (2/10)
- Fixed a minor bug in the patch
- Results of variable partitions with chromium: http://pastebin.com/fLD2JzgP
- Significant difference in size of last partition could probably
indicate sth wrong with
patch (all unpartitioned variables go to last partition).
b) TCWG-528 (3/10)
- Posted upstream after bootstrap+test passed on ppc64le-linux-gnu
- Addressed Richard's comments.
c) TCWG-299 (2/10)
- Firefox built on aarch64 natively (r1-a12) non LTO with gcc-5 branch
- Fails to build with trunk due to issues in firefox codebase (PR70722)
- Fails to build on armhf with following error: http://pastebin.com/9xydVtjj
* TCWG-72 (2/10)
- Rebased patch
- Addressed Ramana's comments
* Misc (1/10)
- Meetings
== This Week ==
- LTO: benchmark section anchors patch, submit patch for
increase_alignment upstream, firefox
- TCWG-72: Test and submit upstream
* Monday off [2/10]
# Progress #
* TCWG-468, ldr rt, =immediate
Have a feature complete implementation. Passes existing regression tests.
Still need to add more tests for new functionality and see if
implementation can be tidied up a bit
* Setting up a local chromebook to run the regression-tests. Should
now be able to run test suite on ARM relatively easily.
# Plan #
* Complete TCWG-468 and send upstream for review.
* Pick something else up.
* Monday off [2/10]
# Progress #
* TCWG-518, arm linux range stepping patches. [5/10]
Tried different ways to manage breakpoints, but the program still
gets SIGILL from time to time. Post my WIP patches upstream to see
if people have some ideas on this.
* TCWG-547, [1/10].
Try two approaches but give up due to the quite aggressive interface
changes. Fortunately, the change in the third approach is quite
small, testing the patch.
* Misc, meeting, [2/10]
# Plan #
* TCWG-518, TCWG-547
--
Yao
== Progress ==
* GCC Stage-1 (5/10)
- Posted patches and revised based on review
- PR40921 and PR63586
- Getting ready post type promotion pass again
* Linaro bug (2/10)
- BUG 2195 and BIG 1979
- Investigation with trunk and educed test case shows Missing commit
* Misc (1/10)
- GCC Lists
* Public holiday (2/10)
== Plan ==
* Attend to pending stage1 patches
o 1 day off (2/10)
== Progress ==
o Extended validation (2/10)
* Extended validation now operational,
reporting enhancements investigations.
* Looked at gdb/guality unstable results.
* Reviewed some jobs.
o Linaro GCC (2/10)
* Scripted new Linaro development branch process.
o Upstream GCC (1/10)
* Digging in libatomic code.
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o 2 days off (Thu/Fri)
o Continue on validation and upstream work.
== This Week ==
* LTO (6/10)
a) TCWG-128 (1/10)
- committed patch for adding param lto-max-partition, which
can now be used as workaround for building chromium with minimal
number of required partitions.
- committed patch for setting default value of lto-min-partition to 10000.
b) TCWG-528 (1/10)
- Patch: http://people.linaro.org/~prathamesh.kulkarni/patch_increase_alignment.diff
- Cross tested on arm*-*-*, aarch64*-*-* and bootstrapped and tested
on aarch64-linux-gnu
- I want to cross test once for ppc64 since that's also affected.
c) TCWG-548 (4/10)
- Patch: http://people.linaro.org/~prathamesh.kulkarni/patch-vars-3.diff
- Cross tested for arm*-*-* and aarch64*-*-*
* TCWG-319 (2/10)
- Comparing diff's of vect for arm and armeb shows, armeb not
supporting unaligned access
- Looking thru arm backend code to see why this happens.
* Validation (1/10)
- Script to build chromium
* Misc (1/10)
- Looked at PR70848, PR60172
- Meetings
== Next Week ==
LTO: section anchors, increase_alignment pass
TCWG-319: Continue investigation
Validation: Try to get the script merged to tcwg-buildapp repo.
# Progress #
* TCWG-466, ADRL pseudo instruction support in integrated assembler. I
couldn't find a way of putting ADRL into the assembler in a
maintainable way. Managed to work out a pretty close approximation of
ADRL in a macro so I added it to upstream PR. Put the results of the
my investigations into TCWG-466. Agreed with Renato's initial
diagnosis of won't fix.
* TCWG-468, Transform LDR rn, =expr pseudo instruction into MOV. I'm
more hopeful with this one. I've got a prototype that delays the
emission of the constant pool entry to a point where the
transformation can occur.
* Try out the build and push scripts. Had a frustrating day of chasing
down missing dependencies from my Ubuntu 12.04 machine while building
lldb. Should be resolved now.
# Plan #
* UK national holiday on Monday.
* Continue with TCWG-468. I've got a tablegen prototype that treats
LDR rd,= as a real pseudo instruction. Need to finish Thumb and
Thumb2. Next step after that is to do the transformation to MOV.
* Will spend any other time investigating LLD
# Progress #
* TCWG-518, range stepping on arm-linux. Rebase my patches, and choose
a different approach which is better. However, GDBserver crashes in
some cases, and I am investigating the crash. [5/10]
* TCWG-547, make some progress on the upstream discussion. We agree to
do it in a cleaner way but some GDB internal interface needs some
changes. [2/10]
* Read some articles about exception handling, this one is quite useful,
https://gcc.gnu.org/ml/gcc/2002-07/msg00391.html [1/10]
* Meeting, upstream patch review. [2/10]
# Plan #
* TCWG-518, TCWG-547
--
Yao
