- linaro-toolchain - lists.linaro.org

[ACTIVITY] 14-17 December 2015

by Christophe Lyon

* 1 day off (Friday) (2/10) == Progress == * Validation: (2/10) - improvements to the comparison scripts - updated ABE stable and staging branches * GCC: (3/10) - TCWG-484: sent a new version of the patch to address problems with the testsuite and target attributes. - TCWG-485/PR68620: WIP, trying to understand the regressions introduced by my patch * Misc (conf calls, meetings, emails, ...) (3/10) == Next == Holidays until next year

9 years, 6 months

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Linaro-binutils release git tags

by Virendra Kumar Pathak

Hi All, As per release notes, linaro_binutils-2_25-2015_01-2_release should be present at http://git.linaro.org/toolchain/binutils-gdb.git. But I am not able to see any "linaro_binutils" tags on https://git.linaro.org/toolchain/binutils-gdb.git/tags. Am I doing any mistake? or on git it is renamed to something else (same as FSF binutils tags?). Apology for asking such a trivial question. Thanks for your time. -- with regards, Virendra Kumar Pathak

9 years, 6 months

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[ANNOUNCE] Linaro GCC 5 2015.12 snapshot

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.12 snapshot of the Linaro GCC 5 source package. This monthly snapshot[1] is based on FSF GCC 5.3+svn231642 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2015.11 stable [1] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 5.3+svn231642 * Backport of [Bugfix] [AArch32] 1/4 PR63870 Add qualifiers for NEON builtins * Backport of [Bugfix] [AArch32] 2/4 PR63870 Mark lane indices of vldN/vstN with appropriate qualifier * Backport of [Bugfix] [AArch32] 3/4 PR63870 Remove error for invalid lane numbers * Backport of [Bugfix] [AArch32] 4/4 PR63870 Remove xfails for ARM targets * Backport of [Bugfix] [AArch32] PR67305, tighten neon_vector_mem_operand on eliminable registers * Backport of [Bugfix] [AArch32] remove unused variable * Backport of [Bugfix] [AArch64] PR 63304 Fix issue with global state * Backport of [Bugfix] [AArch64] PR63304 Handle literal pools for functions > 1 MiB in size * Backport of [Bugfix] [AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check * Backport of [Bugfix] [AArch64] PR rtl-optimization/67218 * Backport of [Bugfix] PR 56036 fix typo in doc * Backport of [Bugfix] PR rtl-optimization/68236: Exit early from autoprefetcher lookahead if not in haifa sched * Backport of [Bugfix] PR tree-optimization/68234 Improve range info for loop Phi node * Backport of [AArch32] 1/4 Change GET_MODE_INNER to always return a non-void mode * Backport of [AArch32] 2/3 Make if_neg_move and if_move_neg into insn_and_split * Backport of [AArch32] 2/4 Control the FMA steering pass in tuning structures rather than as core property * Backport of [AArch32] 3/3 Expand mod by power of 2 * Backport of [AArch32] 3/4 Replace the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m) * Backport of [AArch32] 4/4 Fix - Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION * Backport of [AArch32] 4/4 Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION * Backport of [AArch32/AArch64] 2/2 Add a new Cortex-A53 scheduling model * Backport of [AArch32] Add missing v8a cpus to the t-aprofile file * Backport of [AArch32] Fix checking RTL error in cortex_a9_sched_adjust_cost * Backport of [AArch32] Fix for testcase after r228661 * Backport of [AArch32] Initialise cost to COSTS_N_INSNS (1) and increment in arm rtx costs * Backport of [AArch32] libgcc: include crtfastmath * Backport of [AArch32] Unified assembler in ARM state * Backport of [AArch64] 1/2 Give AArch64 ROR (Immediate) a new type attribute * Backport of [AArch64] 1/2 Rename SYMBOL_SMALL_GOT to SYMBOL_SMALL_GOT_4G * Backport of [AArch64] 1/2 Rename test source file for reuse * Backport of [AArch64] 1/3 Add the option -mtls-size * Backport of [AArch64] 1/3 Expand signed mod by power of 2 using CSNEG * Backport of [AArch64] 2/2 Implement -fpic for -mcmodel=small * Backport of [AArch64] 2/2 Implement TLS IE for tiny model * Backport of [AArch64] 2/3 Rename SYMBOL_TLSLE to SYMBOL_TLSLE24 * Backport of [AArch64] 3/3 Implement local executable mode for all memory model * Backport of [AArch64] Add initial qualcomm support * Backport of [AArch64] Add missing entries in iterator vwcore * Backport of [AArch64] Cleanup whitespace in aarch64.c * Backport of [AArch64] Cortex-A57 Choose some new branch costs * Backport of [AArch64] Define TARGET_UNSPEC_MAY_TRAP_P * Backport of [AArch64] Distinct costs for sign and zero extension * Backport of [AArch64] Do not ICE after apologising for -mcmodel=large -fPIC * Backport of [AArch64] Don't allow -mgeneral-regs-only to change the .arch assembler directives * Backport of [AArch64] Don't transform sign and zero extends inside mults * Backport of [AArch64] Fall back to -fPIC if no support of -fpic in binutils * Backport of [AArch64] Fix for branch offsets over 1 MiB * Backport of [AArch64] Fix ICE on (const_double:HF 0.0) * Backport of [AArch64] Fix insn types * Backport of [AArch64] Fix output assembly bug under TLSIE ILP32 * Backport of [AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate * Backport of [AArch64] Mark GOT related MEM rtx as const to help RTL loop IV * Backport of [AArch64] Properly handle simple arith+extend ops in rtx costs * Backport of [AArch64] Rename SYMBOL_SMALL_GOTTPREL to SYMBOL_SMALL_TLSIE * Backport of [AArch64] Restrict pic-small.c by new test directive * Backport of [AArch64] Tighten direct call pattern for sibcall to repair -fno-plt * Backport of [AArch64] Tighten direct call pattern to repair -fno-plt * Backport of [Testsuite] [AArch32] Fix thumb2-slow-flash-data.c failures * Backport of [Testsuite] [AArch32] Switch ARM to unified asm * Backport of [Testsuite] [AArch64] Add more TLS local executable testcases * Backport of [Testsuite] [AArch64] Check branch types for noplt testcases * Backport of [Testsuite] [AArch64] Fix gcc.target/aarch64/vclz.c * Backport of [Testsuite] [AArch64] Fix some target attribute inlining tests for -fPIC * Backport of [Testsuite] [AArch64] Restrict got_mem_hoist_1.c with small memory model * Backport of [Testsuite] [AArch64] Skip tiny and large code model on gcc.target/aarch64/pic-small.c * Backport of [Testsuite] Add --param sra-max-scalarization-size-Ospeed to sra-12.c * Backport of [Testsuite] Fix target selector in gcc.target/i386/noplt-[1234].c testcases * Backport of [Misc] Allow sibcalls in no-PLT PIC * Backport of [Misc] Eliminate PLT stubs for specified external functions via -fno-plt * Backport of [Misc] Fix for ICE with -g on testcase with incomplete types * Backport of [Misc] Fix memory leak and wrong invariant dependence computation in IVOPT * Backport of [Misc] Improve rtl loop inv cost by checking if the inv can be propagated to address uses * Backport of [Cleanup] [AArch32/AArch64] fix ChangeLog * Backport of [cleanup] [AArch32] Remove uses of CONST_DOUBLE_HIGH/LOW * Backport of [Cleanup] [AArch64] Delete aarch64_symbol_context which is not used * Backport of [cleanup] [AArch64] Move iterators from atomics.md to iterators.md * Backport of [cleanup] [AArch64] Remove uses of CONST_DOUBLE_HIGH, CONST_DOUBLE_LOW * Backport of [Doc] [AArch64] Document several AArch64-specific test directives Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed.

9 years, 6 months

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[ACTIVITY] 7 Nov - 11 Nov 2015

by Kugan

== Progress == - LTO (8/10) * Looked at ipa-cp * Read LTO papers * Started with ipa-vrp experiment * Reproduced spec2006 issues - Misc (2/10) * gcc/bug list * LuaJIT == Plan == * LTO

9 years, 6 months

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[ACTIVITY] 7th-11th December

by Bernie Ogden

Centralised benchmark source - TCWG-354 [6/10] * Understood CoremarkPro run rules/behaviour better * Experimented with shortening runs while still giving meaningful results * Cleaned up build/run scaffolding Port to microinstance - TCWG-432 [1/10] * Got access to microinstance, learned a bit about SSL in the process Backport benchmarking - TCWG-352 [2/10] * Fixed 'build with sysroot' code for current deliverable shape * Fixed a problem with multiple manifests =Plan= Review, test, debug build-triggers-benchmark job Finish off Coremark Pro integration Review security with shared uinstance/main instance code Expose more data, benchmarks to bundles Debug/test Jenkins job in microinstance Create bootable image for at least 1 target, or know what the problems are Write up noise control report (if time) More support for SPEC-on-Android? =Absence= Holiday 22nd December - 1st January

9 years, 6 months

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[ACTIVITY] 7 Nov - 11 Nov 2015

by Prathamesh Kulkarni

== This Week == * TCWG-72 (2/10) - Another iteration. * LTO (4/10) - Building spec with different combinations of -flto -flto-partition -flto-compression-level - Builds cleanly on AArch64, ICE's on ARM for 447.dealII with -flto - Looked at segfault with 483.xalanpack * TCWG-319 benchmarking (1/10) - fp benchmark results on: r1-a12: -0.04 % cortex-a53: -0.09 % cortex-a57: -0.14% - int benchmarks completed running for reference revision on cortex-a15 - int benchmarks with-patch runnning on cortex-a15 * TCWG-310 benchmarking (1/10) - r1-a12: 0.11% - Benchmark jobs failed on a53, a57. * Misc (2/10) - Submitted patch to fix building 450.soplex - Looked at how to write ipa pass, ipa-pure-const and ipa-cp. - Meetings == Next Week == - tcwg-319, tcwg-310 benchmarking - tcwg-72 - LTO

9 years, 6 months

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[Weekly] 07-11 December 2015

by Michael Collison

== This week == * Bugzilla 68543 - [AArch64] Implement overflow arithmetic standard names (7/10) - Implemented signed and unsigned add, subtract, and multiply overflow standard patterns - Investigated testing of overflow patterns * Misc (3/10) - Conference calls - Misc ARM Housekeeping - Lost connectivity due to old ARM Unix VPN Client == Next week == * TCWG-317 - Exploit wide add operations when appropriate for Aarch32 - Minor code update to address upstream comment * Vacation until rest of year

9 years, 6 months

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[ACTIVITY] 7-11 December 2015

by Christophe Lyon

== Progress == * GCC (4/10) - pr68620 (fp16 transfers in big-endian mode) - checking regressions observed on trunk - had to revert my cleanup patch for target attributes tests, not sure how to handle all possible combinations of options/defaults * Validation (1/10) - small improvements in reporting * Misc (conf calls, meetings, emails, ...) (3/10) * Internal training (2/10) == Next == * Validation * GCC: bug fixes/cleanup

9 years, 6 months

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[ACTIVITY] Dec 7 - 11, 2015

by Yao Qi

* One day off on Wed. [2/10] # Progress # * Enable gdb core file tests when testing remotely, TCWG-171. I've almost had the conclusion that corefile remote testing can't be done due to limitations in dejagnu and nfs mount testing infrastructure. Need to write them down. [2/10] * Mutli-arch follow-up work, teach AArch64 GDBserver understand ARM breakpoint instructions. TCWG-460. Done. [3/10] * Review ARM GDBserver software single step patch V7. Almost OK, except some small things. [2/10] * Misc, meeting, email, [1/10] # Plan # * TCWG-424, Draft a fix for the fail in random-signal.exp. * TCWG-156, GDB test parity between AArch64 and X86_64. * One day off on Wed. or Fri. Planned absence: * Dec 24-Jan 3. -- Yao

9 years, 6 months

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[ACTIVITY]

by Renato Golin

== Progress == * Holiday (2/10) * Release (1/20) - 3.7.1 Final, all green * Maintenance (5/10) - Fixing PR25720 - Bug cleaning: PR18921, PR13259, PR13138, PR12926, PR17963, PR18187, PR22692 - Checked strided vectorizer on ToT, EEMBC 2x geomean! * Background (2/10) - Code review, meetings, discussions, general support, etc. - Power cut, restarting bots, testing TK1, plans, etc. == Holidays == I'll be back on the 5th Jan.

9 years, 6 months

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[ACTIVITY] Nov 30 - Dec 4, 2015

by Kugan

== Progress == - PR66726 (2/10) * Testing a patch - PR63586 (2/10) * Posted a patch * Revised the patch based on testing - LuaJIT (2/10) * Setup nginx * Still haven't figured out how to use mongodb with nginx (config required). - Misc (2/10) * gcc/bug list * LTO - sick (2/10) == Plan == * bug reports * LTO

9 years, 7 months

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incomplete .arch specifiers with latest Linaro gcc5 patches on armv8?

by Robert Schiele

Hi, when working with the Linaro patches I found that a particular commit breaks our aarch64 kernel build. The patch in question is that one: commit be09330da9d0777c4a58568d137e3f8a3dbe0a0b Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Tue Oct 27 21:18:19 2015 +0100 One of the things it attempts to change apparently is moving the .arch specifiers in the assembler file from a global scope to individual functions. What also happens though is that they seem to lose some information after that transformation. I observed that when building arch/arm64/crypto/aes-ce-cipher.c from the Linux kernel. This code contains inline assembly like this: static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[]) { struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm); struct aes_block *out = (struct aes_block *)dst; struct aes_block const *in = (struct aes_block *)src; void *dummy0; int dummy1; kernel_neon_begin_partial(4); __asm__(" ld1 {v0.16b}, %[in] ;" " ld1 {v1.2d}, [%[key]], #16 ;" " cmp %w[rounds], #10 ;" " bmi 0f ;" " bne 3f ;" " mov v3.16b, v1.16b ;" " b 2f ;" "0: mov v2.16b, v1.16b ;" " ld1 {v3.2d}, [%[key]], #16 ;" "1: aesd v0.16b, v2.16b ;" " aesimc v0.16b, v0.16b ;" "2: ld1 {v1.2d}, [%[key]], #16 ;" " aesd v0.16b, v3.16b ;" " aesimc v0.16b, v0.16b ;" "3: ld1 {v2.2d}, [%[key]], #16 ;" " subs %w[rounds], %w[rounds], #3 ;" " aesd v0.16b, v1.16b ;" " aesimc v0.16b, v0.16b ;" " ld1 {v3.2d}, [%[key]], #16 ;" " bpl 1b ;" " aesd v0.16b, v2.16b ;" " eor v0.16b, v0.16b, v3.16b ;" " st1 {v0.16b}, %[out] ;" : [out] "=Q"(*out), [key] "=r"(dummy0), [rounds] "=r"(dummy1) : [in] "Q"(*in), "1"(ctx->key_dec), "2"(num_rounds(ctx) - 2) : "cc"); kernel_neon_end(); } Now without this patch the compiler behaved like the following. It was invoked with: aarch64-linux-gnu-gcc -Wp,-MD,arch/arm64/crypto/.aes-ce-cipher.o.d -nostdinc -isystem /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/bin/../lib/gcc/aarch64-linux-gnu/5.2.1/include -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/include -Iarch/arm64/include/generated/uapi -Iarch/arm64/include/generated -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include -Iinclude -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/include/uapi -Iarch/arm64/include/generated/uapi -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include/uapi -Iinclude/generated/uapi -include /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include/linux/kconfig.h -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/crypto -Iarch/arm64/crypto -D__KERNEL__ -mlittle-endian -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -std=gnu89 -mgeneral-regs-only -fno-delete-null-pointer-checks -O2 --param=allow-store-data-races=0 -Wframe-larger-than=2048 -fno-stack-protector -Wno-unused-but-set-variable -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-var-tracking-assignments -g -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fconserve-stack -Werror=implicit-int -Werror=strict-prototypes -Werror=date-time -DCC_HAVE_ASM_GOTO -Werror -march=armv8-a+crypto -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(aes_ce_cipher)" -D"KBUILD_MODNAME=KBUILD_STR(aes_ce_cipher)" -c -o arch/arm64/crypto/aes-ce-cipher.o /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/crypto/aes-ce-cipher.c As a result it created a file for the assembler with the global .arch armv8-a+fp+simd+crypto at the beginning of the file. After the patch it created individual .arch armv8-a at individual places. It is not clear to me, why the extensions (fp+simd+crypto) got lost. Is that intended, such that the code needs special adaption for inline assembly using those extensions or is that loss of extensions a bug of that patch? Greetings! Robert

9 years, 7 months

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[ACTIVITY] Week 48

by Yvan Roux

== Progress == o Linaro GCC (6/10) * More backports * Compared our various flavor of validation results * Looked at bug reports and mailing list questions on our last snapshot. o Upstream work (2/10) * Continue on sanitizing gfortran testsuite o Misc (2/10) * Various meetings * Discussed benchmarking infra with Bernie == Plan == o GCC 5.3 branch merge o Continue on-going tasks o Tuesday Off

9 years, 7 months

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[ACTIVITY] 30th November - 4th December

by Bernie Ogden

Holiday [2/10] Port to microinstance - TCWG-432 [1/10] * Set up reporting for CPU2006 * Learned how to generate metadata, but not how to use it Trigger benchmarks on backports - TCWG-352 [2/10] * Figured out the rough shape * Created, didn't test, rough implementation TCWG-354 [3/10] * Build/run scaffolding for CoreMark Pro * Working for manual runs Misc [2/10] * Input validation for dispatcher script * Meeting with Ade on LAVA benchmarking * Meetings/mail/etc =Plan= Review, test, debug build-triggers-benchmark job Check CoreMark Pro run configuration, enable for automatic runs Review security with shared uinstance/main instance code Expose more data, benchmarks to bundles Debug/test Jenkins job in microinstance Create bootable image for at least 1 target, or know what the problems are Write up noise control report (if time) More support for SPEC-on-Android?

9 years, 7 months

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[ACTIVITY] 30 Nov to 4 Dec 2015

by Prathamesh Kulkarni

* TCWG-72 (2/10) - Added new target hook to generate target-specific divmod libfunc - Builds cleanly now on x86_64, arm and arm-linux-gnueabihf - Sent to tcwg list for review * LTO spec2k6 build (2/10) - Built speck26 with LTO * Target hook (4/10) - Completed with ASM_OUTPUT_LABEL_REF - In progress - SIZE_ASM_OP to data hook, ASM_OUTPUT_SIZE_DIRECTIVE, ASM_OUTPUT_MEASURED_SIZE * Benchmarking (1/10) - tcwg-319: Job in progress for fp benchmarks with patch - tcwg-310 (loop peeling): Submitted job for running 252.eon - Both the jobs failed due to lab downtime, need to be re-run. - Received job template from Bernie for running benchmarks on cortex-a15. * Misc (1/10) - Meetings == Next Week == - Continue benchmarking spec2k6 with LTO - Look at bugs exposed by speck2k6 LTO build - Benchmarking tcwg-319, tcwg-310

9 years, 7 months

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[Weekly] 30 November - 4 December 2015

by Michael Collison

== This week == * TCWG-317 - Exploit wide add operations when appropriate for Aarch32 (0/10) - No comments/review upstream will ping for update * TCWG-316 - Exploit vector multiply by scalar instructions (4/10) - Code improvements will require standard name for vectorizer and new patterns - On hold until GCC 6 is released * Bugzilla 68543 - [AArch64] Implement overflow arithmetic standard names (3/10) - Initial investigation * Bugzilla 68532 - [ARM] Incorrect code result on arm big endian (2/10) - Investigation into understanding how vectorizer represents lanes vs arm big endian back end - Solution suspended until I can coordinate with Charlie * Misc (1/10) - Conference calls == Next week == * Bugzilla 68543 - Implement add and subtract overflow operations and test * TCWG-317 - Ping upstream and respond to upstream feedback * Bugzilla 68532 - Coordinate with Charlie

9 years, 7 months

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[ACTIVITY]

by Renato Golin

== Progress == * Ill (4/10) * Support (1/10) - Bugzilla issues (PR20490, PR24635, PR24350, PR20025, PR25720, PR25722) * Benchmarks (1/10) - Checking some previous benchmark results on A57 * Buildbots (2/10) - Getting AArch64 full bot back to rotation, since it's stable now - Re-enabling libc++ prototypes on local master - Bisecting broken test-suite - Another power cut in the office sent all the bots down... :( * Background (2/10) - Code review, meetings, discussions, general support, etc. - Validating some old sanitizer bugs - FOSDEM admin

9 years, 7 months

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[ACTIVITY] 30th Nov - 04th Dec

by Yao Qi

* One day off on Monday. # Progress # * Answer ST questions about supporting multi-arch with ST jtag probe. [1/10] * TCWG-171, Enable gdb core file tests when testing remotely, [3/10]. Ongoing. * Run gdb.base/sizeof.exp with board having gdb,noinferiorio. Done. [1/10] * TCWG-460, mutli-arch follow-up work, teach AArch64 GDBserver understand ARM breakpoint instructions. Patch is approved. [2/10]. * TCWG-424, fail in gdb.base/random-signal.exp. [1/10] Root cause is identified, need to figure out how to fix it in next step. * Review ARM GDBserver software single step patch V4. # Plan # * TCWG-171, TCWG-156, TCWG-424. * Review ARM GDBserver software single step patch V5, which should be the final version, I hope. -- Yao

9 years, 7 months

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[ACTIVITY] Nov 30- Dec 4, 2015

by Christophe Lyon

== Progress == * Validation - a few cleanup patches in the comparison scripts - contribute to debug of ptys allocation problems: the tests pass when executed outside of our schroots. - improvements in the reports from the validation done in the ST Compute Farm - reported a few regressions * GCC - cleanup patch for target attributes tests, - pr68620 (fp16 transfers in big-endian mode) * Misc (conf calls, meetings, emails, ....) == Next == * Validation: monitoring, improvements * GCC: bug fixes, cleanup

9 years, 7 months

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GNU GCC development plan and its interaction with Linaro

by Virendra Kumar Pathak

Hi Linaro Toolchian Group, I am new to GCC development and have some basic question on its development process. Could you please give some insight on below questions. (Apology if they are very trivial). I have read https://gcc.gnu.org/develop.html If I am correct, gcc trunk is on gcc 6.0.0 (stage 3) at present and will becomes 6.0.1 (regression fix only) in January 2016. gcc 6.0.1 will be released as gcc 6.1.0 in April, 2016 and from there onwards gcc 6 release branch will start. However, There is also a gcc 5 branch in parallel whose current version is 5.2.1 and will be released as gcc 5.3 soon. Hopefully gcc 5.3 would be the last release in gcc 5 series. (Please correct me if I am wrong). [Questions] 1. What is the difference between experimental(gcc 6.0.0 stage 3) & gcc release branch (gcc 5.2.1)? Is there any rule which decides which changes will go where? In case, I have some patches for new aarch64 processor at present, in which branch these changes would be merged (assuming they passes reviews)? 2. How is the subversion of release branches are decided? Is it correct to say that there will be always 3 subversion of any release branch (e.g. gcc 5.1, gcc 5.2 & gcc 5.3)? 3. What is the working model between GNU GCC and Linaro GCC? Does Linaro directly accept patches? or they need to go to GNU GCC first? Thanks in advance for your time. with regards, Virendra Kumar Pathak -- with regards, Virendra Kumar Pathak

9 years, 7 months

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Fwd: Lost upstream patch in merge from gcc-5-branch to linaro/gcc-5-branch

by Robert Schiele

Keeping linaro-toolchain in the loop. Robert ---------- Forwarded message ---------- From: Robert Schiele <rschiele(a)gmail.com> Date: Thu, Dec 3, 2015 at 4:44 PM Subject: Re: Lost upstream patch in merge from gcc-5-branch to linaro/gcc-5-branch To: Yvan Roux <yvan.roux(a)linaro.org> Hi Yvan, On Thu, Dec 3, 2015 at 1:25 PM, Yvan Roux <yvan.roux(a)linaro.org> wrote: > This fix on gcc-5-branch doesn't apply on Linaro 5 branch, because we > have backported trunk revision 222624 (which renames maybe_fma to > coumpound_p) into it. So, our branch as the same code as trunk one > regarding aarch64_rtx_costs. Do you experiment any issues related to > this change ? No issues. This was just a theoretical thought and through our CI build I learned exactly what you just told me the hard way now. Sorry for the noise. Robert

9 years, 7 months

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Bug: Linaro ABE abe.sh doesn't allow timeout > 10 seconds

by Christopher Roberts

abe.sh in the ABE framework accepts a parameter to set the wget timeout when it fetches snapshots (default 10s); however that parameter has an upper threshold of 10 seconds (condition at line 996 only sets timeout to specified value if < 11). Is this intentional? It seems like it would make more sense to give it a floor instead of a ceiling or perhaps not limit the range of potential values at all. Best regards, Chris Roberts

9 years, 7 months

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why ld.so in arm-linux-gnueabihf- toolchains search so many paths ?

by Barry Song

hi guys, sorry maybe my question is stupid as i am not a toolchain guy. i have no idea why ld.so search so many paths. for example, put "-rpath" with /home/cnb1szh/test in a simple test program. then during dynamic linking at runtime, we get the below linking debug information: 30693: find library=libmytest.so [0]; searching 30693: search path=/home/cnb1szh/test/tls/v7l/neon/vfp:/home/cnb1szh/test/tls/v7l/neon:/home/cnb1szh/test/tls/v7l/vfp:/home/cnb1szh/test/tls/v7l:/home/cnb1szh/test/tls/neon/vfp:/home/cnb1szh/test/tls/neon:/home/cnb1szh/test/tls/vfp:/home/cnb1szh/test/tls:/home/cnb1szh/test/v7l/neon/vfp:/home/cnb1szh/test/v7l/neon:/home/cnb1szh/test/v7l/vfp:/home/cnb1szh/test/v7l:/home/cnb1szh/test/neon/vfp:/home/cnb1szh/test/neon:/home/cnb1szh/test/vfp:/home/cnb1szh/test (RPATH from file ./hello) 30693: trying file=/home/cnb1szh/test/tls/v7l/neon/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/v7l/neon/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/v7l/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/v7l/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/neon/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/neon/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/tls/libmytest.so 30693: trying file=/home/cnb1szh/test/v7l/neon/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/v7l/neon/libmytest.so 30693: trying file=/home/cnb1szh/test/v7l/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/v7l/libmytest.so 30693: trying file=/home/cnb1szh/test/neon/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/neon/libmytest.so 30693: trying file=/home/cnb1szh/test/vfp/libmytest.so 30693: trying file=/home/cnb1szh/test/libmytest.so but we don't have /home/cnb1szh/test/tls/, /home/cnb1szh/test/v7l/, /home/cnb1szh/test/vfp/, /home/cnb1szh/test/neon/, why does the ld.so search so many paths? -barry

9 years, 7 months

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Lost upstream patch in merge from gcc-5-branch to linaro/gcc-5-branch

by Robert Schiele

Hi, I found that with the merge commit ac19ac6481a3f326d9f41403f5dadab548b2c8a6 Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Sep 16 10:57:42 2015 +0200 Merge branches/gcc-5-branch rev 227732. Change-Id: I2f59904b28323b1c72a8cf1bd62c9e460d95bcea the following branch that was within merge range on gcc-5-branch was lost on the linaro branch: commit b45a5cf7c1544f95578e823e25402b58fb3fbedd Author: nsz <nsz@138bc75d-0d04-0410-961f-82ee72b054a4> Date: Tue Aug 4 16:49:54 2015 +0000 Fix broken backport patch. gcc: Backport from mainline: 2015-08-04 Szabolcs Nagy <szabolcs.nagy(a)arm.com> PR target/66731 * config/aarch64/aarch64.c (aarch64_rtx_costs): Fix NEG cost for FNMUL. (aarch64_rtx_mult_cost): Fix MULT cost with -frounding-math. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@226588 138bc75d-0d04-0410-961f-82ee72b054a4 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 691874b..eebc9c3 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -5250,7 +5250,7 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed) which case FNMUL is different than FMUL with operand negation. */ bool neg0 = GET_CODE (op0) == NEG; bool neg1 = GET_CODE (op1) == NEG; - if (compound_p || !flag_rounding_math || (neg0 && neg1)) + if (maybe_fma || !flag_rounding_math || (neg0 && neg1)) { if (neg0) op0 = XEXP (op0, 0); Since this was a fix to the patch one commit ahead and also merged in the same operation and there is no further comment on why this fix was skipped, may I assume that this happened by accident and you probably want to fix that merge flaw by reapplying the missing patch? Or is there an information detail I don't have that requires this fix to be skipped on the Linaro branch? Robert

9 years, 7 months

2
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[ACTIVITY] 23rd - 27th November

by Bernie Ogden

Controlled image builds - TCWG-360 [1/10] * Tried, failed to generate bootable images Jenkins benchmarking job - TCWG-348 [5/10] * Jenkins job functional on kvms in main instance * Wrote job-dispatch script for non-Jenkins use cases Juno crashdump [1/10] * Struggled with, worked around network problems * Juno running, waiting for it to crash SPEC-on-Android [1/10] * Helped Qian to find root cause of a problem Misc [2/10] =Plan= Review security with shared uinstance/main instance code Expose more data, benchmarks to bundles Debug/test Jenkins job in microinstance Create bootable image for at least 1 target, or know what the problems are Write up noise control report (if time) Probably more support for SPEC-on-Android

9 years, 7 months

1
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