Progress:
- Read up on AARCH64 TLS and LLD code base
- Commented on upstream patch in hope of getting approval from the code-owners
- TCWG-466 Implement ADRL pseudo in LLVM assembler
-- Slow progress as the pseudo instruction does not fit well into the
existing architecture
-- On the positive side I have learned quite a bit about how the LLVM
assembler works
-- Will make a decision next week whether it is worth actively
pursuing TCWG-466. Supporting ADRL is not high priority and whatever
fix I come up with may be difficult to get accepted upstream. I'd
still like to keep trying, at least as a background task, but I think
that there is higher priority work that can be done instead.
Next Week:
On holiday (hopefully added correctly to Linaro google calendar). I'll
be at the ACCU conference.
== Progress ==
* Validation
- finally identified what caused several random results: use of 'ssh
-tt' to acces the remote tester. I don't know the real cause.
* GCC
- reported a few regressions in trunk
- a few backports
- AdvSIMD intrinsics tests: built the list of AArch64 intrinsics not
yet covered
- support on a few bug reports
* Misc (conf-calls, meetings, emails, ....)
== Next ==
* Holidays Mon/Tue/Wed
* Validation
- consolidation on stdout/stderr problems
- extended validation
* GCC:
- trunk monitoring, report regressions if needed
- start monitoring the just-created gcc-6 branch
- more intrinsics tests
- switch backport activity to gcc-6 branch, update tools, etc...
# Progress #
* TCWG-545, 7 patches are approved, and 1 patch needs update, which
needs the change somewhere else. [3/10]
* TCWG-547, patch is pending. Pinged Pedro on IRC, to be reviewed, but
no response.
* TCWG-167, [3/10]. ARM reverse debugging fixes. Post one patch to fix
test case. Testing another patch to give high priority of epilogue
unwinder.
* Upstream patch review, [2/10]. Spend more time on this due to long
patch review backlog. The more I reviewed, the sooner my patches will
be reviewed by others.
* Misc, [2/10]
** Look at the slowness of gdb regression test in jekins validation, but
can't reproduce it.
** Share some knowledge of watchpoint implementation in GDB to the
people, who need the equivalent or similar things in LLDB.
# Plan #
* TCWG-545, TCWG-547, TCWG-167.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.04 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn234898 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.05
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn234898
* Backport of [Bugfix] [AArch32] Fix PR target/70496
* Backport of [Bugfix] [AArch32] PR driver/70132: Avoid double fclose
in driver-arm.c
* Backport of [Bugfix] [AArch32] PR rtl-optimization/69904: Disallow
copying/duplicating of load-exclusive operations
* Backport of [Bugfix] [AArch32] PR target/62254 Fix for ARMv3
* Backport of [Bugfix] [AArch32] PR target/69614
* Backport of [Bugfix] [AArch32] PR target/70566 Check that condition
register is dead in tst-imm -> lsls-imm Thumb2 peepholes
* Backport of [Bugfix] [AArch32] PR testsuite/70553
* Backport of [Bugfix] [AArch64] PR rtl-optimization/70398 LRA
* Backport of [Bugfix] PR 69400: Invalid 128-bit modulus result
* Backport of [Bugfix] PR middle-end/70370
* Backport of [AArch32] 1/2 Cortex-R8 support
* Backport of [AArch32] Add initial support for the Cortex-A32
* Backport of [AArch32] Add support for Cortex-A35
* Backport of [AArch32] Delete ASM_OUTPUT_DEF and fall back to default
.set directive
* Backport of [AArch64] 1/3 Enable CRC by default for armv8.1-a
* Backport of [AArch64] 2/3 Rework the code to print extension strings (pr70133)
* Backport of [AArch64] 3/3 Fix up for pr70133
* Backport of [AArch64] [ACLE][NEON] Implement vcvt*_s64_f64 and
vcvt*_u64_f64 NEON intrinsics
* Backport of [AArch64] Add extra tuning parameters for target processors
* Backport of [AArch64] Add support for Cortex-A35
* Backport of [AArch64] Only update assembler .arch directive when necessary
* Backport of [Testsuite] [AArch32] 2/2 Cortex-R8 support
* Backport of [Testsuite] [AArch64] PR target/70113 fix pr63304_1 testcase
* Backport of [Testsuite] [AArch64] Skip
gcc.target/aarch64/assembler_arch_1.c if assembler does not support it
* Backport of [Testsuite] Avoid GDB being blocked on signals
* Backport of [Testsuite] Fix testsuite for Cortex-R8 support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
== Progress ==
* Type promotion pass (2/10)
- Benchmarking
* LTO (7/10)
- Refactoring tree-vrp to share common parts
- Looking at open enhancement bugzilla and working on them
* Misc (1/10)
- GCC Lists
== Plan ==
* LTO and VRP
== Progress ==
LLDB Buildbot Setup [TCWG-241] [9/10]
-- Migration of local master/slave setup to Linaro LLVM lab.
-- Setup slave to be able to connect to chromebook for lldb remote testing.
-- Modified Android build scripts to work with chromebook in llvm lab.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
LLDB Buildbot Setup [TCWG-241]
-- Write a new factory for linux based lldb script commands
-- Break down and tweak scripts with better logical steps.
-- Migrate current setup to use new factory.
LLDB development [TCWG-563]
-- Look into failing tests on chromebook tester and see if some of
them can be fixed.
== Progress ==
o Extended validation (5/10)
* Dejagnu remote layout patch finalized and committed upstream
(will be part of the coming 1.6 Dejagnu release)
* GCC guality test fix committed in trunk.
* Native armv8l validation unblocked, but still slow (more than 8hrs)
Analysis on-going.
* Start to work on enhancement:
include cross validation and benchmark trigger.
o Misc (5/10)
* Lot of meetings (Internal, training, Benchmarking, ...)
== Plan ==
o Monthly snaphsot (review backports, branch merge)
o Continue on extended validation
o GCC ARMv8.1 builtins fix.
== Progress ==
Transition week into Linaro toolchain group from ARM to replace Bernie [*]
- Some ARM handover work done.
- Started looking into https://llvm.org/bugs/show_bug.cgi?id=24350 (TCWG-466
ADRL support)
-- Checked behaviour of ADRL on armasm and GNU as
-- Worked out what I need to do in LLVM to make ADRL work, looks like
nothing hugely complicated but a lot of plumbing through various layers.
- Started reading about AArch64 TLS descriptor implementation. I'm familiar
with the AArch32 traditional model so I need to bridge the gap a bit.
== Plans ==
- Post some review comments on Adhemeval's TLS patch with the hope of
unblocking it.
- Start implementing support for ADRL in the integrated assembler
== Planned Absences ==
Holiday 18th - 22nd April (Attending ACCU conference in Bristol). I think
I've put that in the shared holiday calendar correctly.
[*] Hello to everyone I didn't manage to meet at Linaro Connect. I've been
working in ARM's proprietary compiler team, with much of that time spent on
armlink and the other non-compiler tools.
# Progress #
* TCWG-167, ARM reverse debugging bug fixes. [4/10]
Four patches are committed. All FAILs are fixed if test case is
compiled with -fomit-frame-pointer. Some FAILs when
-fno-omit-frame-pointer are caused by epilogue unwinder doesn't parse
epilogue correctly if FP is involved. File TCWG-562 to track it.
* TCWG-545, TCWG-547, patches are pending. Maintainer is busy on
something else.
* Triage the regression gdb.base/jit.exp. [1/10]
We need a pending patch series to address this issue. Ask Pedro how
to review them.
* TCWG-561, handle unavailable memory during frame unwinding. [3/10]
Think about it and write a prototype.
* Misc, patches review and meeting, [2/10].
# Plan #
* Take a look at the slow native arm-linux-gnueabihf gdb test.
* TCWG-562, Tweak epilogue unwinder to handle FP.
* TCWG-545, TCWG-547, ping.
* TCWG-561, finish the prototype.
--
Yao
My dear friends,
I'm trying to build C++ code for Linux running on am ARM Cortex A8 (TI
AM335x). For a first try, I'm using the simplest program I can think of:
/* main.cpp */
int main() {
return 0;
}
Under Linux with the 'normal' GCC, that works fine, but under Windows 7
with the Linaro toolchain, it fails with the following message:
C:\firedect\dev\workspace\Test-Linux-ARM_1> "\Program Files (x86)\GNU
Tools ARM Embedded\gcc-linaro-4.9-2016.02-i686-ming
w32_arm-linux-gnueabi\bin\arm-linux-gnueabi-g++.exe" main.cpp
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/lib/libstdc++.so:
file format not recognized; treating as linker script
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-4.9-2016.02-i686-mingw32_arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/4.9.4/../../../../arm-linux-gnueabi/lib/libstdc++.so:1:
syntax error
collect2.exe: error: ld returned 1 exit status
C:\firedect\dev\workspace\Test-Linux-ARM_1> "\Program Files (x86)\GNU
Tools ARM Embedded\gcc-linaro-5.3-2016.02-i686-ming
w32_arm-linux-gnueabihf\bin\arm-linux-gnueabihf-g++.exe" main.cpp
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/lib/libstdc++.so:
file format not recognized; treating as linker script
c:/program files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld.exe:c:/program
files (x86)/gnu tools arm
embedded/gcc-linaro-5.3-2016.02-i686-mingw32_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/lib/libstdc++.so:1:
syntax error
collect2.exe: error: ld returned 1 exit status
As you can see, I have tested two versions of the toolchain, which show
the same behavior.
Do you have any idea what's going wrong here? I'd appreciate any help
you can provide!
--
Kind regards,
Gunnar Arndt
Hi list,
I hit another weird problem after use gcc 5.3 (If I use gcc 4.9, there is no any
issue) with android.
With arm gcc 5.3, the C++ apps crash in one class constructor call. And gdb
shows some vtbl items of the class are not relocated.
With arm gcc 4.9, if set breakpoint in that constructor, we could see the vtbl
items of the class are relocated.
And Yes. I know the android bionic loader take response to do relocation. But if
it works with gcc 4.9, I suppose bionic loader work well (unless gcc 5.3 create
some new situation not handled by it).
I attached the vtbl dump in gdb for gcc 5.3 and 4.9 both. We could see all valid
entries in vtbl are relocated in 4.9 dump. But not all entries in vtbl are
relocated in 5.3 dump (the address is not started with 0xf).
Suggestions/hints are welcome. Thanks a lot.
Regards
Yin, Fengwei
On Thu, Mar 31, 2016 at 5:12 AM, fengwei.yin <fengwei.yin(a)linaro.org> wrote:
> Because gcc 4.9 could build this file without any issue, I apply
> --save-temps
> with gcc 4.9. The ii file is attached. Can't see significant differences.
There is a patch in gcc-5 to make unified assembler syntax the
default. Unfortunately, it changes how extended asms work, which is
perhaps a bug. The message claims it doesn't affect extended asms,
but it does.
https://gcc.gnu.org/ml/gcc-patches/2015-11/msg01196.html
The interesting bit is the change to ASM_APP_OFF.
gcc-4.9 emits a .thumb after the extended asm to switch back into
thumb mode just in case. gcc-5.3 instead emits .syntax unified, which
doesn't change the arm/thumb mode, just the syntax supported. This is
arguably a bug, but this doesn't immediately help you. It could take
a little time to get gcc-5.x source fixed, and then the compiler
binary releases. Or alternatively we could fix the asm to work with
gcc 5.
Jim
== Progress ==
o Extended validation (7/10)
* Fixed and improved extended native validation
* Discussed proposed patch in dejagnu on process killing mechanism
* Testing a fix/workaround in GCC guality tests
* Re-implemented and tested fix for dejagnu remote layout
o Misc (3/10)
* Various meetings
== Plan ==
o Continue on extended validation
o Finalize DejaGNU patches, GCC ARMv8.1 builtins fix.
== This week ==
* Bugzilla 69008 - gcc emits unneeded memory access when passing trivial
structs by value (ARM) (3/10)
- Additional investigation and preliminary implementation
* Bugzilla 70089 - ARM/THUMB unnecessarily typecasts some rvalues on
memory store (1/10)
- Investigation
* TCWG-247 - Create Validation Job to run on GCC Trunk Committ (5/10)
- Began writing shell script.
* Misc meeting (1/10)
== Next week ==
* TCWG-247
- Make additional prgoress on prototype
* Bugzilla 69008 - gcc emits unneeded memory access when passing trivial
structs by value (ARM)
- Additional investigation and preliminary implementation
* Bugzilla 70089 - ARM/THUMB unnecessarily typecasts some rvalues on
memory store
- Investigation
* Vacation
- April 8 - April 12
== Progress ==
* Holiday (2/10)
* Support (1/10)
- Reapplying fix for PR16275 (D18701)
- Conclusion is that original approach will be the same as GCC
- Additional flags will have to be agreed upon across compilers
* Buildbot (2/10)
- Setting up LLDB buildbot with Omair
- Precarious infrastructure is unstable, hope it holds on until the
new rack is complete
* Background (5/10)
- Code review, meetings, discussions, general support, etc.
- More team management stuff (access/procedure/meeting with newcomers)
- Planning the lab move, resources, costs, schedule
* Monday off [2/10]
# Progress #
* TCWG-167, ARM reverse debugging bug fixes. [4/10]
Two patches are posted. Two patches are being tested. They fix
207 FAILs (242 -> 35) in gdb.reverse.
* TCWG-545, no progress, patches are pending for review.
* TCWG-547, [2/10]. Write a patch as Pedro suggested, so we have
sense which patch is better. No response.
* Misc, [2/10]
** Upstream discussions on get syscall number on execve exit. Can't
get such thing from kernel side, need to figure out how to do it
in GDB side.
** Investigate a little bit on 32-bit DWARF on AArch64.
# Plan #
* TCWG-167, TCWG-545, TCWG-547
--
Yao
== This Week ==
* LTO (7/10)
a) TCWG-534 (ipa-comdats):
- Patch posted upstream: https://gcc.gnu.org/ml/gcc/2016-03/msg00254.html
- Investigating ICE with patch for comdat-2.C
b) TCWG-128 (branch out of range error):
- Posted patch upstream:
https://gcc.gnu.org/ml/gcc-patches/2016-04/msg00032.html
c) intra-procedural vrp:
- Looking to implement replacement_order algorithm for early vrp from the paper:
https://engineering.purdue.edu/paramnt/publications/1381.pdf
* Validation (2/10)
- Reviews on tcwg-buildapp from Christophe and Maxim
- prototype job ran successfully.
* Misc (1/10)
- Meetings
== Next Week ==
* LTO:
- Try to implement replacement order algorithm for vrp
- Continue investigating ipa-comdats ICE and address upstream comments.
- Gather stats for chromium LTO build
* Validation:
- write script to build chromium
On Wed, Mar 30, 2016 at 6:26 PM, fengwei.yin <fengwei.yin(a)linaro.org> wrote:
> Thanks a lot for your quick response. The .ii file was attached.
In UnwindFromContext, there is an asm that forces the assembler into ARM mode.
if (ucontext == nullptr) {
int ret = (({ unw_tdep_context_t *unw_ctx = (&context_); register unsigned \
long *unw_base asm ("r0") = unw_ctx->regs; __asm__ __volatile__ ( ".align 2\nbx\
pc\nnop\n.code 32\n" "stmia %[base], {r0-r15}\n" "orr %[base], pc, #1\nbx %[ba\
se]" : [base] "+r" (unw_base) : : "memory", "cc"); }), 0);
The ".code 32" puts us in ARM mode.
GCC still thinks that we are in thumb mode though, and continues to
emit thumb instructions, some of which have no arm mode equivalent,
e.g. cbnz and cbz.
I don't see any convenient push/pop for thumb/arm mode. This is
probably a macro expanded into the asm. You could have two versions
of the asm, one that gets used when __thumb__ is defined and one that
gets used when __thumb__ is not defined. The __thumb__ version would
switch back into thumb mode at the end with a ".thumb" pseudo-op.
Or alternatively, don't build with -mthumb.
Jim
Hi folks,
I am trying to use arm gcc 5.3 to build part of android AOSP and hit
following issue with arm gcc 5.3:
The gcc cmd line is like:
/opt/work/acadine/mem_shrink/B2G-v2.5/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-5.3-linaro/bin/arm-linux-androideabi-g++
-I external/libcxx/include -I system/core/libbacktrace -I
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates
-I
out/target/product/linaro_arm/gen/SHARED_LIBRARIES/libbacktrace_intermediates
-I libnativehelper/include/nativehelper -I system/core/base/include -I
external/libunwind/include -isystem system/core/include -isystem
system/media/audio/include -isystem hardware/libhardware/include
-isystem hardware/libhardware_legacy/include -isystem
hardware/ril/include -isystem libnativehelper/include -isystem
frameworks/native/include -isystem frameworks/native/opengl/include
-isystem frameworks/av/include -isystem frameworks/base/include -isystem
out/target/product/linaro_arm/obj/include -isystem
bionic/libc/arch-arm/include -isystem bionic/libc/include -isystem
bionic/libc/kernel/uapi -isystem bionic/libc/kernel/uapi/asm-arm
-isystem bionic/libm/include -isystem bionic/libm/include/arm -c
-fno-exceptions -Wno-multichar -msoft-float -ffunction-sections
-fdata-sections -funwind-tables -fstack-protector -Wa,--noexecstack
-Werror=format-security -D_FORTIFY_SOURCE=2 -fno-short-enums
-no-canonical-prefixes -fno-canonical-system-headers -march=armv7-a
-mfloat-abi=softfp -mfpu=vfpv3-d16 -include
build/core/combo/include/arch/linux-arm/AndroidConfig.h -I
build/core/combo/include/arch/linux-arm/ -Wno-psabi -mthumb-interwork
-DANDROID -fmessage-length=0 -W -Wall -Wno-unused -Winit-self
-Wpointer-arith -Werror=return-type -Werror=non-virtual-dtor
-Werror=address -Werror=sequence-point -DNDEBUG -g -Wstrict-aliasing=2
-fgcse-after-reload -frerun-cse-after-loop -frename-registers -DNDEBUG
-UDEBUG -fvisibility-inlines-hidden -DANDROID -fmessage-length=0 -W
-Wall -Wno-unused -Winit-self -Wpointer-arith -Wsign-promo -std=gnu++11
-Werror=return-type -Werror=non-virtual-dtor -Werror=address
-Werror=sequence-point -DNDEBUG -UDEBUG -mthumb -Os -fomit-frame-pointer
-fno-strict-aliasing -fno-rtti -Wall -Werror -fPIC -D_USING_LIBCXX
-std=gnu++11 -Werror=int-to-pointer-cast
-Werror=pointer-to-int-cast -MD -MF
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates/UnwindCurrent.d
-o
out/target/product/linaro_arm/obj/SHARED_LIBRARIES/libbacktrace_intermediates/UnwindCurrent.o
system/core/libbacktrace/UnwindCurrent.cpp
And I got error:
/tmp/ccZ40ViQ.s: Assembler messages:
/tmp/ccZ40ViQ.s:1752: Error: selected processor does not support ARM
mode `cbnz r6,.L91'
/tmp/ccZ40ViQ.s:1758: Error: selected processor does not support ARM
mode `cbnz r0,.L92'
/tmp/ccZ40ViQ.s:1763: Error: selected processor does not support ARM
mode `cbz r1,.L107'
/tmp/ccZ40ViQ.s:1941: Error: selected processor does not support ARM
mode `cbz r6,.L100'
But if I use the arm gcc 4.9, there is no any build issue.
the "-dumpspecs" output of gcc 5.3 was attached. Thanks.
Regards
Yin, Fengwei
The Linaro Binary Toolchain
============================
The Linaro GCC 4.9-2016.02 Release is now available.
Notice: All Linaro GCC 4.9 series toolchain users should migrate to
the latest version of the Linaro GCC 4.9 toolchain in order to
mitigate potential security exposure to CVE-2015-7545. See the NEWS
section below for details.
Download release packages from:
http://releases.linaro.org/components/toolchain/gcc-linaro/4.9-2016.02/http://releases.linaro.org/components/toolchain/binaries/4.9-2016.02/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 4.9-2016.02
FSF eglibc 2.19 (eglibc.git/linaro_eglibc-2_19)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.24 (linaro_binutils-2_24-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro Linux Version 3.17-2014.10 (linux-linaro-3.17-2014.10)
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for Linaro GCC 4.9-2016.02
================================
* The armv8l-linux-gnueabihf targetted toolchain is now built using
--with-mode=thumb (like all of the other cross toolchains) rather than
the default which is ARM mode.
* Applied fix for CVE-2015-7545 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
Linaro eglibc 2.19 (linaro_eglibc-2_19).
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* See the following Linaro GCC snapshot:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2015.10/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Linaro Toolchain Engineering Manager
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net