== Progress ==
LLDB development
-- Debugging of return value related issue coming up on chromebook ARM
[TCWG-228] [2/10]
-- Setup of Arm testing on AArch64 using chroot on highkey [TCWG-231] [1/10]
-- Investigation of failures when setting watchpoint on vector
variables [TCWG-231] [4/10]
Miscellaneous [3/10]
-- Meetings, emails, discussions etc.
-- Travel for Thailand visa application
== Plan ==
LLDB development
-- Try a fix of return value related issue coming up on chromebook ARM
-- Submit fix for failures when setting watchpoint on vector variables
-- Mark triaged failures with xfail decorators and bug numbers.
== Progress ==
LLDB development
-- Triage testsuite failures on AArch64 highkey [TCWG-231] [5/10]
-- Triage testsuite failures on chromebook (armel) [TCWG-228] [3/10]
Miscellaneous [2/10]
-- Meetings, emails, discussions etc.
-- Documents preparation for Thailand visa
== Plan ==
LLDB development
-- Create chroots for armhf and armel testing on AArch64 highkey board
-- Investigate ABI related issues when returning values on armel and armhf
-- Further bug triage and mark triaged failures with xfail decorators
and bug numbers.
Miscellaneous
-- Travel for Thailand visa application submission.
== This Week ==
* PR43721 (4/10)
- Patch review from Jim
- Bootstrapped and tested on x86, cross-tested with arm-linux-gnueabi
- Looking at regressions with arm-linux-gnueabi
- Wrote test-cases
* Benchmarking (2/10)
- lto spec2006 benchmarking
* Backport (1/10)
- Build successful for r232440 and r232442, failed for r232442
* PR24293 (1/10)
- Addressed comments by Marek and committed to trunk
* Misc (2/10)
- Meetings
- PR69133 - Fixed by Honza. Instead of gating on
lto_file_data as I did in my patch, gating on gimple_has_body_p()
was more suitable.
- Awaiting upstream response for tcwg-319
- Connect Slides outline, read doc on tree-ssa propagation and lto
plugin driver.
== Next Week ==
Continue ongoing tasks
== Progress ==
* Validation
- no progress in timeout issues: still didn't manage to access the logs
- 1st backport workshop successful in the team. We can increase
the difficulty for the next time :)
- initial prototype (naive) of an auto-backporter (using backflip)
when the patch are selected for inclusion
* GCC
- TCWG-485/PR68620: patch under review
- TCWG-484/target attributes testsuite fixes: committed.
- bug #1994: provided woraround to kernel team.
Related to GCC PR63304. Working on a further patch
for GCC.
* Misc (conf calls, meetings, emails, ....)
== Next ==
* Validation:
- debug timeout issues
- extended validation
* GCC:
- bug fixing
# Progress #
* Fix the arm software single step regression. [3/10]. Done.
* TCWG-503 Done.
* TCWG-491, have a patch to avoid GDB crash. Patch is pending for
review.
* TCWG-517. [2/10]
Fix fail in gdb.base/interrupt-noterm.exp. Patch is posted.
* TCWG-514. [3/10]
Fix new fails in foll-exec.exp and foll-vfork.exp. Patch is pending
for review.
* TCWG-509, GDB 7.11 release. [2/10]
GDB is in a good shape to create 7.11 branch except PR 19474. Go
through GDB test results and no ARM or AArch64 specific issues.
# Plan #
* TCWG-509, GDB 7.11 release.
* Upstream patch review.
--
Yao
The Linaro Toolchain Working Group (TCWG) announces the 2016.01-1
snapshot of the Linaro GCC 5 source package.
This package is a respin of 2016.01 source package and contains a fix
for Linaro bugzilla’s PR #2001:
* [AArch64] ICE in final_scan_insn on aarch64-linux-gnu.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.01-1/
Original release notes from 2016.01 source package can be find below:
---------------------------------------------------------------------------------------------------------------------
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.01 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn232321 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.02
stable [1] quarterly release.
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn232321
* Fixes Linaro Bugzillas: #1982, #1980
* Backport of [BugFix] [AArch32] PR 68149 Fix ICE in unaligned_loaddi split
* Backport of [BugFix] [AArch32] PR target/68214: Delete
IP-reg-clobbering call-through-mem patterns
* Backport of [BugFix] [AArch32] PR target/68390
* Backport of [Bugfix] [AArch64] PR rtl-optimization/68796 Add
compare-of-zero_extract pattern
* Backport of [BugFix] [AArch64] PR target/68696 FAIL:
gcc.target/aarch64/vbslq_u64_1.c scan-assembler-times bif\tv 1
* Backport of [BugFix] PR rtl-optimization/68381
* Backport of [ARMv8.1] [AArch32] Add ACLE feature macro for ARMv8.1
instructions
* Backport of [ARMv8.1] [AArch32] Add ACLE intrinsics vqrdmlah and vqrdmlsh
* Backport of [ARMv8.1] [AArch32] Add ACLE intrinsics vqrdmlah_lane
and vqrdmlsh_lane
* Backport of [ARMv8.1] [AArch32] Add patterns for new instructions
* Backport of [ARMv8.1] [AArch32] Add support for ARMv8.1
* Backport of [ARMv8.1] [AArch32] Multilib support for ARMv8.1.
* Backport of [ARMv8.1] [AArch32] Support ARMv8.1 ARM tests
* Backport of [AArch32] [AArch32] Fix armv8.1 support at configure time
* Backport of [AArch32] Add attribute for compatibility with ARM pipeline models
* Backport of [AArch32] Fix vector TYPE_MODE in streaming-out
* Backport of [AArch64] 1/7 Add support for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] 2/7 Add sqrdmah, sqrdmsh instructions
* Backport of [AArch64] 3/7 Add builtins for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] 4/7 Add ACLE feature macro for ARMv8.1
Adv.SIMD instructions
* Backport of [AArch64] 5/7 Dejagnu support for ARMv8.1 Adv.SIMD
* Backport of [AArch64] 6/7 Add NEON intrinsics vqrdmlah and vqrdmlsh
* Backport of [AArch64] 7/7 Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane
* Backport of [AArch64] Documentation fix for -fpic
* Backport of [AArch64] fix 3/7 Add builtins for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] Fix a few failures with LSE enabled
* Backport of [AArch64] Improve add immediate expansion
* Backport of [AArch64] Improve comparison with complex immediates
followed by branch/cset
* Backport of [AArch64] Rework ARMv8.1 command line options
* Backport of [AArch64] Update patterns to support FP zero
* Backport of [AArch64] Use aarch64_sync_memory_operand in
atomic_store<mode> pattern
* Backport of [AArch64] Use vector wide add for mixed-mode adds
* Backport of [Misc] Only restrict pure simplification in mult-extend
subst case, allow other substitutions
* Backport of [Testsuite] [AArch64] Skip big-endian as well for
gcc.target/aarch64/got_mem_hoist_1.c
* Backport of [Testsuite] Make stackalign test LTO proof
* Backport of [Testsuite] Testcase for PR rtl-optimization/68381
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
Folks,
I'd like to know the general opinion on this:
https://llvm.org/bugs/show_bug.cgi?id=23529
>From past experience, and my limited point of view, it seems that the
GCC community decided to change the ABI, plotted some runes, conjured
up a broken implementation (whose bugs people will exploit and GCC
will end up keeping them) and pushed distros to follow.
I don't know how much distros were involved in the original design.
Did they request the changes? Or was that an internal change? How do
you guys get to decide when to break the world?
I also don't know how will be your policy towards the bugs that people
started "using". Are you going to force them moving to a more sane
implementation (by issuing compiler/linker errors) or are you going to
support as legacy for the decades to come?
Is there a detailed document describing all the changes, and is the
GCC implementation following that to the letter, or are there still
bugs in the current version? I'm not talking about an email thread,
but an actual document on GCC's docs pages.
All I know is that people in the Clang community waited until GCC's
implementation was stable, but somehow Debian based distros started
moving as if there was something unholy about the previous ABI, and
we've been getting segmentation faults on Hello World!
I don't know much about the changes myself, nor I was involved in the
discussion, but this is now a major pain for release 3.8.0 and I
thought it would be better if I sent an email to Linaro folks and
members (which form most of the ARM GNU developers) instead of going
on the main lists.
That also gives me a bit more freedom to be more candid. I wouldn't
send those questions as they are to the GCC/binutils lists, or people
would kill me. I don't mean any of them as an offence, they are
genuine questions from someone that is not on top of that issue.
cheers,
--renato
Hi Linaro Toochain Group,
I have few questions on glibc+libm w.r.t aarch64.
If possible, please provide some insight, otherwise kindly redirect me to
the concerned person/forum.
1.It seems from the community patches that ARM/Linaro is optimizing glibc
functions such as memcpy/memmove, string for aarch64.
However, looks like some of these (e.g. memcpy/memmov) patches are still
not merged in glibc. Any comment on their availability in glibc?
e.g. https://www.sourceware.org/ml/libc-alpha/2015-12/msg00341.html
2. On the same note, is there any plan for optimizing/tuning libm functions
(e.g. trigonometric) for aarch64?
I could find any matching patches on review board. Please correct me if I
am wrong.
3. Looks like ARM have released an independent version of libm for certain
trigonometric functions.
https://github.com/ARM-software/optimized-routines.
Any plan of these optimization going in glibc's libm? Any comment on its
performance improvement over GNU libm ?
Thanks in advance for your time.
--
with regards,
Virendra Kumar Pathak
== Progress ==
- LTO and TCWG480 (6/10)
* Read and experimented with GCC's LTO codebase.
* Setup archlinux on chromebook and ran coremark with perf
* Read referenced publications
- PR66726 (2/10)
* Rebased the patch
* Regression tested on x86_64 and using Chritsope's setup
* getting ready to post upstream
- Misc (2/10)
* gcc/bug list
* abstract for connect presentation
* Meetings
== Plan ==
* LTO
* bugs
o Teaching activity (2/10)
== Progress ==
o Linaro GCC (4/10)
* Completed backports for 2016.01
* Merged FSF 5 branch into Linaro 5 one
* Delivered 2016.01 Snapshot
* Try to reproduce Linaro PR #1988 with 2016.01.
issue not reproducible
o GCC dev. (3/10)
* Fix armv8.1-a handling at configure time
patch committed upstream in trunk and backported in our branch.
* Investigate TCWG-128 (Thumb2 branch out of range with LTO)
o Misc (1/10)
* Various meetings
== Plan ==
o Look at diff between ABE branches in our validation context
o Continue on-going tasks
Port to microinstance - TCWG-432 [3/10]
* Fallout from attempts to fix race condition
* Various minor fixes - simplifications, better reporting
Backport benchmarking - TCWG-352 [1/10]
* Decoupled 'target triple' from 'toolchain' name
** Immediately, to let me benchmark with Juno-built native gcc
** But this has been causing minor pain for a while
Benchmarking infrastructure documentation - TCWG-496 [1/10]
* Finished drafts of LAVA wrapper and microinstance access docs
Unexpected 1/2 day off [1/10]
Misc [4/10]
* Unusual number of meetings
* Fiddling with my git workflow
* Some thinking about Benchmark-102 for Connect
* Figured out why our SPEC objects were disappearing
== This week ==
* Bugzilla 68543 - [AArch64] Implement overflow arithmetic standard
names (6/10)
- Re-implementing using sign/zero extends as this was not clear from
the documentation
* Bugzilla 69008 - gcc emits unneeded memory access when passing trivial
structs by value (1/10)
- Determined to be structure alignment issue
* Code review of patch posted for Bugzilla 68532 (1/10)
- Completed code review and successfully tested with my vaddw patches
* Bugzilla 67323 - Tested patch for TCWG-318 (non-unit stride loads) (1/10)
- Patch did not generated vld3 so the bug has been reopened
* TCWG-317 - No review feedback yet
* Misc (1/10)
== Next week ==
* Bugzilla 68543 - Complete re-implementation with zero/sign extends and
test
* Bugzilla 69008 - Determine where in compiler issue should be addressed
* USA Holiday (January 18th, MLK Day)
== Progress ==
* Support (5/10)
- Bug triage: reviewing the 300+ bugs on ARM
- closing fixed ones (+35)
- adding deps for meta bugs (kernel, android, ias, chromium) (~15)
- moving to ARM/AArch64 components, etc. (~30)
- Checking a few more kernel patches for Clang support with Arnd
* Plan (3/10)
- Still planning roadmap for 2016/2017
* Background (2/10)
- Code review, meetings, discussions, general support, etc.
# Progress #
* Estimate the effort of GDB kernel-awareness work. Give comments
on formal slides. [1/10]
* GDB inserts breakpoints on the wrong place if these files'
basename is the same. TCWG-491. At least, post a patch to avoid
GDB crash. Reproduced with a simpler case, open PR 19474. [3/10]
* Update document about input interrupt. [1/10]
Done. Patch is committed.
* TCWG-503, fix GDB test case by @progbits -> %progbits. Patch is
posted. [1/10]
* Clean up arm software single step code. [3/10]
In progress. Some patches are committed, but some are still in my
queue. The recent arm software single step change causes a
regression on stepping out of signal handler.
* Think about the GDB slides for Linaro Connect [1/10]
# Plan #
* Look into the arm software single step regression.
* Post the rest of patches for arm software single step clean up.
--
Yao
== Progress ==
* Validation
- a couple of fixes in the validation jobs
- looking at timeouts problems with buildfarm-master
* GCC
- TCWG-485/PR68620: sent patch for review
- TCWG-484/target attributes problems in the testsuite
Rebased, but need more pending updates from Christian
* Misc (conf calls, meetings, emails, ...)
== Next ==
* Validation: more debug. Hopefully start extending validation scope
* GCC:
- bug fixing
- check trunk regressions reported during the holidays
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.01 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.3+svn232321 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.02
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.01/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.3+svn232321
* Fixes Linaro Bugzillas: #1982, #1980
* Backport of [BugFix] [AArch32] PR 68149 Fix ICE in unaligned_loaddi split
* Backport of [BugFix] [AArch32] PR target/68214: Delete
IP-reg-clobbering call-through-mem patterns
* Backport of [BugFix] [AArch32] PR target/68390
* Backport of [Bugfix] [AArch64] PR rtl-optimization/68796 Add
compare-of-zero_extract pattern
* Backport of [BugFix] [AArch64] PR target/68696 FAIL:
gcc.target/aarch64/vbslq_u64_1.c scan-assembler-times bif\tv 1
* Backport of [BugFix] PR rtl-optimization/68381
* Backport of [ARMv8.1] [AArch32] Add ACLE feature macro for ARMv8.1
instructions
* Backport of [ARMv8.1] [AArch32] Add ACLE intrinsics vqrdmlah and vqrdmlsh
* Backport of [ARMv8.1] [AArch32] Add ACLE intrinsics vqrdmlah_lane
and vqrdmlsh_lane
* Backport of [ARMv8.1] [AArch32] Add patterns for new instructions
* Backport of [ARMv8.1] [AArch32] Add support for ARMv8.1
* Backport of [ARMv8.1] [AArch32] Multilib support for ARMv8.1.
* Backport of [ARMv8.1] [AArch32] Support ARMv8.1 ARM tests
* Backport of [AArch32] [AArch32] Fix armv8.1 support at configure time
* Backport of [AArch32] Add attribute for compatibility with ARM pipeline models
* Backport of [AArch32] Fix vector TYPE_MODE in streaming-out
* Backport of [AArch64] 1/7 Add support for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] 2/7 Add sqrdmah, sqrdmsh instructions
* Backport of [AArch64] 3/7 Add builtins for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] 4/7 Add ACLE feature macro for ARMv8.1
Adv.SIMD instructions
* Backport of [AArch64] 5/7 Dejagnu support for ARMv8.1 Adv.SIMD
* Backport of [AArch64] 6/7 Add NEON intrinsics vqrdmlah and vqrdmlsh
* Backport of [AArch64] 7/7 Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane
* Backport of [AArch64] Documentation fix for -fpic
* Backport of [AArch64] fix 3/7 Add builtins for ARMv8.1 Adv.SIMD instructions
* Backport of [AArch64] Fix a few failures with LSE enabled
* Backport of [AArch64] Improve add immediate expansion
* Backport of [AArch64] Improve comparison with complex immediates
followed by branch/cset
* Backport of [AArch64] Rework ARMv8.1 command line options
* Backport of [AArch64] Update patterns to support FP zero
* Backport of [AArch64] Use aarch64_sync_memory_operand in
atomic_store<mode> pattern
* Backport of [AArch64] Use vector wide add for mixed-mode adds
* Backport of [Misc] Only restrict pure simplification in mult-extend
subst case, allow other substitutions
* Backport of [Testsuite] [AArch64] Skip big-endian as well for
gcc.target/aarch64/got_mem_hoist_1.c
* Backport of [Testsuite] Make stackalign test LTO proof
* Backport of [Testsuite] Testcase for PR rtl-optimization/68381
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
o Teaching activity (6/10)
== Progress ==
o Linaro GCC (4/10)
* Restart validation blocked by the last infrastructure issues
* Discussed and reviewed Jenkins jobs fixes.
* Tested potential upstream fixes for linaro BZ 1980 and 1982,
but reverting the offending backports is a better solution.
== Plan ==
o Complete backports and deliver 2016.01 GCC snapshot.
Centralized benchmark source - TCWG-354 [1/10]
* Fixed some bugs in Coremark reporting
* Experimented some more with clang builds, set this aside for now
Port to microinstance - TCWG-432 [3/10]
* Fixed some false assumptions exposed by change to uinstance
* Worked on LAVA side of coremark reporting
Backport benchmarking - TCWG-352 [4/10]
* Fixed some bugs that appeared over the holiday
* Got job dispatching benchmark run to microinstance, with pointer to
backport-containing toolchain
* But resulting job fails
Benchmarking infra documentation - TCWG-496 [1/10]
* Started documenting LAVA wrapper
Misc [1/10]
=Plan=
LAVA side of coremark reporting
Fix backport-dispatched benchmark job
Much more documentation
== Progress ==
LLDB development
-- Fixed thumb mode issues if user triggers changes to PC register
[TCWG-228] [3/10]
-- Triage of testsuite failures on armel chromebook [TCWG-228] [2/10]
-- Update xfail decorators for arm-linux targets. Marked traiged as
xfail. [TCWG-494] [3/10]
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
Half Day Leave [1/10]
-- Tooth extraction surgery.
== Plan ==
LLDB development
-- Triage more failures on armel chromebook [TCWG-228]
-- Submit an updated xfail decorator for arm-linux. [TCWG-494]
Miscellaneous
-- Connect visa follow up.
== This Week ==
* tcwg-72 (2/10)
- Following Jim's suggestions using XEXP (remainder, 0) worked to
resolve segfault
for DImode case
- Resolved ICE's due to (silly) mistakes.
* PR69133 (4/10)
- Reduced test-case following Markus's suggestions.
- I think it happens because node->lto_file_data is set to NULL in
lto_free_function_in_decl_state_for_node ().
Commenting out the following calls from get_untransformed_body():
lto_free_section_data (file_data, LTO_section_function_body, name,
data, len, decl_state->compressed);
lto_free_function_in_decl_state_for_node (this);
prevents the ICE. I suppose symbols with same name in same partition
share state (?), so setting lto_file_data = NULL
affects state of 2nd occurence of symbol and we hit the assert.
If this is true, gating on lto_file_data doesn't seem unreasonable IMO
to avoid ICE (the code anyway has undefined behavior due to violation of ODR).
I am still not sure why this "works" for partitioning enabled (one,
balanced, 1to1).
* 447.deallII bug (1/10)
- Bug not reproducible (verified with Kugan).
* TCWG-319 benchmarking (1/10)
- first job submission failed due to kernel panic
- a53: base fp run completed, with-patch in progress
* Misc (2/10)
- Meetings
- ipa
== Progress ==
* Validation
- a couple of fixes in the validation jobs
- improvements to the comparison scripts
* GCC
- investigated bugs #1980 and #1982.
Reverted the backports that introduced the problem.
- TCWG-485/PR68620: resumed
- TCWG-484: target attributes problems in the testsuite.
Sent an updated patch, but Christian has also submitted
a patch which modifies the compiler behavior. I'll have
to update mine when his patch is accepted.
* Misc (conf calls, meetings, emails, ....)
== Next ==
* Validation: more cleanup. Hopefully start extending validation scope
* GCC:
- bug fixing
- check trunk regressions reported during the holidays
