Noise control experiments - TCWG-358 [3/10]
* Some analysis of data to date
Debian filesystem - TCWG-360 [3/10]
* Got stuck on LAVA interactions
* Now booting-to-LAVA-usability, needs some cleanup and testing with
real benchmark runs
Benchmarking-via-Jenkins - TCWG-348 [1/10]
* Picked back up on understanding that LAVA uinstance is a-coming
* Hacked pbl.py (post-build-lava) to generate suitable JSON
** As a bonus, this can work as a CLI job-submission tool
=Plan=
Holiday Friday (pending approval)
Set up crashdumping on my Juno, try to learn why it crashes
Finish Debian filesystem
Get Jenkins generating and submitting jobs suitable for uinstance
Write up noise control report (probably will get bumped to next week)
== This week ==
* TCWG-317 - Exploit wide add operations when appropriate for Aarch32 (3/10)
- Could not reproduce test failure in qemu
- Waiting on feedback from Maxim who is running patch on Linaro
validation
* TCWG-369 - Exploit wide add operations when appropriate for Aarch64 (4/10)
- Debugging tree vectorizer to determine why loops with no wide add
operations are no longer being vectorized
* TCWG 146 - Debugging regression on arm big endian with Linaro 5 branch
(2/10)
* Misc (1/10)
- Conference calls
== Next week ==
- TCWG-317 - Resolve lto big endian failures
- TCWG-369 - Identify why loops are not being vectorized
- TCWG-146 - Resolve big endian failures
== This Week ==
* TCWG-72 / PR43721 (8/10)
- Completed writing expand_DIVMOD() and submitted patch upstream
- Reworked patch according to Richard Biener's comments.
(http://people.linaro.org/~prathamesh.kulkarni/pr43721-patch-v2.diff)
- Wrote test-cases.
* TCWG-319 (1/10)
- Benchmark run without patch complete for "int" benchmarks on a53, a57
- Benchmark run with patch in progress for "int" benchmarks on a53, a57
* Misc (1/10)
- Meetings
== Next Week ==
- Continue with TCWG-72, TCWG-310li, TCWG-319 benchmarking
# Progress #
* TCWG-332, [1/10], patch is posted for review.
* TCWG-187, [1/10], looks like a kernel (~3.4) bug on setting VFP
registers through ptrace. Fails go away after I upgrade the kernel.
* TCWG-387, [2/10], binutils patch is committed, while GDB
patches are being reviewed.
* TCWG-422, [3/10], Read AAPCS and gcc source code to understand the
calling convention. On going.
* FSF patch review, [2/10]
** Review patch set "all-stop on top of non-stop for remote".
** Review ARM fast tracepoint patches.
** Reopen PR 15564, as the fail isn't fixed.
* Misc, meeting, [1/10]
# Plan #
* TCWG-422
* Support ST on using AArch64 multi-arch GDB if needed.
* Review ARM GDBserver software single step patch.
--
Yao
== This week ==
* TCWG-317 - Exploit wide add operations when appropriate for Aarch32 (5/10)
- Continued to debug big endian/lto failure of four torture tests
- Differences in lto vs. non-lto executables showed no significant
differences
* TCWG-369 - Exploit wide add operations when appropriate for Aarch64 (4/10)
- Resolved three of six test suite failures
* Misc (1/10)
- Conference calls
== Next week ==
- TCWG-317 - Resolve lto big endian failures by debugging test cases
with qemu
- TCWG-369 - Resolve remaining test suite failures
--
Michael Collison
Linaro Toolchain Working Group
michael.collison(a)linaro.org
Hello all,
When upgrading meta-linaro/meta-linaro-toolchain from daisy to fido, we faced drastic performance downgrade (-34.06%) on linux ipv4 forwarding. The board is ls1021atwr (ARM Cortex-A7 MPCore compliant with ARMv7-A architecture).
We did some investigation, and suspected that it is caused by the toolchain upgrade. Did someone meet similar issue?
The detailed toolchain info:
https://git.linaro.org/openembedded/meta-linaro.git/shortlog/refs/heads/fido
gcc-linaro-4.9.3-2015.03, glibc-linaro-2.20-2014.11, binutils-linaro-2.25-2015.01
https://git.linaro.org/openembedded/meta-linaro.git/shortlog/refs/heads/dai…
gcc-linaro-4.8.3-2014.04, eglibc-linaro-2.19-r2014.04, binutils-linaro-2.24-r2014.03
thanks.
-Ting
o Week 42 off (10/10)
== Progress ==
o Linaro GCC (9/10)
* Completed backports and reviews
* Delivered GCC 5 2015.10 snapshot
* Completed TCWG 389 (deploy snapshot job)
o Misc (1/10)
* Various meetings
== Plan ==
o Back to work
Mustang benchmarking bringup - (no ticket) [2/10]
Controlled Debian build - TCWG-360 [1/10]
* Constructed filesystem, works OK as chroot
* Next step is to boot it
Investigate Workload Automation framework - TCWG-361 [1/10]
* Seems to basically work
* SPEC support dubious
Misc
* LAVA uinstance background (TCWG-396, < 1/10)
* Noise control experiments (TCWG-358, < 1/10)
* ARM management duties [2/10]
== Progress ==
* Maintenance (5/10)
- Investigating some LivermoreLoops that don't vectorise
- Reducing cases to single specific causes
* Background (5/10)
- Code review, meetings, discussions, general support, etc.
- More code of conduct stuff, license change to Apache 2
- Following up on sanitizers VMA discussion
* Two days (Tue and Thu) off. [4/10]
# Progress #
* TCWG-180, patch is committed by Andrew Stubs. [1/10]
I review and approve it.
* Review patch set "all-stop on top of non-stop for remote". [3/10]
Test them on aarch64 and arm. Triage and fix one regression. Review
is still on going.
* Review patch set "ARM gdbserver software breakpoint". [2/10]
Review and approve them. They are preparatory to ARM tracepoint.
# Plan #
* Patch review.
* TCWG-387, Move GDB using libopcodes to decode instructions.
--
Yao
The Linaro Toolchain Working Group is pleased to announce the availability
of the Linaro Stable Binary Toolchain GCC 5.1-2015.08 Archives.
http://releases.linaro.org/components/toolchain/binaries/5.1-2015.08/
These archives provide cross-toolchain executables (compiler, debugger,
linker, etc.) and shared libraries (libstdc++, libc, etc.) that target ARM
or Aarch64 GNU/Linux and bare-metal environments. The cross-toolchain
binaries execute on a Linux or MS Windows (under mingw32) host
operating-system.
For bugs related to this release please email
linaro-toolchain(a)lists.linaro.org or file a bug at
https://bugs.linaro.org/enter_bug.cgi?product=Linux%20Binary%20toolchain
NEWS
* 2015.08
* The Linaro GCC 5.1 2015.08 binary toolchain release is based on the Linaro
GCC-5.1-2015.08 source archive release
<http://releases.linaro.org/components/toolchain/gcc-linaro/5.1-2015.08/>.
The major changes contained in 2015.08 over 2015.05 are described in the
sections below on 2015.08-rc1 and 2015.08-rc2 .
* 2015.08-rc2
* The Linaro 2015.08-rc2 release-candidate binary toolchain is based on
the Linaro GCC-5.1-2015.08-rc1 release-candidate source archive. The only
changes between 2015.08-rc1 and 2015.08-rc2 were the following changes in
how the binary toolchains were built. The compiler itself was not changed.
* x86_64 hosted, armv8l-linux-gnueabihf targetted cross toolchains are
now correctly configured. This was broken in 2015.08-rc1. The
cross-compiler targetting armv8l-linux-gnueabihf is now correctly
configured with --with-arch=armv8-a --with-fpu=neon-fp-armv8
--with-float=hard --disable-multilib --enable-multiarch.
* Glibc’s slibdir and libdir were once again modified to address
Linaro Bugzilla
1717 – Linaro-4.9-2015.05 moved system libs from /libc/lib/ to
/libc/usr/lib/ which breaks things. The following are now the correct
locations:
libdir=lib/ (linker-scripts and static archives)
slibdir=usr/lib/ (shared objects)
rtlddir=lib/ (dynamic linker)
* 2015.08-rc1
* x86_64 hosted, armv8l-linux-gnueabihf targetted cross toolchain now
provided.
Delivering on REQ-477 – Enable x86_64 to Aarch32 (32-bit ARMv8-A)
cross binary toolchain product release and CARD-1637 – Enable Aarch32
(32-bit ARMv8-A) cross binary toolchain product releases ,
armv8l-linux-gnueabihf targetted toolchains are now available as part of
this release-candidate.
* Python support in GDB for both Linux and Mingw32 (32-bit windows).
Delivered as requested in the linaro-toolchain mailing list post
title – windows binary builds with gdb-python enabled?.
* Added missing expat support to GDB.
This addresses the following linaro-toolchain mailing list post –
"Missing expat support in GDB 7.8 multi-lib enablement for arm bare-metal
targets."
* A fix for multilib enablement in baremetal toolchains (as described
in ABE Review 6862).
* Library Paths are now congruent with older Linaro Toolchain path
layouts. This addresses Linaro Bugzilla 1717 – Linaro-4.9-2015.05 moved
system libs from /libc/lib/ to /libc/usr/lib/ which breaks things.
libdir=lib/ (shared objects)
slibdir=usr/lib/ (static libraries)
rtlddir=lib/ (dynamic linker)
--
Ryan S. Arnold
Linaro Toolchain Working Group - Engineering Manager
www.linaro.org
Hi,
The default gcc version of Yocto 2.0(Jethro) is 5.2.0, the gcc version in meta-linaro is gcc-4.9.4, may I know if gcc-linaro-4.9.4 will be used for Yocto 2.0 release? when will the linaro gcc be upgraded to gcc-5.x?
BTW, can someone please help point out where the Linaro toolchain roadmap can be got?
Best Regards,
Zhenhua
== Progress ==
LLDB development
-- Verify LLDB watchpoints on Android Arm and AArch64 targets. [TCWG-405] [4/10]
- Ran LLDB testsuite on Nexus5, Nexus 7, Nexus S and Nexus 9 devices.
- Started into failing watchpoint tests on all devices.
-- Investigate and fix LLDB watchpoints tests that are failing on
Android Nexus 9 AArch64 target. [TCWG-405] [5/10]
- Debugging of ptrace watchpoint installation code.
- Prepared a fix and tested on Nexus 9.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
== Plan ==
Further progress on investigating LLDB watchpoint issues on Android
Nexus devices.
Local testbots setup using new Android Nexus and Arm linux devices.
== Progress ==
* Libraries (3/10)
- Back investigating libc++ issues in AArch64 buildbot
- http://buildmaster.tcwglab.linaro.org/builders/clang-cmake-aarch64-prototype
- Trying to solve the rt/unw/c++ library entanglement in the driver
* Buildbots (1/10)
- Trying to perf an application on APM, but it crashed while
- Rebooted it for now, but on the list to migrate to a newer kernel
* Background (6/10)
- Code review, meetings, discussions, general support, etc.
- Laptop playing stupid again, lost a day trying to fix things
- New LLVM "code of conduct" sparked a huge discussion
Investigate effectiveness of noise-control measures - TCWG-358 [4/10]
* Recovered from a couple more crashes, existing logging sheds no light
* Explored the existing data a bit, need more to draw any conclusions
Controlled image builds - TCWG-360 [2/10]
* Looked into controlled, repeatable debian builds, B&B-style
* Got the general shape of it, checking my understanding with Fathi
LAVA microinstance - TCWG-396 [1/10]
* Sent doc for review, revised it a bit
Misc [3/10]
* Exported benchmark/results handling rules to a place other
Linaro-ans can read them
* Updated example LAVA jobs to use tcwg tag (for load balancing purposes)
* Meetings, mail, etc
=Plan=
Generate more noise data, watching out for crashes
Produce a candidate Debian image, document how I did it
If time, learn about Workload Automation
== This week ==
* TCWG-317 - Exploit wide add operations when appropriate for Aarch32 (6/10)
- Debugging failures on -flto/big endian combination
- Wrote code for big endian lane support; failures still exist
- Debugging lto to see if optimization is causing failures
* TCWG-77 - Transform end of loop conditions to min_expr (1/10)
- patch approved, checked in upstream
* Misc (1/10)
- Conference calls
* US Holiday, Monday October 12th (2/10)
== Next week ==
- TCWG-317 - Debug to determine if lto is causing failures
== Progress ==
- Run spec2006 with DS5/Streamline Performance Analyzer (3/10)
- Setup DS5
- Setting up client for chromebook which requires kernel rebuild
- Widening pass (TCWG-547) - 5/10
* iterated based on review comments
* re-wrote GIMPLE_DEBUG handling
- Misc (2/10)
* gcc/bug list
== Plan ==
* perf with spec2000
* continue with widening pass based on feedback
# Progress #
* TCWG-162, Aarch64 non-stop debugging (or displaced stepping). [1/10]
Patches are committed.
* TCWG-335, HW breakpoint on 2-byte aligned address, [3/10]
patch is tested against most recent kernel. Everything works.
Patch is committed.
* TCWG-166, Review ARM software breakpoint in GDBserver patches. [1/10]
Almost done.
* Review various upstream patches. [2/10].
* Misc, [3/10]
** Meeting,
** Write up some slides about recent GDB development, and present them
in ARM.
# Plan #
* TCWG-387, Move GDB using libopcodes to decode instructions.
* More upstream patches review.
* Two days off on Tue and Thu. Maybe off on Friday too.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2015.10 snapshot of the Linaro GCC 5 source package.
This monthly snapshot[1] is based on FSF GCC 5.2+svn228499 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2015.11
stable [1] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.2-2015.10/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.2+svn228499
* Backport of [Bugfix] [AArch32] Fix PR target/29693
* Backport of [Bugfix] [AArch32] PR 52144 Fix ARM/thumb attribute target
* Backport of [Bugfix] [AArch32] PR 52144 Fix ARM/thumb attribute target
* Backport of [Bugfix] [AArch32] PR/63870 Add a __builtin_lane_check
* Backport of [Bugfix] [AArch32] PR/63870 Add qualifier to check lane
bounds in expand
* Backport of [Bugfix] [AArch32] PR 66541, 52144 Fix ARM/thumb pragma target
* Backport of [Bugfix] [AArch32] PR middle-end 64744/48470/43404
* Backport of [Bugfix] [AArch32] PR target/52144 attribute target
(thumb,arm) [2.2/6]
* Backport of [Bugfix] [AArch32] PR target/52144 target attributes
Clean up arm_option_params_internals macro settings for
attribute/pragma targets
* Backport of [Bugfix] [AArch32] PR target/65768
* Backport of [Bugfix] [AArch64] PR63870 Neon error messages for
vldN_lane/vstN_lane
* Backport of [Bugfix] Fix PR66168
* Backport of [Bugfix] Fix PR67280 and Linaro BZ #1765
* Backport of [Bugfix] PR c/49551
* Backport of [Bugfix] PR middle-end/64130
* Backport of [Bugfix] PR middle-end/66726
* Backport of [Bugfix] PR target/65768 Check cost of constants before
propagating
* Backport of [Bugfix] PR tree-optimization/67043
* Backport of [AArch32] 1-ARM/Thumb target attributes
* Backport of [AArch32] 2-ARM/Thumb target attributes
* Backport of [AArch32] 3-ARM/Thumb target attributes
* Backport of [AArch32] Add ARM/thumb attribute target
* Backport of [AArch32] Add ARM/thumb pragma target
* Backport of [AArch32] Add TARGET_OPTION_PRINT
* Backport of [AArch32] attribute target (thumb,arm) [2.1/6]
* Backport of [AArch32] Correct spelling of references to ARMv6KZ
* Backport of [AArch32] Fix ChangeLog
* Backport of [AArch32] fix date
* Backport of [AArch32] Fix static interworking call
* Backport of [AArch32] Fix thinko in use of TARGET_UNIFIED_ASM
* Backport of [AArch32] Fuseable is not a word -> s/fuseable/fusible/g
* Backport of [AArch32] Rename LOGICAL_OP_NON_SC to LOGICAL_OP_NON_SHORT_CIRCUIT
* Backport of [AArch32] Restrict MAX_CONDITIONAL_EXECUTE when
-mrestrict-it is in place
* Backport of [AArch32] Use dmb ish instead of dmb sy for ARM
* Backport of [AArch64] 1/3 ARMv8.1 Use atomic compare-and-swap
instructions when available
* Backport of [AArch64] [1/4] Define candidates for instruction fusion
in a .def file
* Backport of [AArch64] 1/5 Use atomic instructions for swap and
fetch-update operations
* Backport of [AArch64] 2/3 ARMv8.1 Use the atomic compare-and-swap
instructions when available
* Backport of [AArch64] [2/4] Control the FMA steering pass in tuning
structures rather than as core property
* Backport of [AArch64] 2/5 Make BIC, other logical instructions, available
* Backport of [AArch64] 3/3 ARMv8.1 Use the atomic compare-and-swap
instructions when available
* Backport of [AArch64] [3/4] De-const-ify struct tune_params
* Backport of [AArch64] 3/5 Add atomic load-operate instructions
* Backport of [AArch64] [4/4] Add -moverride tuning command, and wire
it up for control of fusion and fma-steering
* Backport of [AArch64] 4/5 Use atomic load-operate instructions for
fetch-update patterns
* Backport of [AArch64] 5/5 Use atomic load-operate instructions for
update-fetch patterns
* Backport of [AArch64] Add ACLE predefined marcos:
__ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR
* Backport of [AArch64] Add support for ARMv8.1 command line options
* Backport of [AArch64] Always register fma_steering pass but gate it
on the target option instead
* Backport of [AArch64] [armv8.1] Expand +rdma documentation, small
changes to march and mcpu text
* Backport of [AArch64] --with-arch in config.gcc support "."
* Backport of [AArch64] Change %ld to %wd for HOST_WIDE_INT parameter
* Backport of [AArch64] Fix another ICE with -mgeneral-regs-only
* Backport of [AArch64] Fix ICES with -mgeneral-regs-only / -march=...+nofp
* Backport of [AArch64] fix regrename pass to ensure renamings produce
valid insns
* Backport of [AArch64] Fix type of
*<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3 pattern
* Backport of [AArch64] Fuseable is not a word -> s/fuseable/fusible/g
* Backport of [AArch64] Improve spill code - swap order in shl pattern
* Backport of [AArch64] Improve spill code - swap order in shr patterns
* Backport of [AArch64] movi type attribute confusion
* Backport of [AArch64] Removed unused SLOWMUL target flags
* Backport of [AArch64] typo fix in attribute for vst2_lane
* Backport of [AArch64] Use conditional negate for abs
* Backport of [Testsuite] [AArch32] Add -mfloat-abi=softfp to some xscale tests
* Backport of [Testsuite] [AArch32] Disable attr_thumb.c test when
Thumb mode is not supported
* Backport of [Testsuite] [AArch32] Do not override -mcpu in no-volatile-in-it.c
* Backport of [Testsuite] [AArch32] Fix gcc.target/arm/attr_thumb.c
* Backport of [Testsuite] [AArch32] Fix gcc.target/arm/thumb_ifcvt.c
* Backport of [Testsuite] [AArch32] gcc.target/arm/pr65647.c should
not add -mfloat-abi=soft
* Backport of [Testsuite] [AArch32] target attribute cleanup directives
* Backport of [Testsuite] [AArch64] Testsuite check for sqrt_insn
* Backport of [Testsuite] [AArch64] vld1-vst1_1.c: Add missing float32x4_t case
* Backport of [Testsuite] AdvSIMD intrinsics tests cleanup: remove
useless expected values
* Backport of [Testsuite] Don't specify "dg-do run" explicitly for
vect test cases
* Backport of [Testsuite] gcc.target/arm/neon-reload-class.c: Remove
movw and movt
* Backport of [Testsuite] g++.dg/ext/pr57735.C should not run if the
testsuite is explicitly passing -mfloat-abi=hard
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] New AdvSIMD test
* Backport of [Testsuite] Skip tests for inappropriate multilibs
* Backport of [Misc] [1] Allow REG_EQUAL for ZERO_EXTRACT
* Backport of [Misc] Set REG_EQUAL
* Backport of [Misc] [2] Allow REG_EQUAL for ZERO_EXTRACT
* Backport of [Misc] Fix ChangeLog
* Backport of [Misc] fix segfault in verify_flow_info() with -dx option
* Backport of [Misc] fix typo
* Backport of [Misc] Fix typo: Rename insn_reservation
cortex_53_advsimd to cortex_a53_advsimd
* Backport of [Misc] Fuseable is not a word -> s/fuseable/fusible/g
* Backport of [Misc] [ifcvt Fix typo in comment
* Backport of [Misc] [match-and-simplify] fix incorrect code-gen in
'for' pattern
* Backport of [Misc] [match-and-simplify] reject expanding
operator-list to implicit 'for'
* Backport of [Misc] [match-and-simplify] report error for invalid
operator-lists
* Backport of [Misc] [simplify-rtx][2/2] Simplify - (y ? -x : x) ->
(!y ? -x : x)
* Backport of [Misc] The comparison in a compare exchange should not
take place in VOIDmode
* Backport of [Misc] Use cinc mnemonic for *csinc2<mode>_insn
* Backport of [Misc] warn for empty struct -Wc++-compat
* Backport of [Misc] [Driver] Wrong C++ paths when configuring with
"--with-sysroot=/"
* Backport of [Misc] [combine][1/2] Try to simplify before substituting
* Backport of [Doc] [AArch64] Clarify feature modifiers {no,}{fp,simd,crypto}
* Backport of [Doc] [AArch64] Fix position of -moverride documentation
* Backport of [Doc] move (Variable Attributes, Type Attributes) up
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
[2]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
== Progress ==
o Linaro GCC (9/10)
* Backports and Reviews
- FSF branch merge
- AArch64 armv8-1 support backported
- Attribute target almost done
* Long discussion on infra and stability
o Misc (1/10)
* Various meetings
== Plan ==
o Complete backports
o 2015.10 Snapshot
LAVA uinstance for benchmarking - TCWG-396 [3/10]
* Long meeting with Renato + LAVA/lab people
* Much thinking about the security side
* Wrote up rough draft of what I understand the design to be
Investigate effectiveness of noise control measures - TCWG-358 [3/10]
* Set up new host node
* Dealt with one host node crash, one target crash
** Noticed that target was writing logs to tmpfs, changed that so I
can investigate next crash
* Both sides stayed up through the weekend, hurrah
* Some work on data-massaging scripts
Misc [4/10]
Heavier than usual week mail-wise, plus performance review prep
=Plan=
Clean up uinstance design, circulate to make sure we're all on same page
Look at data from experiments so far
Investigate B&B's Debian-building tools
== Progress ==
- 1 day off public holiday (2/10)
- Upstream patch follow-ups (2/10)
* https://gcc.gnu.org/ml/gcc-patches/2015-07/msg02196.html
Trying to reproduce 1.cc failure found with Christophe's testing
* https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00129.html
Committed it and verified this will not happen with linaro-5 branch
- Widening pass (TCWG-547) - 4/10
* iterated based on review comments
- Misc (2/10)
* gcc/bug list
* setup vpn to lab
== Plan ==
* perf with spec2000
* continue with widening pass based on feedback
== Progress ==
* Maintenance (1/10)
- Removed redundant DefaultCPU in ARMTargetInfo
* Buildbots (4/10)
- Looong discussions upstream about stability of buildbots
- Trial with IFC6410 marginally successfull, still not good enough, aborting
- Moved benchmark buildbot to silent (avoid unnecessary spam)
- Writing up some docs on current infra and plan
* Infrastructure (3/10)
- Long internal discussions about stability of TCWG validation
- Agreeing on a LAVA micro-instance in TCWG for benchmarks
* Background (2/10)
- Code review, meetings, discussions, general support, etc.
- Checking status of OpenMP on AArch64 (~10 failures out of ~240 tests)
== Plan ==
More stuff...
