Hello toolchain people,
I created a patch on top of upstream binutils for a feature I need which
should be universally useful as well. Now I have 3 questions for you:
1) Does it look sane enough?
2) If so, could you integrate it in the Linaro release?
3) Would you be willing to promote it upstream?
Comments appreciated.
Here's the patch:
----- >8
Subject: [PATCH] gas: introduce section name substitution support
When gas is invoked with --sectname-subst, the occurrence of %S in a section
name will be substituted by the name of the current section. For example:
.macro exception_code
.pushsection %S.exception
[exception code here]
.popsection
.endm
.text
[code]
exception_code
[...]
.section .init
[init code]
exception_code
[...]
In the first exception_code invocation the .text.exception section is
created while in the second invocation it is the .init.exception section
that is created. This is useful e.g. to discriminate between anciliary
sections that are tied to .init code and can be discarded at run time when
initialization is over vs anciliary sections tied to .text sections that
need to stay resident.
This would also allow for actually omitting __exit sections from the Linux
kernel binary when modules are configured in even when exit marked code
generates exception table entries.
Signed-off-by: Nicolas Pitre <nico(a)linaro.org>
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 57fc30a..0189bb2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2015-06-03 Nicolas Pitre <nico(a)linaro.org>
+
+ * as.c (show_usage): Document --sectname-subst.
+ (parse_args): Add --sectname-subst.
+ * as.h (flag_sectname_subst): New.
+ * config/obj-elf.c (obj_elf_section_name): Add %S substitution.
+ * doc/as.texinfo: Document it.
+
2015-06-03 Matthew Wahab <matthew.wahab(a)arm.com>
* config/tc-arm.c (arm_archs): Add "armv8.1-a".
diff --git a/gas/as.c b/gas/as.c
index 2a8923f..fecfcd2 100644
--- a/gas/as.c
+++ b/gas/as.c
@@ -284,6 +284,8 @@ Options:\n\
fprintf (stream, _("\
--size-check=[error|warning]\n\
ELF .size directive check (default --size-check=error)\n"));
+ fprintf (stream, _("\
+ --sectname-subst enable section name substitution sequences\n"));
#endif
fprintf (stream, _("\
-f skip whitespace and comment preprocessing\n"));
@@ -447,6 +449,7 @@ parse_args (int * pargc, char *** pargv)
OPTION_EXECSTACK,
OPTION_NOEXECSTACK,
OPTION_SIZE_CHECK,
+ OPTION_SECTNAME_SUBST,
OPTION_ALTERNATE,
OPTION_AL,
OPTION_HASH_TABLE_SIZE,
@@ -481,6 +484,7 @@ parse_args (int * pargc, char *** pargv)
,{"execstack", no_argument, NULL, OPTION_EXECSTACK}
,{"noexecstack", no_argument, NULL, OPTION_NOEXECSTACK}
,{"size-check", required_argument, NULL, OPTION_SIZE_CHECK}
+ ,{"sectname-subst", no_argument, NULL, OPTION_SECTNAME_SUBST}
#endif
,{"fatal-warnings", no_argument, NULL, OPTION_WARN_FATAL}
,{"gdwarf-2", no_argument, NULL, OPTION_GDWARF2}
@@ -848,6 +852,10 @@ This program has absolutely no warranty.\n"));
else
as_fatal (_("Invalid --size-check= option: `%s'"), optarg);
break;
+
+ case OPTION_SECTNAME_SUBST:
+ flag_sectname_subst = 1;
+ break;
#endif
case 'Z':
flag_always_generate_output = 1;
diff --git a/gas/as.h b/gas/as.h
index 6de319e..635b2c5 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -589,6 +589,9 @@ COMMON enum
size_check_warning
}
flag_size_check;
+
+/* If section name substitution sequences should be honored */
+COMMON int flag_sectname_subst;
#endif
#ifndef DOLLAR_AMBIGU
diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c
index 4d7a8a7..78dc6d9 100644
--- a/gas/config/obj-elf.c
+++ b/gas/config/obj-elf.c
@@ -917,6 +917,27 @@ obj_elf_section_name (void)
name = (char *) xmalloc (end - input_line_pointer + 1);
memcpy (name, input_line_pointer, end - input_line_pointer);
name[end - input_line_pointer] = '\0';
+
+ while (flag_sectname_subst)
+ {
+ char *subst = strchr (name, '%');
+ if (subst && subst[1] == 'S')
+ {
+ int oldlen = strlen (name);
+ int substlen = strlen (now_seg->name);
+ int newlen = oldlen - 2 + substlen;
+ char *newname = (char *) xmalloc (newlen + 1);
+ int headlen = subst - name;
+ memcpy (newname, name, headlen);
+ strcpy (newname + headlen, now_seg->name);
+ strcat (newname + headlen, subst + 2);
+ xfree (name);
+ name = newname;
+ }
+ else
+ break;
+ }
+
#ifdef tc_canonicalize_section_name
name = tc_canonicalize_section_name (name);
#endif
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 5710e1c..be13b6a 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -6259,6 +6259,36 @@ For ELF targets, the @code{.section} directive is used like this:
.section @var{name} [, "@var{flags}"[, @@@var{type}[,@var{flag_specific_arguments}]]]
@end smallexample
+@cindex --sectname-subst
+If the @samp{--sectname-subst} command-line option is provided, the @var{name}
+argument may contain a substitution sequence. Only @code{%S} is supported
+at the moment, and substitutes the current section name. For example:
+
+@smallexample
+.macro exception_code
+.section %S.exception
+[exception code here]
+.previous
+.endm
+
+.text
+[code]
+exception_code
+[...]
+
+.section .init
+[init code]
+exception_code
+[...]
+@end smallexample
+
+The two @code{exception_code} invocations above would create the
+(a)code{.text.exception} and @code{.init.exception} sections respectively.
+This is useful e.g. to discriminate between anciliary sections that are
+tied to setup code to be discarded after use from anciliary sections that
+need to stay resident without having to define two @code{exception_code}
+macros just for that purpose.
+
The optional @var{flags} argument is a quoted string which may contain any
combination of the following characters:
@table @code
Nicolas
* 1 day off (2/10)
== Progress ==
* Neon intrinsics tests
- committed last batch of tests
- need to think about tests for vget_lane which are still missing,
but not high priority
* linaro-gcc-5.1-2015.06 snapshot (4/10)
- committed branch merge with upstream gcc-5-branch
- prepared snapshot & updated release scripts
* Upstream maintenance (1/10)
- backported a fix from Michael to 4.8 and 4.9 branches
- backported fix for PR62308 to 4.9 branch
- most of the time spent on bootstrapping on aarch64 HW
- started looking at some recent new tests having trouble dealing
with some multilib variants
* Misc (3/10)
- meetings, conf-calls, emails, ...
== Next ==
* linaro-gcc-5.1-2015.06 snapshot
- build release notes
- create a proper tag
* backports, release, validation:
- update doc according to our new process
* validation:
- take unstable tests into account
* upstream maintenance:
- check recent regressions
== Progress ==
* Maintenance (CARD-1833 2/10)
- Initial work on ADD<->SUB for negative imm in asm
* Buildbots (CARD-1823 6/10)
- Adding test-suite to CMake buildbot (D10244)
- Bisecting broken self-hosting vfp3 bots
* Background (2/10)
- Code review, meetings, discussions, etc.
- Some more meetings about infrastructure...
- LLVM status and plan for next half
* Sprint Week in Grenoble
== Plan ==
* Continue with CMake LNT changes
* Carry on with ADD/SUB change
* Revive ASM warnings discussion
Holiday [2/10]
Benchmark Automation - TCWG-360 [4/10]
* Learned about central Jenkins instance
* Considered ways of integrating benchmark scripts with said instance
* Considered alternative way for benchmark scripts to interoperate with LAVA
Misc [4/10]
* Large mail backlog
* Travel prep
=Plan=
Team sprint
# Progress #
* Linaro GDB [4/10]
** TCWG-805, aarch64 native debugging multi-arch support.
aarch64 native gdb is able to debug arm program now, but with some
problems on coredump. Patches are not posted.
** Give my input on GDB kernel awareness too, and the proposal finally
is posted upstream.
* FSF GDB [1/10]
** Patches review.
* Misc [5/10]
** Attend an internal ARM Debug/Tracing summit.
** Prepare for the France travel.
# Plan #
* Sprint in Grenoble.
--
Yao
Hi Linaro Toolchain Group,
I am trying to build a cross-native toolchain for AARCH64 using ABE build
framework.
By cross native I mean that toolchain will be build on 0x86 (Red hat
Santiago 6.4), it will run on AARCH64 (Juno) and
will produce binaries to be run on AARCH64 (Juno)
(If I am not mistaked) --build=0x86, --host=AARCH64, --target=AARCH64
Steps followed:
1. I built a cross toolchain first
../abe/configure
../abe/abe.sh --target aarch64-linux-gnu --build all --release 2015.05.29
--tarbin --disable update
2. Added the above cross toolchain (bin path) in the PATH
3. To build to cross-native
../abe/configure
../abe/abe.sh --host aarch64-linux-gnu --target aarch64-linux-gnu --build
all --release 2015.06.01.native --tarbin --disable update
But after some time, I got following error and compilation hanged.
make: Leaving directory
`/home/user_name/vpathak/build_abe/builds/aarch64-linux-gnu/aarch64-linux-gnu/gcc.git~linaro-4.9-branch-stage1'
RUN: copy_gcc_libs_to_sysroot
"/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc
--sysroot=/home/user_name/vpathak/build_abe/sysroots/aarch64-linux-gnu"
/home/user_name/vpathak/abe/lib/make.sh: line 962:
./builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc: cannot
execute binary file
Am I missing something ? Please help.
However with the following hack in the abe, I am able to compile
cross-native toolchain for aarch64-linux-gnu.
In the abe code base:
-------------------------------------------------------------------------------------------------------
lib/make.sh
Function copy_gcc_libs_to_sysroot()
gcc_exe="`find -name ${target}-gcc`"
- libgcc="`${gcc_exe} -print-file-name=${libgcc}`"
+ #libgcc="`${gcc_exe} -print-file-name=${libgcc}`"
+
libgcc="/home/user_name/vpathak/build_abe/builds/destdir/aarch64-linux-gnu/lib/gcc/aarch64-linux-gnu/4.9.3/libgcc.a"
Since './builds/destdir/aarch64-linux-gnu/bin/aarch64-linux-gnu-gcc' is
native toolchain it will not run on 0x86. Thus libgcc will be empty.
Therefore I hard-coded libgcc path.
-------------------------------------------------------------------------------------------------------
I had to disable gdb compilation. This error I faced while compiling
cross-native compilation only.
Cross compilation is successful on the same 0x86 machine.
checking for library containing waddstr... no
configure: error: no enhanced curses library found; disable TUI
make: *** [configure-gdb] Error 1
make: Leaving directory
`/home/user_name/vpathak/build_abe/builds/aarch64-linux-gnu/aarch64-linux-gnu/binutils-gdb.git~linaro_gdb-7.8-branch-gdb'
WARNING: Make had failures!
ERROR (#159): build_all (Failed building .)
hacked patch
--- a/lib/make.sh
+++ b/lib/make.sh
@@ -31,10 +31,10 @@ build_all()
# to rebuilt the sysroot.
local builds="infrastructure binutils libc stage2 gdb"
else
- local builds="infrastructure binutils stage1 libc stage2 gdb"
+ local builds="infrastructure binutils stage1 libc stage2"
fi
if test "`echo ${target} | grep -c -- -linux-`" -eq 1; then
- local builds="${builds} gdbserver"
+ local builds="${builds}"
fi
---------------------------------------------------------------------------------------------------------------
Thanks.
--
with regards,
Virendra Kumar Pathak
Hi Linaro Toolchain Group,
Is there any tool for checking coding style of the patches submitted to the
Linaro Toolchain ?
In other word is there any equivalent of Linux checkpatch.pl in Linaro
Toolchain (GCC, Binutils etc) ?
If yes, please let me know.
If not, then in general how people check the coding style of the patches
they submit to Linaro Toolchain (GCC, Binutils etc).
I assume manual inspection (line by line) may be very tedious thing to do.
Thanks.
--
with regards,
Virendra Kumar Pathak
== Progress ==
* Upstream GCC (8/10)
- TCWG-486 - Optimize Constant Uses in Loops.
- Jeff reviewed it and asked for some minor changes
- Rebased and redid full testing and posted it
- TCWG-555 - Complete re-write of widening pass based on review comments
- Getting ready to post for review
* Misc (2/10)
- Reading TACT User Manual
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- Continue with gcc stage1 activities
== This week ==
* Bug 539 - .LTHUNK symbols are surviving (2/10)
- Built Qt 4.8 using 4.9 and 4.9 toolchain and verified fix
identified by Jim Wilson
- Plan to close as fixed
* Bug 535 - static cast from float to int not working on ARM hardfp (2/10)
- Investigation
* TCWG-140 - Transform end of loop conditions to min_expr (1/10)
- Investigation into blueprint and patch
* TCWG-146 - Detect smin/umin idiom (2/10)
- After investigation no patch deemed necessary for aarch64
* Misc (1/10)
- Conference calls
* US Holiday - Memorial Day, May 25th (2/10)
== Next week ==
- Submit Aarch32 patch for TCWG-146 upstream
- TCWG-140 investigation
== This week ==
* TCWG-619 (4/10)
- Chromium builds with LTO single-partition with gold by changing
arm_is_long_call_p() to always return true, thereby disabling short
calls.
- Fails to build with ld.bfd for single partiition with the following error:
obj/third_party/webrtc/base/rtc_base.ipaddress.o: In function
`rtc::IPAddress::IPAddress(unsigned int)':
ipaddress.cc:(.text._ZN3rtc9IPAddressC2Ej[_ZN3rtc9IPAddressC5Ej]+0x28):
undefined reference to `vtable for rtc::IPAddress'
- gas debug for "Thumb2 branch out of range" in config/tc-arm.c:
Fails in md_apply_fix at following condition:
if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
{
if (!(ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2)))
as_bad_where (fixP->fx_file, fixP->fx_line, BAD_RANGE);
else if ((value & ~0x1ffffff)
&& ((value & ~0x1ffffff) != ~0x1ffffff))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("Thumb2 branch out of range"));
}
The condition became true for value == fffffda
Backtrace: http://pastebin.com/QZqbwNCy
Options passed to as: -march=armv7-a -march=armv7-a -mfloat-abi=hard
-mfloat-abi=hard -mfpu=neon -mfpu=neon -meabi=5
- Disabling the above condition results in:
arm-linux-gnueabihf-g++: internal compiler error: Killed (program lto1)
* PR49551 (2/10)
- Modified patch and retested on x86 and arm.
- Submitted patch upstream for review.
* Misc (4/10)
- Exams ended on Monday.
- College Annual day.
== Next Week ==
- Work towards getting the patch approved.
- Continue investigating "Thumb2 branch out of range" error.
- Begin with TCWG-777.
- Submit cfgloop.h flattening patch upstream.
Hi Linaro Toolchain Group,
I am going through the binutils code base specific to arm & aarch64. Please
give some insight on below questions.
1. In the struct bfd_arch_info {...} (in bfd/bfd-in2.h) there are two
fields 'enum bfd_architecture arch' and 'unsigned long mach'.
I went trough the binutils porting guide (by MR.Swami.Reddy(a)nsc.com) which
says 'arch' is for architecture & 'mach' is for machine value.
At present in the bfd/bfd-in2.h :- arch = bfd_arch_aarch64 and mach =
bfd_mach_aarch64 or bfd_mach_aarch64_ilp32.
But what these fields really means ? What is the difference between 'arch'
and 'mach'?
Lets say instruction set architecture is ARMv8 (also known as aarch64 for
64 bit- if I am not wrong). Then we have specific implementation of this
like cortex53, cortex57, Cavium ThunderX etc. With respect to this what
will be the value of arch = ? and mach = ?
2. In the include/opcode/arm.h the 'arm_feature_set' is defined as a
structure where as in include/opcode/aarch64.h 'aarch64_feature_set' is
defined as unsigned long. Is there any specific reason for this? Why
structure definition was not followed in aarch64 ?
typedef struct
{
unsigned long core;
unsigned long coproc;
} arm_feature_set;
typedef unsigned long aarch64_feature_set;
3. Also I see that in the case of arm, 'mach' values are derived from cpu
extension value specified in that 'arm_feature_set' structure.
For example.
if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_cext_iwmmxt2))
mach = bfd_mach_arm_iWMMXt2;
Whereas in aarch64 mach is derived based on API type (64 or 32). Any
reason for this ?
mach = ilp32_p ? bfd_mach_aarch64_ilp32 : bfd_mach_aarch64;
Thanks in advance.
--
with regards,
Virendra Kumar Pathak
== Progress ==
TCWG-775 NEON error messages (2/10)
. wrote new patch for Aarch64
. tried to test it, but GCC testsuite stopped working on my laptop
(random failures with "test for errors, tests randomly being marked
UNSUPPORTED)
Bank Holiday [2/10]
Bug #1599 [1/10]
. reproduced bug on Linaro GCC 4.9
, bisected both the cause and the trunk fix
Misc [5/10]
. attempted to diagnose GCC testsuite problems. Seems to be related to
kernel version somehow.
. Erratum workaround stuff (bug 1550, bug 1596)
== Plans ==
Find working kernel for laptop
Cleanup/submit patch for TCWG-775
Create JIRA cards following vectorization study (TCWG-735)
Bank holiday on Monday. [2/10]
# Issue #
No. Ubuntu is successfully installed on my chromebook.
# Progress #
* Linaro GDB [4/10]
** TCWG-517, GDB AAarch64 record/replay. Done.
Patches are committed upstream. Fix one build failure caused
these patches.
** TCWG-805, aarch64 native debugging multi-arch support.
*** Switch to PTRACE_GETREGSET and PTRACE_SETREGSET. Patches are posted
upstreams.
*** Get ubuntun 14.02 running on chrombook successfully.
** Give my input on GDB kernel awareness too.
* FSF GDB [3/10]
** PR 18392, review the fix and understand the code about tail call
unwinding.
** Approve and commit some tiny patches.
* Misc [1/10]
** Prepare for incoming France travel.
** Book flight and hotel for GNU Tools Cauldron.
Next week:
* TCWG-805, aarch64 native debugging multi-arch support.
--
Yao
== Progress ==
* Bank Holiday (2/10)
* Maintenance (CARD-1833 6/10)
- Finished all FIXMEs in LLVM and Clang
- Working on ASM warnings
* Background (2/10)
- Code review, meetings, discussions, etc.
- Updated arm-bots.html to account for build num, commit range
== Plan ==
* Continue working on ASM warnings
* Move a few left-overs in ARMAsmParser to use ARMTargetParser
If time allows...
* Check the ADD -> SUB change in the assembler
* Try to get the test-suite running on a CMake buildbot
Background
* Check the progress of some Android bugs
* 1 day off
* Neon intrinsics tests (4/10)
- submitted last set for review
* Misc (4/10)
- meetings, conf-calls, emails, ...
- checks for our new GCC mirror
== Next ==
* Neon intrinsics tests: work on vget_lane test.
* linaro-gcc-5.1-2015.06 release:
- start working on backports
* TCWG-619 (2/10)
- "branch out of range" error disappears by disabling sibling call optimization
- using gold results in internal error at arm.cc:4192
- using ld.bfd results in tons of same errors message during LINK
chrome - "thumb2 branch out of range"
- building with "-dp" option shows the error comes for function calls,
generated from pattern call_value_symbol.
* PR49551 (2/10)
- Bootstrapped on x86, tested on x86 and arm.
- added test-case.
* Misc (6/10)
- Exams
== Next Week ==
- Submit patch to PR49551 upstream
- Continue investigating "branch out of range" error.
- Rebase and submit cfgloop.h flattening patch upstream.
== Progress ==
* Upstream GCC (8/10)
- vector cost (TCWG-779)
- benchmarking complete and analysed
- Committed after full testing (bootstrap and regression testing)
- Started working on widening pass based on review comments (TCWG-555)
- Completed re-factoring with the new ideas
- ran into many ICEs with the patch and making progress
* Misc (2/10)
- Looked at http://ctuning.org/wiki/index.php?title=CTools:MilepostGCC
again
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- Continue with gcc stage1 activities
== Progress ==
* Releases (CARD-1431 1/10)
- Final ARM/AArch64 3.6.1
* Automation Framework (CARD-1378 1/10)
- More meetings with Lab about infrastructure
* Maintenance (CARD-1833 5/10)
- Working on FIXMEs to TargetParser
* Buildbots (CARD-1823 1/10)
- Bisecting self-hosting failure on thumbv7a
* Background (2/10)
- Code review, meetings, discussions, etc.
- More stride vectorizer reviews (D9368)
- Setting up boards for developers
== Plan ==
* Finish the parser FIXMEs, get on with ASM warnings
* Check some Android bugs and see if I can reduce their numbers
* Probably a bit more infrastructure discussions
# Issues #
* Don't have arm board to run native gdb testsuite (my pandaboard is
too slow to run native tests). Get a chromebook, but takes a lot
of time installing ubuntu on it. Network still doesn't work, don't
know how much time are still needed to fix networking issues.
# Progress #
* Linaro GDB
** TCWG-517, GDB AAarch64 record/replay. [3/10]
These bits are finally posted upstream. The review looks good.
** TCWG-805, aarch64 native debugging multi-arch support. [4/10]
*** Switch to PTRACE_GETREGSET and PTRACE_SETREGSET. Patches are done,
but takes much time to set up GDB native testing env, as linaro
tcwglab is still unreachable.
Install ubuntun 14.02 on chrombook. Done, but network driver
doesn't work.
** Give my input on GDB kernel awareness.
** Tweak pandaboard for native gdb testing. Done.
** AArch64 debugging on different ELs, a meeting is scheduled
in the sprint but I ask more details before that meeting.
* FSF GDB [1/10]
** Review a patch about arm abi detection for ELFOSABI_GNU. Approve it.
** Review a patch about compile feature in GDB.
* Misc [2/10]
** Go to London for France Visa application on Monday and get visa on
Thu.
# Plan #
* TCWG-517, GDB AAarch64 record/replay.
Address review comments and push them in.
* TCWG-805, aarch64 native debugging multi-arch support.
Set up chromebook and test my patches on it.
--
Yao
Holiday Thursday afternoon and Friday [3/10]
Benchmark automation - TCWG-360 [4/10]
* CPU2006 patches cleaned up, submitted
* A few other small fixes
Misc [3/10]
* ~1/10 getting a Juno running
=Plan=
Holiday next week, then:
Pick a direction on streaming vs listeners, write down the reasoning
Follow up (close out?) results storage and restricted targets
Write more tests, refactoring where appropriate
Investigate running benchmarks through ci.linaro.org
If time, and it looks sane, wrap a LAVA job around benchmark scripts
== Progress ==
LLDB development
-- Submitted and committed AArch64 hardware watchpoint/breakpoint
support [2/10] [TCWG-771]
-- Submitted Arm hardware watchpoint/breakpoint support [1/10] [TCWG-770]
-- Debugged arm watchpoints on Nexus 7 Android device. [2/10] [TCWG-651]
Miscellaneous [5/10]
-- Submitted AArch64 gdb record-replay patches
-- Travel to Islamabad for interview at French Embassy
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Fix issues with hardware watchpoints and try to run tests on Nexus 7
-- Update and resubmit Arm hardware watchpoint patch.