Hi,
We've had trouble using ABE recently.
abe$ ./abe.sh --target aarch64-linux-gnu
NOTE: Downloading md5sums to abe/snapshots
RUN: /usr/bin/wget --timeout=10 --tries=2 --directory-prefix=abe/snapshots/ http://abe.tcwglab.linaro.org/snapshots/md5sums
--2015-04-21 16:02:33-- http://abe.tcwglab.linaro.org/snapshots/md5sums
Resolving abe.tcwglab.linaro.org (abe.tcwglab.linaro.org)... 81.128.185.43
Connecting to abe.tcwglab.linaro.org (abe.tcwglab.linaro.org)|81.128.185.43|:80... connected.
HTTP request sent, awaiting response... 502 cannotconnect
2015-04-21 16:02:42 ERROR 502: cannotconnect.
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
== Progress ==
LLDB development
-- Wrote hardware breakpoint handlers for NativeLinuxRegisterContext
ARM [2/10] [TCWG-770]
-- Debugging for issues and code cleanup AArch64 LLDB watchpoint
support [2/10] [TCWG-771]
-- Fix, test, debug, cleanup and patch re-submission. [1/10]
-- Resubmitted, update and commited ARM SysV ABI implementation.
[TCWG-643]
-- Resubmitted, update and commit AArch64 SysV ABI
implementation. [TCWG-715]
-- Setting up android test environment [TCWG-651]
GDB development [1/10] [TCWG-677]
-- Clean-up arm-linux record replay test cases
Miscellaneous [2/10]
-- Meetings, emails, discussions etc.
-- Toolchain Sprint travel bookings and visa application preparation.
Public Holiday [2/10]
-- Friday 1st May 2015 (Labor Day)
== Plan ==
LLDB development
-- Complete work on AArch64 watchpoints and hardware breakpoints
-- Hopefully submit ARM watchpoint work may be later in the week.
-- Figure out android development
Miscellaneous
-- Complete and submit France visa application
GDB development
-- Gather ARM/AArch64 record-replay testsuite work and submit patches for yao.
- Public holiday (2/10)
== Progress ==
* Upstream GCC (3/10)
- TCWG-796 Zero/sign extension elimination with vrp.
- TCWG-555 posted patch for compiler pass to widen computation to
back-end promoted mode
* IRA (4/10)
- Looked at https://bugs.linaro.org/show_bug.cgi?id=540 (TCWG-773
Median of three has unneeded register moves)
* Misc (1/10)
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- Continue with gcc stage1 activities
- Look at register allocation
== This week ==
* TCWG-619 (8/10)
PR65858
- workaround: add explicit casts in the file cld_generated_cjk_uni_prop_80.cc
- created reduced test case: http://pastebin.com/WJvKRjn2
- commit r222249 introduced the issue
- patch submitted upstream:
https://gcc.gnu.org/ml/gcc-patches/2015-04/msg02063.html
- Paolo Carlini pointed out it doesn't work with -w option, instead of testing
on warn_narrowing flag, he modified it to check on pedwarn()'s return
value, which
covers up for both -Wno-narrowing and -w, and committed with
this modification (r222700).
PR65837
- patch to lto-wrapper rejected.
- Another hack to pass driver's argv to lto-wrapper via another
environment variable
COLLECT_GCC_OPTIONS_DRIVER rejected by Richard.
- Ramana and Richard pointed out the proper fix would be to handle
target attributes in ARM backend.
- I could try extending Christian Bruel's target attribute patches for
fpu options
after they're checked in which would then fix the PR.
chromium LTO build
- Many instances of same error message during LINK chrome:
chrome.ltrans0.s:18399164: Error: Thumb2 branch out of range
chrome.ltrans0.s:9671243: Error: branch out of range
works fine for non-lto.
A similar issue, occurred for v8 LTO build - PR65778, but
it was marked resolved invalid.
- chromium builds with LTO for chrome component.
- ld.bfd segfault while building chromium with LTO not reproducible with master.
- non-LTO build undefined reference to libattr1 functions not reproducible with
ld.bfd master. This probably was sysroot/libc issue than issue with ld.bfd.
* PR49551 (2/10)
- reverting r221297 reproduces the ICE
- tried to fix with following patch:
http://pastebin.com/knuWeY0C
- fixes the ICE but following regressions observed on arm-linux-gnueabihf:
http://pastebin.com/E1zLtq8s
== Issues ==
- Can't login to cards.linaro.org (was able to before).
I get error - "You do not have permission to login".
== Next Week ==
- Investigate testsuite failures for PR49551
- Selectively enable LTO on components in chromium.
- exams preparation
* Half day leave on Thu, [1/10].
# Progress #
* arm/aarch64 gdb bug fixing. [3/10]
** TCWG-765, fails in gdb.base/coredump-filter.exp. No progress, as no
one reviews the patch.
** TCWG-672, fails in gdb.base/relativedebug.exp, fixed.
** TCWG-567, fails in gdb.base/break-idempotent.exp, fixed.
** TCWG-767, Propose to disable target-side evaluation of breakpoint
condition for software single step targets. Patch is posted.
* TCWG-805, aarch64 gdb multi-arch support, [2/10]
* TCWG-729, investigate GDB multi-target support, [2/10]
* TCWG-757, upstream patch review, [1/10]
* Misc [1/10]
** Meeting,
** Fill online forms for France visa application,
** Book travel to Grenoble.
# Plan #
* Public holiday on Monday.
* TCWG-805, aarch64 gdb multi-arch support,
* TCWG-729, investigate GDB multi-target support,
* other arm/aarch64 gdb test fails fixing.
--
Yao
benchmark automation - TCWG-360 [3/10]
* Shifted more generic patches from backport branch to review
* One complete run of backport benchmarking before lab went down
Misc [7/10]
* Most of this (4 or 5 tenths) is reaction to lab downtime
=Plan=
Benchmarking test suite
Fish out, finish off thoughts about benchmark access control
NB Next Monday (4th May) is a public holiday in UK
== Progress ==
LLDB development
-- Debugging test code for hardware breakpoint/watchpoint issues on
chromebook for ARM LLDB support [4/10] [TCWG-770]
-- Wrote native process linux helpers for arm and aarch64 hardware
breakpoints [2/10] [TCWG-770] [TCWG-771]
-- Fix, test, debug, cleanup and patch re-submission. [3/10]
-- LLDB ARM SysV ABI implementation. [TCWG-643]
-- LLDB AArch64 SysV ABI implementation. [TCWG-715]
-- Native process linux bug fixes [TCWG-651]
Miscellaneous [1/10]
-- Upstream reviews
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- At least submit lldb arm hardware breakpoint native process linux
helper functions
-- Resubmit register read/write bug fix after changes
-- Resubmit LLDB ARM SysV ABI implementation.
-- Resubmit LLDB AArch64 SysV ABI implementation.
-- Bug fixing, patch reviews etc
== This Week ==
* TCWG-619:
* abe sysroot/libc issue
While building chromium with development build of toolchain on
arm-linux-gnueabihf, I get the following error:
undefined reference to clock_gettime()
Builds fine with release toolchain build.
Symlinking libc in toolchain install directory to
sysroots/arm-linux-gnueabihf appears to work (which is what --tarbin
did).
* PR65778 - v8 fails to build with LTO
- Resolved Invalid
* PR65837 - target specific builtin not available
- created a reduced test case
- There's a weird issue: looks like for lto1, translation unit command
line options,
precede the default ones rather than overriding them.
Assume test.c contains a neon intrinsic:
arm-linux-gnueabihf-gcc -flto -c test.c -mfpu=neon
arm-linux-gnueabihf-gcc -flto test.o
results in target specific builtin not available,
because both -mfpu=neon and -mfpu=vfpv3-d16 is passed
and -mfpu=vfpv3-d16 overrides earlier -mfpu=neon
Passing -mfpu=neon at link time correctly overrides -mfpu=vfpv3-d16.
* PR6778 - ICE in varpool_node::get_constructor.
- Looks like PR65776 appears due to same issue as well.
- It appears error_mark_node gets streamed that causes ICE.
- Triage went wrong, thought it was an error in typeck2.c:check_narrowing().
* PR49551
- The C front-end c/c-decl.c:merge_decls still incorrectly marks the
variable as 'common' for the test-case:
int x = 5;
int x;
However it's not reproducible anymore on trunk (maybe latent?)
- I have an untested patch that resolves the issue in merge_decls().
* Issues
- abe built native gcc on x8_64-unknown-linux-gnu fails to build code
when passed -m32 option (bug 1508).
* Misc
- exams on 20th and 24th april.
* Next week
- Continue working on PR65837, PR65778
- Test patch for PR49551
== Issue ==
* none
== Progress ==
o Upstream GCC (8/10)
* [TCWG-785] ARM backend insn cleanup
- Validate and re-worked the patch
- About to be submitted upstream
* [TCWG-762] - GCC Maintenance
- PR64208 (iWMMXT LRA bug):
Found hardware to validate the fix (Thanks Riku :)
Validation ongoing
* Lot of time wasted due to lab compromisation
o Misc (2/10)
* Various meetings
* GCC git repository branches cleanup
== Plan ==
- Continue cleaning GCC git repo to prepare our migration
- Continue upstream pending work
== Progress ==
* Upstream GCC (9/10)
- TCWG-780 - Improve register allocation for
aarch64_*_sisd_or_int<mode>3 patterns.
- TCWG-486 - Optimize Constant Uses in Loops. Posted the arm part of
the patch that addresses review comments after full testing. Waiting for
the cprop review.
- TCWG-796 Zero/sign extension elimination with vrp. Posted the new set
of patches for review. Looking at the testcases H.J.L. pointed me to.
- TCWG-779 Vector rtx costs for AArch64. Posted the patch that
addresses review comments after full testing.
* Misc (1/10)
- gcc-patches, gcc-bugs list
- Meetings
== Plan ==
- Continue with gcc stage1 activities
- Monday public holiday
# Progress #
* arm/aarch64 gdb bug fixing. [5/10]
** PR 18208 (TCWG-765) fails in gdb.base/coredump-filter.exp. Workaround
tricky quote issue with dejagnu/tcl/ssh/bash. A RFC is posted out.
** Fails in gdb.base/relativedebug.exp (TCWG-672), patch is posted out
review.
** Fails in gdb.base/break-idempotent.exp. Skip some tests in it which
require more than one HW watchpoint registers, while arm-linux only
has one. Patch is posted out.
** TCWG-793, do experiment with showing LSB of address in thumb mode inside GDB,
in order to align with MIPS(microMIPS/MIPS16). It needs more work
than expected, and even out the scope of GDB. It is paused.
* FSF GDB patch review. [4/10]
** Review "all stop on top of non stop" V3, done.
** Review "memory-mapped register browsing" patch. Requested more
information from the author.
* Misc, meeting. [1/10] # Plan # * Fix test fails for arm and aarch64 gdb.
* Continue my HW watchpoint resource counting patches once linaro boxes
are online. These boxes don't have HW watchpoint support, and GDB
doesn't handle this case well.
* Upstream patches review.
--
Yao Qi
== Progress ==
LLDB development
-- Some progress on hardware watchpoint support for lldb arm linux.
[1/10] [TCWG-770]
-- Some progress on hardware watchpoint support for lldb aarch64
linux. [1/10] [TCWG-771]
-- LLDB ARM SysV ABI implementation. [4/10] [TCWG-643]
- Testing and updates with upstream suggestion
- Figuring out a method to handle thumb functions unwind information.
-- LLDB ARM: Bug fixes. [3/10] [TCWG-651]
Miscellaneous [1/10]
-- Upstream reviews
-- Meetings, emails, discussions etc.
== Plan ==
LLDB development
-- Progress towards hardware watchpoint support for lldb arm linux.
-- Progress towards hardware watchpoint support for lldb aarch64 linux.
-- Bug fixing, patch reviews etc
Hi all,
I have built our customized u-boot (u-boot-2012.10-rc3), with two Linaro toolchain, but have no luck with the latest toolchain.
The u-boot built with gcc-linaro-arm-none-eabi-4.9-2014.09_linux can boot on the development board. This toolchain was pre-built toolchain from Linaro, built with crosstool-NG. The version is gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09)
With the same u-boot source, the binary built with the Linaro gcc 4.9 2015.04 hang on the same board. The 2nd toolchain was compiled locally on RHEL6, built with ABE tool. We build it locally to avoid "GLIBC_2.14 not found" issue on the pre-built toolchain. The version is gcc version 4.9.3 20150413 (prerelease) (Linaro GCC 2015.04)
Does anyone have an idea what happen? Is it a regression bug in gcc4.9?
Thanks,
Joel
--------------------------------------------------------
[joelz@ldt-joelz]:$ /projects/broadcom-linux/shared/toolchains/gcc-linaro-arm-none-eabi-4.9-2014.09_linux/bin/arm-none-eabi-gcc -v
Using built-in specs.
COLLECT_GCC=/projects/broadcom-linux/shared/toolchains/gcc-linaro-arm-none-eabi-4.9-2014.09_linux/bin/arm-none-eabi-gcc
COLLECT_LTO_WRAPPER=/projects/broadcom-linux/shared/toolchains/gcc-linaro-arm-none-eabi-4.9-2014.09_linux/bin/../libexec/gcc/arm-none-eabi/4.9.2/lto-wrapper
Target: arm-none-eabi
Configured with: /cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/src/gcc-linaro-4.9-2014.09/configure --build=i686-build_pc-linux-gnu --host=i686-build_pc-linux-gnu --target=arm-none-eabi --prefix=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/install --with-local-prefix=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/install/arm-none-eabi --without-headers --with-newlib --enable-threads=no --disable-shared --with-pkgversion='crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09' --with-bugurl=https://bugs.launchpad.net/gcc-linaro --disable-__cxa_atexit --with-gmp=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --with-mpfr=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --with-mpc=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --with-isl=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --with-cloog=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --with-libelf=/cbuild/slaves/oorts/crosstool-ng/builds/arm-none-eabi-linux/.build/arm-none-eabi/build/static --enable-lto --enable-linker-build-id --enable-libmudflap --disable-libgomp --enable-libssp --disable-libstdcxx-pch --enable-multilib --enable-languages=c,c++,fortran --with-multilib-list=aprofile
Thread model: single
gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09)
---------------------------------------------
[joelz@ldt-joelz]:$ /projects/toolchains/gcc-4.9-rhel6-local-build/bin/arm-linux-gnueabi-gcc -v
Using built-in specs.
COLLECT_GCC=/projects/toolchains/gcc-4.9-rhel6-local-build/bin/arm-linux-gnueabi-gcc
COLLECT_LTO_WRAPPER=/projects/toolchains/abe/_build/builds/destdir/x86_64-unknown-linux-gnu/libexec/gcc/arm-linux-gnueabi/4.9.3/lto-wrapper
Target: arm-linux-gnueabi
Configured with: '/projects/toolchains/abe/_build/snapshots/gcc.git~linaro-4.9-branch/configure' SHELL=/bin/sh --with-bugurl=https://bugs.linaro.org --with-mpc=/projects/toolchains/abe/_build/builds/destdir/x86_64-unknown-linux-gnu --with-mpfr=/projects/toolchains/abe/_build/builds/destdir/x86_64-unknown-linux-gnu --with-gmp=/projects/toolchains/abe/_build/builds/destdir/x86_64-unknown-linux-gnu --with-gnu-as --with-gnu-ld --disable-libstdcxx-pch --disable-libmudflap --with-cloog=no --with-ppl=no --with-isl=no --disable-nls --enable-multiarch --disable-multilib --enable-c99 --with-tune=cortex-a9 --with-arch=armv7-a --with-fpu=vfpv3-d16 --with-float=softfp --with-mode=thumb --with-build-sysroot=/projects/toolchains/abe/_build/sysroots/arm-linux-gnueabi --enable-lto --enable-linker-build-id --enable-long-long --enable-shared --with-sysroot=/projects/toolchains/abe/_build/builds/sysroot-arm-linux-gnueabi --enable-languages=c,c++,fortran,lto --enable-fix-cortex-a53-835769 --enable-checking=yes --disable-bootstrap --with-bugurl=https://bugs.linaro.org --with-pkgversion='Linaro GCC 2015.04' --build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu --target=arm-linux-gnueabi --prefix=/projects/toolchains/abe/_build/builds/destdir/x86_64-unknown-linux-gnu
Thread model: posix
gcc version 4.9.3 20150413 (prerelease) (Linaro GCC 2015.04)
Hi,
I am using the linaro tolchain to create a root-filesystem for an embedded
Linux system.
I would like to copy the essential include files and libraries(libc) from
the toolchain to the rootFS of the embedded system.
Is there any explanation of the folder structure of the toolchain so I know
which folder to copy?
How do I know which files to copy and where those files are located in the
toolchain?
Thanks,
Robert
Hello,
In an effort to provide a longer quality control window for quarterly
releases the Linaro Toolchain Working Group will be making some changes to
the release process starting with the forthcoming 2015.04 products.
Little will change for the consumers of TCWG products.
The current monthly source release of the 'stable' Linaro GCC source
archives posted to releases.linaro.org will move to snapshots.linaro.org
and will be designated 'monthly snapshots'.
The exact location will be announced when the 2015.04 Toolchain component
source archive release notes are posted to this mailing list.
These monthly snapshots will continue to have branch merges, performance
fixes, security fixes, and correctness fixes applied on a monthly basis.
They will also continue to have validation across a variety of common ARM
targets performed (per backport) against them.
TCWG will introduce the concept of a 'release candidate source archive' and
'release candidate binary toolchain archive' six weeks before the projected
release date of the Quarterly Binary Toolchain Release. For example, the
2015.05 Quarterly Binary Toolchain and Quarterly Source Archive will be
based upon the 2015.04 source archive snapshot.
Release candidate source and binary archives will be posted to
snapshots.linaro.org.
This release candidate will receive the scrutiny of internal and external
stakeholders for six weeks and give an opportunity to evaluate the
forth-coming Quarterly Binary Toolchain Archive and Source Archive
Release. Problems found with the release candidates will result in the
availability of incremental release candidate archives.
The official quarterly release will be posted to releases.linaro.org.
Please direct any questions or concerns to this mailing list or to me
directly.
--
Ryan S. Arnold
Linaro Toolchain Working Group - Engineering Manager
www.linaro.org
Benchmark automation - TCWG-360 [5/10]
* Flushed the rest of the easy stuff from my 'small fixups' to my
'staging' branch
* Started rolling generic patches from my backport-benchmark branch into gerrit
* Prodded at the prototype backport-benchmark job until the pieces worked
** Ran out of time to try an end-to-end run
* Thought a little about permissions for access to source/results
* Use of nc.traditional appears to have introduced a race condition
catomics - TCWG-436 [2/10]
* Tried a run on A15 - same story as A57, good improvement on g8 libc
ubenchmark that doesn't translate into SPEC subset
* Performance counting the ubenchmark suggests variation around cache
accesses on the catomic vs not-catomic code, didn't have any time to
think about what, if anything, this means
Misc [3/10]
* Featuring an unusual level of ARM interruption
* Especially concerns about change from multiarch to non-multiarch
sysroot in binary releases
=Plan=
Confirm backport benchmarking working, roll remaining generic patches
into gerrit
Investigate the nc.traditional race
Add a retry loop around LAVA boot (occasionally see LAVA-fail here)
Create unit tests
Follow up on (non-)multiarch sysroot issue
=== Progress ===
* Get TSAN building for Aarch64 on 42-bit VMA systems. (4/10) (-pie mode only)
Expected Passes : 253
Expected Failures : 2
Unsupported Tests : 1
Unexpected Failures: 13
The failures are categorized into three types.
(1) setjmp and longjmp implementation in assembly needs to written for Aarch64 .
ThreadSanitizer :: longjmp.cc
ThreadSanitizer :: longjmp2.cc
ThreadSanitizer :: longjmp3.cc
ThreadSanitizer :: longjmp4.cc
ThreadSanitizer :: signal_longjmp.cc
(2) FATAL: ThreadSanitizer: failed to intercept pthread_cond_init. I
need to debug and see why this happens.
ThreadSanitizer :: bench_mutex.cc
ThreadSanitizer :: cond.c
ThreadSanitizer :: cond_cancel.c
ThreadSanitizer :: cond_race.cc
ThreadSanitizer :: cond_version.c
ThreadSanitizer-Unit :: rtl/TsanRtlTest/Posix.CondBasic
(3) TLS descriptions ThreadDescriptorSize (), GetTls () and ThreadSelf
() defintions are needed for aarch64.
tls_race.cc
tls_race2.cc
Some ptrace defintions are needed PTRACE_GETREGS, PTRACE_SETREGS
PTRACE_GETFPREGS, PTRACE_SETFPREGS for sanitizer, but they are not
implemented for Aarch64. I am planning to switch off that code in
TSAN.
* ASAN/TSAN documentation. ASAN documentation complete. TSAN in progress. (4/10)
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan.
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
===Plan ===
Complete TSAN documentation.
Analyze remaining failures for TSAN.
Push LLVM tree to git.linaro.org for handover.
* Backports (3/10)
- Backports validated and commited to SVN for April release
- 219724 - Add a new scheduling description for the ARM
Cortex-A57 processor
- 219746 - Fix broken 219724
- 220103 - A57 pipeline model
- 220399 - Add support for -mcpu=cortex-a72 and
-mcpu=cortex-a72.cortex-a53
- 220413 - Add support for -mcpu=cortex-a72
* Illness (6/10)
* Misc (1/10)
- Conference calls
== Next week ==
- Begin backports for May release
- Continue TCWG 110 investigation
