- linaro-toolchain - lists.linaro.org

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11 years

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by Bernie Ogden

=Progress= memcpy regression on A9 - TCWG-390 [6/10] * cortex-strings benchmarks suggest this isn't just an outlier, nor entirely about preload * Quick test on A15 suggests a similar (less severe) issue * Got cortex-strings benchmarks more-or-less running via lava memset performance improvement - TCWG-156 [1/10] * GNU benchtests not as repeatable as hoped lowlevellock performance bugs - TCWG-435 [1/10] * Converted a bunch of inline functions into macros for coldfire Meetings/mail/etc [2/10] =Plan= Carry on generating memcpy data, develop some hypotheses Bugfix lava-ization of cortex-strings benchmarks as & when Explore repeatability of cortex-strings benchmark See how much quicker I can make cortex-strings benchmark without compromising repeatability Try to get lowlevellock.h committed for at least arm/aarch64

11 years

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[ACTIVITY] 16 - 20 June

by Venkataramanan Kumar

== Progress == * TCWG-418 : Bug fix Reload spill failure (3/10) Bench marked coremark – no degradations with patch. CPU2000 runs – Workedon running them as native in chromebook. Issues with space. * TCWG-181 : LTO enablement (3/10) GCC 4.9 FSF no ICE . Linaro 14.07 release has ICE. GIT bisect experiments on trunk on Aarch64 hardware. * Misc: (2/10) - Various meetings . - PGO bootstrap runs on Aarch64 hardware - pass. * AMD team out on 19th (2/10). == Next == * GIT bisect experiments on LTO bootstrap. * Continue Benchmark reload spill failure fix * Explore on Large memory model support for aarch64 * Cbuildv2 release packaging on native.

11 years

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[ACTIVITY] Week 24

by Yvan Roux

== Issues == * None == Progress == * TCWG-496 : Linaro GCC 4.9 2014.07 (8/10) - Backported all the identified needed trunk revisions. - All the patch reviews are OK. - Validation ongoing - Looked at Jenkins/cbuildv2/schroot validation issues. * Misc: (2/10) - TCWG-444 : Final Linaro GCC 4.7 release o Reviewed and approved FSF branch merge. - Various meetings. == Next == * Complete validation and backports.

11 years

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Reg. Error during binutils build

by Gopalasubramanian, Ganesh

I got an error while trying to build the latest Linaro-binutils source (http://releases.linaro.org/14.06/components/toolchain/binutils-linaro/binut…). ../bfd/bfd.h:304:75: error: right-hand operand of comma expression has no effect [-Werror=unused-value] #define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE) Found that the error is already resolved in FSF trunk (https://sourceware.org/ml/binutils/2014-01/msg00334.html). Is that on cards for backport? Regards Ganesh

11 years

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[ACTIVITY] 16-20 June 2014

by Kugan

== Progress == * Benchmarking and regression testing (TCWG-468) (3/10) - More aarch64 spec2k benchmarking of patches and against fsf 4.9 release - Spec2k a15 benchmarking on chromebook * Zero/sign extension elimination (TCWG-15) (5/10) - Fixed regressions found and broke the patch into two - Looking at improving zero/sign extension elimination as it is not happening for one test-case now - Plan to benchmark the changes and post for review once this is done. * LP spec2k regression bugs (2/10) - #1320965 : Cant reproduce ICE but goes into infinite loop with -floop-interchange at -O3; Looking into it -#1330725 : Invalid as -fno-strict-overflow is needed for 254.gap. == Plan == * Benchmarking and spec2k bugs. * Upstream zero/sign extension elimination activities.

11 years

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[ACTIVITY] Week 25

by Zhenqiang Chen

== Issues == * None. == Progress == * loop2-invariant heuristics tuning (TCWG-469, 2/10). Two patches were committed @r211818 and r211885. Another two are in review. * Test the rebased ccmp patches (TCWG-488, 2/10). * Send out a patch to enhance cprop pass by checking rtx_cost. Collect benchmark results and update the patch according to comments (TCWG-486, 6/10). == Plans == * Ping pending patches. * Continue on patches to optimize constant in loop.

11 years

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[ACTIVITY] 16-20 June 2014

by Christophe Lyon

== Progress == * GCC trunk cross-validation (CARD-647) (5/10) - fixes to email-driven robot, now generating html reports - trouble shooting transcient problems with the compute farm - added a57+crypto FPU configuration, still under test - added libstdc++ reports * AArch64 libsanitizer (TCWG-58) - Started looking at results. Different errors when running on HW and under QEMU (where it goes in an infinite loop) * Misc (meetings, conf-calls, ...) 3/10 - 4.7-2014.06 branch merge completed. - 4.9 backports reviews - trouble shooting connexion to tcwgXXX boards == Next == * GCC cross-validation - more fixes and enhancements - continue testing of the email robot * Neon intrinsic tests: - discuss with upstream * AArch64 libsanitizer: - investigate generated code and cause for infinite loop * Make 4.7-2014.06 final release

11 years

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[ACTIVITY] Week 25

by Renato Golin

== Progress == * Automation Framework (CARD-1378 8/10) - Setting up D01s - Wasting time on Pandas - Setting up serial console - Preparing Chromebook2s - Testing remote gcc check * Background (2/10) - Code review, meetings, discussions, etc. == Plan == * help Guodong with D01 stabilisation * have a look at compiler-rt autoconf build for buildbots * start looking at the LLVM + GCC presentation * probably more lab stuff...

11 years

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Issue with LPAE in Linux kernel

by Taras Kondratiuk

It seems we have an issue with 4.8 toolchain. Recent Linux kernels (v3.15, v3.16) fails to boot on TI Keystone 2 SoC with LPAE enabled if built by gcc 4.8, while they boots fine if built by 4.6, 4.7 or 4.9. Linux kernel versions used for testing: - 3.15, 3.16 - git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 4.8 toolchain binaries: http://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-a… 4.9 toolchain binaries: http://releases.linaro.org/14.05/components/toolchain/binaries/gcc-linaro-a… Our current investigation results: 1) The issue happened somewhere inside function arch/arm/mm/mmu.c -> paging_init(). 2) At the moment when paging_init() -> kmap_init() function is called the value of static structure "init_mm" become corrupted and (&init_mm)->pgd has changed its value from 0xc0003000 to 0xe2411001. 2.1) "init_mm" is initialized statically in mm/init-mm.c and not modified by code struct mm_struct init_mm = { .mm_rb = RB_ROOT, .pgd = swapper_pg_dir, .mm_users = ATOMIC_INIT(2), .mm_count = ATOMIC_INIT(1), .mmap_sem = __RWSEM_INITIALIZER(init_mm.mmap_sem), .page_table_lock = __SPIN_LOCK_UNLOCKED(init_mm.page_table_lock), .mmlist = LIST_HEAD_INIT(init_mm.mmlist), INIT_MM_CONTEXT(init_mm) }; 2.2) The below debugging code produces following log output: [ 0.000000] cma: CMA: reserved 16 MiB at 2e800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] ==== map_lowmem c06ecc08 c0003000 [ 0.000000] ==== dma_contiguous_remap c06ecc08 c0003000 [ 0.000000] ==== devicemaps_init c06ecc08 c0003000 [ 0.000000] ==== kmap_init c06ecc08 e2411001 [ 0.000000] Unhandled fault: alignment fault (0x221) at 0xe2411011 Debugging code: void __init paging_init(const struct machine_desc *mdesc) { void *zero_page; build_mem_type_table(); prepare_page_table(); pr_err("==== map_lowmem %p %p\n", &init_mm, (&init_mm)->pgd); map_lowmem(); pr_err("==== dma_contiguous_remap %p %p\n", &init_mm, (&init_mm)->pgd); dma_contiguous_remap(); pr_err("==== devicemaps_init %p %p\n", &init_mm, (&init_mm)->pgd); devicemaps_init(mdesc); pr_err("==== kmap_init %p %p\n", &init_mm, (&init_mm)->pgd); kmap_init(); pr_err("==== tcm_init\n"); 2.3) Most of functions called by paging_init() are static and get inlined. If 'static' modifier is removed from devicemaps_init() (so it will not be inlined by compiler), the issue disappears and kernel boots fine. 2.4) The same kernel binary boot fine if LPAE is disable. Does it make sense to file a toolchain bug? === Log === Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 3.15.0-rc8-next-20140605-dirty (x0174654@uglx0174654) (gcc version 4.8.3 20140401 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2014.04 - Linaro GCC 4.8-2014.04) ) #93 SMP PREEMPT Fri Jun 6 15:31:19 EEST 2014 [ 0.000000] CPU: ARMv7 Processor [412fc0f4] revision 4 (ARMv7), cr=30c7387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: Texas Instruments Keystone 2 Kepler/Hawking EVM [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Switching to high address space at 0x800000000 [ 0.000000] cma: CMA: reserved 16 MiB at 2e800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] Unhandled fault: alignment fault (0x221) at 0xe2411011 [ 0.000000] Internal error: : 221 [#1] PREEMPT SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 3.15.0-rc8-next-20140605-dirty #93 [ 0.000000] task: c06e3be0 ti: c06d6000 task.ti: c06d6000 [ 0.000000] PC is at paging_init+0xa00/0xaf0 [ 0.000000] LR is at paging_init+0x9e8/0xaf0 [ 0.000000] pc : [<c0693b2c>] lr : [<c0693b14>] psr: 600001d3 [ 0.000000] sp : c06d7ea0 ip : c06e5ce4 fp : 00000000 [ 0.000000] r10: 00000000 r9 : 00001000 r8 : fffff000 [ 0.000000] r7 : 00002530 r6 : fffff000 r5 : feb30000 r4 : c0692cd8 [ 0.000000] r3 : e2411001 r2 : 00000003 r1 : bfe00000 r0 : 00000000 [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [ 0.000000] Control: 30c5387d Table: 00003000 DAC: fffffffd [ 0.000000] Process swapper (pid: 0, stack limit = 0xc06d6240) [ 0.000000] Stack: (0xc06d7ea0 to 0xc06d8000) [ 0.000000] 7ea0: 2e800000 c06b194c 0000071f 00800000 00000401 00000000 00000000 00000000 [ 0.000000] 7ec0: 00000000 00000000 c0000000 00000000 c001cd40 00000000 00000800 00c00000 [ 0.000000] 7ee0: c06df834 00000000 c0800000 00c00000 c06ecc08 c06c4070 ffff1000 0082e7f5 [ 0.000000] 7f00: 00001000 00000007 c06cade4 c07184e0 c0008000 c06c4070 c06d7fd4 c06ca3e8 [ 0.000000] 7f20: c06ca3d8 c001cd40 c06cade4 c0690054 00000000 30c7387d 00000000 00000000 [ 0.000000] 7f40: 00000000 00000000 c071ac0e 000000dd 00000000 00000000 c071a318 00000000 [ 0.000000] 7f60: 00000000 00000000 00000000 00000000 00000000 00000001 c06e4d68 c06df800 [ 0.000000] 7f80: 00000000 00000000 00000000 c04a94ac c05d6e38 00000000 00000000 00000001 [ 0.000000] 7fa0: ffffffff c06df800 00000000 00000000 00000000 c068d898 00000000 00000000 [ 0.000000] 7fc0: 00000000 00000000 00000000 00000000 00000000 c06ca3e8 30c7387d c06df84c [ 0.000000] 7fe0: c06ca3e4 c06e4d68 80007000 412fc0f4 00000000 80008084 00000000 00000000 [ 0.000000] [<c0693b2c>] (paging_init) from [<c0690054>] (setup_arch+0x4b4/0x9ac) [ 0.000000] [<c0690054>] (setup_arch) from [<c068d898>] (start_kernel+0x80/0x39c) [ 0.000000] [<c068d898>] (start_kernel) from [<80008084>] (0x80008084) [ 0.000000] Code: e34f6fff e3a01000 e3a02003 e34b1fe0 (e1c381d0) [ 0.000000] ---[ end trace 3406ff24bd97382e ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ====================================================================================================================

11 years

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Crosscompile for arm

by -- --

11 years

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[ACTIVITY] 09 - 13 June

by Bernie Ogden

=Progress= memcpy regression on A9 - REQ-363 [3/10] * Verified regression on a couple of targets, some investigation around cause lowlevellock performance bugs - TCWG-435 [3/10] * Upstreamed, some reworking based on review, obsessed about odd code change & intermittent test failure memset improvement - TCWG-156 [1/10] * Started looking at glibc benchtests as a quicker way of doing 1st-round benchmarking Meetings/mail/etc [3/10] =Plan= More of the above - * Get some memset benchmarks running * Carry on with lowlevellock patches (breaks m68k build, apparently) * More memcpy investigation

11 years

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[ACTIVITY] Week 23

by Yvan Roux

== Issues == * None == Progress == * CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and optimization effor for ARMv8-a (8/10) - Installed cbuildv2-schroot environment (Thanks Maxim !) - Integrated and Validated all the on-going backports - Released 4.9 2014.06 - Backported half of the remaining revision marked in the spreadsheet (review and validation on-going). * Misc: (2/10) o Various meetings and HO. == Next == * Complete FSF 4.8 branch merge * Review 4.7.4 branch merge * Complete backports.

11 years

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[ACTIVITY] 09 - 13 June 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Investigated prologue analysis and stepping issues. [3/10] [TCWG-484] -- Updates to JIRA cards. -- Updates to patches stalled till next week. * GDB arm v7 record/replay -- Prepare SIMD instruction recording support patches for re submission. [1/10] -- Chromebook issues stalls Testing and submission till next week. * GDB on Android improvements [3/10] -- Discussions with community developers -- Review of already submitted patches for catch syscall and exec events. -- Making things work with available upstream patches. * Miscellaneous [3/10] -- Compassionate leave on Monday 9th June 2013. -- Submit application for travel health certificate for UK travel in July. -- Confirm travel and hotel booking after UK visa approval. == Plan == * GDB arm v8 record/replay -- Update all patches after upstream comments. -- Investigate all remaining testsuite failures. -- Update all related jira cards and create new for persisting test failures. * GDB arm v7 record/replay -- Update and resubmit upstream. * GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321] -- Prioritize todo list in light of currently active upstream development.

11 years

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[Weekly] 09-13 JUNE 2014

by Michael Collison

== This week == Out sick Tuesday and Wednesday (4/10) Launchpad cleanup (6/10) Launchpad 944572 - Infinite loop printing "warning: missing braces around initializer" in g++ - fix released Bugs marked "won't fix" after investigation: Launchpad 683683 - run-init on omap3, omap4 in natty dies if busybox is built with -marm Launchpad 757427 - gconftool-2 segfaults on arm [shrinkwrap] Launchpad 768384 - G++ gets stuck (100% cpu never finish) when compiling C++ code with -O2/3 Launchpad 771675 - shrink-wrap optimization produce buggy code Launchpad 625228 - Avoid unnecessarily saving $lr on Thumb-1 Launchpad 771832 - bogus reference to unused symbols Launchpad 788841 - GCC ICE: internal compiler error: in push_minipool_fix Launchpad 795131 - [armel, vfp] ICE in simplify_gen_subreg_concatn, at lower-subreg.c:468 Launchpad 803798 - FTBFS on armel: error: unable to find a register to spill in class 'VFP_LO_REGS' Launchpad 807156 - GCC (g++):internal compiler error: in extract_insn, at recog.c:2104 Launchpad 821455 - internal compiler error: in translate_clast, at graphite-clast-to-gimple.c:1123 Launchpad 839959 - 4.5-2011.08 internal compiler error Launchpad 841437 - fftw3 version 3.2.2-1 failed to build on armel Launchpad 887158 - NULL pointer deref in mark_reg_pointer Launchpad 890657 - Please merge the fix for upstream bug 45102 Launchpad 892880 - MIPS: link error against __unpack_d with --enable-target-optspace Launchpad 903178 - [4.6 regression/armhf] ICE, unable to find a register to spill in class 'LO_REGS' Launchpad 903347 - [armel/armhf] file fails to compile (indefinite loop?) Launchpad 903951 - The kernel on staging-panda does not boot with the 11.12 released toolchain Launchpad 937864 - Produces NEON code on armhf even when explicitly asked not to Launchpad 941676 - ppl ftbfs in precise on powerpc Launchpad 943264 - ICE in arm_select_dominance_cc_mode, at config/arm/arm.c:10625 Launchpad 1049614 - Assembler messages with -O0: Error: offset out of range == Next week == On vacation June 16th - June 20th == Future == No Plans

11 years

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[ACTIVITY] 9- 13 June 2014

by Venkataramanan Kumar

= Progress == * Went to UK VISA office and submitted application and bio metrics (2/10) * Tried Installing chrubuntu on chromebook. But failed and later found that SD card issue. Given SD card back in office for replacement. Installed crouton and other packages for building gcc and testing gcc testsuites (1/10) * Reload spill failure (bug fix) on armhf target (3/10) Tested conservative patch that prevent ior_scc_scc patterns for thumb2 target using chrome book. Thumb2 compare condition test cases fails. Found that these test cases using constants for operands 2 and 5. Change conservative patch to allow constant operands for thumb2 target in ior_scc_scc patterns. Testing is in progress. * LTO experiments (2/10) Drilling down ICE with LTO on GCC 4.9 branch. * Misc (1/10) - 1-1 meetings (Ryan, Christophe) (0.5/10) - AMD internal support work and meetings (0.5/10) * Installed some packages and tested christophe libsantizer patch on hardware (1/10) == Plan == * Continue bug fixing. * LTO bootstrap failure

11 years

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[ACTIVITY] 9 - 13 June 2014

by Kugan

== Progress == * Public holiday (2/10) * Benchmarking and regression testing (TCWG-468) (8/10) - Ran release benchmarking in chrome-book - Set-up package build environment and ran ubutest - spec2k benchmarking of patches that was included in 2014.06 release on aarch64 == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities.

11 years

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[ACTIVITY] Week 24

by Zhenqiang Chen

== Issues == * None. == Progress == * Work out 4 patches to enhance loop2-invariant heuristics and send out for community review (TCWG-469, 3/10). * Test the rebased ccmp patches (TCWG-488, 2/10). * Investigate how to optimize large constant. Patch is in testing (TCWG-486, 5/10). Basic idea is: - Do not split large constant when expanding. - Improve cprop pass to check the rtx_cost when propagating constants. == Plans == * Ping pending patches. * Send out ccmp patches for review. * Send out patches to optimize constant.

11 years

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[ACTIVITY] Week 24

by Renato Golin

== Progress == * Kernel (CARD-1246 1/10) - Helping LLVMLinux to test in LAVA * Background (9/10) - Code review, meetings, discussions, etc. - Setting up Chromebooks again (up, crouton) - Setting up APM boards (up) - Setting up D01 boards (bricked 2) == Plan == * work with guodong, fabo, tyler, to revive the D01s * put crouton on llvm-chrome-test to be ready for release 3.5 * have a look at compiler-rt autoconf build * keep helping LLVMLinux with LAVA

11 years

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[ACTIVITY] 9 - 13 June 2014

by Will Newton

== Progress == * Rework malloc microbenchmark based on review (2/10, TCWG-160) * Get SystemTap probes working to analyze microbenchmark (3/10, TCWG-160) * Profile postgresql benchmark to discover bottlenecks (1/10) * Respin of gdb release to fix build issue (1/10) * Look into ld issue discovered by Maxim (1/10) * Patch review and followup (1/10) * Meetings, admin (1/10) == Issues == * None == Plan == * Ubuntu on wg? * Resubmit malloc microbenchmark * Rework postgresql benchmark to use unix domain sockets -- Will Newton Toolchain Working Group, Linaro

11 years

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[ACTIVITY] 9-13 June 2014

by Christophe Lyon

Monday off. (2/10) == Progress == * GCC trunk cross-validation (CARD-647) (3/10) - improved scripts to avoid consuming to much memory - improved kill signals handling when generating reports - back to normal - started looking at adding libstdc++ in the reports - started looking at adding aarch32/armv8 configuration - email-driven robot looks operational. Started testing with Kugan * GCC 4.9 branch cross-validation (CARD-647) - it's now running * Neon intrinsic tests (CARD-???) (2/10) - discussion started: scan-assembler directives may be difficult to maintain - original testsuite maintenance: preparing aarch64 support * AArch64 libsanitizer support (TCWG-58) - Venkat tested my patch on HW, need to study the results and compare with qemu * Misc (meetings, conf-calls, ...) (3/10) - 4.7-2014.06 branch merge prepared, validation started == Next == * GCC cross-validation - check patch to add libstdc++ in the reports - define configuration for aarch32/armv8 - continue testing of the email robot * Neon intrinsics tests: - handle feedback - original testsuite: continue aarch64 support, investigate output formatting problems * AArch64 libsanitizer support: - analyze results - use cbuild2 + tcwgbuild configs to run the tests myself on HW * Backports reviews

11 years

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[ANNOUNCE] Linaro GCC 4.9 2014.06 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1+svn211054 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1+svn211054 * Backport of [AArch32] PR rtl-optimization/60663 * Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15. * Backport of [AArch32] Support ORN for DIMode. * Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A. * Backport of [AArch32] Allow any register for DImode values in Thumb2. * Backport of [AArch32] Initialize new tune_params values. * Backport of [AArch32] Initialise T16-related fields in Cortex-A8 tuning struct. * Backport of [AArch32] Enable tail call optimization for long call. * Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32. * Backport of [AArch64] Fix TLS for ILP32. * Backport of [AArch64] vrnd<*>_f64 patch. * Backport of [AArch64] Fix possible wrong code generation when comparing DImode values. * Backport of [AArch64] Add a space to memory asm code between base register and offset. * Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation. * Backport of [AArch64] vqneg and vqabs intrinsics implementation. * Backport of [AArch64] Vreinterpret re-implemention. * Backport of [AArch64] Define TARGET_FLAGS_REGNUM. * Backport of [AArch64] Merge longlong.h from glibc tree. * Backport of [AArch64] add, sub, mul in TImode. * Backport of [AArch64] Add handling of bswap operations in rtx costs. * Backport of [AArch64] Fully support rotate on logical operations. * Backport of [AArch64] Use standard patterns for stack protection. * Backport of [AArch64] VDUP Testcases. * Backport of [AArch64] Vectorise bswap[16,32,64]. * Backport of [AArch64] Enable TBL for big-endian. * Backport of [AArch64] Reverse TBL indices for big-endian. * Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class. * Backport of [AArch64] Improve vst4_lane intrinsics. * Backport of [AArch64] Rewrite and tests ZIP Intrinsics. * Backport of [AArch64] libitm Enabled. * Backport of [AArch64] Support full addressing modes for ldr/str in vectorization scenarios * Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...). * Backport of Fix warning in libgfortran configure script. * Backport of Remove PUSH_ARGS_REVERSED from the RTL expander Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

11 years

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[ACTIVITY] 02 - 06 June 2014

by Omair Javaid

== Progress == * GDB arm v8 record/replay -- Fixed issues showing up when building code with default optimization. [TCWG-484] [3/10] -- Fixed failures in until-reverse test cases. [TCWG-484] [1/10] -- Investigation of failures in watchpoint-reverse and solib test cases. [TCWG-484] [2/10] -- Writing NEWS and changelog entries for all patches. [1/10] * GDB Remote vs Native feature parity (GDB on Android improvements) [2/10] [CARD-321] -- Scored through recently submitted patches. -- Ran testsuite in native and remote modes. -- Started review of related open jira cards * Miscellaneous -- Visit uk visa office for passport collection. [1/10] == Plan == * GDB arm v8 record/replay -- Update all patches after upstream comments. -- Investigate all remaining testsuite failures. -- Update all related jira cards and create new for persisting test failures. * GDB arm v7 record/replay -- Update and resubmit upstream. * GDB Remote vs Native feature parity (GDB on Android improvements) [CARD-321] -- Further progress towards creating a tasks list and timeline. * Miscellaneous -- Finalize travel and obtain health certificate for travel to UK.

11 years

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[ACTIVITY] 2 - 6 May 2014

by Kugan

== Progress == * Zero/sign extension elimination (TCWG-15) (2/10) - Posted patch for comment * benchmarking (TCWG-468) (1/10) - Ran a53 benchmarks * regressions (7/10) - THUMB1 regression for ARM fenv * Issue due to thumb1 not supporting mrc/mcr. Patch to fix this is posted for review. - Regression when allocating 128bit integer to VFP register * When LRA assigns DImode value to TImode register, it is not setting up it in the right place of TImode. Due to this, one of the moves becomes dead. Patterns needs to be checked. * VFP registers store big-endian values in little-endian format. Hence, subreg for mode greater than word has to be aware of this. As it is, aarch64_cannot_change_mode_class will need the fix like done in ARM. == Plan == * Benchmarking. * Upstream zero/sign extension elimination activities.

11 years

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[ACTIVITY] 2- 7 June 2014

by Venkataramanan Kumar

= Progress == * LTO experiments (3/10) Tested with various compiler revisions and in native X86 machines. Compare errors in gcc 4.9 Linaro 14.05 version. Aarch64, LTO bootstrap passes in trunk. On FSF GCC 4.9 branch encountering ICE. Opened PRs in GCC Bugzilla. * Misc (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (0.5/10) - AMD internal support work and meetings (0.5/10) Sick Leave on 2nd June (2/10) UK VISA application processing (3/10) == Plan == * UK VISA processing attend interview, biometrics. * Continue bug fixing. * LTO bootstrap failure * Test libsanitizer patch for christophe.

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