== Week of May 5th ==
- Worked on standardized development environment (TCWG-483, 8/10)
-- Deployed it on toolchain64.lava and maximk.linaro.org.
-- Demoed and got early feedback from several people.
- Various discussions, including ... (2/10)
-- GCC debugging and var-tracking pass with Michael.
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Kernel (CARD-1246 5/10)
- Named register support in Clang
* http://reviews.llvm.org/D3797
* Toolchain (CARD-862 3/10)
- Testing libc++abi on ARM, now that it has EHABI
- Setting up Chromebook library buildbot (FAILED)
- One of the bots had a battery failure, needs to be replaced
- Which means we won't have the lib bot soon :(
* Background (2/10)
- Code review, meetings, discussions, etc.
== Plan ==
* Follow up named register patch upstream
* Help LLVMLinux with moving current code to conform to global named regs
* Help LLVMLinux with LAVA bots
* Replace the failing buildbot
* Set up a temporary (local) library buildbot on the spare Chromebook
* Try other hardware to replace all Chromebooks
== Progress ==
* Various patch review and followup (2/10)
* Helping diagnose an aarch64 linker crash in buildroot (1/10)
* Failed attempt to update kernel on Chromebook (1/10)
* Analyze and benchmark cortex-strings to find the oustanding work (1/10)
* Get docker setup with cgroups to measure memory usage (4/10, TCWG-441)
* Trying to get NX working on Fedora 20 (1/10)
== Issues ==
* None
== Plan ==
* Get postgresql and hopefully others working with new benchmark setup
* Figure out how to make NX work
--
Will Newton
Toolchain Working Group, Linaro
Hi All,
AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set
of register. Is there any reason why we need this?
target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS.
In addition, IRA cost calculation also has logics like make common class
biggest of best and alternate; this might get confused with this.
Attached RFC patch removes it. regression tested for
aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ?
Thanks,
Kugan
gcc/
2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org>
* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
== Progress ==
* Reload - IRA bug fix (5/10)
- Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second
a gets register r6, but third a not able to reuse r6 or r1 and spill
failure.
- Debugging the IRA dumps and reload dumps
- Getting Maxim help
* TCWG-180 (3/10)
- GCC bootstrap fails with compare errors.
- comparing the dis assembly.
* Misc (2/10)
- AMD meetings
- 1-1 meetings
- looked at 1 x86 related bug
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
Short week, 2 days off (4/10)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 (6/10)
- Prepared FSF 4.9 branch merge in Linaro one.
- Backported Zhenqiang upstream patches.
- Iterate with rob on various jenkins issues
- Looked at gerrit for the backport reviews
* Misc:
o Cbuildv1 baby-sitting
== Next ==
* Continue on Linaro GCC 4.9 release.
== Progress ==
* TCWG-413 (5/10)
- Rebuild FSF 4.8, Linaro 4.8 and Linaro 4.9 releases for aarch64 with
crosstool-ng (Kept all the dependencies same and used different gcc).
- Lost all the config for running benchmark on the test-machine and set
it up again.
- Re-ran spec2k benchmarking and results.
* TCWG-468 (5/10)
- Looked in detail IRA dumps and cost models.
- Also looked at IRA and LRA code to get better understanding of the
algorithms.
- Costs dumped seems odd and looking further.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* GDB arm v8 record/replay: core files issue [TCWG-451] [6/10]
-- Add bfd support for missing aarch64 core file handlers.
-- Added regset caching functions for aarch64 linux gdb.
* GDB arm v8 record/replay: Support for recording A64 Data processing
- Floating point instructions [TCWG-404] [3/10]
* Miscellaneous [1/10]
-- Meetings
-- Browse through Linaro training resources.
-- UK visa documents preparation.
== Plan ==
* Continue work to support GDB arm v8 record/replay
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404]
-- Support for recording syscalls, signals etc [TCWG-409]
* UK visa application submission.
= Progress ==
* Continue improving LAVA support in DejaGnu. (TCWG 455 - 1/10)
* More work on regression test analysis and reporting. (TCWG 448 - 4/10)
- Did builds of 4.8, 4.9, and master to establish baseline test
results.
- Worked on test analysis script.
- Jenkins matrix builds & test runs are working, and copying results to
toolchain64.
* Meetings and Misc (5/10)
- Fixing various Cbuildv2 bugs found by yroux dealing with git.
- Fixed bug where the GDB build was polluting the destdir with
binutils.
- Installed OpenNX chroot on toolchain64 with maxim.
- Fixed disk on toolchain64 with maxim to access all 4TB. Use GPT...
- Added more config triplets to Jenkins, so now it builds everything
we support.
== Plan ==
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
- Do diffs of new builds test runs from the baseline, not the previous
build.
* Try to look at the LLVM branch of Cbuildv2, do some testing of it.
== Issues ==
* Jenkins needs to be able to see LAVA slaves as online, but not
booted..
* The skiing is good, but the avalanche danger is high, so limits
accessibility.
* We need a backup plan for toolchain64.
* Google groups have problems, so had to setup test results list on
one of my servers instead. (ask me if you want to be on the list) The
new beta release of GNU Mailman looks very nice.
* The chromebooks in our build farm can't build GCC native.
- rob -
== Issue ==
* None.
== Progress ==
* Identify a build environment issue for linux64 gdb binaries "Symbol
format `elf32-littlearm' unknown".
* Send out shrink-wrap related patches from community review (TCWG-133, 2/10)
* Move-loop-invariant heuristic tuning (TCWG-469, 8/10).
- Update heuristic according to benchmark testing.
== Plan ==
* Update shrink-wrap patches according to comments.
* Continue on move-loop-invariants heuristic tune.
== Planned leaves ==
* June 2.
== Progress==
Holiday [2/10]
Fixing performance bugs in lowlevellock - TCWG-435 [4/10]
* Initial patch for lowlevellock.h largely done, awaiting an aarch64 test run
* About 1/2 of the lowlevellock.h's remain post-patch, need to ask
some questions about them
cortex-strings memset - TCWG-156 [1/10]
* Fixed an alternative implementation, a little more benchmarking investigation
cbuild benchmarking branch [1/10]
* Hunting for correct benchmark source, added a little more error checking
Meetings/mail/etc [2/10]
== Plan ==
More of the same -
* Post lowlevellock.h patch and ask some questions
* Finish exploring memset alternatives and work out how to benchmark them
* Carry on with cbuild benchmarking branch
Holiday 26th - 30th May
== Progress ==
* Kernel (CARD-1246 3/10)
- Committed Named Register LLVM change
- Working on the Clang part
- Helping LLVMLinux to set up bots/LAVA tests
* Tests/CBuild2 (CARD-716 2/10)
- Submitted CBuild2 LLVM patch, waiting for review
- Implemented sqrt to pacify GCC on sphereflake
* Background (3/10)
- Code review, meetings, discussions, etc.
* Bank Holiday Monday (2/10)
== Plan ==
* Continue named registers on Clang
* Continue LLVMLinux hardware test bot
* Run some benchmarks on AArch64
* Check CBuild2 progress, try builds live
== Progress ==
* Bank Holiday Monday (2/10)
* glibc patch review and followup (1/10)
* Started investigating malloc intensive applications (3/10, TCWG-440)
* Investigate a couple of linker issues (1/10)
* Figure out how to benchmark postgresql (3/10, TCWG-441)
== Issues ==
* None
== Plan ==
* Develop a good general way to measure memory usage of complex applications
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
Bank holiday [2/10]
Investigated using D01 board [1/10]
Retested and pinged division patch - TCWG-293 [2/10]
Added post-index addressing to NEON memory access for ARM -TCWG-430 [5/10]
* wrote patch
* makes useful improvement to libvpx performance
== Progress ==
Holiday [3/10]
Post-indexed addressing for NEON on Aarch64 - TCWG-430 [3/10]
* needs much more work than for ARM
Revisited apparent NEON scheduling problem in libvpx - TCWG-429 [2/10]
* it transpires that this was an incorrect analysis
* the assembler code didn't conform to the ABI
* upstream has now fixed this
Received review for division patch - TCWG-293 [2/10]
* needs a rewrite
(Resending to correct address)
== Progress==
TCWG-435 needless busy-wait in lowlevellock.c (0/10)
* Patches for lowlevellock.c sent to list
* Patch for lowlevellock.h still to do
TCWG-156 cortex-strings memset (5/10)
* Dug through a bunch of docs and fiddled with the source
Looking at the cbuild benchmarking branch (2/10)
* Some back and forth around getting access to lava lab
* Poked around the code, made some small improvements
== Misc ==
Meetings/mail/etc 3/10
== Plan ==
(Public) holiday on Monday
Put together lowlevellock.h patch
Do something more substantial with cbuild
Finish fiddling with the memset source
== Week of April 28th ==
- Made a prototype rootfs for benchmarking (CARD-1413, 2/10)
-- Got a tutorial from Fathi on how to build openembedded rootfs.
-- Wrote up notes at https://collaborate.linaro.org/display/TCWG/How+to+build+openembedded+rootf…
- More benchmarking setup (TCWG-413, 2/10)
- Various discussions (3/10)
-- 1-on-1 with Venkat (NX setup and GCC reload problem)
-- 1-on-1 with Kugan (benchmarking handover)
-- 1-on-1 with Michael (var-tracking investigation)
-- 1-on-1 with Rob (command-line access to LAVA and job submission)
- Made NX/schroot rootfs (3/10)
-- This can be deployed on Linaro [build] servers and provide standardized development environment for toolchain work.
-- More details to follow.
- Misc
-- Reported a kernel oops related to networking on vexpress64.
- Tyler Baker of the LAVA team deserve a special mention for answering all the questions about LAVA from the toolchain group!
--
Maxim Kuvyrkov
www.linaro.org
== Week of April 21st ==
- Setup SPEC benchmarking runs in LAVA environment (TCWG-413, 5/10).
-- Built SPEC cpu2000/cpu2006 tools for armv7a/armv8
-- Added SPEC CPU2006 support to spec2xxx-utils.
- Various discussions (1/10)
- Short week due to public holidays (4/10)
--
Maxim Kuvyrkov
www.linaro.org
== This week ==
- Investigated infinite loop bug [TCWG-290][6/10]
- Narrowed bug down to data flow analysis of micro operation in
variable tacking pass
- Created bugzilla report
- Still debugging to determine cause of infinite loop
== Next week ==
- Attend ARM Big Picture conference, May 5th-7th
- Resolve infinite loop bug
== Future ==
== Progress ==
* More work on regression test analysis and reporting. (TCWG 448 - 2/10)
* Started adding LAVA support to DejaGnu. (TCWG 455 - 4/10)
* Meetings and Misc (4/10)
- Fixed various bit-rot bugs in the cbuildv2 testsuite.
- Figured out how to add SSH keys to our launchpad account.
== Plan ==
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
== Progress ==
* GDB reverse debugging on aarch64
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401] [1/10]
* Investigated and progressed towards fix for GDB unable to read core files
[TCWG-451] [6/10]
* Public Holiday on 1st May [2/10]
* Miscellaneous [1/10]
-- Meetings
-- UK visa documents attestation
-- LCU14 registration and travel booking
== Plan ==
* GDB unable to read core files [TCWG-451]
-- Fix aarch64 linux regset functions
-- Add support for writing aarch64 regset in aarch64 core file.
* Miscellaneous
-- UK visa application
-- LCU14 finalize bookings.
== Progress ==
* TCWG-447 (5/10)
* Re-spin few versions of the patches and posted after testing based
on reviews.
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01743.html
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01744.html
* TCWG-413 Spec2006 (5/10)
* Updated the scripts to deploy libraries and to run cross spec
benchmarking with them.
* Experimented with open embedded image generation for benchmarking-
still finding some issues even with a trusty chroot.
* Started benchmarking and variance analysis.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* Start with literal pool merging.
Very short week (3 half days)
== Progress ==
* GCC trunk cross-validation (2/10):
- monitored results, and reported some regressions/new fails
- moved away from Jenkins
- as commit rate has decreased, there is no backlog in validations
* Neon-intrinsics test (1/10):
- Continuing conversion for inclusion in the GCC testsuite.
- Preparing an additional Makefile, simpler than the current one,
to help using the testsuite for various GCC variants until
conversion is complete.
== Next ==
* Continue to closely monitor GCC trunk validations
* Neon intrinsics tests
* Off Thursday/Friday
