- linaro-toolchain - lists.linaro.org

[ACTIVITY] 4 - 8 August 2014

by Will Newton

== Progress == * Upstream work (2/10, CARD-341) - Patch review - Submitted a fix for armeb-eabi configurations of binutils - Tested and removed aarch64 lowlevellock.h - Tidied up glibc patchwork * Rewrote src-release as a shell script (4/10, TCWG-487) - Allows building releases as xz - 80% less evil than existing makefile * Booting upstream kernel on Chromebook (2/10) - Kernel configured and built - I think I have a plan... * Off Wednesday (2/10) == Issues == * None == Plan == * Upstream kernel on Chromebook * malloc app benchmarks * Potentially glibc 2.20 release week -- Will Newton Toolchain Working Group, Linaro

12 years, 1 month

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[ACTIVITY] 28 July - 1 August 2014

by Omair Javaid

== Progress == BeagleBoard and Pandaboard setup for gdb testing [1/10] * Got both alive and working with minimal os * Trying ubuntu prebuilt binaries didnt work. Out of office to get internet fixed and buy accessories for boards. [1/10] Eid Public Holidays in Pakistan from 29th July till 1st August [8/10] == Plan == BeagleBoard and Pandaboard setup * Get linux running on both boards * Run gdb test scripts on both boards * Compare test results outputs with chromebook and x86 Update and Submit Aarch64 record replay patches. Resume work on Aarch64 prologue analysis.

12 years, 2 months

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[ACTIVITY] 18 - 25 July 2014

by Omair Javaid

== Progress == GNU Tools Cauldron * Some useful corridor meetings with various GNU tools developers and maintainers. TCWG Sprint [8/10] * Got to meet the team and discuss TCWG roadmap. * Some useful howtos specially back porting and patch review howtos. * Sprint with ARM and useful discussions on gdb patch review. Return travel from UK on Friday 25th July.[2/10] == Plan == Get over travel fatigue and resume office. Get missing components and set up pandaboard and beagle board for gdb testing. Eid Public Holidays in Pakistan from 29th July till 1st August

12 years, 2 months

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[Activity] Mid July to now

by Rob Savoye

== Progress == * Installed dmucs on the TCWG build slaves, which works in DejaGnu to do cpu load based scheduling of executing cross tests remotely. (TCWG 511 - 4/10) * Spent some time trying to improve SSH performance for cross testing by opening the SSH connection via expect, and keeping it open. (TCWG 512 - 2/10) * Attended GNU Tools Cauldron and Linaro Sprint. (13/10) * Worked with Bernie on changes to the benchmarking branch. * Installed a Jenkins instance on my home server which uses my own build farm for testing Jenkins/Cbuildv2 changes without screwing up validation. (TCWG 1378 - 1/10) - Experimented with some new plugins that might be useful. (TCWG 1378 - 1/10) - Added command line options to jenkins.sh so it'll work on different Jenkins installations. * Fixed bare metal testing for arm*-none-eabi*. (2/10) * Fixed several Cbuildv2 bugs in bugzilla (TCWG 1378 - 2/10) - #167 - tcwgweb.sh not accurate. - #183 - cbuild2 configure --enable-bootstrap sets 'enable_bootstrap' not 'bootstrap'. - #249 - cbuild2.sh --help only works after configure is run * Reviewed and approved patches: - Add configure option to choose compiler languages - Enable parallelism by default - Add support for --march - Add support for --enable and --disable make_docs in configure and cbuild2.sh - lib/checkout.sh: Make checkout() dryrun safe when repodir doesn't yet exist - lib/stamp.sh: check_stamp() --force and --dryrun should return 1 - cbuild2.sh: Make --dump a do_ option so it's position doesn't matter - lib/make.sh: hello_world() will now return 1 if the compilation or link fails * Experiment with Docker to see if it has any advantages over a chroot, which it seems to. (2/10) * Refactor building binary tarballs. Now it doesn't run the test first, it assumes the branch has already been validated. (2/10) * Fix aach64_be-none-elf builds. == Plan == * Fix current breakage in cbuild2/master. * Get back to SSH performance improvements (TCWG 512). * Get my D01 board working finally, since I killed my Odroid U2. * Work through more cbuildv2 bug reports (TCWG 1378). == Issues == * Sorry, several weeks of status in one activity report, I need to get back to doing these weekly...

12 years, 2 months

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[ACTIVITY] 28 July - 1 August 2014

by Kugan

== Progress == - Travelling from TCWG sprint (2/10) - Zero/sign extension elimination (TCWG-291) 2/10 * Posted the modified patch and some discussions. Further testing. -SHA1 regression (TCWG-468) 4/10 * Looked at IRA's uses of back end cost model. It might be a limitation (See the notes below). Looking at the test-case from sha1 which also has inline asm whose constraints are causing further issues. - Misc (2/10) * Looked at bugs assigned (https://bugs.linaro.org/show_bug.cgi?id=85) * Set-up LLVM == Plan == - Sha1 regressions - Fixing assigned Bugs --------------------------------------------------------------------- In AArch64, some of the integer operations support “w” constraint (FP_REGS). For example *addsi3_aarch64 pattern supports it. However, not all of the integer operations supports it. In the cases where it is supported, all the operands have to be in FP_REGS and it will not work if we have one operand in FP_REGS and other in GENERAL_REGS. If there is an allocno whose pseudo register is used only in *addsi3_aarch64 insns, it will have low cost for register class FP_REGS (as in the case of a28 below exacted from an example). If the other pseudo register used in *addsi3_aarch64 (a27 in the example below) is also used in instructions (rorsi3_insn in the exaple below) that does not support “w” constraint, there is going to be a cost involved in moving it from FP_REGS to GENERAL_REGS (or other way) Currently IRA dosent seems to be considering this dependency in considering this inter dependency in cost calculation.

12 years, 2 months

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[ACTIVITY] 28th July - 1st August 2014

by Bernie Ogden

=Progress= cbuild2 benchmarking - TCWG-360 [7/10] * Integrated benchmarking more into the core of cbuild2 * 'Audited' the benchmarks lying around on toolchain64 * Persuaded cbuild2 to use git-over-ssh Meetings/mail/etc [3/10] =Plan= cbuild2 benchmarking * Convert eembc integration into reviewable patches * Get cross-compilation working * Get remote targets working

12 years, 2 months

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[ACTIVITY] 28 July - 1 August 2014

by Venkataramanan Kumar

== Progress == * TCWG-180 Debugging - LTO bootstrap failure in Aarch64 with GCC 4.9. (4/10) * TCWG-181 Rerun coremark with LTO on latest trunk and Linaro compilers. (1/10). * Others (3/10) * Upstream patch review. * Prepared and sent notes on cauldron. * 1-1 Meeting Christophe. * Misc and internal meeting. * setup LLVM. * Tuesday: Ramzan holiday (2/10). == Plan == * Continue LTO bootstrap issue. * Benchmark Core mark with LTO. * Upstream patch review. == MISC == * Leave on 8th August .

12 years, 2 months

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[Weekly] 28 July - 1 August 2014

by Michael Collison

== This week == * Neon intrinsic testing (4/10) - Patched sources with Christophe's patches - Ran Neon intrinsic tests for vclz and vqadd - Investigating regressions * On leave Monday and Tuesday; out sick Wednesday (6/10) == Next week == * Continued Neon intrinsic testing

12 years, 2 months

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[ACTIVITY] Week 31

by Zhenqiang Chen

== Issues == * None. == Progress == * Rework the patch to fix pr61225 in Combine pass. (4/10) * Investigate code-size regression when skipping arm_split_constant in expand (TCWG-486, 4/10). - For reg & 0xffff, zero_extendhi instruction is more efficient. - For "PLUS", the define_insn_and_split "*arm_addsi3" is only available when "reload_completed || !arm_eliminable_register (operands[1])". The cprop and combine passes can not recover it back when there is no chance to optimize the constant. * R/M toolchain related work (2/10). == Plans == * Send out the patches for review. * Refine ccmp related patches. == Planed leaves == * Aug. 18 - 22.

12 years, 2 months

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[ACTIVITY] Week 31

by Renato Golin

== Progress == * Toolchain (CARD-862 2/10) - Helping debug some sanitizer work - Re-evaluating compiler-rt on ARM with CMake * LLVM 3.5 Release (TCWG-476 2/10) - Working on SPEC to run with LLVM * Background (6/10) - Code review, meetings, discussions, patches, etc. - Email and patch backlog due to Cauldron and sprint - Investigating and fixing buildbot/build failures == Plan == * Finish SPEC-LLVM integration, run against 3.5 vs. 3.4.2 * Test Release Candidate 2, when it comes * Back to compiler-rt work...

12 years, 2 months

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[ACTIVITY] 28 July - 1 August 2014

by Will Newton

== Progress == * Various small tasks (3/10) - Catching up on email - Bug report investigations - Expenses from Cauldron/Sprint - Pushing patches - Tidy some JIRA cards * Investigated gdb testsuite failures on Chromebook (2/10) - Looks like a kernel issue, need to try a newer kernel on Chromebook * Investigated state of ARM and AArch64 glibc testsuites for 2.20 release (2/10) - Results look ok but a couple of things need investigation at some point * Triaged bugzilla bugs (1/10) * Built releases of binutils, eglibc and gdb for 2014.08 (2/10) == Issues == * None == Plan == * Get a newer kernel booting on Chromebook * Look at improving src-release for xz tarballs * Figure out what to do with glibc testsuite failures on AArch64 -- Will Newton Toolchain Working Group, Linaro

12 years, 2 months

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eglibc soft-float arguments

by Joel (Xi Zhou) Zhou

Hi guy, In order to have soft-float support in toolchain, I tried to build our toolchain using Linaro ct-ng script. I used "linaro-armeb-linux-gnueabihf" configuration then change floating point option from hard to soft. There is the error I have: [ERROR] /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/../../../../armeb-linux-gnueabi/bin/ld: error: /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/gcc-core-shared/lib/gcc/armeb-linux-gnueabi/4.8.3/libgcc.a(bpabi.o) uses VFP register arguments, /projects/broadcom-linux/joelz/r/linaro-gcc-build/.build/armeb-linux-gnueabi/build/build-libc/elf/librtld.map.o does not For short, libgcc.a(bpabi.o) uses VFP register arguments, but librtld.map.o does not. The C library used is eglibc version (Linaro 2.19-2014.04), is this a way to make eglibc work with sfot-float? Thanks! Joel

12 years, 2 months

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No arm-eabi builds on latest Linaro Android 4.9 toolchain?

by 박주형

I was using arm-eabi builds on Linaro Android 4.9 toolchain 2014.06. I've just downloaded 2014.07 and found out there is not an arm-eabi toolchain. I need arm-eabi to build Linux kernels and arm-none-eabi toolchain from here: http://releases.linaro.org/14.07/components/toolchain/binaries/gcc-linaro-a… is not capable of building LTO kernels. Error pops up : "cc1: error: -fno-fat-lto-objects are supported only with linker plugin" TL;DR, I need arm-eabi builds from Linaro Android toolchains. arm-none-eabi builds are not built with linker plugin enabled.

12 years, 2 months

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[ACTIVITY] 28-31 July

by Christophe Lyon

Short week (Friday off) == Progress == * GCC trunk cross-validation (2/10) - catch up with backlog, reported newly introduced FAILs - analyzed logs of spurious failures, improved reporting of such cases - the script will know send a separate email with the svn ids it has selected for validation, to help fill the backports spreadsheet * Infrastructure (2/10) - started deployment of past releases to help us quickly reproduce/investigate bug reports - 14.* binary releases deployed on toolchain64 (/work/toolchains) - automation not yet possible because of problem with the lab internal squid proxy preventing the download of http://releases.linaro.org/14.07/components/toolchain/binaries for parsing - started deployment of past toolchains built from the source releases using cbuild2 but ran into build problems * Neon intrinsics tests (1/10) * Misc (conf calls, meetings) (3/10) - 1-1 calls to get feedback after Cauldron+Sprint - a bit of bugzilla triage - backports reviews for 14.08 release == Next == Holidays, back on Aug 18th

12 years, 2 months

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Linaro toolchain binary allowing soft-float?

by Joel (Xi Zhou) Zhou

Hi Linaro-toolchain team, I notice that the Linaro toolchain binary only support hard-float. We have a platform which is ARMv7 based does not support VFP. Could you generate toolchain binary for ARmv7 that allows soft-float? Thanks, Joel

12 years, 2 months

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[ACTIVITY] Week 28 - 29 - 30

by Yvan Roux

-------------------------------------------------------------------------------- Week 28 -------------------------------------------------------------------------------- == Issues == * none. == Progress == * TCWG-496 : Linaro GCC 4.9 2014.07 (7/10) - FSF branch merge. - Backports validation results gathering. * Misc: (3/10) - Various meetings. -------------------------------------------------------------------------------- Week 29 -------------------------------------------------------------------------------- == Issues == * none. == Progress == * TCWG-496 : Linaro GCC 4.9 2014.07 (7/10) - Compared all the validation results. - Released 2014.07. * Misc: (3/10) - Various meetings. - Travel to Cambridge -------------------------------------------------------------------------------- Week 30 -------------------------------------------------------------------------------- == Issues == * none. == Progress == * TCWG-496 : Linaro GCC 4.9 2014.07 (1/14) - Release had to be respinned. - Reverted unwanted backport. - Merged FSF 4.9 branch up to 4.9.1 release. * GNU Tools Cauldron (4/14) * Linaro TCWG sprint (7/14) * Travel (2/14) == Next == * Complete release respin * Prepare 4.9-2014.08 release (backports, ...).

12 years, 2 months

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[ANNOUNCE] Linaro GCC 4.9 2014.07-1 released

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) announces the 2014.07-1 release of the Linaro GCC 4.9 source package. This is a respin of the 2014.07 release which contained a backport of a revision that is only relevant to trunk. Changes in this GCC source package release are: * Updates to GCC 4.9.1 (svn212635) * Revert backport of [AArch32] Fix PR target/61154. Please find the original 2014.07 release notes below: The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.07 stable release of the Linaro GCC 4.9 source package. Linaro GCC 4.9 2014.07 is the fourth Linaro GCC source package release in the 4.9 series. It is based on FSF GCC 4.9.1+svn212419 and includes performance improvements and bug fixes. With the imminent release of ARMv8 hardware and the recent release of the GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and performance of the compiler as the FSF GCC compiler approaches version 4.9.1. The Linaro TCWG will provide monthly stable[1] source package releases until FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of stable quarterly releases and monthly engineering[2] releases. Interesting changes in this GCC source package release include: * Updates to GCC 4.9.1-pre+svn212419 * Backport of [AArch32] Wrap long literals in HOST_WIDE_INT_C in aarch-common.c * Backport of [AArch32] Rewrite TLC Intrinsics. * Backport of [AArch32] Remove vzip, vuzp, vtrn builtins and cleanup * Backport of [AArch32] Use enum name instead of integer value for PARAM_SCHED_PRESSURE_ALGORITHM. * Backport of [AArch32] Vectorise bswap* * Backport of [AArch32] Fix PR/61331 * Backport of [AArch32] Fix PR target/61154 * Backport of [AArch32] Use mov_imm type for movw operations consistently * Backport of [AArch32] Remove XFmode from ARM backend. * Backport of [AArch64] Rewrite REV Intrinsics. * Backport of [AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE. * Backport of [AArch64] Support tail indirect function call. * Backport of [AArch64] Fix stack protector for ILP32 * Backport of [AArch64] ILP32 dynamic linker * Backport of [AArch64] Correct signedness of builtins, remove casts from arm_neon.h * Backport of [AArch64] clarify stack layout diagram * Backport of [AArch64] Implement movmem for the benefit of inline memcpy * Backport of [AArch64] Fix REG_CFA_RESTORE mode. * Backport of [AArch64] Fix layout of frame layout code. * Backport of [AArch64] Fix some reg-to-reg move scheduler types. * Backport of [AArch64] Implement CRC32 ACLE intrinsics + testsuite. * Backport of [AArch64] Implement ADD in vector registers for 32-bit scalar values. * Backport of [AArch32/AArch64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV AArch64 * Backport of [AArch32/AArch64] Use signed chars in gcc.dg/pr60114.c. * Backport of [AArch32/AArch64] Rewrite UZP Intrinsics. * Backport of [AArch32/AArch64] Rewrite TRN Intrinsics. * Backport of [AArch32/AArch64] Rewrite EXT Intrinsics. * Backport of [genattrtab] Fix memory corruption, allocate enough memory for all bypassed reservations * Backport of Fix PR c/60114 Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Launchpad against "Linaro GCC project": http://bugs.launchpad.net/gcc-linaro/+filebug. * Questions? "ask Linaro": http://ask.linaro.org/. * Interested in commercial support? inquire at "Linaro support":mailto: support(a)linaro.org [1] Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2] Engineering source package releases are defined as releases where the compiler is only put through unit-testing and full validation is not performed.

12 years, 2 months

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[ACTIVITY] July 19th - 25th

by Bernie Ogden

=Progress= GNU Cauldron TCWG Sprint [8/10] * Really helpful to meet (almost) everybody * Some useful discussion, too memcpy on A15 - TCWG-390 [1/10] * Should have let this lie but I had an odd 1/2 day and some data begging to be looked at * Turned out I'd fat-fingered the wrong data * But I gained more evidence suggesting that cortex-strings benchmark is too noisy (Non-sprint) meetings/mail etc [1/10] =Plan= cbuild2 benchmarking * Fit what I have into Rob's worldview * Hopefully convert it into some reviewable patches Follow up on some notes from Cauldron, sprint

12 years, 2 months

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[ACTIVITY] Week 30

by Renato Golin

== Progress == * GNU Cauldron (4/10) - GCC+LLVM presentation had some positive reviews - Discussed sanitizers roadmap - Very interesting meeting with QuIC * TCWG Sprint (4/10) - Mostly about GNU tools - Team Mission streamlined, looking good - LLVM roadmap attracted some attention - We could have some bite-sized work from other team members? * Release 3.5 testing (TCWG-476 2/10) - No test regressions - Spotted some benchmark regressions - ARMv7 is overall the same on EEMBC - AArch64 is overall 10% faster on EEMBC * Weekend working, Friday off == Plan == * Release week! - Investigate 3.5 performance regressions on v7 - Work around the lack of perf on v8? - Run SPEC on both v7 and v8 and spot regressions

12 years, 2 months

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[Activity] 19-25 JULY 2014

by Venkataramanan Kumar

== Progress == * Attend GNU Cauldron. * TCWG Sprint (8/10) - Participated in Discussions about TCWG/GNU tools. - Partcipated in Discussions with ARM mainatiners. - Discussed about Connect plans. - LLVM status. - Attend Backport Demo by Yvan / some Bug fix Activity. * Friday off traveling back home (2/10) == Plan == * Continue LTO bootstrap issue * Benchmark Core mark with LTO * Upstream patch review. == Issues == * Large Memory Model put on hold now. * Waiting on ARM on Aarch64 SYS V ABI.

12 years, 2 months

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[Weekly] 21-25 JULY 2014

by Michael Collison

== This week == * TCWG Sprint (8/10) - Validation process greatly clarified including roadmap * Launchpad 1318831 - Invalid unpoisoning of stack redzones on ARM (2/10) - Finished validating and working thru git review isses with Launchpad == Next week == * Begin neon intrinsic testing * I will be off on Monday and Tuesday

12 years, 2 months

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help, here is a armV8 32bit question for linaro 4.8: the code I given below adopt sembedding ARMV8 assembly , but the compile result with Linaro GCC 4.8 aarch32 is not correct

by Panshilin (Peter)

Hi all concerned: this test code I given below: AARCH32 [https://email-cn04.huawei.com/owa/14.3.158.1/themes/base/pgrs-sm.gif] Test function[X][X] { volatile unsigned int val0 = 0; volatile unsigned int val1 = 0; asm volatile(“mrrc p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1)) val0 &= ~(1<<6); val1 &= ~(1<<6); asm volatile(“mcrr p15, 1, %0, %1, c15” : “=r”(val0), “=r”(val1)); } After compiling, the result is: mrrc 15, 1, r2, r3, cr15 str r2, [fp, #-28] str r3, [fp, #-24] ldr r3, [fp, #-28] bic r3, r3, #64; str r3, [fp, #-28] ldr r3, [fp, #-24] bic r3, r3, #64 str r3, [fp, #-24] mcrr 15, 1, r2, r3, cr15 obviously , it is not what I expect. I have val0 an vl1 two vars, but the compiling result is only one val takes effect. especia I have to mention is AARCH32. thanks. Peter

12 years, 2 months

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FW: Request received: accessing toolchain source releases - Member user

by Scott Douglass

Hi, Do you happen to know the answer to the git/svn questions below? Thanks. -----Original Message----- From: LDTS [mailto:support@linaro.zendesk.com] Sent: 25 July 2014 08:43 To: Scott Douglass Subject: Request received: accessing toolchain source releases - Member user Thank you for contacting Linaro. Your request (#927 <https://support.linaro.org/requests/927> ) has been received and is being reviewed by Linaro Developer Technical Support (LDTS). One of our Support agents will be in contact with you as soon as possible. If you would like our agent to contact you via phone, please include your phone number in the comments. To view your ticket and/or add additional comments, reply to this email or click the link below: http://support.linaro.org/requests/927 Scott Douglass Jul 25 16:43 Hi, I’ve been looking at https://wiki.linaro.org/WorkingGroups/ToolChain (https://wiki.linaro.org/WorkingGroups/ToolChain) and I see the Tree links that give me the git repository and commit id for the current releases of the toolchains (for example, 4.9-2014.06-1 => https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8… (https://git.linaro.org/toolchain/gcc.git/commit/56d9fd9281e8cef3ea35b7d9ad8… My first question is: is there a straight-forward way (for example, a tag) to find the commit ids of older (4.9) releases? Or is searching the commit messages the best way? Also, is there svn access as well or just git access? (Git access is enough, but svn access would be slightly easier for me.) Also, I has a couple comments on that wiki page: It says “Pre-built versions that run on generic Linux or Windows are available at http://launchpad.net/linaro-toolchain-binaries.”, but it looks like the that Launchpad project is no longer being maintained (no 4.9 and no recent 4.8). Perhaps the wiki page should be updated (and the Launchpad description updated). The wiki page also links to https://wiki.linaro.org/Cycles/Next/Release/Status (https://wiki.linaro.org/Cycles/Next/Release/Status) which seems even more out-of-date than the Launchpad binaries; perhaps that link should be updated/removed, too. Thanks. -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 ##- Please type your reply above this line -## Message-Id:5EV1YF0A_53d20a9134254_35e73f955b4b3338321343_sprut -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782

12 years, 2 months

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[ACTIVITY] 16 - 20 June

by Charles Baylis

* Linaro bugzilla #24 - [6/10] * investigating cause of ICE in Linaro 4.9 * PR61411 [1/10] * Committed patches for division (TCWG-???) and Neon address mode (TCWG-430) [1/10] * Admin [1/10] * Holiday [1/10]

12 years, 2 months

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VFP in BE mode - undefined instruction vstmia

by Joel (Xi Zhou) Zhou

Hi all, I'm working on booting Linaro LSK 3.10.40 kernel in be8 mode on our Cortex-A9 system. There is an issue related to VFP instruction. It complain "vstmia" is an undefined instruction. The VFP is supported in CPU and CONFIG_VFP and CONFIG_VFPv3 are enabled in kernel config. Are there any patch need to be done for VFP in BE mode? The booting log show as following: call sys_access(/init) Freeing unused kernel memory: 2832K (c0600000 - c08c4000) kernel_init: try to execute '/init' (ramdisk_execute_command) en->run_init_process(/init) init (1): undefined instruction: pc=0000aab8 Code: f00f dff8 2a20 1268 (acec) 108b Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004 The disassembly code show the undefined instruction is "vstmia". armeb-linux-gnueabihf-objdump -D busybox_unstripped > busy.asm 0000aa90 <__sigsetjmp>: ... aab6: 6812 ldr r2, [r2, #0] aab8: ecac 8b10 vstmia ip!, {d8-d15} aabc: f412 7f00 tst.w r2, #512 ; 0x200 The rootfs is busybox 1.22.1 compiled by Linaro BE hard floating toolchain. https://releases.linaro.org/14.04/components/toolchain/binaries/gcc-linaro-… Thanks, Joel

12 years, 2 months

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