== Progress ==
* AArch64 GDB reverse watchpoints issues. [TCWG-503] [6/10]
-- Proposed a fix which failed testing now working on an alternate
fix in gdb process record target implementation.
* Further progress on AArch64 GDB handling of functions with empty
prologue. [TCWG-504] [2/10]
-- Analysed different type of obj files and how they are being handled by gdb.
* Investigate and improve ARM gdb frame unwinding [TCWG-157] [1/10]
-- Try to reproduce reported bugs.
* Miscellaneous [1/10]
-- Setting up gdb remote testing with hackboxes.
-- Meetings etc.
== Plan ==
* AArch64 GDB reverse watchpoints issue. [TCWG-503]
-- Figure out a new fix in gdb process record implementation, test
it and then justify it.
* AArch64 GDB handling of functions with empty prologue. [TCWG-504]
-- Further investigation.
=Progress=
memset performance improvement - TCWG-156 [2/10]
* Bugfixed/improved cortex-strings-bench-on-lava
memcpy regression on A9 - TCWG-390 [6/10]
* Scanned through lots of data
* Learned some perf and some streamline
* Still don't know what's going on here
lowlevellock performance bugs - TCWG-435 [0/10]
* Stalled until someone reacts to my pings
Meetings/mail/etc [2/10]
* Including some questions about whether we need softfloat support in
binary releases
=Plan=
Keep prodding at memcpy with perf/streamline
Explore repeatability of cortex-strings benchmark
See how much quicker I can make cortex-strings benchmark without
compromising repeatability
Possibly try out a bare metal version of (a subset of) cortex-strings benchmark
* Analysis of PR61411 (CARD-341) [2/10]
* Attempted to analyse VP8 decode performance on Aarch64 vs Aarch32
(TCWG-?) [6/10]
. took a while to find compatible libvpx source and compilers :(
. can't find a good way to profile on Aarch64, perf is broken, gprof
results look implausible
* Misc [2/10]
== Issues ==
* None
== Progress ==
* Take care Linaro binaries release (1/10).
* Send out ccmp patches for community review (TCWG-488, 1/10).
* loop2_invariants heuristics tune (1/10, TCWG-469). One patch was
committed @r212135.
* Constant optimization (TCWG-486, 7/10 )
- Try to keep constant in register when expanding. But benchmark
results show regression due to combine behavior changes.
- Try to keep unsigned constant when expanding. For crc |= 0x8000,
crc is unsigned short. If 0x8000 is represented as unsigned value, no
need to split 0x8000. But in middle-end, wide_int_storage::set_len and
trunc_int_for_mode always do sign extension. "trunc_int_for_mode
(INTVAL (op), mode) == INTVAL (op)" is always checked when checking
operand (e.g. in general_operand of recog.c). And in RTL, there is no
"unsigned" information at all.
== Plans ==
* Update ccmp patches according to comments.
* Continue on constant optimization.
* Ping pending patches.
== Progress ==
* Zero/sign extension elimination (TCWG-15) (10/10)
- Posted two patches for review and gone through few iterations
- Looked at flag_wrapv and !flag_strict_overflow regressions
* ARM (and possibly some other targets) truncates negative values and
this makes them incompatible with the value range in SSA. One solution
is to ignore any gimple statements that load negative constants when
eliminating zero/sign extension elimination.
* We also loose the OVF(INF) information in tree when they are
converted to wide_int and propagated to SSA.
- Testing on a target that support PTR_EXTEND
* Trying to set-up x86_64-linux with -mx32. Still not able to compile
as I am getting various errors in glibc. Looking into it,
== Plan ==
* Upstream zero/sign extension elimination activities
== Week of June 23rd ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Various cleanups and improvements to cbuild2.
-- Troubleshooting of Jenkins stability problems.
-- Increasing test coverage for arm big-endian toolchains.
- Various meetings and discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 16th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Refactored cbuild2's schroot support after Rob's review
-- Posted updated patches
- Started moving TCWG dev environment master vm to Linaro's AWS (1/10)
-- This the the VM from where toolchain64.lava.schroot and maximk.schroot are synchronized.
-- Once migrated, all TCWG admins can access it, not just me.
- Various meetings and discussions (2/10)
--
Maxim Kuvyrkov
www.linaro.org
== Week of June 9th ==
- Continued working on toolchain testing improvements (CARD-1378, 6/10)
-- Added support for native testing inside schroot
-- Troubleshooting of various problems
-- Assisted Yvan in testing of the 2014.06 source release and general fire-fighting
- Various meetings and discussions (2/10)
- Interviewed 2 potential assignees (1/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Patch review, testing and follow-up (4/10, CARD-341)
- glibc 2.20 freeze upcoming
- submit some warning fix patches
* Add support for ARM HWCAP2 to glibc (2/10, TCWG-499)
* Submit a patch for increasing ld max page size on ARM (1/10)
* Reformatted backports spreadsheet for glibc, binutils and gdb (1/10)
* Investigated language runtimes (1/10)
* Meetings (1/10)
== Issues ==
* None
== Plan ==
* More glibc patch work for the freeze (1st July)
* malloc benchmarking
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* GCC trunk cross-validation (CARD-647) (6/10)
- email robot is now working
- added list of "ignored" tests when reporting regressions, mainly
because they are unstable when run under qemu (threads...)
- a57+crypto FPU config looks OK
- tried to use "contrib/test_summry" to send results, but that would
flood gcc-testresults mailing-list
- looked at impact of using CFLAGS/CFLAGS_FOR_TARGET etc upon
libstdc++ tests. Needs deeper investigation
- robustified scripts to handle more compute farm errors (random
"interrupted system call")
* AArch64 libsanitizer: no progress this week
* Neon intrinsic tests: review started
* Misc (meetings, conf-calls, ...) 4/10
- 4.7-2014.06 release done, benchmarks on-going
== Next ==
* GCC cross-validation
- look more deeply at the impact of the various CFLAGS (on testsuites results)
* Neon intrinsic tests:
- handle feedback
* AArch64 libsanitzer: resume work
* Publish 4.7-2014.06 release
== Progress ==
* Toolchain (CARD-862 1/10)
- Testing Compiler-RT on autoconf/ARM
- Checking LLD
* Automation Framework (CARD-1378 6/10)
- Writing script to manage TCWG rack
- Testing D01 with new kernel
- Testing Chromebook 2 vs. 1 vs. D01 for LLVM
- Cleaning up failed Chromebooks
- Pointlessly working on beagle bones
* Background (3/10)
- Code review, meetings, discussions, etc.
- Starting the GCC + LLVM presentation
== Plan ==
* continue trying to build compiler-rt with autoconf on ARM
* continue working on the LLVM + GCC presentation
* initial investigations on lld and MCLinker
The Linaro Toolchain Working Group (TCWG) announces the 2014.06-1 release of
the Linaro GCC 4.9 source package. This is a respin of the 2014.06 release which
fixes some issues on AArch64 big-endian and in AArch64 libjava.
Changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211964
* Revert backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Cost model improvements.
Please find the original 2014.06 release notes below:
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.06
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.06 is the third Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1-pre+svn211054 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1-pre+svn211054
* Backport of [AArch32] PR rtl-optimization/60663
* Backport of [AArch32] Suppress Redundant Flag Setting for Cortex-A15.
* Backport of [AArch32] Support ORN for DIMode.
* Backport of [AArch32] Optimise NotDI AND/OR ZeroExtendSI for ARMv7A.
* Backport of [AArch32] Allow any register for DImode values in Thumb2.
* Backport of [AArch32] Initialize new tune_params values.
* Backport of [AArch32] Initialise T16-related fields in Cortex-A8
tuning struct.
* Backport of [AArch32] Enable tail call optimization for long call.
* Backport of [AArch64] TRY_EMPTY_VM_SPACE Change for ILP32.
* Backport of [AArch64] Fix TLS for ILP32.
* Backport of [AArch64] vrnd<*>_f64 patch.
* Backport of [AArch64] Fix possible wrong code generation when
comparing DImode values.
* Backport of [AArch64] Add a space to memory asm code between base
register and offset.
* Backport of [AArch64] Fix aarch64_initial_elimination_offset calculation.
* Backport of [AArch64] vqneg and vqabs intrinsics implementation.
* Backport of [AArch64] Vreinterpret re-implemention.
* Backport of [AArch64] Define TARGET_FLAGS_REGNUM.
* Backport of [AArch64] Merge longlong.h from glibc tree.
* Backport of [AArch64] add, sub, mul in TImode.
* Backport of [AArch64] Add handling of bswap operations in rtx costs.
* Backport of [AArch64] Fully support rotate on logical operations.
* Backport of [AArch64] Use standard patterns for stack protection.
* Backport of [AArch64] VDUP Testcases.
* Backport of [AArch64] Vectorise bswap[16,32,64].
* Backport of [AArch64] Enable TBL for big-endian.
* Backport of [AArch64] Reverse TBL indices for big-endian.
* Backport of [AArch64] Relax modes_tieable_p and cannot_change_mode_class.
* Backport of [AArch64] Improve vst4_lane intrinsics.
* Backport of [AArch64] Rewrite and tests ZIP Intrinsics.
* Backport of [AArch64] libitm Enabled.
* Backport of [AArch64] Support full addressing modes for ldr/str in
vectorization scenarios
* Backport of [AArch32/AArch64] rtx costs (FMA, Cortex-A8, ...).
* Backport of Fix warning in libgfortran configure script.
* Backport of Remove PUSH_ARGS_REVERSED from the RTL expander
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
Sorry for sending this late this week.
== Progress ==
* Ran gdb testsuite on arm and x86. Investigated failures on
arm-native-gdbserver config. [2/10]
* Investigate shared library gdb test failures with dejagnu on remote
connections. [TCWG-504] [2/10]
* Debug AArch64 GDB reverse watchpoints issue. [TCWG-503] [2/10]
* Debug AArch64 GDB handling of functions with empty prologue. [TCWG-504] [2/10]
* Understand gdb remote vs native feature parity patches. [1/10] [TCWG-263]
* Miscellaneous [1/10]
-- Setting up chromebook with 14.04
-- Meetings etc.
== Plan ==
* Further progress on AArch64 GDB reverse watchpoints issue. [TCWG-503]
* Further progress on AArch64 GDB handling of functions with empty
prologue. [TCWG-504]
== Progress ==
* Track down and fix build, testing, and Jenkins issues. (TCWG - 1378
9/10)
- Reinstalled everything needed for toolchain build and Jenkins on
the repaired chromebooks.
- Setup D01 and APM boards for toolchain building and testing,
added them to the Jenkins matrix.
- Updated qemu to the latest to get aarch32 & crypto support.
* Meetings and Misc (1/10)
== Plan ==
* Fix bare metal testing for aarch64.
* Continue working with the D01 boards.
* Track down and fix build, testing, and Jenkins issues. (TCWG - 1378)
== Issues ==
* Gerrit triggers only build trunk, and not the branch specified
in the review request.
== Progress ==
* More work on malloc microbenchmark (5/10, TCWG-160)
- Script for plotting results
- Analyze performance with SystemTap probe points
- Tidy up and submit v3
* Further work on ld issue on master (1/10, CARD-341)
* Patch review and testing (2/10, CARD-341)
* Annual leave on Friday (2/10)
* Still no luck on getting Ubuntu on wg boards
== Issues ==
* None
== Plan ==
* Make sure we have everything we need for glibc freeze at month end
* malloc app benchmark work
--
Will Newton
Toolchain Working Group, Linaro
=Progress=
memcpy regression on A9 - TCWG-390 [6/10]
* cortex-strings benchmarks suggest this isn't just an outlier, nor
entirely about preload
* Quick test on A15 suggests a similar (less severe) issue
* Got cortex-strings benchmarks more-or-less running via lava
memset performance improvement - TCWG-156 [1/10]
* GNU benchtests not as repeatable as hoped
lowlevellock performance bugs - TCWG-435 [1/10]
* Converted a bunch of inline functions into macros for coldfire
Meetings/mail/etc [2/10]
=Plan=
Carry on generating memcpy data, develop some hypotheses
Bugfix lava-ization of cortex-strings benchmarks as & when
Explore repeatability of cortex-strings benchmark
See how much quicker I can make cortex-strings benchmark without
compromising repeatability
Try to get lowlevellock.h committed for at least arm/aarch64
== Progress ==
* TCWG-418 : Bug fix Reload spill failure (3/10)
Bench marked coremark – no degradations with patch.
CPU2000 runs – Workedon running them as native in chromebook.
Issues with space.
* TCWG-181 : LTO enablement (3/10)
GCC 4.9 FSF no ICE . Linaro 14.07 release has ICE.
GIT bisect experiments on trunk on Aarch64 hardware.
* Misc: (2/10)
- Various meetings .
- PGO bootstrap runs on Aarch64 hardware - pass.
* AMD team out on 19th (2/10).
== Next ==
* GIT bisect experiments on LTO bootstrap.
* Continue Benchmark reload spill failure fix
* Explore on Large memory model support for aarch64
* Cbuildv2 release packaging on native.
== Progress ==
* Benchmarking and regression testing (TCWG-468) (3/10)
- More aarch64 spec2k benchmarking of patches and against fsf 4.9 release
- Spec2k a15 benchmarking on chromebook
* Zero/sign extension elimination (TCWG-15) (5/10)
- Fixed regressions found and broke the patch into two
- Looking at improving zero/sign extension elimination as it is not
happening for one test-case now
- Plan to benchmark the changes and post for review once this is done.
* LP spec2k regression bugs (2/10)
- #1320965 : Cant reproduce ICE but goes into infinite loop with
-floop-interchange at -O3; Looking into it
-#1330725 : Invalid as -fno-strict-overflow is needed for 254.gap.
== Plan ==
* Benchmarking and spec2k bugs.
* Upstream zero/sign extension elimination activities.
== Issues ==
* None.
== Progress ==
* loop2-invariant heuristics tuning (TCWG-469, 2/10). Two patches were
committed @r211818 and r211885. Another two are in review.
* Test the rebased ccmp patches (TCWG-488, 2/10).
* Send out a patch to enhance cprop pass by checking rtx_cost. Collect
benchmark results and update the patch according to comments
(TCWG-486, 6/10).
== Plans ==
* Ping pending patches.
* Continue on patches to optimize constant in loop.
