== Progress ==
* GDB reverse debugging on aarch64 [6/10] [TCWG-398]
-- Setup development tree and debug environment.
-- Verified generic reverse debugging implementation aarch64.
-- Implemented main function stubs to catch instruction for decoding
and recording.
* Work on gdb testing utility [TCWG-96] [1/10]
-- Some tweaks to scripts and wiki updates.
* Experimented gdb testing/debugging with Aarch64 QEMU + Chroot [3/10]
== Plan ==
* GDB reverse debugging on aarch64 [TCWG-398]
-- Implement main instruction decoding handler and write function
stubs for different types of instructions.
-- Dig deeper into aarch32 for handling it through armv7
implementation if possible.
== Progress ==
TCWG-156 cortex-strings memset (5/10)
* Fixed a couple of bugs in the no-VFP case
* Ran benchmarks, discarded broken benchmarks, ran more benchmarks
* Explored benchmarking scripts
* Took a hard look at the memset tests
* Experimented with ARM-internal cortex-strings benchmark (not useful right now)
Misc
* Meetings (1/10)
* Kicked an A15 target until it worked (1/10)
* 1/2 day holiday
== Plan ==
More TCWG-156
Maxim's glibc starter issue
Holiday Tuesday
Public Holidays Friday & next Monday
1 day off (Child care)
== Issues ==
* Toolchain64 disk full
== Progress ==
* Released Linaro GCC 4.7 and 4.8 2014.04 (5/10)
* Launchpad bugs: (1/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- rebased and rework patch
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Continue on LP #1169164
- Linaro GCC 4.9 release
== Issue ==
* None
== Progress ==
* 2 day off.
* Investigate lp:1304267 and close it as invalid.
* Investigate shrink-wrap bootstrap issues [4/10, TCWG-133]
- Re-implement the copy propagate part by referring cprop_hardreg pass.
- Other tests are ongoing.
* Document cross-native build on wiki:
https://wiki.linaro.org/WorkingGroups/ToolChain/cross-native
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
== Planed leaves ==
* April 21: Team event.
* May 1-3: Labour day holiday.
== Progress ==
* TCWG-413 Spec2006 (6/10)
- Setup chroot for aarch64
- Created rootfs with 4.8/trunk and spec2006
- booted created rootfs on foundation model with ubuntu kernel
* TCWG-291 CRC (3/10)
- posted vrp patch upstream
- with that seeing expected performance improvement
- analysing crc complete and up-streaming activities pending
* LP1301335 and PR59695 back-porting (1/10)
== Plan ==
Benchmarking and FENV support
Dear Sir,
Thanks for you page. it is really very helpful to us.
We are facing a problem during compiling GCC for our ARMv7-a Cortex-a9.
We are using following option:
1.
../gcc-linaro*/configure --disable-bootstrap --enable-languages=c,c++
--with-mode=thumb --with-arch=armv7-a --with-tune=cortex-a9
--with-float=hard --with-fpu=vpfv3-d16 --prefix=$home/gcc/gcc-linaro
2.
make -j`getconf _NPROCESSORS_ONLN`
after 2 step we are getting following error:
checking whether putc_unlocked is declared... yes
checking whether getrlimit is declared... yes
checking whether setrlimit is declared... yes
checking whether getrusage is declared... yes
checking whether ldgetname is declared... no
checking whether times is declared... yes
checking whether sigaltstack is declared... yes
checking whether madvise is declared... yes
checking for struct tms... yes
checking for clock_t... yes
checking for F_SETLKW... yes
checking if mkdir takes one argument... no
Unknown CPU given in --with-arch=armv7-a.
make[1]: *** [configure-gcc] Error 1
make[1]: Leaving directory `/home/anwej/src/build'
make: *** [all] Error 2
Please suggest the solution. where is the problem and what will be our next
steps.
Thanks in advance.
-best regards
Anwej Alam
Ph: +91.995.833.3456
Hi,
The preprocessed file:
http://people.linaro.org/~rikuvoipio/qmltextgenerator.ii.gz
With compile command line:
g++ -save-temps -c -g -O2 -fstack-protector --param=ssp-buffer-size=4
-Wformat -Werror=format-security -D_FORTIFY_SOURCE=2 -fvisibility=hidden
-fvisibility-inlines-hidden -Wall -W -D_REENTRANT -fPIC -o x.o
qmltextgenerator.ii
Will take apparently forever (north of 1600min) on a debian native gcc. -O
compiles instantly. Some bisecting for gcc optimization flags later,
disabling strict aliasing allows instant build as well:
g++ -save-temps -c -g -O2 -fno-strict-aliasing -fstack-protector
--param=ssp-buffer-size=4 -Wformat -Werror=format-security
-D_FORTIFY_SOURCE=2 -fvisibility=hidden -fvisibility-inlines-hidden -Wall
-W -D_REENTRANT -fPIC -o x.o qmltextgenerator.ii
Happens with:
gcc version 4.8.2 (Debian 4.8.2-19)
and
gcc version 4.9.0 20140405 (experimental) [trunk revision 209146] (Debian
20140405-1)
Linaro binary cross-compilers are compile the file fine with -O2.
do we do native gcc testing, or should it be just submitted upstream
bugzilla?
Riku
The Linaro Toolchain Working Group is pleased to announce the 2014.04
release of both Linaro GCC 4.8 and Linaro GCC 4.7.
As announced at Linaro Connect USA 2013 Linaro GCC moved to a pattern of
quarterly stable releases, with engineering releases in the intervening
months. This is the second stable release, and contains no known regressions
compared to the 2014.01 release.
The next stable release of GCC 4.8 will be the 2014.08 release. There will be
no engineering releases of GCC 4.8 until this release, as it enters in
maintenance.
No more releases of GCC 4.7 are planned.
Next month's release - 2014.05 - will be based off GCC 4.9 and be an
engineering build.
Linaro GCC 4.8 2014.04 is the thirteenth and last development release in the
4.8 series before entering maintenance. Based off the latest GCC 4.8.3+svn208968
release, it includes performance improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.3+svn208968
* Cortex-a53 support
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1268893: ICE when building kernel raid6 neon code
* A fix for LP #1273511: ICE APCS Frame & optimize-sibling-calls
Linaro GCC 4.7 2014.04 is the twenty third release in the 4.7 series. Based
off the latest GCC 4.7.4+svn209005 release, this is the tenth release after
entering maintenance and the final one.
Interesting changes include:
* Updates to GCC 4.7.4+svn209005
* A fix for LP #1129013: Internal compiler error in push_reload during
bootstrap stage 2
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1301335: Compiler segmentation fault while cross-compiling QT5
Webkit
The source tarball is available from:
http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.8http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.7
Downloads are available from the Linaro Releases website:
http://www.linaro.org/downloads/
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.8/4.8-2014.04https://launchpad.net/gcc-linaro/4.7/4.7-2014.04
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
I compiled my code with debug symbols on an BeagleBoneBlack using Debian
gcc-4.7. If I use objdump -S on my object file, I see both source lines
and disassembly. On my Ubuntu 13.10 host, using
gcc-linaro-arm-linux-gnueabihf-4.7-2013.04-20130415_linux, I do
arm-linux-gnueabihf-objdump -S on the same object file, I see disassembly
lines, but the source lines are not displayed. I¹m attempting to debug my
code with a Lauterbach JTAG debugger, but no source code is available
which makes debugging very difficult.
Is there some compatibility issue here or am I doing something wrong?
Regards,
John
== Progress ==
* Work on gdb testing utility [TCWG-96] [8/10]
-- Support to run native and native-gdbserver test via ssh on remote
machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
* Chromebook ubuntu re-install and fix network lag issue [2/10]
== Plan ==
* GDB reverse debugging on aarch64
-- Start implementation of reverse debugging infrastructure [TCWG-398]
-- Add support for running aarch64 gdb test suite in gdb testing utility.
== This week ==
a53 support [CARD-300][3/10]
- aarch64-none-elf target using cpu=cortex-a53 passed validation on
foundation model
- Resolved code review issues (formatting and unnecessary patches)
Backport 202663 - vectorizer bug passed validation and merge review for
4.7 and 4.8 [CARD-300][3/10]
GCC Bugzilla bug 60657 [TCWG-290][2/10]
- began fix by adding new conditions to pattern causing crash
- bug was fixed upstream by Jeffrey Law on April 4th
== Next week ==
- Transition from backports to bug fixing
- Create Wiki page for Aarch64 bug contingency bug fixes, feature and
performance improvements for partners
== Future ==
One week of vacation either the third or fourth week of April.
=== Progress ===
LP1296601 (ICE in push_minipool_fix) [5/10]
* completed a prototype fix
* submitted RFC patch to gcc-patches
* still awaiting review
PR60609 (Error: value of 256 too large for field of 1 bytes) [3/10]
* implemented fix and posted to gcc-patches
* approved, subject to further testing on Thumb-1
libvpx NEON assembler vs instrinsics performance investigation [2/10]
* looking at disassembly, code is not terribly aesthetically pleasing
* in some cases clang looks better
=== Plan ===
write up libvpx investigation
follow up/ping LP1296601
NEON scheduling TCWG-135
TCWG-156 (5/10)
* Hacked v7 memcpy into a memset
* Much fiddling with builds, targets
* Kicked off a benchmark run
Misc
* Meetings (1/10)
* Finding hardware/setting up working environments/figuring out workflows
(4/10)
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- New failure after first fix reported.
- reduced new testcase.
- Fix committed by Vladimir as rev209038
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- analysed validation results.
- re-spawned some jobs.
* Backports review: (5/10)
o cortex-a53 support backport:
- We are still not able to validate it on aarch64-linux-gnu target
with a compiler configured to default to cortex-a53, but no regressions
observed in the generic case and on bare_metal (with cortex-a53).
* Misc:
o Cbuildv1 baby-sitting (2/10)
- Toolchain64 disk was full.
o Various meetings (1/10).
== Next ==
- Mainly 4.7 and 4.8 April releases
- TCWG-413 Spec2006 (5/10)
- Analysed 456.hmmer
- In the process of opening performance bug reports
- Started looking at 453.povray
- TCWG-291 CRC (2/10)
- Not seeing performance improvement with redundant "and" instruction gone
- Analysing with perf to see the reason
- LP1301335 (3/10)
- SLP vectorizer ICEs for QT5 Webkit for Linaro 4.7
- Doesn’t occur in trunk/4.8/4.7 FSF
- Patch proposed for merge request which fixes
- I also see some FAIL -> PASS in the regression with this patch
- This patch is only relevant for Linaro 4.7 so we cant/don’t need to
upstream it (?)
== Plan ==
Continue with Spec2006 and crc
4 day week 31-Oct local holiday
Bug fix (2/10)
* Looking at a register allocation issue with ARMv7 hard float issue. (3/10)
Tried changing machine description pattern same as trunk in gcc 4.8 branch.
Issue does not occur with trunk and reason is arm64 moved to lra.
turning off lra bug occurs.
Trying to find out if it is easy to fix in reload or wait for LRA backport.
PGO - AArch64 (TCWG-179) (3/10)
* Native CPU2006 runs on V8 foundation model.
SPEC runs -O3 -mcpu=cortex-a57. INT benchmark failures seen with mcf
and h264ref.
rest benchmarks running.
* Tried to use ubuntu saucy core image on V8 foundation model and
mount NFS is failing.
* Trying to install QEMU user static for aarch64 and use them from
chroot environment
GLIBC Systemtap (2/10)
* Re spined libc systemtap probe patch to glibc. Will newton is
testing it in hardware.
Meetings (2/10)
* Attend 1-1 with Ryan discuss 2014 goal planning.
* Attend 1-1 with Maxim discuss PGO work.
== Progress ==
* Kernel (TCWG-417)
- Implementing named register global variables (D3261)
- Helping Milosz and Vinicius (LLVMLinux) to get a kernel ready
- First LLVM-compiled kernel booted on Versatile Express hardware
* Background
- Reviewing patches, etc.
- Apple merged their ARM64 back-end, fiddling bots
- Making the new TableGen docs official
- Jira farming
- Became code owner for the ARM Linux support
- LLVM Foundation announced
- Trying to run SPEC on AArch64
* Time
- CARD-124 6/10
- Others 4/10
== Plan ==
* Holiday for two and a half weeks
* Follow up the named register patch
== Progress ==
* glibc patch review (2/10)
* Helping out with aarch64 glibc setjmp/longjmp Systemtap probes testing (1/10)
* Investigated and submitted patch for gas ARM alignment issue (3/10)
* Committed library and script for malloc logging (1/10, TCWG-423)
* Rebased and tidied up malloc microbenchmark (2/10, TCWG-160)
* Various small binutils and glibc patches (1/10)
== Issues ==
* None
== Plan ==
* Submit patch for glibc malloc microbenchmark
--
Will Newton
Toolchain Working Group, Linaro
Hi all,
I've just filed a bug on glibc I'd love you to take a look at:
https://sourceware.org/bugzilla/show_bug.cgi?id=16796
Here's the description to save clicking:
Hi,
There is a test in glibc (tst-tls5) that tests that
((uintptr_t)pthread_self())%16 is zero. But watch this:
(t-mwhudson)mwhudson@am1:~$ cat btp.c
#include <stdint.h>
#include <stdio.h>
#include <pthread.h>
int
main(int argc, char** argv)
{
uintptr_t p = (uintptr_t)__builtin_thread_pointer();
uintptr_t q = (uintptr_t)pthread_self();
printf("p: %lx %ld\n", p, p%16);
printf("q: %lx %ld\n", q, q%16);
}
(t-mwhudson)mwhudson@am1:~$ gcc -o btp btp.c -lpthread
(t-mwhudson)mwhudson@am1:~$ ulimit -s unlimited
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 2000028d88 8
q: 2000028698 8
(t-mwhudson)mwhudson@am1:~$ ulimit -S -s 8192
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 7f7fd086f0 0
q: 7f7fd08000 0
So something is clearly wrong; maybe it's just that the test is too
strict, but somehow that seems a bit unlikely. FWIW, this doesn't
happen if you don't link with libpthread so maaaaybe it's a bug in
something that ends up in libpthread's .init section?
Cheers,
mwh
== Week of March 24th ==
- STREAM regression (TCWG-388, 5/10)
-- Finished prototype patch. The patch adds modeling of ARM L2 auto-prefetcher hardware to GCC scheduler (the model is very simple as auto-prefetcher is very lightly documented). Half of the patch cleans up and improves GCC scheduler, and the other half implements the auto-prefetcher model.
-- While looking into ARM scheduling support noticed that ARM doesn't use multipass lookahead scheduling, which surprised me. Enabled it (multipass scheduling) in my patches.
- Looked into lll_timed_wait Glibc/uClibc bug upstream (1/10)
-- https://sourceware.org/ml/libc-alpha/2014-03/msg00905.html
- Various discussions and reviews (4/10)
== Week of March 30th ==
- STREAM regression (TCWG-388)
-- Benchmark patches on SPEC2k and find/confirm best values for tuning parameters:
--- dfa_lookahead: should normally be issue_rate-1.
--- L2 auto-prefetcher queue depth: new tuning knob.
-- Investigate any performance regressions from the patches.
- lll_timed_wait Glibc/uClibc bug
-- Make sure it is fixed upstream. Possibly backport to Linaro branches.
--
Maxim Kuvyrkov
www.linaro.org
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- created blueprint for :
https://bugs.launchpad.net/gcc-linaro/+bug/1296676
- Reported upstream as :
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60650
- Reduced testcase
- Fix committed by Vladimir as rev208876
- still ICE when configured for arm-none-linux-gnueabihf
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- https://bugs.launchpad.net/gcc-linaro/+bug/1129013
- some testsuite regressions observed. will investigate.
* Backports review: (5/10)
o reviewed backport for pr60264 and rev202663
o cortex-a53 support backport:
- Analysed testsuite regression
- 22K Loc patch under review
* LRA on AArch32:
o TCWG-345 : Analyse performance of LRA for ARM. (1/10)
- looked at the perf tool results
* Misc:
o Various meetings (1/10).
o Various support to team members (1/10)
o Cbuildv1 baby-sitting (Calxedas nodes have to be restarted after
each upgrades !)
== Next ==
- continue cortex-a53 review
- continue on backports.
- continue on TCWG-345.
== Progress ==
* Short Week
-- Monday Day Off: Pakistan Day 23rd March public holiday roll over. [2/10]
-- Short leave on Thursday [1/10]
* Work on gdb testing utility [TCWG-96] [7/10]
-- Writing a new gdb testing utility script that automates gdb
testing in various configurations and compares testsuite results.
-- Support for all kind of native, native-gdbserver and
remote-gdbserver gdb configurations has been added.
-- Interactive and configuration file based user input mode has been added.
-- Testing configurations host alive, ssh possible, board file found
and ability to build sources using user defined configure flags has
been added.
== Plan ==
* Work on gdb testing utility [TCWG-96].
-- Add support to run native and native-gdbserver test via ssh on
remote machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
== This week ==
a53 support
- Fixed regression found in arm testing and resubmitted build and
merge requests
- arrch64 testing passed with no regressions. Testing with a53
support enabled still required
Merged 202663 (vectorizer bug) into 4.7 and 4.8 branches. Submitted
merge and build requests
== Next week ==
- Test aarch64 with a53 support enabled on qemu64
- Work on bug 60657 - [4.9 Regresssion] ICE: error: insn does not
satisfy its constraints
== Future ==
