Progress:
* office move
* VIRT-49:
** confirmed I can run KVM on the Arndale, started using it as
test platform for the migration work
** I have most of the code for cp15 register migration written
** in debug phase; there is a case I hadn't considered that needs a
little thought
Plans:
* keep pushing on with VIRT-49
* book travel/hotel for Connect Dublin
* office move unpacking
-- PMM
Hi.
First.
#include <Im-doing-something-somewhat-odd.h>
I'm trying to use a current clang/llvm (current as in git checkout
from just the other day) to build an opencl kernel and then link that
with some code which has been compiled with gcc/g++.
When the clang .o is linked to the gcc/gcc+, I'm getting
/home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl uses VFP register arguments,
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o does not
the cl_temp_1.o was produced with clang.
the cl_temp_1.tkl via gcc/g++.
Let's dive into details.
This is following in the footsteps of an open source framework called
SNU which implements OpenCL. Within SNU they had a fairly old version
of clang+llvm which wouldn't even build on ARM so step one has been to
figure out what SNU was doing with clang and replicate this using
latest clang.
So given the following minimal test kernel placed into cl_temp_1.cl
/* Header to make Clang compatible with OpenCL */
#define __global __attribute__((address_space(1)))
int get_global_id(int index);
/* Test kernel */
__kernel void test(__global float *in, __global float *out) {
int index = get_global_id(0);
out[index] = 3.14159f * in[index] + in[index];
}
then we following the following steps:
clang -mfloat-abi=hard -mfpu=neon -S -emit-llvm -x cl
-I/home/tgall/opencl/SNU/src/compiler/tools/clang/lib/Headers
-I/home/tgall/opencl/SNU/inc -include
/home/tgall/opencl/SNU/inc/comp/cl_kernel.h
/home/tgall/opencl/SNU/tmp2/cl_temp_1.cl -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.ll
with the resulting cl_temp_1.ll we:
llc /home/tgall/opencl/SNU/tmp2/cl_temp_1.ll
which results in cl_temp_1.s. Then:
clang -c -mfloat-abi=hard -mfpu=neon -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.s
so now in theory we should have a perflectly good cl_temp_1.o ready for linking.
But first let's get the bits ready that will be built by the
traditional gnu toolschain. We have:
gcc -shared -fPIC -O3 -o /home/tgall/opencl/SNU/tmp2/cl_temp_1_info.so
/home/tgall/opencl/SNU/tmp2/cl_temp_1_info.c
and
gcc -shared -fPIC -march=armv7-a -mtune=cortex-a9 -mfloat-abi=hard
-mfpu=neon -fsigned-char -DDEF_INCLUDE_ARM -I. -I
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu -I
/home/tgall/opencl/SNU/src/runtime/include -I
/home/tgall/opencl/SNU/src/runtime/core -I
/home/tgall/opencl/SNU/src/runtime/core/device -I
/home/tgall/opencl/SNU/src/runtime/hal -I
/home/tgall/opencl/SNU/src/runtime/hal/device -DTARGET_MACH_CPU -O3 -c
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/hal.c -o
/home/tgall/opencl/SNU/tmp2/hal.o
And here we try to link it all together.
g++ -shared -fPIC -march=armv7-a -mtune=cortex-a9 -mfloat-abi=hard
-mfpu=neon -fsigned-char -DDEF_INCLUDE_ARM -O3 -o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl
/home/tgall/opencl/SNU/tmp2/hal.o
/home/tgall/opencl/SNU/tmp2/cl_temp_1.o
-L/home/tgall/opencl/SNU/lib/lnx_arm
-lsnusamsung_opencl_builtin_lnx_arm -lpthread -lm
and bang we're back to the error I first mentioned:
/usr/bin/ld: error: /home/tgall/opencl/SNU/tmp2/cl_temp_1.tkl uses VFP
register arguments, /home/tgall/opencl/SNU/tmp2/cl_temp_1.o does not
so first obvious question is -mfloat-abi=hard -mfpu=neon correct for clang?
tgall@miranda:~/opencl/SNU/tmp2$ clang --version
clang version 3.3
Target: armv7l-unknown-linux-gnueabihf
Thread model: posix
Thanks for any suggestions!
--
Regards,
Tom
"Where's the kaboom!? There was supposed to be an earth-shattering
kaboom!" Marvin Martian
Tech Lead, Graphics Working Group | Linaro.org │ Open source software
for ARM SoCs
w) tom.gall att linaro.org
h) tom_gall att mac.com
The Linaro Toolchain and Platform Working Groups are pleased to announce
the 2013.04 release of the Linaro Toolchain Binaries, a pre-built version
of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and
targets the glibc Linaro Evaluation Build.
This will likely be the last binary release based on gcc 4.7 -- it also
introduces the first gcc 4.8 based build.
Uses include:
* Cross compiling ARM applications from your laptop
* Remote debugging
* Build the Linux kernel for your board
What's included:
* Linaro GCC 4.7 2013.04 and Linaro GCC 4.8 2013.04
* Linaro GDB 7.5 2012.12
* A statically linked gdbserver
* A system root
* Manuals under share/doc/
The system root contains the basic header files and libraries to link your
programs against.
Interesting changes include:
* gcc is updated to 4.8 (in the 4.8 builds)
* rpc support in eglibc is re-enabled
* Version reported by ARMv7 and AArch64 cross toolchains has been unified
The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2,
Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and
later, and should run on any Linux Standard Base 3.0 compatible
distribution. Please see the README about running on x86_64 hosts.
The Windows version is supported on Windows XP Pro SP3, Windows Vista
Business SP2, and Windows 7 Pro SP1.
The binaries and build scripts are available from:
https://launchpad.net/linaro-toolchain-binaries/trunk/2013.04
Need help? Ask a question on https://ask.linaro.org/
Already on Launchpad? Submit a bug at
https://bugs.launchpad.net/linaro-toolchain-binaries
On IRC? See us on #linaro on Freenode.
Other ways that you can contact us or get involved are listed at
https://wiki.linaro.org/GettingInvolved.
Summary:
* ARM internal training and R/M toolchain related work.
* Investigate Linaro toolchain 4.8 build issues.
Details:
1. Fix several linaro toolchain 4.8 binary build issues:
* nls patch need be updated to add (char *) when assigning the
result of xmalloc to a char*.
* gcc build pass-2 need build libbacktrace (get patch from
crosstool-ng upstream).
* gcc build pass-2 build with "-j4" fail. Seams build order issue. A
workaround is to remove "-j4".
* Mingw32 confiugre fail due to missing ISL. A workaround is to add
"--without-isl"
Plan:
* Work with Bero to release 4.8.
* Swith to ISL/CLooG for future release.
Best Regards!
-Zhenqiang
I couldn't find the arm-none-eabi- bare metal version of Linaro GCC 4.8. Please provide the link for prebuilt baremetal tool chain binaries?
-Sugumar
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Paul,
I've been having some thoughts about CBuild and Lava and the TCWG
integration of them both. I wish to share them and open them up for general
discussion.
The background to this has been the flakiness of the Panda's (due to heat),
the Arndale (due to board 'set-up' issues), and getting a batch of Calxeda
nodes working.
The following discussion refers to building and testing only, *not*
benchmarking.
If you look at http://cbuild.validation.linaro.org/helpers/scheduler you
will see a bunch of calxeda01_* nodes have been added to CBuild. After a
week of sorting them out they provide builds twice as fast as the Panda
boards. However, during the setup of the boards I came to the conclusion
that we set build slaves up incorrectly, and that there is a better way.
The issues I encountered were:
* The Calxeda's run quantal - yet we want to build on precise.
* Its hard to get a machine running in hard-float to bootstrap a
soft-float compiler and vice-versa.
* My understanding of how the Lava integration works is that it runs the
cbuild install scripts each time, and so we can't necessarily reproduce a
build if the upstream packages have been changed.
Having thought about this a bit I came to the conclusion that the simple
solution is to use chroots (managed by schroot), and to change the
architecture a bit. The old architecture is everything is put into the main
file-system as one layer. The new architecture would be to split this into two:
1. Rootfs - Contains just enough to boot the system and knows how to
download an appropriate chroot and start it.
2. Chroots - these contain a setup build system that can be used for
particular builds.
The rootfs can be machine type specific (as necessary), and for builds can
be a stock linaro root filesystem. It will contain scripts to set the users
needed up, and then to download an appropriate chroot and run it.
The chroot will be set up for a particular type of build (soft-float vs
hard-float) and will be the same for all platforms. The advantage of this
is that I can then download a chroot to my ChromeBook and reproduce a build
locally in the same environment to diagnose issues.
The Calxeda nodes in cbuild use this type of infrastructure - the rootfs is
running quantal (and I have no idea how it is configured - it is what Steve
supplied me with). Each node then runs two chroots (precise armel and
precise armhf) which take it in turns to ask the cbuild scheduler whether
there is a job available.
So my first question is does any of the above make sense?
Next steps as I see it are:
1. Paul/Dave - what stage is getting the Pandaboards in the Lava farm
cooled at? One advantage of the above architecture is we could use a stock
Pandaboard kernel & rootfs that has thermal limiting turned on for builds,
so that things don't fall over all the time.
2. Paul - how hard would it be to try and fire up a Calxeda node into
Lava? We can use one of the ones assigned to me. I don't need any fancy
multinode stuff that Michael Hudson-Doyle is working on - each node can be
considered a separate board. I feel guilty that I put the nodes into CBuild
without looking at Lava - but it was easier to do and got me going - I think
correcting that is important
3. Generally - What's the state of the Arndale boards in Lava? Fathi has
got GCC building reliably, although I believe he is now facing networking
issues.
4. Paul - If Arndale boards are available in Lava - how much effort would
it be to make them available to CBuild?
One issue the above doesn't solve as far as I see it is being able to say to
Lava that we can do a build on any ARMv7-A CBuild compatible board. I don't
generally care whether the build happens on an Arndale, Panda, or Calxeda
board - I want the result in the shortest possible time.
A final note on benchmarking. I think the above scheme could work for
benchmarking targets all we need to do is build a kernel/rootfs that is
setup to provide a system that produces repeatable benchmarking results.
Comments welcome from all.
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
== Progress ==
* Disable-peeling: waiting for reference job results
* Libsanitizer:
- identified the reason for different behaviour on board and on simulator
- proposed a workaround on gcc-patches (qemu-user has a few
limitations, so it's desirable to skip some libsanitizer tests)
- in the mean time libsanitizer developers received similar concerns
from android, and are considering a runtime environment variable to
control use of stderr
* Neon intrinsics:
- resumed investigation on vuzp crc
* Internal support
== Next ==
* Peeling: analyze results when available
* Revert-coalesce: same
* Libsanitizer: reach agreement with upstream
* Neon intrinsics: continue with vuzp crc
== Progress ==
* Further work on glibc memcpy IFUNC patch based on review.
* Ported libdwarf to aarch64 and submitted upstream.
* Disabled gold build in binutils cbuild job and created a gold job.
* Investigated binutils testsuite failure on precise.
* On leave Friday.
== Issues ==
* None.
== Plan ==
* Submit a patch for binutils testsuite failure on precise.
* Complete work on glibc memcpy iFUNC patch.
* Follow up binutils IFUNC patch.
* AArch64 IFUNC next...
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Completed investigation of GDB dwarf test suite failures on ARM.
Almost all failures will be fixed with small updates to test cases
assembly language files.
* Checked-out GDB 7.6 branch and did comparison of dwarf test case failures
on arm. Some test cases have been updated already and dont need a patch.
* Started filtering GDB test suite results on ARM for possible failures due
to assembly language incompatibility.
* Tried some experimentation with cbuild, and ec2 instances only to find
out they are not connected with lab.
* Completed Ireland Visa process. Spent Friday and most part of Thursday
for the documents attestation, fee submission and postage stuff.
*** Still No blue-print available to log work in JIRA.
== Plan ==
* Filter all arm assembly language compatibility updates required to gdb
test suite and create a patch.
* Get an intro to gdb patch submission process for a possible fix to gdb
test suite for arm assembly compatibility.
* Start looking into gdb.mi test suite failures on arm.
* Fill up the arm native vs arm remote comparison sheet.
* Figure out a way to use hackbox for gdb testing on arm.
== Progress ==
Very short week, was doing some AMD internal tasks and attend local meetings.
* gprof support work for Aarch64.
Not much progress this week.
Working on GCC side to support gprof for Aarch64.
== Plan ==
* Continue gprof support work for Aarch64
== Summary ==
- http://cards.linaro.org/browse/TCWG-13
- performance regression is due to alignment of function.
- there is an increase in runtime of core_state_transition even
though there is no difference in the code generated with the patch
- Adding nops seems to improve the locality and performance; it gets
better than without the patch for THUMB2.
- Get spec2000 results for http://cards.linaro.org/browse/TCWG-14 to
decide on the next step
- Couldn’t get SPEC2000 results with CBUILD
- set-up spec benchmarks in chromebook and now running locally.
-
https://blueprints.launchpad.net/gcc-linaro/+spec/better-end-of-loop-counte…
- Initial investigation shows that the code generated is same as
expected.
== Plan ==
- http://cards.linaro.org/browse/TCWG-13 - follow it up
- Get spec2000 results for http://cards.linaro.org/browse/TCWG-14 to
decide on the next step
- Look for improvement in VRP for zero/sign extension
== Progress ==
* Running around JM/lencode bug
- caused by a codegen opt (ICMP fold) that had repercussions only on A9
and A15 code generation
- spent three days trying to reduce the case when the problem fixed itself
miraculously >:(
* Planning for the future
- Agreeing on short-term plans for Q2
* Buildbot
- Working on self-hosting bot
- Moved local buildmaster to hackbox
* Investigating LLVMLinux
- Building Android kernel with LLVM
- Investigating breakage in Debug mode
== Plans ==
* Continue self-hosting bot
* Try running a CBuild benchmark with LLVM
* Start putting up together the infrastructure for release 3.3
* Try to extract useful information from perf database
Progress:
* qemu maintenance
** sent arm-devs and target-arm pullreqs now we're in softfreeze
* VIRT-4
** received Arndale board, confirmed it works (took several
hours mostly due to bonkers power switch design)
** VIRT-49
*** making progress; updated card with a list of sub-subtasks
Plans:
* keep pushing on with VIRT-49
* finish config of arndale board, test running KVM on it
* book travel/hotel for Connect Dublin
* office move Fri 26/Mon 29
-- PMM
All,
http://cbuild.validation.linaro.org/helpers/recent was reporting an Internal
Server Error earlier today, and after looking at the logs the resultant
cause was because the gcc-4.8+svn198079 Lava job
(https://validation.linaro.org/lava-server/scheduler/job/52224) decided that
it was an a9 (as opposed to a9hf) job and that it didn't no which version of
Ubuntu it was running on.
The caused the logs to be put in
http://cbuild.validation.linaro.org/build/gcc-4.8+svn198079/logs/armv7l--cb…
The tcwg-web app then fell over because it couldn't pass the
armv7l--cbuild-panda-es06-cortexa9r1 name.
I fixed the issue by manually renaming the build log directory to:
http://cbuild.validation.linaro.org/build/gcc-4.8+svn198079/logs/armv7l-pre…
And once the cron job which scans the builds had run everything now works.
Actions:
1. Paul - do you mind taking a look at the build and seeing what went wrong
- my initial cursory glance makes me believe its the board having heat
issues causing random things to happen.
2. Paul & Matt - Looking at the code (and from something else Michael said
to me last week) I think having hostnames with '-' characters in them will
confuse the cbuild interface. I propose changing cbuild to do a s/-/_/g on
all the hostname it reads as a workaround. I don't plan on changing actual
hostnames of boards. Paul is this going to cause a problem for you in Lava?
Thanks,
Matt
--
Matthew Gretton-Dann
Toolchain Working Group, Linaro
Hi,
Some time ago I had some problems linking my project libraries for
Android using the Linaro toolchain 4.7.1 which I reported to the
list:
http://lists.linaro.org/pipermail/linaro-toolchain/2012-June/002631.html
I ended up using the 4.6.x version of the compiler because
I could not find a fix and I did not get any hints from
the mailing list.
Now I need to really switch to 4.7(for better C++11 support)
but I'm pretty much having the same issue with the 4.7.3 version:
E.g.
System/Logging/DroidLogger.cpp.o: requires unsupported dynamic reloc
R_ARM_REL32; recompile with -fPIC
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error:
/home/marius/Development/ToolChains/Android/experimental_ndk/sources/cxx-stl/gnu-libstdc++/4.7.3/libs/armeabi-v7a/libsupc++.a(eh_globals.o):
requires unsupported dynamic reloc R_ARM_REL32; recompile with -fPIC
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error: hidden symbol '__dso_handle' is not defined locally
/home/dev/android/android_linaro_toolchain_4.7/bin/../libexec/gcc/arm-linux-androideabi/4.7.3/real-ld:
error: hidden symbol '__dso_handle' is not defined locally
I'm using it with the Android NDK version r8e.
I have downloaded the prebuilt binaries:
android-toolchain 4.7 (ICS, JB) <http://www.linaro.org/downloads/> 4.7-2013.03
13.03
(Linaro GCC 4.7-2013.03) 4.7.3 20130226 (prerelease)
Does anyone have any hints on how to overcome the above mentioned problem?
--
Marius Cetateanu | Software Engineer
T +32 2 888 42 60
F +32 2 647 48 55
E mce(a)softkinetic.com
YT www.youtube.com/softkinetic
SK Logo <www.softkinetic.com>
Boulevard de la Plaine 15, 1050, B-Brussels, Belgium
Registration No: RPM/RPR Brussels 0811 784 189
Our e-mail communication disclaimers & liability are available at:
www.softkinetic.com/disclaimer.aspx
Hi Matt,
This week I found an error in LLVM that can only be reproduced on ARM
hardware, if the GCC that compiles it specifies --mcpu=cortex-a15. The
error is a segfault on one of the tests compiled by that Clang/LLVM. As you
can see, it's not something trivial that we'd expect people to do easily.
My question is: How do we tackle this type of bug?
One option is to do all the debugging and interface with the original patch
author until we fix the problem. This works well for simple bugs, but in
this case I'm not sure it will work.
Another option was to have a board on Linaro's DMZ with no access to
anything else internally, so that people could log in and debug the problem
in situ.
This board would have to be setup just for the debugging with a random
password given only to the author of the patch and cleaned up right after
the bug is fixed (to avoid external abuse).
We could use the same board for LLVM, GCC, GDB, etc. but it should be easy
to re-flash it to a minimum system, so that we don't spend too much time
setting it up.
Does anyone have a better idea?
cheers,
--renato
Hi,
Feel free to point me at a newer toolchain. Was building the SNU
OpenCL SDK native on my chromebook running ubuntu raring when I hit
the following:
make: Entering directory `/home/tgall/opencl/SNU/src/runtime/build/cpu'
arm-linux-gnueabihf-g++ -fsigned-char -march=armv7-a -mfloat-abi=hard
-mfpu=neon -ftree-vectorize -ftree-vectorizer-verbose=0 -fsigned-char
-fPIC -DDEF_INCLUDE_ARM -g -c -o smoothstep.o
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common/smoothstep.c
-I/home/tgall/opencl/SNU/inc
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/async
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/atomic
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/conversion
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/geometric
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/integer
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/math
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/reinterpreting
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/relational
-I/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/vector -O0 -g
In file included from
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/cl_cpu_ops.h:47:0,
from
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/common/smoothstep.c:34:
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/type/cl_ops_floatn.h:
In function 'float2 operator-(float, float2)':
/home/tgall/opencl/SNU/src/runtime/hal/device/cpu/type/cl_ops_floatn.h:114:1:
internal compiler error: output_operand: invalid operand for code 'P'
Please submit a full bug report,
with preprocessed source if appropriate.
See <file:///usr/share/doc/gcc-4.7/README.Bugs> for instructions.
Preprocessed source stored into /tmp/cciluYVq.out file, please attach
this to your bugreport.
Traceback (most recent call last):
File "/usr/share/apport/gcc_ice_hook", line 34, in <module>
pr.write(open(apport.fileutils.make_report_path(pr), 'w'))
File "/usr/lib/python2.7/dist-packages/problem_report.py", line 254, in write
self._assert_bin_mode(file)
File "/usr/lib/python2.7/dist-packages/problem_report.py", line 632,
in _assert_bin_mode
assert (type(file) == BytesIO or 'b' in file.mode), 'file stream
must be in binary mode'
AssertionError: file stream must be in binary mode
make: *** [smoothstep.o] Error 1
tgall@miranda:~/opencl/SNU$ arm-linux-gnueabihf-g++ --version
arm-linux-gnueabihf-g++ (Ubuntu/Linaro 4.7.2-23ubuntu2) 4.7.3
I've attached the preprocessed source as well.
FWIW, I don't hit this when building with -O3. In this case I was
compiling for debug.
Thanks!
--
Regards,
Tom
"Where's the kaboom!? There was supposed to be an earth-shattering
kaboom!" Marvin Martian
Tech Lead, Graphics Working Group | Linaro.org │ Open source software
for ARM SoCs
w) tom.gall att linaro.org
h) tom_gall att mac.com
== Progress ==
* Disable-peeling:
- some benchmarking jobs ran, thanks to the new boards in cbuild.
- Spawned other jobs for reference
* Libsanitizer:
- Built native GCC on snowball to understand the isatty() behaviour
compared to qemu.
* Neon intrinsics codegen:
- resumed looking at the vuzp crc example from Steve Capper.
* Neon intrinsics codegen:
- added fp16 support (works with RVCT, GCC does not support it yet)
* Internal support
== Next ==
* Disable-peeling: analyze results when available.
* Revert-coalesce-vars: idem.
* Libsanitizer: analyze isatty() on board
* Neon intrinsics: continue with vuzp example.
One day off this week.
== Issues ==
* None
== Progress ==
* Linaro GCC 4.8, 4.7 and 4. 2013.04 released (with CL and MG)
* Boehm-gc AArch64 support backport in GCC:
- support committed.
* Libunwind AArch64 support:
- Resumed ongoing work.
== Plan ==
* Libunwind AArch64 support:
- Fix and submit upstream
== Progress ==
* Started investigating dwarf test suite failures on ARM.
* Created a new comparison between arm native gdb and arm remote gdb.
* More investigation of test cases to figure out causes of test cases that
are not run or unsupported.
* Experimentation with screens on gateway to speed up remote debugging,
didnt work.
* 1:1 with Matt.
* Took a day off on Friday 12th April 2013 for car checkup in workshop.
* Received Invitation letter from Arwen on Friday which means now visa
application only needs hotel booking information.
*** Still No blue-print available to log work in JIRA.
== Plan ==
* Setup arm gdb to debug itself and debug dwarf problems on arm.
* Fill up the arm native vs arm remote comparison sheet.
* Submit Ireland visa application after receiving invitation letter and
hotel booking details.
* Setup screens for remote testing using toolchain cbuild infrastructure.
== Progress ==
* gc sections tests
Completed upstream of g-c section patches after updating review comments.
Closed the card associated with the work.
http://cards.linaro.org/browse/TCWG-27
* gprof support work for Aarch64
Read gprof internal documents from sourceware.org.
Working on GCC side to support gprof for Aarch64.
Misc
------
11-4-2013 was a local holiday.
== Plan ==
* Continue gprof support work for Aarch64
* Attend internal team meetings on 16 and 17th.
== Summary ==
- http://cards.linaro.org/browse/TCWG-14
Coremark ARM mode gives about 2% performance improvement with about 1%
code size reduction. Thumb2 mode however has performance regression even
though code size reduces about 0.6%. Performance regression here is like
what we are seeing in EPILOGUE_UESES
changes(http://cards.linaro.org/browse/TCWG-13). Spawned spec in CBUILD
to see the impact with spec2000.
- http://cards.linaro.org/browse/TCWG-13
Thumb2 mode performance regression is due to the percentage of time
spent in core_state_transition. Looks like an alignment issue; same asm
is generated for this function with the patch. Investigating it.
== Plan ==
- Plan to resolve http://cards.linaro.org/browse/TCWG-13 this week.
- Get spec2000 results for http://cards.linaro.org/browse/TCWG-14 to
decide on the next step
== Progress ==
* Setting up Chromebook with Ubuntu 13.04.
* Developing patch to integrate new memcpy into glibc with IFUNC.
* Debugging and submitting a patch for linker issue with IFUNC.
== Issues ==
* None.
== Plan ==
* Get newlib mempcy patch accepted.
* Follow up memcpy in bionic.
* Submit memcpy IFUNC patch to glibc list.
* Get binutils tests into cbuild.
--
Will Newton
Toolchain Working Group, Linaro
Progress:
* qemu maintenance
** rebased qemu-linaro again
** preparing for upstream softfreeze on 15th
** review virtio patches and anything else that needs
attention pre-freeze
** scan of buglist; provided analysis of problem for LP:1090038,
closed a few stale bugs
** fixed a bug in an edgecase in fused multiply-accumulate emulation
* VIRT-4 [Guest migration support for KVM]
** VIRT-51
*** patches committed upstream, work item complete
** VIRT-73
*** updated Juan's patches to use VMState for ARM CPU migration,
fixed a few bugs noted along the way, submitted upstream
[work item now just pending review & commit]
Plans:
* qemu maintenance
* VIRT-4
** VIRT-49
-- PMM