- linaro-toolchain - lists.linaro.org

by Will Newton

== Progress == * 4 day week (Friday off) * Improve malloc benchmarking further. * Writing and reading malloc code == Issues == * None. == Plan == * Possible eglibc 2.18 release * Possible gdb release * More malloc -- Will Newton Toolchain Working Group, Linaro

13 years, 2 months

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[ACTIVITY] 22-26 July2013

by Venkataramanan Kumar

== Progress == * Libssp support for AArch64 TCWG 23 Discussed with Matt and decided to assume "glibc" will export canary guard variable in TCB, for aarch64. It will export it as global variable for 32 bit. Working on top of Christophe patch that make frame grows downward. * Look at builtin return address behavior in the absence of frame pointer. For X86_64 usage if __builtin_return_address(n) n>0 and -fomit-frame-pointer results in undefined behavior. In Ubuntu 12.04 the native GCC 4.7.1 resulted in segmentation fault on x86_64 machine for such a test. Currently planning to close this as undefined behavior in aarch64 as well. Discussing with Marcus on this. * TCWG-20 gprof support patches. Re based with latest trunk and regression tested. http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01352.html http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01333.html Misc * Tuesday spent on Internal (AMD) work. == Plan == * Continue Libssp support for AArch64 TCWG-23 * Update review comments and upstream gprof patches ==issues== * LTO/PGO work stopped now since libssp support priority is more.

13 years, 2 months

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[ACTIVITY] 22 - 26 July 2013

by Omair Javaid

== Progress == * Completed initial investigation on catch syscall support on arm TCWG-182. * Looked into dwarf assembler to generated architecture independent debug information for dwarf2 test cases. * Resolved some gdb.mi configuration issues due to which some test cases were failing. * Review status of GDB testing on arm and filled up JIRA with proposed future work. == Plan == * Continue work on gdb catch syscall support for arm TCWG-182. * Background task: Understanding dwarf assembler to generate dwarf2 debug information for architecture test cases. * File UK visa for meetings in September after receiving invitations.

13 years, 2 months

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[ACTIVITY] June 22-28

by Rob Savoye

== Progress == * Produced spec2000 benchmark data on panda for fsf-4.7, fsf-4.8, gcc-linaro-4.7, and gcc-linaro-4.8. * Helped Charlie get stared with building the toolchain. * Found "experimental" option that got crosstool-ng actually working. * Got cbuildv2 now doing much of the process crosstool-ng does for a complete stage1 build. * Improved native and cross toolchain builds via cbuildv2. == Plans == * Continue working on cbuildv2 till it's usable by others. * Looks like I have a pile of new wiki pages to write.

13 years, 2 months

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[ACTIVITY] Week 30

by Zhenqiang Chen

== Issues == * None == Progress == * Prepare Linaro toolchain binary 2013.07 release. * Follow-up patches for pr57637. * Test conditional compare changes based on trunk. == Plan == * Release Linaro toolchain binary 2013.07. * Send out the conditional compare changes for Linaro internal review.

13 years, 2 months

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[ACTIVITY] Week 30

by Charles Baylis

== Progress == * Induction and set up work environment * Started investigating how to build gcc cross compilers, so that it can be documented clearly [TCWG-190 <http://cards.linaro.org/browse/TCWG-190>] * I can build a working arm-none-linux-gnueabi crosscompiler, and understand each of the steps involved * Using the same method, aarch64-none-linux-gnu does not build == Issues == * None == Plan == * Write up knowledge gained so far * Find out why aarch64 doesn't work * Find out more about other build variations (multilib/multiarch etc) and how that affects what I've done so far

13 years, 2 months

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[ACTIVITY] Week 30

by Will Newton

== Progress == * Backported aarch64 string functions and ARM gcc 4.8 fix in eglibc. * Released eglibc 2.17 2013.07-2. * Forward ported binutils AArch64 IFUNC patches to HEAD so Marcus can test them. * Closed stack guard JIRA card and made a new one for pointer guard. * More malloc benchmarking, reading etc. * Started work on malloc code. * Booked flights for LCU13! == Issues == * None. == Plan == * Deal with any test feedback on IFUNC patches. * malloc -- Will Newton Toolchain Working Group, Linaro

13 years, 2 months

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[ACTIVITY] Week 30

by Renato Golin

== Progress == * Looking at 64-bit divmod on two fronts: - Clean, but intrusive on target-independent code - Dirty and duplicated, but restricted to target-specific code * Long discussion about the purpose of the IR on the LLVMLinux list * Watching some GNU Caldron videos == Plan == * Continue looking at divmod for 64-bit values * Start investigating cross-compilation issues * When Rob is ready, have a look at CBuild2 for LLVM+Benchmarks

13 years, 2 months

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[ACTIVITY] report week 30

by Peter Maydell

Progress: * started on getting v7 mach-virt into shape for upstreaming: doesn't currently work on TCG due to missing architected timers emulation * sent fixes for some minor bugs in virtio-mmio noticed by reviewers * support for various people for "I tried to boot linux in QEMU/KVM and nothing happens" issues. This is usually because of a misconfigured kernel which is either not sending serial output to the right place or stopped with an error before the point where serial is set up. However it's pretty awkward for users to debug especially compared with x86 which doesn't generally have these issues because all x86 hardware is sufficiently the same that console and/or earlyprintk just about always works. * started the conversation on kvmarm about what the CPU in a KVM VM ought to look like (always same as host? always an A57? always some "generic VM CPU"? do we care (does the OS care?) that it has a GICv2 when the same CPU in h/w has a v3) * came up with a clever hack for making QEMU QOM object struct fields be only accessible to the object's implementation and not its users, using gcc's "deprecated" attribute and some CPP macros. -- PMM

13 years, 2 months

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[ANNOUNCE] Linaro eglibc 2.17 2013.07-2 released.

by Will Newton

### About Linaro eglibc Linaro eglibc is a release of the eglibc C library with bug fixes and enhancements for ARM platforms. eglibc is a variant of the GNU libc designed to work well on embedded systems. ### Linaro eglibc 2.17 2013.07-2 The Linaro Toolchain Working Group is pleased to announce the 2013.07-2 release of Linaro eglibc 2.17, the second release in the 2.17 series. This release is based on the latest upstream eglibc 2.17 stable branch, but with additional features and bug fixes. #### Additional Features * Faster ARM memcpy implementation for hardware with NEON or VFP support. * Optimized string functions for AArch64: memcmp, memset, memcpy, memmove, bzero, strcmp, strlen, strnlen, strncmp. #### Bug Fixes * None ### Source #### Release Tarball * https://releases.linaro.org/13.07/components/toolchain/eglibc-linaro #### Development Tree * git://git.linaro.org/toolchain/eglibc.git This release was built from the `linaro_eglibc-2_17-2013_07-2_release` tag. ### Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. * Linaro Toolchain Development [mailing list](http://lists.linaro.org/mailman/listinfo/linaro-toolchain) * Linaro Toolchain IRC channel on irc.freenode.net at `#linaro-tcwg` * Questions? [ask Linaro](http://ask.linaro.org/). * Interested in commercial support? inquire at [Linaro support](mailto:support@linaro.org) -- Will Newton Toolchain Working Group, Linaro

13 years, 2 months

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armv5t?

by narkewoody＠gmail.com

Hi, I am new to the linaro toolchain and have two questions don't find an explicit answer. Help you experts can help. 1. Can I use linaro arm toolchain to build application for armv5t core? My box is a arm926ejs. 2. Does anyone has experience in making linaro current version work with buildroot? I tried, but got a lot of strange error. (maybe it is the same problem as question 1, since I set my cpu as arm925t in buildroot). Thanks in advance. -- I can't go back to yesterday - because I was a different person then

13 years, 2 months

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[ANNOUNCE] Linaro GCC 4.8 2013.07-1 released.

by Yvan Roux

The Linaro Toolchain Working Group announce the 2013.07-1 Linaro GCC 4.8 release. This is a respin of the 2013.07 release because of an issue with internal memcpy and -mno-unaligned-access. The source tarball is available from: https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07-1 Please find the original 2013.07 announcement below. The Linaro Toolchain Working Group is pleased to announce the release of both Linaro GCC 4.8 and Linaro GCC 4.7. Linaro GCC 4.8 2013.07 is the fourth release in the 4.8 series. Based off the latest GCC 4.8.0+svn200355 release, it includes performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.8.1+svn200355 * Address Sanitizer support for ARM. * New -mrestrict-it option support. * Backport of support for further AArch64 instructions. * Backport of support for further ARMv8 AArch32 instructions. * Reverted recent changes to shrink-wrapping and tail-calls. Linaro GCC 4.7-2013.07 is the sixteenth release in the 4.7 series. Based off the latest GCC 4.7.3+svn200408 release, this is the third release after entering maintenance. Interesting changes include: * Updates to GCC 4.7.3+svn200408 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.07 https://launchpad.net/gcc-linaro/+milestone/4.8-2013.07 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? http://ask.linaro.org/ Interested in commercial support? inquire at support(a)linaro.org

13 years, 2 months

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[ACTIVITY] 15-19 July2013

by Venkataramanan Kumar

== Progress == Was on vacation most of the week Mon - Wed leave (Thursday half day). * Libssp support for AArch64 TCWG 23 Restarted the work. Looked at how X86 GCC generated code. Looking at per thread support for libssp and compiler support. == Plan == * Continue Libssp support for AArch64 TCWG-23 * Look at builtin return address behaviour in the absence of frame pointer. ==issues== * LTO/PGO work stopped now since libssp support priority is more.

13 years, 2 months

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[ACTIVITY] Weeks 28-29

by Yvan Roux

== Issues == * None. == Progress == * Attended linaro Connect (Wk 28) * OE Launchpad bug #1200620 : [ICE while building Exynos5 kernel with current 4.8 branch] - Issue due to a bad usage of unaligned load/store in HI mode - Fix approved and committed upstream - Release respin ongoing. * Launchpad bug #1186218 : [kernel doesn't boot on Arndale/Nexus with Linaro GCC 4.8] - Discussed the issue at Connect - Waiting for a reduce testcase from the kernel team. * LRA on AArch64: - Some regressions in the testsuite - Debugging ongoing. * LRA on AArch32: - Still some issues with libgcc build in Thumb - Back on this issue. * 2013-08 4.8 release: - Backports from trunk ongoing. == Plan == * 4.8 Backports * Summer break

13 years, 2 months

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[ACTIVITY] 15 - 19 July 2013

by Omair Javaid

== Progress == * Debugged gdb.mi and linux-nat code to investigate issues on arm. * Cleared pending gdb patches. * Listened to Connect sessions and key notes on youtube * Follow up on travel hick ups and UK/US visa application == Plan == * Review GDB current status and fill up JIRA with proposed future work * Windup work on gdb test suite updates and submit remaining patches. * Follow up on gdb patches * Clear/Update JIRA cards * File UK visa for meetings in September.

13 years, 2 months

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[Activity] July 6-July 18

by Rob Savoye

== Progress == * Attended Connect, did presentation and other stuff. * Left Connect early to attend the Gnu Tool Cauldron. Ran BOF on testing the toolchain, attended many talks including the one on Graphite. * Worked on modularizing cbuildv2 package parsing into functions so bzr,svn,git URLs and tarball snapshots from toolchain64 work the same. * Added LLVM support to cbuildv2, Clang and the testsuites only work if built separately for now. * Reproduced build problem Viswanath was having with crosstool, Zhenqiang knew the missing package(s) that kept C++ builds from working. * Built fsf 4.7 and 4.8 as well as Linaro GCC releases for July on Panda board. * Got spec200 benchmarks working on panda, ran them for the above branches and releases. == Plans == * Help Charlie come up to speed on building GCC. * Run more benchmarks on the above branches and do graphs on performance. * See why for me on a panda, all the tests fail with make check. * Find time to work on cbuild2 so Charlie can beta test it sometime soon. - rob -

13 years, 2 months

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[ACTIVITY] Week 29

by Zhenqiang Chen

== Issues == * None == Progress == * Enable multi-arch for Linaro aarch64-linux-gnu build. - Configure gcc with --enable-multiarch. - Backport eglibc patches for rtlddir. - Configure eglibc to set libdir, slibdir and rtlddir. * Follow up the patch for pr57637. * Reassociate X == CST1 || X == CST2 if popcount (CST2 - CST1) == 1 into ((X - CST1) & ~(CST2 - CST1)) == 0. - Test is ongoing. * Rebase conditional compare changes to trunk. == Leave == * July 17. == Plan == * Send out the conditional compare changes for Linaro internal review.

13 years, 2 months

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[ACTIVITY] Week 29

by Renato Golin

== Progress == Short week (3 days) * Divmod - Finished most of the work, patch upstream (r186390) - Trying to lower remainder as divmod without sacrificing the div+mod merge during legalization * Buildbots - One panda fails even at 920MHz, replaced with a new one - Using decent power supplies now, should work a whole week - Lab config is messed up, need to start from scratch - Failed at 920MHz with decent power supply - Giving up on Pandas as buildbots... * Background - Not many code reviews last two weeks, as Connect and the Pandas took most of my spare time - Test-suite's Lencod bug fixed upstream, no more need of dirty hacks on stack offset calculation == Plan == * Continue on divmod lowering, finding a way to merge Custom with Expand lowering, so not to break the div+rem merge during legalization, but still lower divmod as Custom. 64-bit types still use them. * Study cross-compilation issues in Clang and LLVM, prepare a document on how it works (or not), and what paths we can take to make it better in the short/medium term. * Follow up on Phoronix results and CBuild2 benchmarks, time allowing

13 years, 2 months

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[ACTIVITY] Week 29

by Will Newton

== Progress == * Investigating glibc stack guard support * Developed initial patches * Raised ABI issue * More malloc work * Integrated tcmalloc into benchmark framework * Improved benchmark repeatability * Added Python benchmark script and graphing script * Respin and commit gdb TLS testsuite patch (my gdb patch queue now empty) * Committed two of Omair's gdb patches == Issues == * None. == Plan == * Produce some malloc benchmark graphs * Progress the stack guard work * Start writing some malloc code -- Will Newton Toolchain Working Group, Linaro

13 years, 2 months

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[ACTIVITY] report week 28, 29

by Peter Maydell

Progress: * attended Linaro Connect (wk 28) * sent pull requests for target-arm/arm-devs queues * resent virtio-mmio patchset; this is now ready for commit and I will send a pullreq with it in next week * finished off a cleanup of linux-user to remove the support for configuring targets without threading support * resorted todo list against cards * started on getting v7 mach-virt into shape for upstreaming -- PMM

13 years, 2 months

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Support for ARMV5te

by Ratheendran R

Hi All, I am new to linaro. so would like to know more about linaro. Is linero alternative to yocto project. does the tool chain support armv5te based SOC. Ratheendran

13 years, 2 months

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Overheating Pandas

by Renato Golin

Hi Folks, I'm running two buildbots here at home and am getting consistent failures from the Pandas because of overheating. I've set up a monitor that will tell me the current CPU temperature and the allowed maximum, and when the bot passes 90%, it shuts itself off. The problem is that I'm running with heat-sinks and the boards are on top of three fans, so there really isn't much more I can do to solve this problem. I personally think this is a hardware problem, since everything is in the same die, CPU, GPU and RAM, and the physical dimensions of the chip are quite small. I remember when Intel started overheating (around 486DX66) and the die was huge (more head dissipation), plus RAM and GPU were separate, and it still needed a hefty heat-sink. It's true that gates are far smaller today, but it's not true that a dual core 1.3GHz + GPU + RAM will produce less heat on a small die than a 66KHz CPU on a huge die, so why anyone think it's a good idea to release a 1+GHz chip without *any* form of heat dissipation is beyond my comprehension. Manufacturers only got away with it, so far, because people rarely use 100% of the CPU power for extended periods of time, because ARM devices end up as set-top boxes, mobile phones and tablets. However, even those devices will heat up when playing 2 h films or games, and they do have some form of heat sink. We, at the toolchain group, make things worse by using 100% CPU, 24 / 7, something that Panda boards, or Arndales were not designed to do. However, with ARM moving into the server space, their designs will have to be re-thought, and what a better place than Linaro for making sure we get it right? For the time being, I believe we *must* have air conditioning in the Lab all the time, and we *must* have heat-sinks on every board, and we *must* monitor the CPU temperature of the boards, at least until we're comfortable that they're not failing all the time. Can we make a temperature monitor (like the one attached) a default feature on Linaro Ubuntu distributions? We could dump that info to the syslog/dmesg whenever it crosses the (say) 75% threshold, and report more often when it crosses the 95%, possibly dumping the processe(s) that are consuming more CPU at the time, to enable post-mortem debugging. cheers, --renato As a side note, the quad-A9 ODroid does ship with a massive heat-sink, which also serves as a fancy case. Quite clever, really.

13 years, 2 months

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[SPAM] $99 A9 desktop

by Renato Golin

http://arstechnica.com/information-technology/2013/07/99-arm-based-pc-runs-… + Quad-core-A9 @ 1.2GHz + 4GB RAM + 512GB SDD + 2 x GBit Ethernet + <8W total power http://utilite-computer.com/web/utilite-specifications The complete system will be a lot more than $99, but still, I don't think it'll be more than $500. Maybe, this will be more stable than Panda boards for toolchain testing? cheers, --renato

13 years, 2 months

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How to make gcc generate optimized code for statically linked TLS

by Vitali Sokhin

Hello, I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with thread-local variables. Here is an example of my C code: __thread u32 threadedVar; void test(void) { threadedVar = 0xDEAD; } gcc produces the following assembly to access my threaded variable: threadedVar = 0xDEAD; 72b0: d00000c0 adrp x0, 21000 72b4: f945ac00 ldr x0, [x0,#2904] 72b8: d503201f nop 72bc: d503201f nop 72c0: d53bd041 mrs x1, tpidr_el0 72c4: 529bd5a2 movz w2, #0xdead 72c8: b8206822 str w2, [x1,x0] This assembly fits dynamically linked code, but in my case I have statically linked application that does not load any additional modules. Since I have exactly one TLS block containing all thread-local variable gcc should be able to calculate the offset at link time. Can I make gcc to produce the following assembly ? threadedVar = 0xDEAD; 72c0: d53bd041 mrs x1, tpidr_el0 72c4: 529bd5a2 movz w2, #0xdead 72c8: b8206822 str w2, [x1,#offset_to_threadedVar] Thank you, Vitali

13 years, 2 months

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How to make gcc generate optimized code for statically linked TLS

by Vitali Sokhin

Hello, I use gcc-linaro-aarch64-linux-gnu-4.8 to compile my C code with thread-local variables. Here is an example of my C code: __thread u32 threadedVar; void test(void) { threadedVar = 0xDEAD; } gcc produces the following assembly to access my threaded variable: threadedVar = 0xDEAD; 72b0: d00000c0 adrp x0, 21000 72b4: f945ac00 ldr x0, [x0,#2904] 72b8: d503201f nop 72bc: d503201f nop 72c0: d53bd041 mrs x1, tpidr_el0 72c4: 529bd5a2 movz w2, #0xdead 72c8: b8206822 str w2, [x1,x0] This assembly fits dynamically linked code, but in my case I have statically linked application that does not load any additional modules. Since I have exactly one TLS block containing all thread-local variable gcc should be able to calculate the offset at link time. Can I make gcc to produce the following assembly ? threadedVar = 0xDEAD; 72c0: d53bd041 mrs x1, tpidr_el0 72c4: 529bd5a2 movz w2, #0xdead 72c8: b8206822 str w2, [x1,#offset_to_threadedVar] Thank you, Vitali

13 years, 2 months

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