I've added a Cortex-A8 benchmark machine to my home office. The
machine is called 'nova1' and is part of the cbuild a8-ref queue.
Feel free to give it jobs:
http://ex.seabright.co.nz/helpers/scheduler/spawn
-- Michael
Hi,
GDB on Android exploration:
* Familiarizing myself with the Android SDK and NDK, and the Android
runtime environment.
* Set up a Linaro Android Versatile Express image running on Linaro
qemu. Updated the wiki page [1] with instructions on how to prepare
its initrd to make it palatable to qemu.
* Trying to figure out if there's a way to get the SDK and NDK to talk
to that image.
* Studied AOSP's patches to gdbserver, and also Mozilla's patches to
AOSP's GDB and gdbserver.
--
[]'s
Thiago Jung Bauermann
Linaro Toolchain Working Group
[1] https://wiki.linaro.org/PeterMaydell/QemuVersatileExpress
I've changed the bounce host used to gain access to the boards at my
home office. The ports and configuration are the same but you will
get a scary error due to the SSH host key changing.
Let me know if there are any problems,
-- Michael
* Linaro GCC
Discovered that part of my conditional execution problems were caused by
some over-zealous peephole optimizations adding CC register clobbers to
arithmetic operations in order to take advantage of the 16-bit encoding.
This is a problem because they can't be converted to conditional
execution so freely because overwriting the CC register prevents any
further conditional execution (and forces a 32-bit encoding
unnecessarily). I wrote a patch to help ifcvt unpick all this and DTRT,
and posted it upstream. It turns out that Benrd (I think) already
reimplemented the peephole optimization in the reorg pass, so all that
is really needed is to delete the now obsolete peepholes. Richard E has
approved the revised patch. Unfortunately I've now discovered that that
exposed a bug in the machine description, so that'll have to be fixed also.
Tried to update the gcc-linaro/4.7 branch, but found the build broken.
In fact, Matthias had already reported it to Bugzilla. I did a binary
search, identified the problem commit, posted the info to bugzilla, and
pushed a merge request for the last working commit for testing. This
tested ok, so I've merged it to the Linaro 4.7 trunk.
Brought the Linaro GCC patch tracker up to date to aid identification of
patches we will need to forward port to 4.7. The remaining 'red' patches
are either not committed upstream, or I wasn't sure.
Attempted to benchmark the 64-bit shift improvements, but the target
board (ursa1) has developed an I/O error.
* Other
Joe Seymour and I went to HP Bristol to attend one of their science
lectures. Professor Jim Al-Khalili gave a talk about the recent
"faster-than-light" neutrinos experiments, and explained why it can't
possibly be true.
http://www.jimal-khalili.com/blog/faster-than-the-speed-of-light.html
Summary:
* crosstool-ng patches for linaro 2012.02 binary toolchain release
Details:
1. Revise the gdb lsb build patches based on gdb-7.4.
2. Clean up old patches and only keep the latest version, since we
only keep the latest version in config for linaro.
3. Window installer patch.
* Scripts to use installjammer to create the win32 install package.
* Apply linaro logo to the install package.
* Sync up the install directory and Start-menu layout with
embedded toolchain.
* Test the package on win7.
Plans:
* Finalize 2012.02 binary toolchain release.
Best regards!
-Zhenqiang
Hi,
libunwind
* discussions about local unwinding on Android
* problem: dl_iterate_phdr isn't available
* idea: parse proc/<pid>/maps but to find the ELF file for a given IP
and get to the ARM specific unwind info from there
* assisted an Android game developer who is using clang to compile
the native parts of the app, the ndk to link it and wondered why
the debuggerd doesn't catch any crashes
OpenEmbedded
* mainly worked on the linaro meta layer
* got the external binary toolchain recipe working
* added the Linaro 3.1 Kernel to the layer
* updated documentation:
https://wiki.linaro.org/KenWerner/Sandbox/OpenEmbedded-Core
Regards,
Ken
RAG:
Red:
Amber:
Green:
Current Milestones:
|| || Planned || Estimate || Actual ||
||cp15-rework || 2012-01-06 || 2012-02-20 || ||
(for blueprint definitions: https://wiki.linaro.org/PeterMaydell/QemuKVM)
Historical Milestones:
||a15-usermode-support || 2011-11-10 || 2011-11-10 || 2011-10-27 ||
||upstream-omap3-cleanup || 2011-11-10 || 2011-12-15 || 2011-12-12 ||
||initial-a15-system-model || 2012-01-27 || 2012-01-27 || 2012-01-17 ||
||qemu-kvm-getting-started || 2012-03-04?|| 2012-03-04?|| 2012-02-01 ||
== other ==
* post-Connect miscellany:
* got boot-wrapper into an official location in linaro git repo
* Exynos4 patchset finally made it through a review and is upstream
* vexpress-a15 model also now upstream
* put together arm-devs pullreq and got it committed
* LP:932856 : fix broken omap3 bootrom emulation of raw boot mode
* LP:931940 : fix failure to raise interrupts in PL031 realtime
clock model
* reviewed some qemu gdbstub patches that should fix a problem
with semihosting-via-gdb
* rebased qemu-linaro: another nasty one after upstream QOM
patches landing
* spent some time finishing up cleanup of the omap_i2c patches
in qemu-linaro (a job started and left unfinished a few months back)
== GCC ==
* Verified status of patches in Linaro 4.6 that might not yet
be in mainline / Linaro 4.7. Ported two of Ira's vectorizer
patches and created merge request.
* Successfully tested and benchmarked 4.7 version of Richard's
sched-pressure patch, with similar results as seen on 4.6.
Rebased branch due to conflicts with recent mainline merge;
will commit after retesting.
* Investigated LP #923397 (Broken alignment attribute). Now
fixed in FSF mainline and 4.6 branch, will get merged into
Linaro GCC 4.6 automatically for next release.
* Ongoing work on a patch to allow memory operands with vec_set
and vec_extract to avoid excessive vmov generation in the
PR 51819 test case.
* Started working on a patch to generate usat/ssat instructions
where appropriate.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi Andrew,
thanks for bringing the 4.6 patch tracker up to date. I've had a look over
everything that's marked red to see what we need to do to bring Linaro 4.7
up to date:
106869 Add -fsched-pressure-algorithm=model and enable it by default on
ARM.
My recent commit of Richard's patch. I've tested a forward-port to the
Linaro 4.7 branch already, but had to rebase it due to merge conflicts
with the recent upstream merge, so I'll commit after retesting:
lp:~uweigand/gcc-linaro/sched-pressure-v2-4.7
106846 Handle non-constants in mixed size condition
106844 Support pattern detection for basic blocks.
Two of Ira's patches that have not yet landed upstream due to stage 3.
I've created a forward-port branch and will merge into Linaro 4.7:
lp:~uweigand/gcc-linaro/vect-patches-4.7
106789 Fix rs6000 vector expansion.
106768 Merge fix for lp721513.
These are actually already upstream (modulo minor cosmetic changes)
and present in Linaro 4.7.
All in all, once the two branches mentioned above are merged,
Linaro 4.7 will have everything that's today in Linaro 4.6.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzende des Aufsichtsrats: Martina Koederitz | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi!
* Finished gcc-4.7 benchmarking:
https://wiki.linaro.org/Internal/ToolChain/Benchmarks/gcc-4.7_benchmarking
Results uploaded to
lp:~linaro-toolchain-wg/linaro-toolchain-benchmarks/private-runs
* Development benchmarks:
Continued the work started at connect.
Got stuck for a while with a problem with the launchpad staging area. I
could no longer log in. Seems the staging area is reset at weekends. The
user credentials has to be given again, but you first have to remove them
manually from the GNOME keyring (or whatever place they are stored).
* Bug triaging:
Triaged these bugs: https://launchpad.net/bugs/926855,
https://launchpad.net/bugs/925991, https://launchpad.net/bugs/924726.
Regards
Åsa
Hi there. I've cancelled the Monday and stand up calls for this week.
Andrew, could you run the standup call on Thursday please? The
moderator details are at:
https://wiki.linaro.org/Internal/ToolChain
-- Michael
* Linaro GCC
Continued work on 64-bit shifts. My patch for shifts in core registers
was rejected because I used conditional-execution before it's safe,
apparently, so I've spent some time looking at the alternatives.
First, conditional move instructions were unsatisfactory - the final
instruction sequence was longer and therefore less efficient.
Second, if_then_else instructions (basically conditional execution
expressed a different way) was to limited - there were no patterns
compatible with "or with shifted input" available in ARM mode, and no
patterns available at all in Thumb mode. I solved that easily enough, of
course, but the result was still unsatisfactory. In Thumb mode the
result was roughly equivalent (conditional-execution is constrained by
IT blocks), but in ARM mode it uses patterns that output two opposing
instructions at once, without allowing for the possibility of scheduling
or other optimization.
Third, I've tried putting in ordinary branches and relying on the
if-conversion pass to transform that to conditional execution. I had not
done this initially, partially because I didn't know how, but mostly
because the original implementation I was trying to replace resulted in
branches in the output code, and I was trying to improve on that.
Anyway, I've now figured out how to do that, and initial testing
suggests that the if-conversion really is working this time. Even if it
doesn't always, the other improvements to the shift sequence should
still give a boost.
My other patch, to do 64-bits shifts in NEON (and fall back to the above
code when register allocation sees fit) has not yet been reviewed.
* Linaro Connect
This week was Linaro Connect week. I could not attend the event in San
Francisco in person this time, so I took part in some of the morning
sessions remotely.
Linaro have switched to using Google Hangouts for the remote
participation, and it went really rather well. In the old system there
was an audio stream to listen to (on a 20 second delay or so, usually),
and an IRC room projected onto a large screen for remote attendees to
respond. The new Hangout system is effectively a simple in-browser
video-conference system that allowed us to not only see the room, but
also respond verbally in real time. The only disadvantage is the
10-person limit, but I never saw any room get near that all week.
I successfully attended several sessions and one regular meeting
remotely by these means. And no jet lag or eating so much!
Hi,
Made the GDB 7.4-2012.02 release:
* Learned about cbuild and how to use its services.
* Prepared a GDB Linaro 7.4-2012.02~rc1 tarball and ran on cbuild.
* Compared test results on ARM and i686 with the ones from 7.3-2011.12.
Investigated new failures, determining that all come from new
testcases added since the last release. One seemed important but
when investigated it turned out to be a bug in the hand-written
debug info for the testcase, which is wrong on ARM. I opened
bug reports on Launchpad for the new failures which are worth being
investigated for future releases. There are no regressions
in 7.4-2012.02 compared to 7.3-2011.12.
* Executed the release process for Linaro GDB.
* Started exploring GDB on Android.
--
[]'s
Thiago Jung Bauermann
Linaro Toolchain Working Group
Hi,
OpenEmbedded-Core:
* tested the external-toolchain branch from C. Larson
* changes now upstream
* rebased my changes to the current oe-core trunk
* startet to setup a proper external layer at:
git://git.linaro.org/people/kwerner/meta-linaro.git
* got the minimal, sato and Qt image built again
(only two patches required on the oe-core tree)
Misc:
* remotely attended some Linaro Connect sessions
Regards,
Ken
The Linaro Toolchain Working Group is pleased to announce the release of
Linaro GDB 7.4 2012.02.
Linaro GDB 7.4 2012.02 is the first release in the 7.4 series. Based off
the latest GDB 7.4, it includes a number of ARM-focused bug fixes and
enhancements.
Interesting changes include:
* Update to GDB 7.4 code base.
* The "info proc" and "generate-core-file" commands will now also
work on remote targets connected to GDBserver on Linux.
The source tarball is available at:
https://launchpad.net/gdb-linaro/+milestone/7.4-2012.02
More information on Linaro GDB is available at:
https://launchpad.net/gdb-linaro
--
[]'s
Thiago Jung Bauermann
Linaro Toolchain Working Group
The Linaro Toolchain Working Group is pleased to announce the release of Linaro QEMU 2012-02.
Linaro QEMU 2012.02 is the latest monthly release of qemu-linaro. Based
off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes
and enhancements.
New in this month's release:
- A simplified A15 model (non-LPAE) which is sufficent to boot a
carefully-configured Linux kernel.
Known issues:
- Graphics do not work for OMAP3 based models (beagle, overo)
with 11.10 Linaro images.
The source tarball is available at:
https://launchpad.net/qemu-linaro/+milestone/2012.02
More information on Linaro QEMU is available at:
https://launchpad.net/qemu-linaro
The Linaro Toolchain Working Group is pleased to announce the 2012.02
release of Linaro GCC 4.6 and Linaro GCC 4.5.
Linaro GCC 4.6 2012.02 is the twelfth release in the 4.6 series. Based
off the latest GCC 4.6.2+svn183786, it contains a few bug
fixes and backports Cortex-A7 and Cortex-A15 support from FSF trunk.
Interesting changes include:
* Updates to 4.6.2+svn183786.
* Add initial Cortex-A7 support.
* Backport Cortex-A15 tuning improvements from upstream.
* Backport improvements to 64 bit unsigned comparisons.
Fixes:
* LP: #917967 Backport the fix for PR51799.
* LP: #836588 armel FTBFS with gcc 4.5 org 4.6 O2 and fPIC.
* LP: #879725 ICE in int_mode_for_mode, at stor-layout.c:490.
Linaro GCC 4.5 2012.02 is the eighteenth release in the 4.5 series. Based
off the latest GCC 4.5.3+svn183785, it is a maintenance only release.
Interesting changes include:
* Updates to 4.5.3+svn183785.
The source tarballs are available from:
https://launchpad.net/gcc-linaro/+milestone/4.6-2012.02https://launchpad.net/gcc-linaro/+milestone/4.5-2012.02
Downloads are available from the Linaro GCC page on Launchpad:
https://launchpad.net/gcc-linaro
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.6/4.6-2012.02https://launchpad.net/gcc-linaro/4.5/4.5-2012.02
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? inquire at support at linaro.org
-- Ramana
Hi,
I'm doing some tricks with Linux kernel and I'm dependent on
bootloader atags passing.
On PandaBoard the u-boot is always passing DTF/Atags pointer in r2
register, and I'm kind of depending on it. I need to emulate this
behavior by -initrd qemu's argument. However it seems that
qemu-system-arm zeros the registers on the start, and places atags in
some hardcoded memory address no matter what.
Is this behaviour really OK? Isn't r2 register a proper way to pass
atags on ARM platform? If so, would you merge into mainline a patch
that implement this? I could write it, but I don't want end-users of
my work to have to patch and compile Qemu manually.
Please CC me, I'm not following actively these mailinglists.
Regards,
--
Dawid Ciężarkiewicz
Please take the time to comment on this mockup, would it be useful for you?
what other info you like to see to make your job easier, know what you have
on your plate, your WIs progress, what is next in priority ....
BR,
Mounir
---------- Forwarded message ----------
From: Guilherme Salgado <guilherme.salgado(a)linaro.org>
Date: Wed, Feb 1, 2012 at 9:54 AM
Subject: [RFC] Upcoming work view for individual engineers
To: linaro-dev(a)lists.linaro.org
Hi folks,
We're trying to make status.l.o more useful to engineers and the first
thing we're planning to do is a new page listing the upcoming work
assigned to a given person. I'm attaching a mockup of that view here and
we'd like to know what you think of it... Do you think that would be
useful to you? Is there any other information you'd like to see there,
or maybe a different way to present/group them?
Cheers,
--
Guilherme Salgado <https://launchpad.net/~salgado>
_______________________________________________
linaro-dev mailing list
linaro-dev(a)lists.linaro.org
http://lists.linaro.org/mailman/listinfo/linaro-dev
--
Mounir Bsaibes
Project Manager
Follow Linaro.org:
facebook.com/pages/Linaro/155974581091106http://twitter.com/#!/linaroorghttp://www.linaro.org/linaro-blog <http://www.linaro.org/linaro-blog>
Adjusted my 64-bit shifts patch to address Richard Earnshaw's concerns,
tested it, and posted the new one upstream.
Continued trying to figure out how ira-costs.c works, and in particular,
why it doesn't choose to do 64-bit stuff in NEON when I think it should.
Basically, the problem seems to be that when hard regs are *already*
assigned, prior to IRA (say because they are function parameters or
return values), then the allocator does not even consider the
possibility of moving that value to another register unless it
absolutely has to. It will merrily choose the worst possible option just
because it's the easiest decision.
Merged FSF GCC 4.5 into Linaro GCC 4.5. Likewise for 4.6. Pushed the
branches to Launchpad for testing. The 4.5 testing did not come back
totally clear, so this may delay the release a little. Hmmm.
Updated my FSF GCC 4.7 checkout and rebuilt it. This time the build
succeeded, so I've used it as the basis for a shiny new launchpad branch
"lp:gcc-linaro/4.7". I've created the release series to go with it.
Applied my new 64-bit shifts patch to the new GCC 4.7 Linaro branch and
submitted a merge request. This is mostly for the purposes of getting
the test results at this point.
Hi guys,
I compile a native gdb using linaro 2011.10 by “./configure
--host=arm-none-linux-gnueabi --target=arm-none-linux-gnueabi”, and
the gdb runs on arm target boards directly.
# gdb
GNU gdb (Linaro GDB) 7.3-2011.10
Copyright (C) 2011 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "arm-none-linux-gnueabi".
For bug reporting instructions, please see:
<http://bugs.launchpad.net/gdb-linaro/>.
(gdb)
I can use it to debug native programs on target boards directly. For
example, attach process, set breakpoints, check registers and memory.
One issue is I can't see multi-threads, for example:
PID 646 is system_server by ps
"646 1000 159m S system_server"
Then I use gdb to attach it:
# gdb attach 646
(gdb) info threads
Id Target Id Frame
* 1 process 646 "system_server" __ioctl ()
at bionic/libc/arch-arm/syscalls/__ioctl.S:15
as you see, “info threads” only shows one thread but there are several
threads in system_server.
But if I compile a new program based on glibc and gnu libthread, I can
see multi-threads by the gdb.
So my questions are:
1. Should I compile the native gdb using android toolchain and android
bionic/libthread libraries?
2. Why can’t the current gdb capture multithreads for android
processes? This question is actually about the theory for gdb to know
multi-threads. In my opinion, both gnu and android use clone() to fork
threads and threads in one process have same tgid in kernel and all
threads return same getpid() value. Why not gdb just travel process
lists to find multi-threads?
Thanks
Barry
Hi,
* Learned the basics of bzr and examined the gdb-linaro repository.
* Went through Michael Hope's steps to import upstream's 7.4 branch into
bzr.
* Explored gdb-linaro bugs and blueprints in Launchpad to familiarize
myself with what has been done
and is planned or proposed to be done.
* Went through the gdb-linaro/7.3 branch to verify what needs to be
forward-ported to gdb-linaro/7.4.
Forward-ported 10 patches.
* Checked which Linaro Connect sessions would be of interest for me to
attend remotely, but
found out that only one will be available for remote participation.
* Worked very little on Wednesday since my laptop refused to turn on
again after I hibernated it.
I found out on the next day that plugging in an external monitor makes
it happy again (I didn't
have a monitor on Wed to try this out so I was stuck). Apparently the
LCD screen died.
--
[]'s
Thiago Jung Bauermann
Linaro Toolchain Working Group
Hi,
libunwind
* reviewed small patch from T. R. of Nokia who provided a bugfix
when searching for unwind table entry for an IP
OpenEmbedded
* build the OE-core images (minimal, sato and qt4e) with -O1 and -O0
* collected the ELF size and memory footprint and updated the charts
* encountered an issue when compiling Qt 4.8.0 using -O0. It causes
qdbusviewer fail to link
because an .LTHUNK symbol survives
* tested various compilers and optimization levels and
noticed that the .LTHUNK symbols do also survive with higher
optimization levels
* only the Linaro and ARM CSL toolchains seem to be affected
(FSF trunk, 46branch and 46release seem to work)
* provided a reduced testcase and opened lp #924726
* Linaro cc1 emits undefined label when using -fPIC -Os (lp #924889)
* already fixed upstream, Ramana is backporting to Linaro GCC
* look into the external-toolchain branch from C. Larson:
https://github.com/kergoth/oe-core/tree/external-toolchain
and tested it against CSL 2011.03 -> works fine
* started to document:
https://wiki.linaro.org/KenWerner/Sandbox/OpenEmbedded-Core
Regards,
Ken
== GCC ==
* Benchmarking the 4.6 backport of subreg forward-propagation
confirmed that this is a net loss. On 4.7, microbenchmarks
suggest a different outcome (due to register allocator
enhancements), so I've created a 4.7 Bazaar branch including
the patch and submitted it for benchmarking.
* Implemented a patch to allow memory operands with vec_set and
vec_extract to avoid excessive vmov generation in the PR 51819
test case. Patch shows no regression on microbenchmarks; full
testing and benchmarking still outstanding.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
