Posted a patch upstream to fix big-endian for generic tuning. This was a
simple omission from my previous patches.
Merged GCC 4.6.2 to Linaro GCC. It's still in testing now, so I'll have
to commit it sometime over the weekend or next week.
Looked at the benchmark results from Spec2000 running on both A8 and A9
systems, with and with NEON, and with various compiler options. Posted
the results in a spreadsheet (visible within Linaro only).
Begun making adjustments to generic tuning and started new spec2k runs
to see if they are beneficial. First, I'm trying A9 prefetch settings on
A8 to see how much damage it does. Next I'll try enabling the A8 NEON
tuning settings on A9 to see what happens there.
Prepared for travel next week.
Vacation Friday
Hi,
- Merged to gcc-linaro:
- widening shifts
- SLP features: support loads with different offsets and swap
operands if necessary
- Started rewriting SLP analysis to support operations with more than
two operands (towards SLP of conditions)
- Updated NEON presentation following Ramana's suggestions (thanks!)
- Suggested to Ramana to implement vcond with mixed types, created a
blueprint: https://blueprints.launchpad.net/gcc-linaro/+spec/vcond-with-mixed-types
- Vectorizer:
- updated vectorizer's webpage
- updated vectorizer's wiki page
- the usual maintenance
- Committed upstream two SLP data-ref analysis improvements: PR 50730
and PR 50819
Ira
Hi there. Connect is just around the corner. Have a look at:
https://wiki.linaro.org/MichaelHope/Sandbox/Q4.11Plans
for a summary of the toolchain sessions and hacking topics.
It would be great to have kernel and OCTO input in the ARM STM driver,
Kernel debugging, and KVM sessions.
-- Michael
Hi Folks,
Draft agenda for the performance meeting next week at Connect -
https://blueprints.launchpad.net/gcc-linaro/+spec/linaro-toolchain-performa…
Are there any topics that people would like to bring up during this
meeting other than the ones listed here ? I suspect that we'll
probably just have about 10-15 minutes for a topic in this case. I am
not considering discussing PGO related stuff in this session given
that we've got another session in which we can discuss this.
Thoughts ?
cheers
Ramana
Hi Folks,
I've been trying to capture what we want to do in terms of hacking
time and some of the performance related backlog that we have in the
system. I have done so here.
https://wiki.linaro.org/RamanaRadhakrishnan/Sandbox/Q411ConnectGCCPerfPlan
I'm on vacation tomorrow but should be picking email for sometime
during the day.
Thoughts about what else we could be doing in this area or if there's
a better way we could use our hacking time.
cheers
Ramana
---
At the moment ARM eglibc doesn't support the functions declared
in ucontext.h: getcontext(), setcontext(), swapcontext() and
makecontext(). Instead you get implementations which always
fail and set errno to ENOSYS.
QEMU uses these functions to implement coroutines. Although there
is a fallback implementation in terms of threads, there are reasons
why using the fallback is suboptimal:
* its performance is worse
* it will be less tested, because x86_64 and i386 both implement
the ucontext functions and so QEMU on those hosts will be using
different code paths
* I'm not aware of a good way at configure time to detect whether
getcontext() et al will always fail without actually running a
test binary, which won't work in a cross-compile setup. (If eglibc
just didn't provide the functions at all this would be much
simpler...)
We're going to care about performance and reliability of QEMU on
ARM hosts as we start to support KVM on Cortex-A15, so it would
be good if we could add ucontext function support to eglibc as
part of that effort.
Opinions? Have I missed some good reason why there isn't an
ARM implementation of these functions?
(I'm aware that the ucontext functions have been removed from
the latest version of the POSIX spec; however AFAIK there's no
equivalent functionality that replaces them so I think they're
still worth having implementations of for parity with other
architectures.)
-- PMM
==Progress===
* Some upstream patch review.
* Spent time looking at LP 836588 which is a case where CSE removes a
particular label access in one case but doesn't remove it from the
list of things in the constant pool which is quite bizarre. Will
probably need some help with looking into this one.
* Sent out vcvt.f32 and vcvt.f64 patches .
* Connect preparation - laptop cleanup and getting it finally onto an
x86_64 distribution.
* Looked at some of the vec_perm / vec_rev cases in Neon with Ira.
* Spent some time looking at some of Andrew's issues with generic-v7a
tuning especially the cases where it was doing better and gave some
suggestions.
=== Plans ===
* Prepare for Connect.
* Prepare by looking at some of the large differences between
various comparative benchmarks.
* Some research into PGO related stuff.
* Try to upstream some more of my patches in the backlog before the
end of the week.
* Finish off some internal paperwork.
* I'm off on 26th - Wednesday.
Absences.
* 26th Oct - Day off.
* 31st Oct - 4th Nov - Linaro Connect Q4.11
* 08 Nov - 11 Nov - Tentatively booked
* Dec 19 - 31st Dec - Tentatively booked
Continued looking at my constant reuse optimization. I've identified a
couple of hundred optimization opportunities in the whole of gcc itself,
which is fewer than I had hoped. There are almost no opportunities when
compiling for size as constants are always loaded from a constant pool
in that case (I'm not sure why that's the case, given that this isn't
any more space efficient than movw+movt, unless it can share the
constant in more than one place).
Backported my -mtune=native patch to Linaro GCC.
Backported my generic tuning patch to Linaro GCC.
Backported my pr50717 patch to Linaro, and pushed to Launchpad for testing.
Analysed my benchmark results I made to aid generic tuning.
Disappointingly the A8/A9 tuning is not as beneficial as one would like.
In fact, the existing generic tuning patch (which was supposed to be a
framework only) is actually quite competitive and gives better
performance in some cases.
Set more benchmarks running, this time with NEON enabled. That's about
36 hour's worth on A9, and more like 90 hours on my A8 (obviously,
there's some difference in the clock speeds there).
Discovered that my native tuning code won't compile with a C++ compiler
(GCC Bugzilla PR50809). Tested and committed a fix upstream.
== GDB ==
* Worked on support for cross-platform core file generation.
Posted initial set of patches for comments.
* Created "Toolchain support for kernel debugging" blueprint.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Hi,
I made some progress on transforming the hacks I did to get libunwind
working on Android into proper patches that can go upstream. Things learned:
* bionic employs OpenBSD header files that therefore lack some GNU and
ARM specific defines (only small fix needed - plan is to change
libunwind to work with non-patched bionic too)
* Android basically provides all the functionality that is required
for libunwind-ptrace - but...
* no one seems to build libunwind with remote unwind functionality
(including libunwind-ptrace) only
* most of the issues can be avoided by changing libunwind to be more
portable
Regards
Ken
* Still having trouble with using multistrap/pdebuild-cross for
cross-compiling Firefox - it looks like only x86 packages get downloaded,
not armel. I have asked Wookey for advice, and he will try to reproduce the
build.
* Falling back to native compiling until the cross-compiling set up has been
sorted out. I will now take a look at how to pass different compiler options
to the Mozilla build system and how to build different parts of the program.
Best Regards
Åsa
(short week: 4 days)
RAG:
Red:
Amber:
Green: blog started :-) http://translatedcode.wordpress.com/
Current Milestones:
|| || Planned || Estimate || Actual ||
||a15-usermode-support || 2011-11-10 || 2011-11-10 || ||
||upstream-omap3-cleanup || 2011-11-10 || 2011-11-10 || ||
Historical Milestones:
||qemu-linaro-2011-07 || 2011-07-21 || 2011-07-21 || 2011-07-21 ||
||qemu-linaro 2011-08 || 2011-08-18 || 2011-08-18 || 2011-08-18 ||
||qemu-linaro 2011-09 || 2011-09-15 || 2011-09-15 || 2011-09-15 ||
||add-omap3-networking || 2011-10-13 || 2011-10-13 || 2011-10-13 ||
||a15-systemmode-planning || 2011-10-13 || 2011-10-13 || 2011-09-22 ||
== other ==
* upstream patch review, putting together pull requests
* more time spent on qemu on ARM host apparent memory corruption
bug (no luck yet :-(); found a Valgrind bug in the process,
though (KDE:284472). This ate up way too much of this week.
* A15 KVM planning work
* meetings etc
* moved over to patches.linaro for QEMU patch tracking
-- PMM
Hi,
* widening shifts - finally committed upstream
* SLP loads with different offsets and operand swaps - committed upstream
* SLP with multiple types - merged to gcc-linaro-4.6
* vectorizer stuff: patch review, test fixes, discussions, bug fix
* Ramana and I discussed what can be done with VEC_PERM_EXPR for NEON,
and created https://blueprints.launchpad.net/gcc-linaro/+spec/support-vec-perm
for this issue.
Ira
Following on from last night's performance call, I had a look at how
64 bit integer operations are mapped to NEON instructions. The
summary is:
* add - fine
* subtract - fine
* bitwise and - fine
* bitwise or - fine
* bitwise xor - fine
* multiply - can't as the instruction tops out at 32 bits. Might be
able to compose using VMLAL
* div, mod - no instruction
* negate - instruction tops out at 32 bits, but could be turned into
vmov #0, vsub
* left shift constant - missing
* right shift constant - missing
* right arithmetic shift constant - missing
* left shift register - missing
* right shift register - tricky, as you do this as a left shift -register
* not - no instruction, but could be done through a vceq, #0?
* bitwise not - missing
I also noticed that the replicated constants aren't being used. A
pre-increment is load constant pool; vadd but could be done as a vmov,
#-1; vsub. The same with pre-decrement - it could be done as a vmov,
#-1; vadd.
This seems worth blueprinting.
-- Michael
limits-fndefn.c takes an impressively long time to run. On an idle
machine, -O3 -g -c takes 17:31 and -O2 -g -c takes The test already
has a dg-timeout-factor of 4 giving a total timeout of 20 minutes.
Removing the -g brings this down to 30 s. Keeping the -g and adding
-fno-var-tracking brings this down to 45 s.
We could bump the multiplier up to 8 but it's getting a bit
ridiculous. Any thoughts?
-- Michael
== Last week and today ==
* Backported fix for returning std::pair<bool, bool>. Unfortunately
this showed up a regression on 4.5. I couldn't reproduce it cross,
and the testcase itself looks innocuous, so I'm wondering whether
the patch might trigger a miscompilation of cc1plus.
* Committed SMS register-scheduling patches upstream and backported
to Linaro 4.6.
* Most of the week spent on -fsched-pressure. Still trying a few
variations in order to get the right balance. (My local haifa-sched.c
now has about 20 new toggles.) Still feel like I'm making progress,
rather than hitting the point of diminishing returns.
Hope Connect goes well. See everyone in a few weeks' time.
Richard
Completed the 4.5 and 4.6 FSF to Linaro merges.
Spun the Linaro GCC release tarballs, uploaded them to the test farm,
and set off the test builds.
Continued looking at the constant reuse optimization. This time I've
build GCC itself with the new pass to see how many optimization
opportunities there are. This shook out a lot more small bugs, which was
useful.
Backported my negative-shifts patch to Linaro 4.6, pushed it to
Launchpad for testing, and then committed it to 4.6 once in was approved.
Experimented with running SPEC2K on A8 and A9 boards in order to
establish a baseline for the generic tuning tweaks. A short test doesn't
give much clue as to what can be achieved, and a long test takes way too
long. The problem is also complicated by the benchmarks where the A8
tuning works better on A9 than A9 tuning does. :S
Received a bug report (GCC bugzilla 50717) for my widening multiplies
patches. Analysed the problem, developed a patch, and posted it to
gcc-patches.
<Short week with 2 days gone on an internal training course>
==Progress===
* Some patch review.
* Spent time looking at LP 836588.
* Tried some different approaches for the vcvt.f64.s32 case and it
looks like the simple solution is the best one unfortunately :(
* 2 days off at internal training course.
=== Plans ===
* continue looking into LP 836588
* Patch review week/
* Work on getting vcvt.f* case done and finish some of the backlog.
Absences.
* 31st Oct - 4th Nov - Linaro Summit Orlando - Travel booked -
* 08 Nov - 11 Nov - Tentatively booked
* Dec 19 - 31st Dec - Tentatively booked
I've just tried rerunning some benchmarks on my panda, which I
reinstalled recently and am getting
some odd behaviour:
The kernel is 3.0.0-1404-linaro-lt-omap
For example:
simple_strlen: ,102400, loops of ,62, bytes=6.054688 MB, transferred
in ,20324707.000000 ns, giving, 297.897898 MB/s
simple_strlen: ,102400, loops of ,32, bytes=3.125000 MB, transferred
in ,7904053.000000 ns, giving, 395.366782 MB/s
simple_strlen: ,102400, loops of ,16, bytes=1.562500 MB, transferred
in ,7354736.000000 ns, giving, 212.448142 MB/s
simple_strlen: ,102400, loops of ,8, bytes=0.781250 MB, transferred in
,91553.000000 ns, giving, 8533.308575 MB/s
simple_strlen: ,102400, loops of ,4, bytes=0.390625 MB, transferred in
,1495361.000000 ns, giving, 261.224547 MB/s
simple_strlen: ,102400, loops of ,2, bytes=0.195312 MB, transferred in
,1983643.000000 ns, giving, 98.461518 MB/s
Note the 8 byte one apparently 40 times faster, and for true oddness:
smarter_strlen_ldrd: ,102400, loops of ,62, bytes=6.054688 MB,
transferred in ,3936768.000000 ns, giving, 1537.984331 MB/s
smarter_strlen_ldrd: ,102400, loops of ,32, bytes=3.125000 MB,
transferred in ,0.000000 ns, giving, inf MB/s
smarter_strlen_ldrd: ,102400, loops of ,16, bytes=1.562500 MB,
transferred in ,4180909.000000 ns, giving, 373.722557 MB/s
Now, while I like infinite transfer rates, I suspect they're wrong.
Anyone else seeing this?
Dave
Implementing estimating register pressure in SMS.
Experimenting with the implementation on libav microbench.
Discussed with Richard some issue raised while implementing.
== GDB ==
* Created and published Linaro GDB 7.3-2011.10 release.
* Fixed LP #871901 (Linaro GDB crashes on 3.x kernels) in
mainline and Linaro GDB 7.3.
* Backported mainline fix for LP #829595 (Separate debuginfo
misidentified with "remote:" access) to Linaro GDB 7.3.
* Completed blueprint "GDB as a cross-debugger".
* Worked on support for cross-platform core file generation.
== GCC ==
* Patch review week.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
== 64 bit atomics ==
* Thanks to Ramana for OKing my gcc patches; and Richard for
committing them - I've backported these to the gcc-linaro branch
and pushed it - hopefully those will pass OK!
== String routines ==
* Sent my memchr patch to upstream newlib, received comments,
tweeked, and resent
* Sent strlen patch to upstream newlib
* Spent some time getting confused by timing issues on our Panda; it
got reinstalled with 11.09 a few
weeks ago and is now showing some odd behaviours. In particular I'm
seeing some tests show completion in 0ns
(and my code isn't -that- fast!), and others where the times vary
wildly - it's almost as if a timer interrupt is delayed
or missing; my same test binary works fine on one of Michael's Ursa's
running an older install.
== QEMU ==
* Tested Peters QEMU image for release
== Other ==
* Spent an afternoon reading through the System trace docs
On holiday next week; I'll poll email occasionally.
Dave