- linaro-toolchain - lists.linaro.org

Linaro GCC 4.5 and 4.6 2011-04 released

by Michael Hope

The Linaro Toolchain Working Group is pleased to announce the release of both Linaro GCC 4.5 and Linaro GCC 4.6. Linaro GCC 4.5 2011.04 is the ninth release in the 4.5 series. Based off the latest GCC 4.5.2+svn171921, it adds new optimisations, support for Android, and fixes for many of the issues found in the last month. Linaro GCC 4.6 2011.04 is the second release in the 4.6 series. Based off the latest GCC 4.6.0+svn171921, it is the first supported release of the new series and includes a significant number of mainstreamed patches from 4.5. Interesting changes in 4.6 include: * Updates to 4.6.0+r171921 * Adds conditional store sinking to the vectoriser * Brings in a significant number of the Linaro GCC 4.5 patches that are in mainline Interesting changes in 4.5 include: * Updates to 4.5.2+r172013 * Disables the shrink wrap optimisation by default * Adds support for swing-modulo scheduling (SMS) on ARM * Adds support for Android and the Bionic C library * Optimises -fvar-tracking, greatly reducing memory used when compiling large files (seen in QEMU) Fixes: * 'volatile' being ignored on volatile struct members * A potential register clobber in arm_negdi2 * An error in libgcc that prevented it being built with -Os * Multiple shrink wrap bugs (LP: #731665, 721023, 736081, 758082, 730860, 736439, 721023) * LP: #730440 incorrect immediate for movt (seen in Firebird) * LP: #728315 extension elimination pass mishandles subregs of promoted variables (seen on MIPS) * LP: #675347 volatile int causes inline assembly build failure (seen in Qt) SMS is an optimisation that works on innermost loops and reorders the instructions by overlapping different locations. An example is that the values for the next loop may be loaded during the current loop, making the values already ready when the next loop starts. SMS is disabled by default. To try it, add the options '-fmodulo-sched -fmodulo-sched-allow-regmoves'. The source tarball is available from: https://launchpad.net/gcc-linaro/+milestone/4.5-2011.04-0 https://launchpad.net/gcc-linaro/+milestone/4.6-2011.04-0 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro -- Michael

14 years, 7 months

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[OT] ti-omap-tools - script for setting up DVSDK 3 with various toolchains

by AJ ONeal

Here's a script for installing TI's DVSDK 3: https://bitbucket.org/thayne/ti-omap-tools/src Works with - CodeSourcery - OpenEmbedded - Linaro It will download the bazillion dependencies scattered across TI's site and makes it easier to gut the DVSDK's hard-coded paths to work for your setup. The DVSDK 4 isn't used because it is completely different from the DVSDK 3 and is much more difficult to root the hard paths and checks out of. AJ ONeal

14 years, 7 months

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Question on compressed vmlinux .got and .bss sections

by Shawn Guo

Hi toolchain, kernel folks, I'm seeing an interesting thing on .got and .bss sections of arch/arm/boot/compressed/vmlinux, and really need your expertise to shed some lights. I have an uninitialized variable 'uart_base' defined in misc.c. static unsigned long uart_base; $ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o Disassembly of section .bss: 00000000 <uart_base>: 0: 00000000 andeq r0, r0, r0 00000004 <__machine_arch_type>: 4: 00000000 andeq r0, r0, r0 [...] And section layout looks like the following. $ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux SECTIOINS { ... _etext = .; _got_start = .; .got : { *(.got) } _got_end = .; .got.plt : { *(.got.plt) } _edata = .; . = ALIGN(4); __bss_start = .; .bss : { *(.bss) } _end = .; ... } $ arm-linux-gnueabi-objdump -h arch/arm/boot/compressed/vmlinux arch/arm/boot/compressed/vmlinux: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .text 001c474c 00000000 00000000 00008000 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .got 00000028 001c474c 001c474c 001cc74c 2**2 CONTENTS, ALLOC, LOAD, DATA 2 .got.plt 0000000c 001c4774 001c4774 001cc774 2**2 CONTENTS, ALLOC, LOAD, DATA 3 .bss 00000020 001c4780 001c4780 001cc780 2**2 ALLOC 4 .stack 00001000 001c47a0 001c47a0 001cc780 2**0 ALLOC 5 .comment 0000002a 00000000 00000000 001cc780 2**0 CONTENTS, READONLY 6 .ARM.attributes 00000031 00000000 00000000 001cc7aa 2**0 CONTENTS, READONLY I'm able to see uart_base in vmlinux objdump ... $ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux [relevant only, and sorted] 00000000 l d .text 00000000 .text 001c474c l d .got 00000000 .got 001c4774 l d .got.plt 00000000 .got.plt 001c4780 l d .bss 00000000 .bss 003968e4 g *ABS* 00000000 _image_size 001c474c g *ABS* 00000000 _got_start 001c4774 g *ABS* 00000000 _got_end 001c4780 g *ABS* 00000000 _edata 001c4780 g *ABS* 00000000 __bss_start 001c4780 l O .bss 00000004 uart_base 001c4798 g O .bss 00000004 malloc_ptr 001c478c g O .bss 00000004 output_ptr 001c479c g O .bss 00000004 malloc_count 001c4794 g O .bss 00000004 free_mem_end_ptr 001c4788 g O .bss 00000004 output_data 001c4784 g O .bss 00000004 __machine_arch_type 001c4790 g O .bss 00000004 free_mem_ptr 001c47a0 g *ABS* 00000000 _end ... but I can not see it in the zImage (all others in .bss seem still there). $ xxd arch/arm/boot/zImage | tail 01c4740: 3ef1 1400 be52 9f58 e468 3900 4c47 1c00 >....R.X.h9.LG.. ^_got_start (why is it?) 01c4750: 9847 1c00 1043 0000 8c47 1c00 9c47 1c00 .G...C...G...G.. ^malloc_ptr ^output_ptr 01c4760: 9447 1c00 080a 0000 8847 1c00 8447 1c00 .G.......G...G.. ^free_mem_end_ptr ^__machine_arch_type 01c4770: 9047 1c00 0000 0000 0000 0000 0000 0000 .G.............. ^free_mem_ptr The following is a run-time memdump at _got_start. Before recalculation: 9056304C: 001C474C 001C4798 00004310 001C478C 001C479C 001C4794 00000A08 001C4788 ^_got_start (why is it?) 9056306C: 001C4784 001C4790 00000000 00000000 00000000 EDFE0DD0 4C010000 38000000 After recalculation (for .bss entries, the delta is 9039EA50, for others in .got, delta is 9039E900): 9056304C: 9056304C 905631E8 903A2C10 905631DC 905631EC 905631E4 9039F308 905631D8 9056306C: 905631D4 905631E0 00000000 00000000 00000000 73FBC000 4C010000 38000000 QUESTION: Where is the .bss section of uart_base? Now, I remove the 'static' to have 'unsigned long uart_base', and dump the same stuff to compare. $ arm-linux-gnueabi-objdump -D arch/arm/boot/compressed/misc.o Disassembly of section .bss: 00000000 <__machine_arch_type>: 0: 00000000 andeq r0, r0, r0 00000004 <uart_base>: 4: 00000000 andeq r0, r0, r0 I'm able to see uart_base in vmlinux objdump ... $ arm-linux-gnueabi-objdump -t arch/arm/boot/compressed/vmlinux [relevant only, and sorted] 00000000 l d .text 00000000 .text 001c4720 l d .got 00000000 .got 001c474c l d .got.plt 00000000 .got.plt 001c4758 l d .bss 00000000 .bss 003968e4 g *ABS* 00000000 _image_size 001c4720 g *ABS* 00000000 _got_start 001c474c g *ABS* 00000000 _got_end 001c4758 g *ABS* 00000000 _edata 001c4758 g *ABS* 00000000 __bss_start 001c475c g O .bss 00000004 uart_base 001c4770 g O .bss 00000004 malloc_ptr 001c4764 g O .bss 00000004 output_ptr 001c4774 g O .bss 00000004 malloc_count 001c476c g O .bss 00000004 free_mem_end_ptr 001c4760 g O .bss 00000004 output_data 001c4758 g O .bss 00000004 __machine_arch_type 001c4768 g O .bss 00000004 free_mem_ptr 001c4778 g *ABS* 00000000 _end ... and I can also see it in the final zImage. $ xxd arch/arm/boot/zImage | tail 01c4710: 221f f1b3 3ef1 1400 be52 9f58 e468 3900 "...>....R.X.h9. 01c4720: 5c47 1c00 2047 1c00 7047 1c00 e442 0000 \G.. G..pG...B.. ^uart_base 01c4730: 6447 1c00 7447 1c00 6c47 1c00 140a 0000 dG..tG..lG...... 01c4740: 6047 1c00 5847 1c00 6847 1c00 0000 0000 `G..XG..hG...... 01c4750: 0000 0000 0000 0000 ........ Surely, it's in the run-time memdump. Before recalculation: 90563020: 001C475C 001C4720 001C4770 000042E4 001C4764 001C4774 001C476C 00000A14 ^uart_base 90563040: 001C4760 001C4758 001C4768 00000000 00000000 00000000 EDFE0DD0 4C010000 After recalculation: 90563020: 905631AC 90563020 905631C0 903A2BE4 905631B4 905631C4 905631BC 9039F314 90563040: 905631B0 905631A8 905631B8 00000000 00000000 00000000 EDFE0DD0 4C010000 So it looks the non-static ('g') uninitialized variable sits in .bss sections well, while static ('l') one is not there. Is this expected? How the static one is being addressed? Or ask where the offset for static one is stored? Any info or comments are appreciated. -- Regards, Shawn

14 years, 7 months

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[0/5] Improvements to vldN and vstN intrinsics

by Richard Sandiford

I've just submitted a merge request for the vldN and vstN intrinsic improvements. There are five related patches, so I thought it might be easier to review the merge if I posted the individual changes here. See: http://www.mail-archive.com/linaro-toolchain@lists.linaro.org/msg00969.html for an example of how this helps. Richard

14 years, 7 months

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Test log comparison

by Michael Hope

I've fixed up the testcompare pages on ex.seabright.co.nz. It was getting confused by parallel testsuite runs and couldn't handle the results jumping about. I've also added a filter to buildlog that does a prefix match. Going to: http://ex.seabright.co.nz/helpers/buildlog/gcc-linaro shows just gcc-linaro results and: http://ex.seabright.co.nz/helpers/buildlog/gcc-linaro-4.5 for just 4.5 results. The bzr build results are looking good so far: armv7: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99498/logs/… No changes except PCH. 99499 is still building. i686: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99499/logs/… No changes. Note that the guality failures happen in 4.5.2 as well x86_64: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.5+bzr99499/logs/… No changes. 4.6 related: x86_64: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.6+bzr106734/logs… i686: http://ex.seabright.co.nz/helpers/testcompare/gcc-linaro-4.6+bzr106734/logs… armv7 is still building. -- Michael

14 years, 7 months

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smc #0 unsuppored (bug 669912) gcc-4.5 linux-2.6.38

by AJ ONeal

I just did `git checkout` for linaro/linux-2.6.38 and tried compiling with CROSS_COMPILE=arm-linux-gnueabi- and I get this smc #0 error. The bug filed here is marked as fixed, but it's still broken for me: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/669912 I ran into this error once before, but I can't find my notes for it. I think the solution was to append something like $(sec) on a line in the Makefile. Any ideas? AJ ONeal

14 years, 7 months

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Changing how we make changes

by Michael Hope

Hi there. I'd like to change and clarify how we make changes inside Linaro toolchain projects. The write-up is here: https://wiki.linaro.org/WorkingGroups/ToolChain/MakingChanges The short story is that now, just like mainline, the developers themselves do the final commit or merge into bzr. I've volunteered three of you on a review roster so that someone has the responsibility for reviewing patches each week. The roster is: * Ramana week 15, 17, 20, ... starting the 11th of April 2011 * Richard week 16, 18, 21, ... starting the 18th of April 2011 * Ulrich week 17, 19, 22, ... starting the 25th of April 2011 Anyone is welcome to review patches. The more eyes the better. Thoughts? -- Michael

14 years, 7 months

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What is __aeabi_unwind_cpp_pr0?

by AJ ONeal

I'm just curious as to what "__aeabi_unwind_cpp_pr0" is or means. I can't find any explanation by googling. I'm about to post a separate e-mail with my problem concerning it. AJ ONeal

14 years, 7 months

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[ACTIVITY] 11th -15th April

by Andrew Stubbs

Reviewed and approved Revital's do-loop patch, and Ira's store sinking patch. More precisely, I reviewed the test results from Michael's test system, and cast my eye over the patch to look for anything obvious. I don't pretend to know exactly what they do. Attended Ramana's thumb2 optimization discussion. Continued work on merging useful patches from CodeSourcery. Pushed the new patch set to Launchpad for testing in Michael's system. Pointed Bernd at lp:758082 - another probable shrink-wrap failure. Bernd responded with a new patch, and asked me to test it. I've pushed it to Launchpad and created a merge request. Posted an old patch of Dan's upstream: http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html Pinged my thumb2 constants patch upstream. Richard E responded with some issues to address. I'll need to change the names of the constraints, at least. At Ramana's request, tested the NEON scheduling patch with SPEC2000. Encountered trouble with time-outs. Fixed those and retested. Posted an updated version of my EABI half-precision patch: http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html Merged my backport of Julian's -fstrict-volatile-bitfields bug fix into Linaro GCC. The testing of the Android patches came back with a few test differences, but they appear to be unrelated to the patch, so are probably environmental. I've merged the changes to Linaro GCC. [Also spent most of Friday working on internal CS tasks.] ---- Upstream patched requiring review: * NEON scheduling patch http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html * NEON test cases http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03144.html * ARM EABI half-precision functions (reposted) http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03210.html

14 years, 7 months

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[ACTIVITY] Apr.11 -- 17

by Chung-Lin Tang

== Last week == * CoreMark regressions: pushed a merge of my two upstream patches to Linaro 4.5, some current numbers are here: http://lists.linaro.org/pipermail/linaro-toolchain/2011-April/001087.html. * Continued working on another combine patch for improving CoreMark, hopefully ready to submit this week. * Committed fix for PR48325 (NEON POST_INC/PRE_DEC load/stores for struct modes) upstream. * Committed fix for PR48250 / Launchpad #723185 upstream. * Launchpad #689887, ICE in get_arm_condition_code(). My prior patch was tested to cause native bootstrap failure on Linaro 4.5, though retesting on upstream trunk worked fine. Still investigating. * Booked travel for Linaro-Budapest event. == This week == * Current combine patch. * Some unresolved patches, like PR46888. * Launchpad #689887, hope to figure this out.

14 years, 7 months

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First session ideas for the summit

by Michael Hope

I've started up a page with ideas for sessions at next month's summit: https://wiki.linaro.org/MichaelHope/Sandbox/1111Blueprints They're a pretty direct map to the TSC technical topics so far which is nice to see. Feel free to add other ideas to the page. Each session is around 45 minutes, needs to be fairly well understood by the drafter beforehand, and should have concrete actions coming out of it. It's fine to have a few future/blue sky sessions but not too many. We'll discuss these at tonights meeting and assign drafters. -- Michael

14 years, 7 months

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Some initial notes on the effects of vldN and vstN vectorisation

by Richard Sandiford

I've now submitted the initial vldN and vstN work, so I thought I'd see how often it triggers for natty's libav package. I've put some initial results here: https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv There are more files to go through, so this isn't complete. I've also left out cases that were very similar to the ones given. Some of the code is reasonable, while others are obviously not as good as they could be. I don't think the problems are really to do with the vldN and vstN work itself though. They seem to be due to the underlying interleaved load/store detection, or in the handling of widening operations. Richard

14 years, 7 months

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[ACTIVITY] 2011-04-15

by David Gilbert

== Bug triaging == * Bug 745843 (vtk ftbfs) got it down to a bad arm/thumb transition - identified as a linker error and handed off to RichardS * Bug 758082 (augeas ftbfs) tracked it down to overwrite of a parameter in a variadic function before it got stacked; identified by Ramana as another instance of the shrink-wrap bug. * Bug 745861 (petsc ftbfs) isolated the collection of different mpi related problems this is hitting; really need to find an mpi expert on this * Bug 745863 & bug 745891 (ftbfs's) - both were compilations that timed out; verified this was due to using lots of RAM and also using lots of RAM on x86 (> ~500MB) - marked as invalid until the build farm grows more RAM * Bug 757427 gconf seg fault - failed to reproduce under various tests (although Michael has now managed to catch it in the act) == Optimisation == * neon memcpy tweeking; added prefetches and unrolled the core loop - now comparable perf to bionic memcpy in most cases (slower on misaligned destination, faster in other cases) * tweaked latrace to print address/length of argument strings so I can get some stats on routine usage. Dave

14 years, 7 months

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[ACTIVITY] Weekly status

by Richard Sandiford

== This week == * Worked on a fix for https://bugs.launchpad.net/gcc-linaro/+bug/758082 Submitted the patch upstream. * Finished first cut of vldN and vstN vectorisation. Send the patches upstream. Most of the patches have been approved, but I'll wait for the others before committing. * Looked at how the vectoriser handles natty's libav. Found some nice loops, some OK-but-could-do-better, and some really atrocious. Wrote up the results here: https://wiki.linaro.org/RichardSandiford/Sandbox/NeonLibAv * Started writing micro benchmarks for each loop on that page. I'm about half way through now (starting from the bottom). * Started looking at whether the changes affect DENbench. * Patch review. * Wrote a small follow-up to the fix for LP 758082. * Some patch pinging. == Next week == * More micro benchmarks. * More DENbench. * Submit a merge request for the intrinsics improvements, if the remaining patches are approved. * Look at the poorer libav loops in more detail. Richard

14 years, 7 months

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[ACTIVITY] report week 15

by Peter Maydell

RAG: Red: Amber: Green: now only 6 "core ARM emulation" patches in qemu-linaro not yet upstreamed (still lots of omap3 patches, though) Current Milestones: | Planned | Estimate | Actual | qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | | Historical Milestones: finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off | first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 | qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 | == maintain-beagle-models == * some early prep for next week's qemu-linaro release == merge-correctness-fixes == * patch to fix Neon UNDEFs sent upstream and committed * patch fixing an overflow in signed VABAL.s32 upstreamed, committed * investigated a bug report which turns out to be that if you try to single step over an instruction which UNDEFs using qemu's gdb stub we execute the insn at the UNDEF vector and stop after it rather than stopping at the UNDEF vector * some investigation of qemu mishandling of FP exception flag setting; putting this on hold though, as it really isn't very high priority * reviewed patches from Aurelien doing some general softfloat cleanup == other == * trying to nail down proposed QEMU work for next cycle; work-in-progress: https://wiki.linaro.org/PeterMaydell/Qemu1111 * two IRC interviews for QEMU Google Summer of Code student to do some work on upstreaming of the Android emulator device models * meetings: toolchain, standup, architecture Q&A, divisional update Current qemu patch status is tracked here: https://wiki.linaro.org/PeterMaydell/QemuPatchStatus Absences: Holiday: 22 Apr - 2 May 9-13 May: UDS, Budapest (maybe) 15-16 August: QEMU/KVM strand at LinuxCon NA, Vancouver [LinuxCon proper follows on 17-19th]

14 years, 7 months

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CoreMark Status

by Chung-Lin Tang

Hi, I've just pushed a merge of the current upstream patches for resolving the CoreMark regressions. (https://code.launchpad.net/~cltang/gcc-linaro/coremark-part1) To give a quick benchmark of the current status, testing Linaro 4.5 before/after the merge of those two patches: Optimization options used were just plain '-O2 -mtune=cortex-a9', tested on one of our Pandaboards running Maverick; all numbers are Iterations/Sec averaged from 3 runs. r99492 r9942+patches improve % -march=armv5te 2786.87 2848.12 2.20 % -march=armv7-a 2474.50 2775.92 12.18 % -march=armv7-a -mthumb 2297.86 2356.59 2.56 % I'll have to re-test to be sure, but the numbers/improvements obtained using upstream trunk should not be too far off, at least the ARM mode ones. As we discussed in prior meetings, there's still one point of regression identified that's in solving, which hopefully will finally bring the ARMv7-A numbers above ARMv5TE. Chung-Lin

14 years, 7 months

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[Activity] 10th - 14th April

by Revital Eres

Hello, - Tracking down bugs exposed while testing a patch for SMS to avoid using -fauto-inc-dec flag and preparing fixes for them. Also, prepared a fix for PR47013. - Continue looking into DENbench and updating https://wiki.linaro.org/Internal/ToolChain/Benchmarks. Thanks, Revital

14 years, 7 months

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[Activity] 11th - 14th April

by Ramana Radhakrishnan

== GCC == Progress: * Spent some time digging into binutils issue for Neon but still not sure why I see the problem when this is fixed in 2.21 branch and no one else see this. * Fixed PR 48090 upstream. * Some patch review. * T2 performance meeting. Plans when I'm back: * Continue looking at divmodsi4 improvements. * Continue looking at excessive VFP moves. * Backport the fix for the initialization of cgraph into FSF 4.5 branch. Meetings: * 1-1s * Linaro toolchain meeting * T2 performance. * Linaro@UDS meeting. Absences: * April 15 – 26 -> Booked. * May 9-14 - LDS Budapest

14 years, 7 months

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Issue with noreturn static function with unused arg

by Loïc Minier

hey This problem with busybox: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=621137 seems to be a toolchain issue. It occurs with FSF GCC 4.5.2 but not 4.6, and it doesn't occur with Linaro GCC 4.5 but it does with Debian gcc-4.5. I'm trying to identify the fix which Linaro applied to solve this! :-) Michael Hope told me he remembers we fixed something similar for Qt, but he couldn't find the patch and suggested I post here to get feedback. I've pushed ash.i and .s at: http://people.linaro.org/~lool/ash.i which you can build with: gcc -save-temps -std=gnu99 -Wall -Wshadow -Wwrite-strings -Wundef -Wstrict-prototypes -Wunused -Wunused-parameter -Wunused-function -Wunused-value -Wmissing-prototypes -Wmissing-declarations -Wdeclaration-after-statement -Wold-style-definition -fno-builtin-strlen -finline-limit=0 -fomit-frame-pointer -ffunction-sections -fdata-sections -fno-guess-branch-probability -funsigned-char -static-libgcc -falign-functions=1 -falign-jumps=1 -falign-labels=1 -falign-loops=1 -g -Os -c -o ash2.o ash.i the interesting part is that ash.s has tryexec as not returning, when it does return: grep ^tryexec ash.s -A5 | grep return this seems to be due to the combination of tryexec being static, its parent being noreturn, and one argument of tryexec being unused. Any idea of which Linaro patch solved this? :-) Does it make sense to raise this to FSF GCC 4.5? Thanks! -- Loïc Minier

14 years, 7 months

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First toolchain estimate for the next cycle

by Michael Hope

Hi there. Mounir and I have been looking at the work for next cycle. A summary spreadsheet with notes is available here: https://spreadsheets0.google.com/ccc?key=ty1c-H56f0GxnL1Hk9LCmRg I'm very interested in feedback, especially on the time estimates and extra topics we should suggest to the TSC. See the notes at the top and feel free to add items or estimates straight into the sheet - anyone can view and anyone at Linaro should be able to edit. -- Michael

14 years, 7 months

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Differences in build hosts

by Michael Hope

Hi there. I ran a build of gcc-linaro-4.5+bzr99491 on ursa1 through 4 to see if there was any difference in build machines. The following tests had different results: * gcc.c-torture/compile/limits-structnest.c * gcc.dg/graphite/block-4.c * largefile.c * obj-c++.dg/template-5.mm * obj-c++.dg/template-5.mm * obj-c++.dg/template-6.mm * obj-c++.dg/template-6.mm * objc/execute/class-4.m I suspect that they're all caused by running the testsuite in parallel and the host running out of memory. limits-structnest takes around 850 MB of RAM and passes on the machine with swap (ursa1) and fails on the others. block-4.c takes 2:35 to run and timed out on ursa1 and passed on the others which may be due to ursa1 swapping heavily while running a limit test in parallel. The obj-c tests show various forms of killed, and suggest that they were killed due to another process taking all the memory. I'll change the machines to use the full 1 G of memory, run the test suite in sequential mode, and see how things go. I haven't investigated largefile.c - it's a PCH test and these fail randomly. Regarding block-4.c, it takes 155 s to run which is too close to the default 300 s for my taste. Should we add a dg-timeout-factor 4.0 to it similar to block-3.c? -- Michael

14 years, 7 months

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[Activity] April 4th - 8th

by Ramana Radhakrishnan

Missed sending this out earlier this week. == GCC == Progress: * Sync'd with Andrew about T2 performance stuff. * Spent some time investigating what could be done for divmodsi4 improvements . Working through the various phases. Not done tree level stuff for a while so my knowledge of the API is a a bit rusty. * Some upstream bugzilla duty. Plans: * Continue looking at divmodsi4 improvements. * Continue looking at excessive VFP moves. * Look at binutils + neon issue. * Performance kick-off meeting Meetings: * 1-1s * Linaro toolchain meeting * Andrew Stubbs meeting for 1 hour about T2 performance. Absences: * April 13th - Internal ARM conference. Not at desk all day. * April 15 – 26 -> Booked. * May 9-14 - LDS Budapest

14 years, 7 months

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[ACTIVITY] weekly status

by Ken Werner

Hi, libunwind: * started to look on how to resume from a given stack frame: * other platforms use setcontext * setcontext is not implemented on ARM (glibc) * the *context functions have been marked obsolescent in Posix * http://pubs.opengroup.org/onlinepubs/009695399/functions/makecontext.html pandaboard: * gdb doesn't find separate debug info of libraries that have been put into a multiarch directory (#758619) Note: I'll be out of office to attend a class till (including) Friday. Regards Ken

14 years, 7 months

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Today's T2 perf call.

by Ramana Radhakrishnan

A rough agenda for today's call. I'll put this on the wiki after the call. 1. Go over what we are all doing today - roughly Areas of investigation that we are looking at for near term. a. divmodsi4 work. b. Unnecessary VFP to integer register moves because of addressing modes availability. c. Thumb2 constants work d. Additional areas for headroom in DENBENCH. e. Coremark regressions fix up f. Revisions causing major regressions in coremark 2. Find a way of replicating the benchmarking results and make sure we get similar results to Michael and we are doing roughly the same thing. 3. Regular bi-weekly call following the Toolchain WG meeting ? Or do we organize another call ?

14 years, 7 months

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[Bug 758082] [NEW] [armel] segfaults in make check pass when built with optimization

by Jani Monoses

Public bug reported: FTBFS on armel https://launchpadlibrarian.net/68239668/buildlog_ubuntu-natty-armel.augeas_… not apparent from the log but the failing of test-interpreter.sh is due to a core dump. Starting program: /home/jani/work/ftbfs/aug/augeas-0.8.0/src/.libs/lt- augparse --nostdinc -I . fail_let_no_exp.aug Program received signal SIGSEGV, Segmentation fault. strlen () at ../ports/sysdeps/arm/strlen.S:29 29 ../ports/sysdeps/arm/strlen.S: No such file or directory. in ../ports/sysdeps/arm/strlen.S (gdb) bt #0 strlen () at ../ports/sysdeps/arm/strlen.S:29 #1 0x4016c050 in _IO_vfprintf_internal (s=<value optimized out>, format=<value optimized out>, ap=<value optimized out>) at vfprintf.c:1620 #2 0x401d7b66 in __vasprintf_chk (result_ptr=0xbee5097c, flags=1, format=0x400d961c "%s", args=...) at vasprintf_chk.c:68 #3 0x400bfad6 in vasprintf (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at /usr/include/bits/stdio2.h:199 #4 format_error (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at syntax.c:96 #5 0x400bfd98 in syntax_error (info=0x1, format=0x400d961c "%s") at syntax.c:124 #6 0x400c3e96 in augl_error (locp=<value optimized out>, term=<value optimized out>, scanner=<value optimized out>, s=0x400d7abc "syntax error") at parser.y:628 #7 0x400c54f8 in augl_parse_file (aug=0x1ef1878, name=<value optimized out>, term=0xbee50a64) at parser.y:362 #8 0x400c153a in load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at syntax.c:1951 #9 0x400bbf0a in __aug_load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at augeas.c:1447 #10 0x00008b04 in main (argc=<value optimized out>, argv=0xbee50c84) at augparse.c:131 ** Affects: gcc-linaro Importance: Undecided Status: New ** Affects: augeas (Ubuntu) Importance: Undecided Status: New ** Tags: arm-porting-queue ** Also affects: gcc-linaro Importance: Undecided Status: New ** Summary changed: - segfaults in make check pass when built with optimization + [armel] segfaults in make check pass when built with optimization ** Tags added: arm-porting-queue -- You received this bug notification because you are a member of Linaro Toolchain Developers, which is subscribed to Linaro GCC. https://bugs.launchpad.net/bugs/758082 Title: [armel] segfaults in make check pass when built with optimization Status in Linaro GCC: New Status in “augeas” package in Ubuntu: New Bug description: FTBFS on armel https://launchpadlibrarian.net/68239668/buildlog_ubuntu-natty-armel.augeas_… not apparent from the log but the failing of test-interpreter.sh is due to a core dump. Starting program: /home/jani/work/ftbfs/aug/augeas-0.8.0/src/.libs/lt- augparse --nostdinc -I . fail_let_no_exp.aug Program received signal SIGSEGV, Segmentation fault. strlen () at ../ports/sysdeps/arm/strlen.S:29 29 ../ports/sysdeps/arm/strlen.S: No such file or directory. in ../ports/sysdeps/arm/strlen.S (gdb) bt #0 strlen () at ../ports/sysdeps/arm/strlen.S:29 #1 0x4016c050 in _IO_vfprintf_internal (s=<value optimized out>, format=<value optimized out>, ap=<value optimized out>) at vfprintf.c:1620 #2 0x401d7b66 in __vasprintf_chk (result_ptr=0xbee5097c, flags=1, format=0x400d961c "%s", args=...) at vasprintf_chk.c:68 #3 0x400bfad6 in vasprintf (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at /usr/include/bits/stdio2.h:199 #4 format_error (info=<value optimized out>, code=<value optimized out>, format=0x400d961c "%s", ap=...) at syntax.c:96 #5 0x400bfd98 in syntax_error (info=0x1, format=0x400d961c "%s") at syntax.c:124 #6 0x400c3e96 in augl_error (locp=<value optimized out>, term=<value optimized out>, scanner=<value optimized out>, s=0x400d7abc "syntax error") at parser.y:628 #7 0x400c54f8 in augl_parse_file (aug=0x1ef1878, name=<value optimized out>, term=0xbee50a64) at parser.y:362 #8 0x400c153a in load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at syntax.c:1951 #9 0x400bbf0a in __aug_load_module_file (aug=0x1ef1878, filename=0xbee50ddb "fail_let_no_exp.aug") at augeas.c:1447 #10 0x00008b04 in main (argc=<value optimized out>, argv=0xbee50c84) at augparse.c:131

14 years, 7 months

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