== Progress ==
* Out of office 1 day
* Buildbot monitoring
- Moved the buildbots to pull from github
* Trying to setup a build environment on ex40-01
- Gave up on the tcwg-sq-01/2 boards because they seemed too unstable
* Still no access to Morello docs
* Playing with lldb python scripting
- Got a script that intercepts all calls to
VectorType::getNumElements that don't come from a getElementCount
(since that likely means that they won't be preserving the 'scalable'
property)
- This should help figure out problems spotted by the fuzzer
- Likely needs a bit more refining
== Plan ==
* More of the same
* Out of office on Friday (1 November)
== Progress ==
* GCC:
- -mpure-code on v6m: no feedback yet
* FDPIC/GDB
- problems with the board I used, it hangs shortly after or during
boot. None of the workaround/fixes suggested to me worked. Having an
stm32 qemu config would help.
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
- sent 2 small qemu patches (fix vmrs support for m-profile, and add cortex-m7)
- confirmed that gcc LTO profiled bootstrap works on arm with recent
trunk, although it takes ages. Will need to try on a more powerful
board
== Next ==
* Holidays next week, back Nov 4th
* FDPIC: resume work on GDB: check the various qemu forks with stm32
board support.
Add FDPIC configuration in the GCC trunk validation.
* GCC: pure-code/v6m, handle feedback
* Binutils: support non-contiguous memory regions in linker
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ lots of wrangling of patches and pulls since I'm away
next week and it's also going to be softfreeze
+ preparation for KVM Forum next week
thanks
-- PMM
Progress:
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Updates for user-only.
Merge bug fixes from eugeni.stepanov(a)gmail.com.
[VIRT-349 # QEMU SVE2 Supprt ]
Convert neon pmul helpers to a form that will be usable for sve2.
[VIRT-327 # Richard's upstream QEMU work ]
Pull for tcg-next.
Review plugins v5.
Update for capstone submodule.
Started reviewing multi-phase reset v5.
[Kernel]
Hacked up a patch for ARMv8.5-RNG.
r~
# Progress #
o Ramp up
* Credentials, machine access and LDAP updates done.
o Qualcomm Landing Team sunsetting
* Returned Qualcomm's Laptop.
o Upstream GDB
* Ramping up on reviews.
* Gathering data on the current state of GDB on ARM.
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Came up with a little hack/proof-of-concept to get this fixed.
Though ugly, it seems fixing this in the front-end may make more sense,
as the information i need (source line) is easily accessible in there.
- Discussion ongoing with gcc@. GDB clearly needs the compiler to
provide more information.
* Created JIRA cards for all known pending ARM tasks for GDB, based
on Alan's and Joey's input. TODO-ed all of them for the time being.
# Plan #
o GDB:
* GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop
- Continue pursuing a fix.
* Prioritize GDB JIRA cards and start work on them.
[Morello]
- Got static linking support to the point that I can successfully link
with LLD the coremark, dhrystone and EEMBC from the arran-toolchain.
Not got any outstanding failures to investigate.
- Altered LLD so a linker script is no longer necessary for newlib.
- Started the process of rebasing and adding tests for all the
fixes/hacks I needed to make to the linker work.
- Aligned the base and limit of capabilities according to the incoming
CHERI concentrate scheme. Interesting question of what should a linker
do when alignment requirements on the base and limit cross section
boundaries, and what are the responsibilities for an object producer
when creating a section when the length of the capability is known at
compile time.
Planned absences:
Holiday Thursday, Friday (24th, 25th October)
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ finishing off the ptimer API transition work
+ review of rth's "speed up calculation of tbflags" patchset
+ put together and sent an arm pullreq
* VIRT-350 [Update Arm KVM support in QEMU]
+ the patchset for hotpluggable RAM support is now upstream
thanks
-- PMM
== Progress ==
* GCC:
- Work on -mpure-code on v6m. Patches sent for upstream review.
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC: resume work on GDB
* GCC: pure-code/v6m
* Binutils: support non-contiguous memory regions in linker
== Progress ==
* clang-tidy workshop (and associated prep)
- I think this went really well, we got good feedback from some of
the participants
* Trying to setup a build environment on tcwg-sq-02.tcwglab
- Mostly so I can deploy the SVE fuzzer there, but maybe for other things too
- All the compilers that I've tried so far are ICE-ing at some point
or another while building llvm
- Still looking into it but I'm starting to suspect there's
something fishy about this board
* Still no access to Morello docs
* Read a bit more about LLDB
* Finished annual review
== Plan ==
* Maybe THIS time I'll get access to the Morello docs next week
* If not, more SVE fuzzer
* One day off
o LLVM:
* Buildbots babysitting:
- Various breakage on the bots and in the kernel build
* Machine Outliner:
- preparing upstream submission
o Misc
* Various meetings and discussions.
== Progress ==
* GCC:
- Work on -mpure-code on v6m
* GCC upstream validation:
- reported several issues
* misc:
- infra fixes / troubleshooting / reviews
- watched a couple of GNU Cauldron presentations
== Next ==
* FDPIC: resume work on GDB
* GCC: pure-code/v6m
* Binutils: support non-contiguous memory regions in linker
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Still need to think of more test cases...
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Posted v5 of the system-only patch set,
with testing help from Alex.
[VIRT-327 # Richard's upstream QEMU work ]
Catching up on patch review
- arm semihosting
- tcg profiler
- ptimer transactions
- s390 mvcl interrupt
- started on v2 of dave martin's bti kernel patch set.
Posted v6 of my arm hflags patch set.
r~
== Progress ==
* Support Morello fat pointers in LLDB [LLVM-597]
- Read an intro to Cheri (research project that Morello is based on)
- Read more LLDB docs
* Started writing annual review
* Setup VM for a clang-tidy workshop that I'm co-organizing as part of
the Stockholm LLVM socials
== Plan ==
* Hopefully will get access to Morello docs next week so I can start actual work
* Rebase and play more with the SVE IR fuzzer [LLVM-586]
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Lots of work with Alex trying to produce a reduced test case.
We are now unit testing entry and exit from EL0 (EL2&0),
EL1 and EL0-in-EL1 (EL1&0).
Next would be to test the various memory access faults.
[VIRT-327 # Richard's upstream QEMU work ]
Patch review for SVE in KVM, S390 interrupt handling during MVCL.
r~
Short week (2 days off)
== Progress ==
* GCC:
- looked at what's needed to enable -mexecute-only on v6m
* GCC upstream validation:
- reported a couple of issues.
* misc:
- infra fixes / troubleshooting / reviews
- catching up after Connect (internal debrief, ...)
- started looking at GNU Cauldron presentations
== Next ==
* FDPIC: resume work on GDB
* GCC: execute-only/v6m
* Binutils: support non-contiguous memory regions in linker
Slightly overlong this time as it covers pre&post connect weeks.
QEMU Tooling ([VIRT-252])
=========================
[VIRT-252] https://projects.linaro.org/browse/VIRT-252
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
QEMU plugin support ([VIRT-280])
- sporadic work on the [v5 branch]
- posted {PATCH v6 0/6} semihosting cleanups (plus minor tests/tcg
tweak) Message-Id: <20190913151845.12582-1-alex.bennee(a)linaro.org>
- now merged - delta down a little ;-)
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[v5 branch] https://github.com/stsquad/qemu/tree/plugins/plugins-v5
GSoC Mentoring Afermath ([VIRT-348])
- more work preparing [subset for final list review]
- stats, CONFIG_PROFILER and perf integration
- dropped coverset and dot diagram as a bit too rough
- however should form a good basis going forward
[VIRT-348] https://projects.linaro.org/browse/VIRT-384
[subset for final list review]
https://github.com/stsquad/qemu/tree/tcg/tbstats-and-perf
ARMv8.1 VHE Extensions ([VIRT-263])
===================================
- worked with rth to get a minimal testcase
- very messy [wip branch]
[VIRT-263] https://projects.linaro.org/browse/VIRT-263
[wip branch] https://github.com/rth7680/qemu/tree/test-vhe
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v3 00/33} testing/next (docker,tcg, alpha ;-)
Message-Id: <20190924210106.27117-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH} configure: deprecate 32 bit build hosts
Message-Id: <20190925233013.6449-1-alex.bennee(a)linaro.org> mostly to
stimulate discussion of our modest proposal
- posted {PULL 00/28} testing updates (docker,podman,tcg,alpha)
Message-Id: <20190926183553.13895-1-alex.bennee(a)linaro.org>
- posted {PATCH} accel/kvm: ensure ret always set Message-Id:
<20191002102212.6100-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Other Activities
================
- More Connect travel administrava (airport transfer booked now)
- Connect itself
- many interesting talks
- discussions with bemi w.r.t migration and command line opts
- discussions with rth w.r.t 64/32, VHE and PR process
- discussions with FutureWei w.r.t scaling QEMU emulation
- KVM Forum administrava
Completed Reviews [2/2]
=======================
{PATCH} configure: Remove s390 (31-bit mode) from the list of supported CPUs
Message-Id: <20190928190334.6897-1-thuth(a)redhat.com>
{PATCH v2} s390x/tcg: MVCL: Exit to main loop if requested
Message-Id: <20191002082636.7739-1-david(a)redhat.com>
Absences
========
- KVM Forum Oct 29th-Nov 1st
Current Review Queue
====================
* {PATCH v2 00/15} target/arm: Implement semihosting v2.0
Message-Id: <20190916141544.17540-1-peter.maydell(a)linaro.org>
Added: <2019-10-03 Thu>
* {PATCH 00/19} hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
Message-Id: <20190926173428.10713-1-f4bug(a)amsat.org>
Added: <2019-09-27 Fri>
* {PATCH RFC} docker: automatic dependencies for dockerfiles
Message-Id: <20190920001823.23279-1-jsnow(a)redhat.com>
Added: <2019-09-24 Tue>
* {PATCH v4 0/9} target/arm/kvm: enable SVE in guests
Message-Id: <20190924113105.19076-1-drjones(a)redhat.com>
Added: <2019-09-24 Tue>
--
Alex Bennée
On buildbot duty
- Several buildbot failures to investigate along with one linux kernel
regression
- Didn't manage to get the libcxx buildbot failures resolved on time.
I think the community are still trying to fix it (Script needs to be
Python2/Python3
Started work on LLD support for Morello
- Getting familiar with the toolchain
- First target is sufficient support to statically link the Howdy
"hello world" equivalent.
- Made the first couple of local patches to implement the easiest set
of static relocations.
Some upstream LLD patch review.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated the cause of a hang when using single-threaded TCG
+ sent RFC patchset proposing a rework of the ptimer API/implementation
which will fix LP:1777777. Unfortunately we'll need to update all
the devices using ptimers. I started in on that process of conversion,
which turns out to be a little more awkward than I had expected;
I ran into at least one corner case I hadn't thought about.
thanks
-- PMM
== Progress ==
* Out of office on Monday
* Catching up after Connect
* Minor buildbot fix
* IR SVE Reviews [LLVM-545]
- Another round on the size queries patch
* SVE IR fuzzer [LLVM-586]
- Waiting for the size queries patch to get merged so I can give it a spin
* Support Arran fat pointers in LLDB [LLVM-597]
- Built lldb
- Looked a bit through the docs
== Plan ==
* Play more with lldb, read more docs
* A bit of globalisel maintenance
o LLVM:
* Buildbots babysitting:
- Troubleshot ARMv8 selfhosted bots issue
* Machine Outliner:
- Experiment outlining with -mexecute-only
- Tried to find a testcase which exhibits issues with unwinding
without much success.
o Misc
* Various meetings and discussions.
