- linaro-toolchain - lists.linaro.org

by Yvan Roux

o 4 days week. o LLVM * Machine Outliner on ARM prototype: - Rebased on upstream Machine Outliner developments - Still working on LLVM bootstrap failures in ARM mode o Misc * Various meetings and discussions.

6 years, 10 months

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[ACTIVITY] week ending 9 Dec 2018

by Richard Henderson

[VIRT-246 # ARMv8.1-LOR Limited Ordering Regions ] Posted v3. [VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ] Implemented. Posted v1. I can sort of guarantee that it doesn't work in system mode yet, cause I spotted a bug by eye yesterday. In the meantime, Peter via Will Deacon added me to the cc list for the in development kernel patches. I'll review v5 shortly. r~

6 years, 10 months

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[ACTIVITY] week ending Dec. 9 2018

by Alex Bennée

Upstream Work ([VIRT-109]) ========================== - reviewed {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org> - looked at common part of {Qemu-devel} {PATCH 2 00/39} Windbg supporting Message-Id: <154401431697.8440.845616703562380651.stgit(a)Misha-PC.lan02.inno> - finished review of {PATCH v6 00/13} hardfloat Message-Id: <20181124235553.17371-1-cota(a)braap.org> - 2-3x speed-ups for FPU heavy workloads! - finished prototype of [enabling tcg system tests] - includes some more userspace tests as well - just missed posting RFC, will post next week [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [enabling tcg system tests] https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v1 Other Tasks =========== - debugged compiler failures on SynQuacer - turned out it was dodgy RAM *slot layout* - system now stable again - did some bug triage/tagging in QEMU bug database - update JIRA tickets as per QEMU initiative thread Message-Id: <87wop4gezg.fsf(a)linaro.org> :todo Completed Reviews [3/3] ======================= {PATCH v3 00/16} tcg: Assorted cleanups Message-Id: <20181130215221.20554-1-richard.henderson(a)linaro.org> - CLOSING NOTE [2018-12-03 Mon 10:46] Easier review with the re-org of removal and clean-up patches {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org> - CLOSING NOTE [2018-12-03 Mon 10:47] Got part way through, subset reposted and reviewed. Some questions remain on the efficiency of ool softmmu w.r.t various micro-architectures. {PATCH v6 00/13} hardfloat Message-Id: <20181124235553.17371-1-cota(a)braap.org> - CLOSING NOTE [2018-12-05 Wed 12:48] Looking good. I've proposed myself as another maintainer for FPU emulation and will handle the pull request once the tree opens. Absences ======== - Christmas Holidays - Connect BKK19 (1-5th April 2019) Current Review Queue ==================== * {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org> * {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com> * {PATCH for-4.0 0/5} tcg/i386: Improve guest_base handling Message-Id: <20181203160840.15115-1-richard.henderson(a)linaro.org> * {Qemu-devel} {PATCH for-4.0 00/71} qtest: qgraph driver framework Message-Id: <1543851204-41186-1-git-send-email-pbonzini(a)redhat.com> * {Qemu-arm} {PATCH v7 00/16} gdbstub: support for the multiprocess extension Message-Id: <20181123091729.29921-1-luc.michel(a)greensocs.com> * {PATCH 0/7} Acceptance Tests: basic architecture support Message-Id: <20181004151429.7232-1-crosa(a)redhat.com> -- Alex Bennée

6 years, 10 months

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[ACTIVITY] 3 - 7 December 2018

by Peter Smith

[LLVM-499] LLD support for linking the linux kernel - [LLVM-504] Support for linker script symbol assignment to an alias. -- Diagnosed problem and made reproducer on PR. -- Reviewed the upstream patch. - [LLVM-503] Support for discarding .dynamic, .dynstr and .dynsym -- Reviewed upstream patch and proposed testcase that is representative of the kernel use case. Some revisiting of scripts and advice on how to cross compile clang libraries. Looks like I have some updates to do to the documentation for some configurations I haven't tried before. - 2 days at ARM internal Codegen conference. Really good event, standard of work was very high, left enthused. Planned absences: Christmas Holiday from 17th December to 4th January

6 years, 10 months

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[ACTIVITY] 3-7 December 2018

by Christophe Lyon

== Progress == * FDPIC - GCC: no feedback yet on v4 patches - GDB: did not decide yet how/if to commonalize with frv code. Asked for advise on the gdb list. * GCC upstream validation: - reported a few regressions, helped testing some patches - dealing with some random results, still - trying qemu-3.1.0-rc3, memory consumption problems with aarch64-linux. LSF reports (cgroup-based) do not seem consistent with time --verbose. * GCC: - rebased ubsan / bare-metal patches. Trying to build an LLVM toolchain to see how to properly apply my patches * misc (conf-calls, meetings, emails, ....) - reviewing/submitted infra script patches - ran Spec2006 on aarch32 using gcc-8.2 sysroot, results match the previous ones, so the improvements are only imputable to the compiler. - dealing with nasty ST-internal infrastructure problems - trying to look at noinit/persistent attributes provided by other toolchains, need a windows machine :( == Next == FDPIC: - GCC: handle feedback on v4 patches - GDB: update patches - uclibc-ng: look at how to test fdpic mode with openadk Benchmarks: - collect results Validation: - isolate if/why qemu-3.1.0-rc3 consumes more memory than 2.11 for aarch64-linux target

6 years, 10 months

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[ACTIVITY] report week ending 7 Dec

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - release work (we needed an rc4, and then an rc5 due to a late-breaking security bug) - wrote a patch which I hope will fix synchronization of system register state to KVM for a case where QEMU code wants to change the register values, which it does when QEMU is arranging to inject an exception into the guest - catching up on patch review and assembling target-arm.next ready for when the tree reopens - some simple patches fixing minor memory leaks spotted by clang LeakSanitizer - sent a patch for a race condition that meant we would sometimes ignore a guest-requested system reset or otherwise get confused by it thanks -- PMM

6 years, 10 months

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[ACTIVITY] 3 - 7 December 2018

by Diana Picus

== Progress == # [LLVM-492] [Thumb GlobalISel] Lower parameters for Thumb functions - Committed upstream # [LLVM-500] [Thumb GlobalISel] Support G_ADD, G_SUB, G_MUL - Started working on this but it became apparent that the existing tests would be easier to reuse if we had support for G_LOAD first # [LLVM-506] [Thumb GlobalISel] Support G_LOAD and G_STORE - Investigated whether we could get TableGen to select G_LOADs and G_STOREs by porting ComplexPattern - Unfortunately that is not enough, and even AArch64 has hand-written code for it in the instruction selector - Will handle it the ugly way next week == Plan == # LLVM-506, LLVM-500

6 years, 10 months

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Aarch64 gcc does not optimize function when applied as function attribute

by Roger Cuypers

Greetings, I’m trying to have the Aarch64 gcc optimize a single function using the O3 optimization in this manner: void __attribute__ ((optimize ("-O3", "-ftree-vectorize" ))) However, when examining the assembler code, there is no trace of any optimization beyond the project default. The only way to successfully enforce the optimization is using -O3 in the gcc command line. Then the compiler produces ARM neon instructions. Do you know any issues regarding function level optimizations and the Aarch64 gcc? Regards

6 years, 10 months

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[ACTIVITY] week ending 2 Dec 2018

by Richard Henderson

[Upstream] Posted a patch set aimed at register allocation vs function calls. It does reduce code size by a percent or two. Emilio did some benchmarking and found that it does help a bit, but does not completely eliminate the effect of the call+ret overhead on the most modern of x86 implementations. Reviewed v2 of tcg/riscv. Still a lot of work to be done, I think. Cleanup of all tcg backends vs re-translation, which is no longer a thing. Cleanup of tcg/i386 vs scratch registers. [Other] Updated the mustang to ubuntu 18.10. I was seeing some weirdness that I'm hoping I can blame on the bionic 4.15 kernel and will be gone with the cosmic 4.18 kernel. Fingers crossed... r~

6 years, 10 months

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[ACTIVITY] Week 48

by Yvan Roux

o 4 days week. o LLVM * 7.0.1-rc2: - Miscompare on AArch64: No luck with Sanitizers enabled, still digging. * Machine Outliner on ARM prototype: - Fixed Pic code issue. - llvm bootstrap in thumb mode gives 4% code size reduction. - Investigating new issues o Misc * Various meetings and discussions.

6 years, 10 months

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[ACTIVITY] Weekly report for weeks 47 & 48

by Thomas Preudhomme

=== Work done during the past 2 weeks === * GNU-296 (Fix stack protector on ARM): committed! * LLVM-432 (Support arithmetic on FileCheck regex variable): + finished reworking parsing code to be separate from evaluation and support more complex expression + fix compile errors and bugs found when running tests added to check feature * Write patch to diagnose error when compiling Armv8-M Baseline CMSE code with -mfpu -> as unintended consequence, needs rewrite * Wrote and committed patch to improve comments for some data structure in ld * Misc: + various meeting about my departure from Arm & Linaro === Plan for week 49 === LLVM-432 (Support arithmetic on FileCheck regex variable): + extend testcase coverage (add tests for latest syntax change and add more negative testing) + clean up the code + improve documentation * Try to reproduce perf issue mentioned in week #30's weekly report on latest perf * Line management: + continue progress on rotations

6 years, 10 months

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[ACTIVITY] 26-30 November 2018

by Christophe Lyon

== Progress == * FDPIC - GCC: no feedback yet on v4 patches - GDB: started looking at the patches, some parts are very similar to FRV, maybe worth commonalization. * GCC upstream validation: - reported a few regressions, helped testing some patches - dealing with some random results, still - trying qemu-3.1.0-rc1, memory consumption problems with aarch64-linux. Could not properly test cortex-m0 support yet, because building gcc --with-cpu=cortex-m0 currently fails. * GCC: - bug report on aarch64 about misaligned accesses. I do not have access to LHG gerrit, Maxim will look at isolating the problem. - rebased ubsan / bare-metal patches. Really need to look at how to merge them into LLVM * misc (conf-calls, meetings, emails, ....) - reviewing infra script patches - ran Spec2006 on aarch64 using gcc-8.2 sysroot, results match the previous ones, so the improvements are only imputable to the compiler. Started the same experiment on aarch32 - some Jira/goals discussions - dealing with nasty ST-internal infrastructure problems == Next == FDPIC: - GCC: handle feedback on v4 patches - GDB: update patches - uclibc-ng: look at how to test fdpic mode with openadk Benchmarks: - collect results Validation: - isolate why qemu-3.1.0-rc1 consumes much more memory for aarch64-linux target

6 years, 10 months

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[ACTIVITY] report week ending 30 Nov

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - release work (it is looking like we'll need an rc4 next week) - worked out some patches which hopefully will fix running QEMU on OSX Mojave (testing still required) - code review - sent a cleanup patchset that removes the load_image() function (which is not possible to use safely and which we marked as deprecated way back in 2008!) * VIRT-268 [QEMU support for dual-core Cortex-M Musca board] - implemented test case which demonstrates that we incorrectly share translated code between heterogenous CPUs and behave wrongly as a result (using the existing xlnx-zcu102 board) thanks -- PMM

6 years, 10 months

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[ACTIVITY] week ending 30th November 2018

by Peter Smith

[LLVM-493] LLD link failure on KASLR for AArch64 Linux kernel The linux kernel can build in an ASLR mode that is currently causing LLD some problems. There are a few oddities in the kernel that aren't quite right but there are some problems in LLD that need resolving as well. has been a couple of interesting days trying to work out why some strange options have been used. [LLVM-484] LLD combination of dynamic relocs into a single section Committed upstream [LLVM-486] Error if user code defines _GLOBAL_OFFSET_TABLE_ Committed upstream [LLVM-489] Measure (cross) linking of performance of LLD on Chrome Performance of linking AArch64 matches X86, roughly twice as fast as ld.gold and five times faster than ld.bfd. [TCWG-1492] Investigated why git-clone and git-fetch might hang/deadlock. Back up might be to put a timeout/retry. [Other] Submitted LLVM team goals for the TCWG team Wrote up how TCWG use Jenkins and CI, now in Confluence. Planned Absences: ARM internal Compiler conference 4th/5th December Christmas holiday 17th December - 4th January

6 years, 10 months

1
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[ACTIVITY] week ending Dec. 2 2018

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - reviewed Emilio's {RFC 00/48} Plugin support Message-Id: <20181025172057.20414-1-cota(a)braap.org> - looks like a good basis for going forward if we can work out the kinks - port my example tools to his framework :todo [VIRT-280] https://projects.linaro.org/browse/VIRT-280 Upstream Work ([VIRT-109]) ========================== - did a quick pass at [enabling system tests in check-tcg] - started reviewing {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org> [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [enabling system tests in check-tcg] https://github.com/stsquad/qemu/tree/tests/enable-system-tests Testing and CI ============== [VIRT-2] https://projects.linaro.org/browse/VIRT-2 KVM CI Loop ([VIRT-2]) - The [LKFT team] are working with gregkh to ensure -stable is tested for KVM regressions - wrote up the State of testing for KVM Message-Id: <874lc14194.fsf(a)linaro.org> - look at example regression to see what would have caught the failure :todo - look at kselftest and understand it's place :todo [VIRT-2] https://projects.linaro.org/browse/VIRT-2 [LKFT team] https://lkft.linaro.org/ Other Tasks =========== - need to concluded actions from The QEMU initiative thread Message-Id: <87wop4gezg.fsf(a)linaro.org> :todo Completed Reviews [2/2] ======================= {RFC 00/48} Plugin support Message-Id: <20181025172057.20414-1-cota(a)braap.org> - CLOSING NOTE [2018-11-28 Wed 14:13] Hashed out a number of things. Emilio will look at a single-pass option and it makes things easier or not. It was also suggested we could move instruction fetch to helpers outside of the individual front-ends to keep the plugin call points in the core translator and avoid having to tweak each front-end for support. A number of pre-requisites were discussed including some de-macrofication work to make the code easier to follow and instrument. {PATCH 0/4} xxhash patches for 4.0 Message-Id: <20181123230206.12629-1-cota(a)braap.org> - CLOSING NOTE [2018-11-28 Wed 15:09] Clean-up to xxhash to match original and handle expanded hashes Absences ======== - Christmas Holidays - Connect BKK19 (1-5th April 2019) Current Review Queue ==================== * {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org> * {PATCH v6 00/13} hardfloat Message-Id: <20181124235553.17371-1-cota(a)braap.org> * {Qemu-arm} {PATCH v7 00/16} gdbstub: support for the multiprocess extension Message-Id: <20181123091729.29921-1-luc.michel(a)greensocs.com> * {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com> * {PATCH 0/7} Acceptance Tests: basic architecture support Message-Id: <20181004151429.7232-1-crosa(a)redhat.com> * {PATCH v7 00/19} Fixing record/replay and adding reverse debugging Message-Id: <20181010133333.24538.53169.stgit@pasha-VirtualBox> -- Alex Bennée

6 years, 10 months

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[ACTIVITY] 26 - 30 November 2018

by Prathamesh Kulkarni

== This Week == * GCC SVE ACLE (8/10) - Implementing svlsl intrinsics. * Validation (1/10) - TCWG-1494: Move email logic from tcwg_kernel.yaml to tcwg_kernel-bisect.sh * Misc (1/10) - Meetings == Next Week == - Address Richard's comments on svlsl patch - TCWG-1494 - Experiment with hcqc - Investigate milc regression in gcc-8

6 years, 10 months

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[ANNOUNCE] Arm Binary A-profile Toolchain Release GCC 8.2-2018.11

by Przemyslaw Wirkus

The Arm GNU Toolchain for the A-profile Architecture ===================================================== The Arm GNU Toolchain for the A-profile Architecture 8.2-2018.11 Release is now available. Arm is pleased to announce the first Arm-built release of the pre-built GNU cross-toolchain for the A-profile cores: GCC 8.2-2018.11. This is the same toolchain that was previously built and distributed by Linaro. For the official announcement, see: https://community.arm.com/tools/b/blog/posts/pre-built-gnu8-cross-toolchain… For more information about the GNU Arm toolchain and to download the release packages, see the Arm Developer website at: https://developer.arm.com/open-source/gnu-toolchain/gnu-a For an explanation of FSF GCC 8 series changes see: https://gcc.gnu.org/gcc-8/changes.html For help in porting to GCC 8 see the following explanation: https://gcc.gnu.org/gcc-8/porting_to.html Download the release packages from: (sources) https://developer.arm.com/open-source/gnu-toolchain/gnu-a/downloads (binaries) https://developer.arm.com/open-source/gnu-toolchain/gnu-a/downloads Previous snapshots and release-candidates for GCC 7 and earlier are at: (sources) https://releases.linaro.org/components/toolchain/gcc-linaro/ (binaries) http://snapshots.linaro.org/components/toolchain/binaries/ Previous releases for GCC 7 and earlier are at: http://releases.linaro.org/components/toolchain/binaries/ A description of the Arm and AArch64 target triples can be found at: https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl… Host Requirements ================== * Ubuntu 14.04 LTS x86_64 or later or RHEL 6.9 x86_64: * x86_64 hosted cross compiler for AArch64 ELF bare-metal target (x86_64-aarch64-elf). * x86_64 hosted cross compiler for AArch64 ELF bare-metal, big-endian target (x86_64-aarch64_be-elf). * x86_64 hosted cross compiler for AArch64 GNU/Linux target (x86_64-aarch64-linux-gnu). * x86_64 hosted cross compiler for AArch64 GNU/Linux big-endian target (x86_64-aarch64_be-linux-gnu). * x86_64 hosted cross compiler for AArch32 bare-metal target (x86_64-arm-eabi). * x86_64 hosted cross compiler for AArch32 target with soft float (x86_64-arm-linux-gnueabi). * x86_64 hosted cross compiler for AArch32 target with hard float (x86_64-arm-linux-gnueabihf). * Windows 7 or later, for 32 and 64 bit OS: * i686-mingw32 hosted cross compiler for AArch32 bare-metal target (i686-mingw32-arm-eabi). * i686-mingw32 hosted cross compiler for AArch64 ELF bare-metal target (i686-mingw32-aarch64-elf). Package Versions ================= GCC 8.2.1 https://gcc.gnu.org/gcc-8/changes.html FSF glibc 2.28 http://lists.gnu.org/archive/html/info-gnu/2018-08/msg00000.html Newlib 3.0.0 https://sourceware.org/ml/newlib/2018/msg00019.html GNU Binutils 2.30 https://lists.gnu.org/archive/html/info-gnu/2018-01/msg00010.html FSF GDB 8.1.1 https://www.gnu.org/software/gdb/download/ANNOUNCEMENT libiconv 1.15 https://savannah.gnu.org/forum/forum.php?forum_id=8790 libexpat 2.2.5 https://github.com/libexpat/libexpat/blob/R_2_2_5/expat/Changes libgmp 4.3.2 libisl 0.15 libmpfr 3.1.6 libmpc 0.8.2 Sources provided in release source tar ball. News for GCC 8 (as of GCC 8.2-2018.11) ======================================= * Bug-fix of "Mingw32 version of GCC 8.2 for ARM Cortex-A family fails to compile with option '-mabi=ilp32'". https://bugs.linaro.org/show_bug.cgi?id=4020 * No other changes between this release and GCC 8.2-2018.08. For more details about Spectre V1 defense in GCC visit: https://lwn.net/Articles/759423/ Contact Arm ============ For any questions, please use the Arm Communities forums at: https://community.arm.com/tools/ Please report any bugs via the Linaro Bugzilla at: https://bugs.linaro.org/

6 years, 11 months

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[ACTIVITY] Week 46

by Yvan Roux

o 4 days week. o LLVM * 7.0.1-rc2: - Miscompare on AArch64 is related to host compiler, still digging. * Machine Outliner on ARM prototype: - IR Outliner experiments: Commented upstream, and reducing problematic test case. o Misc * Various meetings and discussions.

6 years, 11 months

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[ACTIVITY] week ending 25 Nov 2018

by Richard Henderson

Four day week (Happy Thanksgiving, all you Europeans) [Upstream] Posted patches making bswap during qemu_ld/st optional. The prompt was reviewing the tcg/riscv/ patch set, but I've wanted to do this for ages. This should avoid the need for reservation of scratch registers on some hosts that can ill afford it -- in particular i386 and aa32. In the process I ran into two other places that x86 used those scratch registers: stores from non-q-registers and bsd-user. I included patches for both of those (freebsd only; net/openbsd will work so long as guest_base == 0 and will abort at runtime otherwise). I still need to audit the other hosts before dropping the call-clobbering from user-only within tcg.c. r~

6 years, 11 months

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[ACTIVITY] 19-23 November 2018

by Christophe Lyon

== Progress == * FDPIC - Cortex-M uClibc-ng patch merged - GCC: no feedback yet on v4 patches * GCC upstream validation: - reported a few regressions - dealing with some random results, again - trying qemu-3.1.0-rc1, maybe some memory consumption problems, tbc * GCC: - bug report on aarch64 about misaligned accesses. I do not have access to LHG gerrit, Maxim will look at isolating the problem. - rebased ubsan / bare-metal patches. Really need to look at how to merge them into LLVM * misc (conf-calls, meetings, emails, ....) - reviewing infra script patches - ran Spec2006 using gcc-8.2 sysroot, to avoid differences caused by glibc versions. Fortran benchmarks could not run when compiled with gcc-5/gcc-6 because libgfortran changed .so version compared to gcc-8. == Next == FDPIC: - GCC: handle feedback on v4 patches - uclibc-ng: look at how to test fdpic mode with openadk Benchmarks: - collect results Validation: - check if qemu-3.1.0-rc1 is OK for my GCC validations

6 years, 11 months

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[Activity] week ending November 23rd 2018

by Peter Smith

[LLVM-486] Error id user defines _GLOBAL_OFFSET_TABLE_ (upstream review) [LLVM-484] Fix linker script dynamic relocations combination into a single output section (upstream review) [LLVM-483] cortex-a53 erratum fix interaction with TLS relaxation (upstream review) [LLVM-489] Measure (cross) linking performance of LLD for AArch64 and Arm. Looking for large projects that I can build for Arm and AArch64 - Firefox seems to have some ARM Android cross build support but it does not appear to be working too well. - Chrome can cross build to ARM and AArch64 Android. Have been able to build AArch64 so far. Notably both projects don't support building natively on AArch64, there are quite a few build dependencies for which only x86 support is available. Raised Jira tickets for recent PRs fixed 2019 Planning - Drafted objectives document for LLVM team - Drafted some Jira suggestions for TCWG

6 years, 11 months

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[ACTIVITY] week ending Nov. 25 2018

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= [VIRT-252] https://projects.linaro.org/browse/VIRT-252 QEMU plugin support ([VIRT-280]) - continued reviewing Emilio's {RFC 00/48} Plugin support Message-Id: <20181025172057.20414-1-cota(a)braap.org> - port my example tools to his framework :todo [VIRT-280] https://projects.linaro.org/browse/VIRT-280 Upstream Work ([VIRT-109]) ========================== - finished reviewing {RFC PATCH v2 00/23} KVM: arm64: Initial support for SVE guests Message-Id: <1538141967-15375-1-git-send-email-Dave.Martin(a)arm.com> [VIRT-109] https://projects.linaro.org/browse/VIRT-109 Other Tasks =========== - started The QEMU initiative thread Message-Id: <87wop4gezg.fsf(a)linaro.org> for JIRA discussion Completed Reviews [3/3] ======================= {RFC PATCH v2 00/23} KVM: arm64: Initial support for SVE guests Message-Id: <1538141967-15375-1-git-send-email-Dave.Martin(a)arm.com> - CLOSING NOTE [2018-11-22 Thu 15:36] My only major concern is if the query API is too gold plated. {RFC PATCH 0/2} docker: Add gentoo-mipsr5900el-cross image Message-Id: <20181118203312.5376-1-f4bug(a)amsat.org> {PATCH} docker: dockerfile for openSUSE Leap Message-Id: <87k1lai2vo.fsf(a)linaro.org> Absences ======== - Christmas Holidays - Connect BKK19 (1-5th April 2019) Current Review Queue ==================== * {RFC 00/48} Plugin support Message-Id: <20181025172057.20414-1-cota(a)braap.org> * {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org> * {Qemu-arm} {PATCH v5 00/16} gdbstub: support for the multiprocess extension Message-Id: <20181110081147.4027-1-luc.michel(a)greensocs.com> * {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com> * {PATCH 0/7} Acceptance Tests: basic architecture support Message-Id: <20181004151429.7232-1-crosa(a)redhat.com> * {PATCH v7 00/19} Fixing record/replay and adding reverse debugging Message-Id: <20181010133333.24538.53169.stgit@pasha-VirtualBox> -- Alex Bennée

6 years, 11 months

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[ACTIVITY] report week ending 23 Nov

by Peter Maydell

Progress: * VIRT-65 [QEMU upstream maintainership] - release work - code review - sent patch fixing Coverity issue in Xen PCI device passthrough (this was our last outstanding issue with no patch on the list!) * VIRT-268 [QEMU support for dual-core Cortex-M Musca board] - some initial investigation of what changes are going to be needed for heterogenous-cpu support in QEMU - started on a test case using the existing xnlx-zcu102 board (which has a heterogenous config that works only by accident) thanks -- PMM

6 years, 11 months

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[ACTIVITY] 19 - 23 November 2018

by Diana Picus

== Progress == # Monday off # [LLVM-479] Check current status of GlobalISel - Looked into new patterns that can be selected by TableGen and forked LLVM-481 and LLVM-482 out of that - Ran a test-suite and a selfhost with GlobalISel and had a look at the fallbacks # [LLVM-481] [ARM GlobalISel] Test BFC - Committed upstream # [LLVM-482] [ARM GlobalISel] Enable CLZ - Most of the work is done, ready to commit next week == Plan == Wrap up LLVM-482 and LLVM-479 Fork more stories out of LLVM-479

6 years, 11 months

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Linaro GCC 6.5 2018.11 source snapshot [final]

by Mark Murray

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2018.11 snapshot of Linaro GCC 6 source package. o This Linaro GCC 6 snapshot[1] is based on FSF GCC 6.5+svn265890 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot will be part of the final maintenance release, as the upstream GCC 6 branch is at the end of its maintenance lifespan. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.5-2018.11/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 6.4+svn265890 o Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in Bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed. Mark Murray Staff Software Engineer | Arm . . . . . . . . . . . . . . . . . . . . . . . . . . . p: +44 1223 405082 arm.com <http://www.arm.com> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

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