Hi, Maxim
Do we have any build for native aarch64 toolchain GCC 7.3?
I checked snapshots.linaro.org:
https://snapshots.linaro.org/components/toolchain/gcc-linaro/7.3-2018.04/
But it only has x86 versions.
Somebody pinged me from the 96boards community to ask for that. He
asked for GCC 7.3. What being used in ERP 17.12, as I checked, is GCC
6.3.
Thank you very much.
Best regards,
Guodong Xu
Progress:
[Upstream]
* Push tcg patch queue
* Posted v2 of ARMv8.2-FP16 fixes
[VIRT-243 # ARMv8.1-Atomic instructions ]
* Posted v3 of the patch set.
Passes the gcc testsuite.
[VIRT-198 # QEMU: SVE Emulation Support ]
* I now have a set of gcc testsuite failures
that are unequivocally SVE vector issues.
r~
o 2 days off
== Progress ==
o GNU releases
* Some support to MM.
* Monthly snapshots deployed.
o LLVM
* Benchmarking job still on-going
* Investigating Thumbv8 bot failures
o Misc
* Various meetings and discussions.
[Activity]
[TCWG-1384]
- Implemented missing TLS LE relocations in LLD
- Found out while testing that LLVM had the range check in locally
resoloved fixups for Thumb2 BL wrong, and was not range checking B.w
or Bcc.W at all. Patches submitted for review.
[LLD]
- Submitted extra test cases to improve code-coverage
- Arm LLD 2 stage build-bot including test suite now configured
(thanks Maxim!), will be active upstream soon.
- Started to think about how ICF could be implemented in clang
-- Should be able to make a prototype using clang libtooling
[TCWG-1236]
- Added aarch64 emulation used by Android to LLD
- Tried and failed to get Android to boot when using LLD, narrowed
down the number of modules that could be problematic but I think that
the main symptom is dlopen failing on some modules.
- Found that Google have added LLD support to the Android build system
with a very slightly tweaked version of LLD. This will successfully
boot Android. The main differences are:
-- Google's LLD is a few weeks behind trunk.
-- They have reverted a couple of patches that add undefined symbols
from Shared Objects and allow these to resolve against static
libraries. These patches are correct and I think it is just exposing
some library dependency problems in Android.
-- They are setting -zmax-page-size to 4K on AArch64, LLD defaults to 64K.
--- Android dynamic linker does use 4K page size, but Gold still
seems to use a 64K max page size and I can't see why overaligning
would cause problems.
-- A handful of modules have LLD disabled.
[Plans]
- Investigate differences in trunk and Google Android LLD to see if I
can pinpoint why trunk is failing to boot Android.
- Start to build a prototype with libtooling that records when the
address of a function/member-function/lambda is taken.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- RTH's v8.1 atomics emulation patchset
- bugfix to cmsdk UART model
- bugfix to MPUIR access check for OMAP/StrongARM emulation
- Alex's float-to-float conversion refactoring
- SMMUv3 now fully reviewed and in target-arm.next
+ tracked down a bug in our handling of "DUP" vector instruction
that turned out to be in the new x86 codegen backend that tries
to use MMX instructions and wasn't quite getting it right. Patch sent.
* VIRT-164 [improve Cortex-M emulation]
+ working on emulation of Memory Protection Controller; I think we can
do this neatly using QEMU's IOMMU emulation framework, but it needs
some improvements to the framework to make that work:
- feed memory transaction attributes to the IOMMU translate function
so it can use secure/nonsecure attribute to make decisions
- allow TCG code to handle accessing data and executing from RAM
that's on the far side of an IOMMU (currently it asserts if you
set up a system with an IOMMU in the CPU's data path)
I have some prototype patches that deal with these and use them in an MPC
model, which need debugging.
thanks
-- PMM
- Off Tuesday (May 1st)
== Progress ==
* GCC
- FDPIC
- GCC: updating patches to handle new target name: lots of
testsuite and target libs configure changes needed.
- QEMU: patches merged in master, thanks to Peter's reviews.
* GCC upstream validation:
- reported a few new failures/regressions
* Infrastructure:
- patch reviews
- stopped trying to use TK1s until they are back in Jenkins
- cleanup
- tcwg-1404: small patches to prepare use of slaves outside our VPN
* misc (conf-calls, meetings, emails, ....)
== Next ==
* very short week (only Monday)
* FDPIC:
- GCC continue cleanup
* GCC upstream validation
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2018.04
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.3+svn259627 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2018.05 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.3-2018.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.3+svn259627
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.4+svn259634 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.4+svn259634
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
* Short week - a public holiday
* Return jump function
- Writing up issues with test cases for upstream discussion based on
the ipa-cp implementation
* LLVM astar regression
- Trying to reproduce with trunk LLVM vs trunk gcc
- Clang build fails in tx1 (likely due to not enough memory ?)
- Set it up on dev-01. I see about ~2% difference. The difference
goes away when I use -fno-devirtualize-speculative. This suggests the
issue is still present. Perf results are also consistent with this.
- Reducing a self-contained test case
== Progress ==
o GNU releases
* Various support on process and infra.
o LLVM
* Benchmarking job on-going
* Buildbots baby-sitting
* Completed EuroLLVM feedback
* Created ticket: outliner support on ARM
After internal and upstream discussions.
o Misc
* Various meetings and discussions.
Progress:
[Upstream]
Patch set posted implementing some missing ARMv8.2-FP16 instructions.
I believe Alex has gone back to double check if there are any more.
[VIRT-243]
Initial patch posted for the ARMv8.1-Atomics extension.
Looking at the summary from Friday night's test run suggests there are
errors; I'll be looking at those next week.
r~
Activity:
[TCWG-1384] Add support for missing TLS local exec relocations tl LLD
Have an implementation ready to go upstream next week. In process
found that Gold and BFD disagreed on test output. Turns out that there
was a bug in BFD, reviewed Renlin Li's patch for it. Took rather more
of my time than I expected.
[TCWG-1375] Set 4 patches upstream to complete the removal of the
global subtarget
No response as yet.
Raised https://bugs.llvm.org/show_bug.cgi?id=37212 clang and gcc are
producing technically illegal ELF for debug information (references to
local symbols defined in comdat groups), both gold and bfd have
special case code to handle this case, lld does not. Leads to loss of
debug illusion for templated and inlined C++ functions.
Other
- Some research into how spec files and multilib works in gcc to see
how it could fit into clang's driver model.
- Joined the ELF ABI google group to fulfil a promise I'd made at Euro
LLVM to comment on a thread about debug information in comdat groups.
Holiday on Tuesday
Plans:
- Ping reviews.
- Push fix for TCWG-1384 upstream alongside some refactoring patches.
- Add some more tests to LLD to close some holes in the code-coverage
statistics.
- Continue looking at laundry list of small LLD changes.
- Get back to building Android.
=== Work done during this GCC week ===
* stack-protector failure on GCC ARM: need feedback from community
+ prevent CSE of stack protector's guard first by adding some extra
UNSPEC then instead by making all memory accesses involved volatile
+ write 2 monstro regex (251 & 377 characters respectively) to catch the
bug on ARM, Thumb-2 and Thumb-1
+ testing and will submit for review later today once I have all test
results
+ discuss raising a CVE
* Misc:
+ Arm meetings
+ Meeting with ST to discuss how to implement something akin to multilib
+ spec files for LLVM
+ Linary syncs
+ review of "Implement getConstraintRegister for ARM and AArch64" patch
by Mikhail Maltsev
=== Plan for weeks up to 25 ===
* Paternity leave
* Get stack-protector failure fix committed
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): finish patch
* Start looking into LLVM SPEC optimizations Linaro tickets
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ 2.12 release kicked out the door; hopefully I can do a bit more
actual development work for a bit now...
+ investigating problems with execute-in-place-from-MMIO-device
functionality : the test case (for a Xilinx board model) crashes
reliably for me. I cooked up an RFC patch and sent it, but it
includes one weird hack and I'm not sure if it's the right approach...
+ we got a Coverity Scan run through after a couple of months of not
having one, and a pile of issues have accumulated. Waded through some
of them and flagged them up with the patch submitters who added the
code that introduced them.
Notes:
* QEMU will have not one but two interns working on Cortex-M0
and micro:bit support (one from Google Summer of Code and
one from Outreachy) !
* QEMU turns 15 years old this year. To celebrate we plan to
make the next release be 3.0 (and perhaps to have birthday
cake at KVM Forum?)
thanks
-- PMM
* GCC Benchmarking
- Tried Jenkins jobs for trunk benchmarking and posted a patch to
fix -std=legacy needed for gfortran
- Going over the job definitions to add support for SPEC2017
* LLVM
- Looking at spec2006 difference compared to gcc in astar due to
speculative devirtualization not happening
- Going over the background material in Honza's blog and LLVM presentations
[QEMU Upstream]
Fix for softfloat scalbn, broken during the 2.12 reorg.
Code review for Alex's tcg/tests patchset.
Produced a script describing how to build cross-compilers.
[VIRT-198 # QEMU: SVE Emulation Support ]
Fix an tcg generic vector assert hitting SVE w/ VQ=3.
Rebase and post cleanup patch for TCGv_ptr operations.
Finished round 2 of SVE cleanup and fixes. RISU now once
again passes for VQ in [1-4] (which is the limitation of
the FoundationModel against which we are generating trace files).
I'll note that a lulesh binary that I generated for HKG18
does not work on the branch, but does under FoundationModel.
Therefore there must be remaining emulation errors.
However, it's a really complicated binary that is non-debuggable.
Adding printfs interferes with vectorization and gdb does not
yet let us print all of the relevant registers.
My thoughts from here go toward running the gcc testsuite,
and seeing what can be uncovered by those smaller examples.
r~
Progress:
Monday Tuesday at Euro LLVM, trip report at
https://collaborate.linaro.org/display/CR/20180416+EuroLLVM+2018
Found an example that shows that both gold and ld attempt to fix up
illegal "by strict interpretation of ELF" local debug references to
discarded local symbols from rejected comdat groups.
[TCWG-1375] LLVM should do relaxation per function.
- Worked out what instruction bundling is (From NaCl) and how it
relates to MCFragments.
- Posted revised patch upstream to handle relaxation and fixups, now
diagnoses attempt to change MCSubtargetInfo mid bundle.
- I have a finished a large series of patches to pass the
MCSubtargetInfo through to all the places it needs to be including
writeNops. Will post upstream review next week.
Next week:
- Post revised patches to TCWG-1375 and ping reviews.
- Work through a laundry list of small things to do in LLD.
- Get back to trying to link Android AOSP with LLD.
=== Work done during this GCC week ===
* TCWG-1379 (stack-protector failure on GCC ARM): need feedback from
community
+ reproduce on trunk and find out why it happens on ARM and not AArch64
or x86
+ find potential issue for all targets as well, though less likely
+ find discrepencies between code and documentation and wondered if code
is not overly zealous in some case
* 2 days doing Arm handover & meetings
=== Plan for next week (week 12) ===
* Progress on stack-protector failure
* Support arithmetic on FileCheck regex variable: finish patch
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent another patch related to linux-user signal frames (a wrinkle
I had thought had no effect with SVE disabled turns out to be
relevant in the no-SVE case too)
+ testing and applying patches for 2.12 rc4
+ code review:
- latest spin of the SMMUv3 emulation patches
- some last-minute fixes to our softfloat refactoring
- memory barrier handling in the 32-bit arm TCG backend was broken
+ tracked down a zephyr test failure on QEMU as the same bug in
the Zephyr timer device driver as the one I reported 6 months ago...
+ sent a patch fixing linux-user emulation of getdents syscall for
64-bit guest on 32-bit host
+ sent a patchset that removes the long-standing "only 4 serial ports"
limit in QEMU (various Arm boards really have 5 or 6)
+ some patches fixing errors in arm boards that don't properly
register all their RAM regions for migration
thanks
-- PMM
