Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent patch fixing problem where some aarch64 binaries would segfault
under linux-user (changes for SVE accidentally caused them to get
a too-small signal frame)
+ wrote an RFC kernel patch which sanitizes the ESR value reported to
userspace for faults on kernel addresses, rather than dropping it
entirely
+ wrote a patch to fix a reported QEMU compile failure for Arm
guests on MIPS hosts
+ code review:
- various bug fixes for 2.12
- another round of the patchset to implement the PMU properly
- DS1338 RTC device emulation overhaul patches
- QEMU side of changes to allow more than 123 CPUs with KVM
(mostly involving allowing split GIC redistributor regions)
- linux-user FDPIC ABI support
Hopefully next week I'll be able to get back to non-release
related work...
thanks
-- PMM
* Short week: off Mon/Tue/Wed
== Progress ==
* GCC
- FDPIC
- binutils: patch series approved, waiting for clarification on target name
- GCC: cleaning patch series, fixing lto problems
* GCC upstream validation:
* Infrastructure:
- Linux kernel + lava failing: still failing, it seems the fix
hasn't been merged yet
- TCWG-1335: GCC validation results now sent to gcc-testresults
- looked at some random problems (?) in our GCC validation
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC:
- Handle feedback on binutils and QEMU patches
- GCC continue cleanup
* GCC upstream validation
Hi Team,
Could you please let me know which version of toolchain released from Linaro starts to support LTO? Thanks
David
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
[TCWG-1375] Make sure MCSubtargetInfo is passed through to
ARMAsmBackend functions
Spent most of the week working on this and follow up patches. Have
submitted a patch for the most important functions. Nearly have one
ready for the correct Nop encoding, this is more complicated as Nops
can be used as padding.
[Plans]
In office Monday Tuesday only.
Progress [TCWG-1375]
Planned Absences:
- At ACCU conference Wednesday - Friday [Holiday]
- At Euro LLVM following Monday Tuesday
[VIRT-198 # QEMU: SVE Emulation Support ]
Cleaning up patches and fixing RISU failures.
Most of these have thankfully been errors in
last week's first pass reordering of the
sve_access_check. Typically wrt when we find
the address of a register vs the location of
the check vs assert_fp_access_checked.
[Upstream]
Examined a bug affecting aa64 guest on ppc64 host,
but only when using gcc 4.8.5 and not gcc 7.2.
Fixed; in the end a minor typo on the code,
but highly annoying to track down.
r~
o 1 day off
== Progress ==
o LLVM
* Buildbots babysitting:
- Investigate LNT failure due to virtualenv and pip versions (Now fixed).
* Working on LLVM benchmarking job
o Misc
* Various meetings and discussions.
Progress: (short week, 2 days)
* VIRT-65 [QEMU upstream maintainership]
+ email/code review/etc catchup following holiday
+ the usual run of admin work for the release process for rc2
+ investigated a problem where in 'icount' mode we weren't
firing timer interrupts in a timely manner; with assistance
from Paolo, tracked down the cause and sent a patch
(https://bugs.launchpad.net/qemu/+bug/1754038)
+ investigated a problem with v7M emulation reported by the LITE team;
this turned out to be a combination of a known limitation combined
with a badly worded warning message; sent QEMU patch which rewords
the message so it's clearer that it's telling you that you're running
into the limitation.
+ tracked down why aarch64 guest binaries run in icount mode on
a 32-bit host misbehave; I have a working but slightly ugly patch
which I'll send out next week unless somebody has a neater approach
thanks
-- PMM
Note1: working for Linaro every other week
Note2: had some important work to do on GCC this week so I'll do some LLVM
work next week as well to catch up
=== Work done during this LLVM+GCC week ===
* LLVM PR34170 (crashes with inline asm with double output operand in GPR):
upstream review
+ finish patch and submit for upstream review
=== Plan for next week (week 12) ===
* (maybe) follow-up patch for PR34170 to also support case with several
output operands
* investigate failure to build clang in shared lib mode with gcc
o 1 post-connect day off
== Progress ==
o GNU Release transition
* Supported Mark for 2018.04 RCs
o LLVM
* Catching-up on devpt (TCWG-1286, ...)
* Benchmarking job for LLVM
* Buildbots babysitting
o Misc
* Various meetings and discussions.
* HK18 debriefing
Progress:
[VIRT-198 # QEMU: SVE Emulation Support ]
Rebasing and addressing feedback from v2 posting.
- Finished first pass moving sve_access_check
after any checks for over decode.
- Still lots of cleanup to do across the 70 patches.
[Upstream]
Fixed a target/hppa bug affecting glibc 2.27.
Fixed a tcg optimization bug affecting high-part multiply.
r~
[LLVM]
- Submitted fix for PR36542, tracked down problem to LLVM not
considering the target triple of the MachineFunction when relaxing
branch instructions. [TCWG-1375].
- A lot of investigation of a difference in inline assembly between
GCC and LLVM, reviewed and approved upstream patch D44815.
- Review of upstream changes to support Short Thunks in LLD, managed
to find a problem in algorithm and provided a solution. Looks like
this could be approved soon.
- Review of BFD and Gold patches for my PR on missing support for
R_AARCH64_TLSLE_LDST family of relocations. I now need to implement
these in LLD.
[TCWG]
Some post connect note taking and writing up.
[Plans]
- Continue work on PR36542, address any review comments.
- Implement support for R_AARCH64_TLSLE_LDST family in lld.
- Get back to building Android with LLD.
Friday 30th and Monday the 1st are public holidays in UK.
The Linaro Binary Toolchain
============================
The Linaro GCC 6.4-2018.04-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources) http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04-rc1/
(binaries) http://snapshots.linaro.org/components/toolchain/binaries/6.4-2018.04-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.4-2018.04-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.1 (gdb-8.1-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-01/msg00016.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.4-2018.04-rc1)
==================================================
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.0.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10, Linaro GCC 6.4-2018.01 and Linaro GCC
6.4-2018.03 .
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.03/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ raspi3: came up with plausible fix for sd controller model that makes
Linux driver work. Unfortunately it's pure guesswork since there's
no public documentation for the hardware :-(
+ drafted a blog post describing booting Linux on the raspi3 model
(for publication once we've got the sdcard fix in master)
+ tagged 2.12.0 rc0 (first release candidate), various other release work
* VIRT-164 [improve Cortex-M emulation]
+ a little more progress with the stack-limit checking feature
thanks
-- PMM
Hello
Can you recommend Cross GCC for Windows for
armv7a-vfp-neon-oe-linux-gnueabi
-march=armv7-a, -mfloat-abi=softfp, -mfpu=neon
Qualcomm ARM Cortex A7 MDM9x07&MDM9628
The device is Quectel EC20 GSM Module
Best regards
Georgi Angelov
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ raspi3 board: tested with a Debian kernel, and fixed and sent
patches for various issues that were causing it to panic.
Unfortunately there's a more tricky issue with the sd controller
still that means it doesn't boot yet...
+ bug investigation week:
- LP:1748434: wrong logic for ICC_PMR and ICC_RPR accesses by NS code
when the GICv3 emulation has security extensions enabled. Sent patch.
- LP:1751674: segfault doing a VM memory dump on vexpress-a9. This is
a combination of user error and a longstanding bug where the GICv2
crashes if you try to read its banked-per-CPU registers from a context
that isn't a guest CPU (like the monitor or the gdbstub)
- LP:1755479: confirmed that crash when using -icount is one that has
been fixed by a patch from Pavel that was lurking in a record/replay series
+ handling all the merge requests for softfreeze
* VIRT-164 [improve Cortex-M emulation]
+ started to look at implementing the stack-limit checking feature
thanks
-- PMM
Note: working for Linaro every other week
=== Work done during this LLVM week ===
* finish slides for bswap/store merging passes presentation in hacker room
at Connect HK2018
* Continue working on fix for PR34170 / TCWG1137 (cannot select truncate in
ARMv7 backend):
-> better understanding of generation of ISD node for inline asm, finally
seeing a way forward
=== Plan for next Linaro week (week 12) ===
* Linaro connect
If time permits:
* finish fix for PR34170 / TCWG1137 (cannot select truncate in ARMv7
backend)
* investigate failure to build clang in shared lib mode with gcc
