+linaro-toolchain, hoping to get more eyes into it.
cheers,
--renato
On 25 August 2017 at 17:59, Masaki Arai <masaki.arai(a)linaro.org> wrote:
> Hi,
>
> I extended GCC 7.1(or GCC 7.2) for `hcqc'.
> I would be grateful if you could give me a comment about whether
> this extension is acceptable and whether this extension should be
> pushed upstream.
>
> The extended GCC's output using the option ` -fverbose-asm' is
> as follows:
>
> ldr w0, [x29,48] // tmp433, j(8-byte Folded Spill)
> ^^^^^^^^^^^^^^^^^^^
> This code shows that this instruction accesses a memory area
> for spill codes.
> I made the following changes to GCC 7.1(or GCC 7.2).
> The related files are under `hcqc/patch/gcc-7.1.0-add'.
>
> (1) rtl.h
>
> I added flag information to `struct mem_attrs' that means whether
> it is a spill memory area or not.
>
> +
> + /* True if the MEM is for spill. */
> + bool for_spill_p;
>
> Also, I added an access macro for this additional field.
>
> + /* For a MEM rtx, true if its MEM is for spill. */
> + #define MEM_FOR_SPILL_P(RTX) (get_mem_attrs (RTX)->for_spill_p)
> +
>
> (2) emit-rtl.c
>
> I added a code to turn on flags for spill memory area in function
> `set_mem_attrs_for_spill'.
>
> + attrs.for_spill_p = true;
>
> (3) final.c
>
> I added code to print that information in function
> `output_asm_operand_names'
> if the memory is a spill memory area,
>
> +
> + if (MEM_P (op) && MEM_FOR_SPILL_P (op))
> + {
> + HOST_WIDE_INT size = MEM_SIZE (op);
> + fprintf (asm_out_file, " (" HOST_WIDE_INT_PRINT_DEC "-byte Folded
> Spill)", size);
> + }
>
> The above changes are implemented similarly as Clang/LLVM.
> Unfortunately, it is difficult for GCC to print the above "(?-byte Folded
> Spill)"
> for memory access instructions only in the same manner as Clang/LLVM.
> The reason is that GCC executes the above `output_asm_operand_names'
> even in situations where any instruction object(insn) does not exist when
> outputting assembly code.
> For example, GCC calls `output_asm_insn' directly from the `define_insn'
> definition in the aarch64.md file without an insn object(`output_asm_insn'
> calls `output_asm_operand_names').
> This occurs in "*cb<optab><mode>1" and
> "*aarch64_fcvt<su_optab><GPF:mode><GPI:mode>2_mult".
>
> From this fact, `hcqc' extracts and accumulates memory access
> instructions from the assembly code with the comment "(?-byte Folded
> Spill)".
>
> The above extensions are commonly available on almost any architecture.
> Also, these extensions do not affect the execution of the resulting assembly
> code since additional outputs are only in comments.
>
> Best regards,
> --
> --------------------------------------
> Masaki Arai
>
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.08
snapshot of Linaro GCC 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.2+svn251138 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be part of the 2017.11 stable[2] quarterly
release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.2-2017.08/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.2+svn251138
* Backports from mainline:
- [Bugfix] [AArch32] PR target/79665: Improve Cortex-A53 shift bypass
- [Bugfix] PR lto/69866 lto1: internal compiler error: in
add_symbol_to_partition_1, at lto/lto-partition.c:158
- [AArch32] Improve Cortex-A53 FP scheduler
- [AArch64] Add rcpc extension
- [AArch64] Do not increase data alignment at -Os and with -fconserve-stack.
- [AArch64] Emit SIMD moves as mov
- [AArch64] Enable software prefetching (-fprefetch-loop-arrays) for
ThunderX 88xxx
- [AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse
- [AArch64] Fix failing lrint inline tests on bare-metal
- [AArch64] Fix ILP32 memory access
- [AArch64] Improve/correct ThunderX 1 cost model for Arith_shift
- [AArch64] Improve dup pattern
- [AArch64] Inline calls to lrint when possible
- [AArch64] Literal vector construction through vcombine is poor
- [Misc] Fold (A / (1 << B)) to (A >> B)
- [Testsuite] [AArch32] Allow arm_arch_*_ok to test several macros
- [Testsuite] [AArch32] Make gcc.target/arm/its.c more robust
- [Testsuite] [AArch32] Require arm_arch_v8a_ok for sdiv_costs_1.c
- [Testsuite] [AArch32] sdiv_costs_1.c: Disable on softfloat
- [Testsuite] [AArch32] sdiv_costs_1.c: Require arm_v8_vfp_ok
- [Testsuite] [AArch32] sdiv_costs_1.c: Use dg-add-options
- [Cleanup] [AArch64] Rearrange the processors in aarch64-cores.def
- [Cleanup] Update comment about is_leaf
- [Doc] [AArch64] Document RcPc extension
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.4+svn251111 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.4+svn251111
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
mailto:support@linaro.org
[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
* Mon - Wed off [6/10]
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Commit another three patches, about GDBserver unit tests. Rebase
patches, and prepare series v4.
* Misc, [1/10]
# Plan #
* TCWG-1162, triage the aarch64-elf GDB test result with QEMU.
* TCWG-1159, rebase my GDB target description patches, and post v4.
--
Yao Qi
== Progress ==
o Linaro GCC/Validation
* Completed 6.4 and 7.2 branch merges
* Snapshots delayed due to gerrit config upgrade issues
* Investigating upstream bugzilla PR81863
* Other patches are still pending on upstream reviews
o Misc
* Various meetings and discussions.
== Plan ==
o Complete monthly snapshot and binary releases
o PR81863, ...
== This Week ==
* type promotion (7/10)
- Refactored patch
- Resolved all functional regressions on arm, aarch64, ppc64.
* PR78809 (1/10)
* Misc (2/10)
- pinged patches for malloc propagation and PR78736
- Public holiday
== Next Week ==
- Validation and Benchmarking of type-promotion pass
- PR78809
In a recent github thread
<https://github.com/OP-TEE/optee_os/issues/1708#issuecomment-320245973> it
was suggested that I ask this list about what the exact reasons for the
lack of C++ support are, and how/if they break down by C++ feature so as to
gauge a possible investment in remedying this situation at least partially.
In other words, suppose I changed the build process to include libstdc++,
libgcc, and libgcc_eh (and/or other runtime support commonly linked with
C++ programs), what features of C++ would work/still fail? And what
implementation work would be required to implement the missing features?
On a related note, are there intrinsic properties of the secure environment
that may conflict with running C++ code, if any?
Thank you.
- Godmar
== Progress ==
o Linaro GCC/Validation
* Delivered GCC 6 and 7 2017.08 release candidates binaries
* Preparing backports for 2017.08 source snapshots
* reviewed infra patches
o Misc
* Various meetings and discussions.
== Plan ==
o Complete backports and branch merges for snapshots
o Tuesday off
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Split the patch series, and post unrelated stuff first.
Patches will be easily reviewed in this way.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Committed the first 4 patches, and leave the rest
4 patches for review.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [4/10]
Resolved the newlib issue. Get my first newlib patch merged.
Successfully run GDB testsuite with QEMU system mode. It should
be similar to running with OpenOCD.
* Upstream review. [1/10]
** Review some memory leaks fixes.
** One patch about armv8.3 pointer authentication.
Next week:
* On holiday, and back on Thu.
* TCWG-1162, triage the aarch64-elf GDB test result with QEMU.
* TCWG-1159, rebase my GDB target description patches, and post v4.
--
Yao Qi
The Linaro Binary Toolchain
============================
The Linaro GCC 6.4-2017.08-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources)
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08-rc1/
(binaries)
http://snapshots.linaro.org/components/toolchain/binaries/6.4-2017.08-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.4-2017.08-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro-local/linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.0 (gdb-8.0-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.4-2017.08-rc1)
==================================================
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.0.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06 and Linaro
GCC 6.4-2017.07 .
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
The Linaro Binary Toolchain
============================
The Linaro GCC 7.1-2017.08-rc1 Release-Candidate is now available.
*Notice*: GCC 7.1 ABI change for arm*-*-* targets, and note for
aarch64*-*-* targets
>From GCC 7.1 release notes:
On ARM targets (arm*-*-*), a bug introduced in GCC 5 that affects
conformance to the procedure call standard (AAPCS) has been fixed. The
bug affects some C++ code where class objects are passed by value to
functions and could result in incorrect or inconsistent code being
generated. This is an ABI change. If the option -Wpsabi is enabled (on
by default) the compiler will emit a diagnostic note for code that
might be affected.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
GCC 5 and GCC 6 releases will continue to be affected by the ABI bug,
since changing ABI in these releases is not practical. A warning
enabled by -Wpsabi option was added to GCC 5 and GCC 6 toolchains to
diagnose codebases that might be affected by the ABI bug.
Additionally, this same bug was present in AArch64 backend in
development versions of GCC 7. There was no releases of GCC with this
bug present in AArch64 backend, therefore the release notes does not
mention this. However, be advised that any code bases built with
development versions of GCC 7 need to be recompiled with released
version of GCC 7 to conform to ABI.
For an explanation of GCC 7 series changes please see the following
website:
https://gcc.gnu.org/gcc-7/changes.html
For help in porting to GCC 7 please see the following explanation:
https://gcc.gnu.org/gcc-7/porting_to.html
Download release-candidate packages from:
(sources)
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/
(binaries)
http://snapshots.linaro.org/components/toolchain/binaries/7.1-2017.08-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 7.1-2017.08-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/
FSF glibc 2.25 (release/2.25)
https://lists.gnu.org/archive/html/info-gnu/2017-02/msg00002.html
Newlib 2.5 (newlib-2_5_0 tag)
https://sourceware.org/ml/newlib/2016/msg01191.html
GNU Binutils 2.28 (linaro-local/linaro_binutils-2_28-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
FSF GDB 8.0 (gdb-8.0-branch)
https://sourceware.org/ml/gdb-announce/2017/msg00003.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 7 (as of Linaro GCC 7.1-2017.08-rc1)
===========================[ANNOUNCE] Linaro Binary Toolchain
Release-Candidate GCC 7.1-2017.08-rc1=======================
* The Linaro GCC 7.1-2017.07 snapshot added prefetching configuration
improvement for AArch64 targets and laid groundwork to enabling
prefetching in more cases.
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* Performance related backports from the following snapshots have been
included: Linaro GCC 7.1-2017.05, Linaro GCC 7.1-2017.06 and Linaro
GCC 7.1-2017.07.
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Patches are still not reviewed. Keep going to change x86 target
descriptions. Post two patches to clean up them first.
* TCWG-561, Handle unavailable memory during frame unwinding. [3/10]
Patches are posted.
* PR 21818, GDB crashes with executable for armv5te. [1/10]
Patch is tested, and to be posted.
* Upstream review, [2/10]
** ADI patches review, advice on how to match the output in gdb tests,
** Some disassembly regression caused by my previous patches,
** Help people to triage their GDB issues because I don't have the env
to reproduce them.
* Misc, [1/10]
# Plan #
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards.
Post my newlib patches upstream, and continue to test with
QEMU and OpenOCD respectively.
* TCWG-1159, New design of GDB/GDBserver target description
--
Yao Qi
o Back from vacation Wednesday.
== Progress ==
o Linaro GCC/Validation
* Discussed/checked needs for newlib and binutils to include in binaries
* Preparing RCs (release notes, ...)
* pinged my unreviewed upstream patches
* reviewed infra patches
o Misc
* Various meetings and discussions.
== Plan ==
o 2017.08 GCC 6 and 7 release candidates, backports, ...
== This Week ==
* malloc propagation (4/10)
- Resolved bootstrap comparison failure
- Patch passes validation with and without LTO.
- Working on handling indirect calls.
* type promotion (3/10)
- Created patche for resolving ICE with armv3/armv5t.
- Have got a hack-ish patch to address interference between type promotion and
widening_mul/bswap optimizations, but needs improvement.
* Misc (3/10)
- Meetings
- Visa interview
== Next Week ==
- Continue with malloc propagation, type promotion
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [3/10]
Looks people who can review my patches is on holiday, so I committed
7 patches and leave the rest 19 patches there. Need to think about
how to make people more confident on these patches.
* PR 21717, PR 21555, fixed. Pushed to master and 8.0 branch.
[1/10]
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [3/10]
I can run gdb regression tests with OpenOCD on HiKey. After I power
cycle the board, the first several tests can run, but the following
tests failed because the board goes to an odd state. Something wrong
in OpenOCD side.
Try GDB aarch64 bare-metal debugging with QEMU, and then find a bug
in newlib which doesn't initialize FPU, so some FPU instruction will
trigger und exception.
* TCWG-561, Handle unavailable memory during frame unwinding. [2/10]
Lear C++ move assignment and move constructor. Finish the code, and
testing the patches.
* Send my GDB target description talk abstract to Linaro SFO17.
* Misc [1/10]
# Plan #
* Mon and Tue off.
* TCWG-561, TCWG-1159.
--
Yao Qi
4 day week.
[TCWG-614] Range Extension Thunks
- Rebased due to upstream refactoring
- Pinged but no upstream review progress
[Compiler-rt]
Clang no longer always uses base PCS for all the builtins it expands
such as the _Complex helpers.
- Added tests to make sure RTABI 4.1.2 Floating Point helpers all use
softfp in Clang D35538 and llvm D35904.
- Reviewer pointed out useful script update_llc_test_checks.py that
can simplify writing of llc tests. Well worth checking out
[LLD]
Looks like lld use in Android may be becoming more likely, major
blocking feature is lack of Cortex-A53 erratum fix 843419.
- I've commented on the upstream PR https://bugs.llvm.org/show_bug.cgi?id=33463
- I've written some test cases and have started a prototype implementation
Submitted Linaro Connect presentation proposal for Functional Safety
and Development tools.
Plans:
In priority order:
- range extension thunks
- Cortex-A53 843419
- Compiler-rt
== Progress ==
* TCWG-1205 - Minor tweaks to Jenkins LLVM jobs [1/10]
- Sent a few patches to make the Jenkins jobs more friendly and/or
fix them for new changes in the upstream release script
* TCWG-1206 - Investigate timeouts on buildbots [1/10]
- Had some mysterious timeouts on some of the buildbots
- Didn't manage to reproduce, will keep an eye out in case it happens again
* TCWG-1199, 1200 - LLVM 5.0.0 for ARM and AArch64 [1/10]
- RC1 is out, there are some failures in some libunwind and
sanitizer tests; reported upstream
* TCWG-1194 - [ARM GlobalISel] Support simple, static globals [4/10]
- Committed some simple stuff and sent a patch for upstream review
* TCWG-1209 - [MIR] Print ARM constant pools [1/10]
- Printing target-specific constant pools is trivial, but testing is
a bit problematic
- All current MIR tests read in and then print out the same MIR,
which means that we'd have to add support for target-specific constant
pools in the parser as well
- This is complicated by the fact that at a first glance the parser
doesn't seem to handle any other target-specific stuff and I'm not
sure it's ok to pull ARMConstantPool into it
* Misc [2/10]
- Mailing lists, code reviews, meetings
== Plan ==
* Figure out what to do about TCWG-1209
* More code reviews and global isel
# Progress #
* TCWG-1159,New design of GDB/GDBserver target description. [1/10]
Commit one patch of v3. No review comments. Usually it means I don't
review patches, so other people don't review my patches.
* PR 21555. [3/10]
Think it again, and fix it with a better approach. Patches are posted.
* PR 21717. [2/10]
Fix a bug on getting/setting FPSCR on VFPv2. I am surprised that we don't
find it before. Testing patches.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards. [1/10]
Blocked by OpenOCD bugs. Chat with OpenOCD maintainer to make sure
these bugs are opened in the right place.
* TCWG-561, [3/10]
I finish the patches, but not confident because I use copy-and-swap idiom
for the first time. Need more time to bake it, write unit tests, etc. Maybe,
still need to read "More effective C++" further.
* TCWG-1162, Test GDB+OpenOCD with AArch64 boards.
Blocked by OpenOCD bugs. Chat with OpenOCD maintainer to make sure
these bugs are opened in the right place. Matthew (who contributed OpenOCD
AArch64) pinged me on irc, but he lost connection immediately. Probably, he
contact me for the OpenOCD bugs.
* Think about presenting GDB target description work in Linaro SFO17,
may add some SVE stuff if possible, to make it more attractive.
# Plan #
* TCWG-1159,
* PR 21717, 21555,
* TCWG-561,
* Register the presentation for Linaro SFO17,
--
Yao Qi
== Progress ==
* [ARM GlobalISel] Support globals [6/10]
- This is going to be very hairy because of all the different
relocation models (PIC, ROPI etc), differences between ELF and MachO,
and differences between targets with MOVT or without it
- Started adding support for simple, statically linked globals, it
might take me a while to get all the pseudoinstructions right even for
this simple case
* Misc [4/10]
- Meetings, mailing lists, code reviews, buildbots
== Plan ==
* More GlobalISel
* More code reviews
== Progress ==
* Infrastructure/validation:
- minor fixes in the release jobs
* Benchmarking:
- fixes on reporting scripts
- using more iterations didn't produce more stable results (still noise)
- trying to reboot the boards before running the benchs
* GCC upstream validation:
- further reduced noise ("random" pass/failures)
- sent a patch to fix an aarch64 problem with -mstrict-align
* misc (conf-calls, meetings, emails, ....)
== Next ==
Holidays until August 21st
[TCWG-614] Range Thunks
Finally managed to get some review on the entirety of the Range Thunks
patches. Have reorganised the patches and wrote some documentation to
make it easier to review. Responded to all review comments so far.
Compiler-rt
A long tail of frustration.
Managed to get a hello world semi-hosting test case running on the
latest QEMU running newlib-nano. This was much more difficult than I
expected due to:
- The semihosting startup code of newlib does a semi-hosting call for
top of memory regardless of whether the heap and stack location have
been identified in a linker-script.
- The QEMU semihosting response to top of memory is not helpful
leaving the stack location in an invalid memory location (latest QEMU
requires emulation of a board and not a generic machine)
- QEMU doesn't data-abort when writing to a stack location, so my
return address is helpfully read back as 0x0
Worked around by providing a large enough memory size to QEMU that the
semihosting call for top of memory returns 0, allowing newlib to use
the values in the linker script. Will probably need to spend some time
to write my own startup code that just uses the linker script for the
heap and stack.
Building compiler-rt for v6-m and v7-m has been much more difficult
than I expected as well. I've managed to find a configuration that
works, although it relies on some experimental work in moving
compiler-rt to the runtimes directory.
Plans for next week:
- LLD is top priority
- Get testing for compiler-rt working via qemu on v7-m, the recipe
that works for build does not support testing. I've got to either
extract the cmake magic flags or find a way to plumb through the runes
that make the tests work to the recipe I've got.
- On holiday Thursday, Friday and the following Monday
* Short week (Friday off)
== Progress ==
* Infrastructure/validation:
* Benchmarking:
- production scripts are now up-to-date, still observing noise on
some benchmarks
- fixed a couple of small issues with the scripts
* GCC upstream validation:
- working on further reducing noise ("random" pass/failures)
- reported/fixed a few regressions
- committed testsuite patch with de-require-stack-check
- looking at a problem with unaligned accesses
* misc (conf-calls, meetings, emails, ....)
== This Week ==
* PR78736 (2/10)
- Submitted patch upstream
* type-promotion (3/10)
- Scheduling path-splitting before type-promotion fixes the regression
with path-split-1.c
- Created patch to fix issues with type-promotion interfering with
widening_mul and bswap
optimizations
* malloc-propagation (4/10)
- Updated patch, passes bootstrap+test on x86_64
- Working through ICE's with lto-bootstrap
* Misc (1/10)
- Meetings
== Progress ==
* TCWG-1187 - [ARM GlobalISel] Support G_FCMP for s64 [5/10]
- Committed upstream
- Also refactored the existing code a bit
* TCWG-1190 - [ARM GlobalISel] Support G_BR and G_BRCOND [2/10]
- Committed upstream
* TCWG-1191 - Test zorg patch [1/10]
- Test a patch for running the test-suite with the CMake producer on
the buildbots
* Misc [3/10]
- Meetings, mailing lists, code reviews, buildbots
== Plan ==
* More GlobalISel
* More code reviews
