# Progress #
* TCWG-178, confirm that longjmp.exp fails disappear on glibc with
--enable-systemtap. [1/10]
* GDB 8.0 release. TCWG-1050, [3/10]
** Fix a regression that command "tty" is missing.
** Review Thomas's patch handling non-FPU tests. Suggested to merge
it to 8.0 branch.
* Post my patches on gdb and objdump disassembler unification. [1/10]
All binutils patches are approved. I'll push them in if no comments
gdb side.
* GDB target description changes. [4/10]
People like my RFC, but Pedro requested the design and plan in
GDBserver, because he has concern that my patch seres put GDB into
an intermediate state. It will last a long time if we can't
provide the design in GDBserver.
* Upstream patches review. [1/10]
Review 10~ patches about dwarf pieces.
* Take care of Linux kernel awareness upstreams.
Sync with Omair, and ask to ping to IBM to update their patches.
# Plan #
* Continue the GDB target description change discussions.
* Push my approved patches.
--
Yao Qi
== Progress ==
o Linaro GCC/Validation (7/10)
* Completed and deployed release automation job
* Completed and deployed GCC 5, 6 and 7 2017.05 source snapshots
* Completed stable release binaries (5.4 and 6.3 2017.05),
ready for publication.
* Preparing 7.1 2017.05 release candidate
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Finish 7.1 rc
o Upstream monitoring reporting
o Off Thursday and Friday
== Progress ==
* [ARM GlobalISel] TableGen ISel for ADD/SUB [TCWG-1119] [1/10]
- Committed upstream
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [3/10]
- Found that we can't self-host anymore with GlobalISel, we get a
segfault in one of the tests
- After investigations it turned out to be because we run out of stack space
- Discussed upstream and did a couple more experimental runs with
various other patches / flags
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033] [3/10]
- Work in progress on supporting arrays
* Misc [3/10]
- Meetings, mailing lists, buildbots
- Investigated some timeouts that have started showing up in some of
our buildbots; will probably have to wrap up next week
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074]
== This Week ==
* TCWG-1005 (6/10)
- Reworked patch based on upstream feedback
- Working through ICE's caused with the changes.
* PR80806 (2/10)
- Submitted patch upstream
* type promotion (1/10)
- Going thru Kugan's patch and mailing list discussions.
* Misc (1/10)
- Meetings
== Next Week ==
- TCWG-1005, gcc bugs
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.05
snapshot of Linaro GCC 5, 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn247824 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be used for the first stable[2] quarterly
release in the GCC 7 series.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn247824
* Backport of [AArch32] Allow combination of aprofile and rmprofile multilibs
* Backport of [AArch32] Define TM_MULTILIB_CONFIG for ARM multilib
* Backport of [AArch32] Rename FPSCR builtins to correct names
* Backport of [AArch32] Set mode for success result of atomic compare and swap
* Backport of [AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic
* Backport of [AArch64] Improve address cost for -mcpu=generic
* Backport of [AArch64] Update alignment for -mcpu=generic
* Backport of [Testsuite] Require c99_runtime for pr78622.c
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn247789 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn247789
* Backport of [Bugfix] [AArch32] PR target/71607: Fix ICE when loading constant
* Backport of [AArch32] Add support for -mpure-code option
* Backport of [AArch32] Enable Purecode for ARMv8-M Baseline
* Backport of [AArch32] Fix arm-netbsdelf bootstrap
* Backport of [AArch32] Fix pure-code test
* Backport of [AArch32] Fix testism with pure-code tests for non
Cortex-M targets
* Backport of [AArch32] Fix type for .init_array.* and .fini_array.* sections
* Backport of [AArch64] Fix type for 1-element load
* Backport of [AArch64] Model Cortex-A53 load forwarding
o Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn247822 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.4+svn247822
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
Achievements:
Spent all week on investigating a potential problem with the Gold
--fix-cortex-a53-843419 erratum fix (The ADRP on 0xff8/0xffc boundary)
- Managed to reproduce with a smaller example, although still using LTO
- Diagnosed the cause of object with errata stubs being relocated
after the stub table has been relocated
-- Most likely to hit LTO as the object from the LTO plugin will
always be last in the task queue, but the stub table is relocated when
the object that "owns" it is relocated, this is often not the LTO
object.
-- In theory it should be reproducible without LTO and a linker script
-- Workaround for LTO is to create an Output Section just for LTO (The
stub table is always owned by the LTO object)
Plans for next week:
- See if I can reproduce Gold errata problem without LTO
- Report Gold errata problem upstream
- Get back to LLD range thunk work
- Investigate SBREL32 relocation support in LLD, upstream PR32924
- Look at fixing missing Thumb2 modified immediate fixup PR28647
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 5, 6 and 7 2017.05 source snapshots:
- Completed backports
- Troubleshot GCC 5 and 5 branch merges regressions
* Re-working release automation job
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Complete monthly snapshots and releases
o Continue release automation
Short week (1 day off)
== Progress ==
* Infrastructure:
- patch reviews
- worked around regression-detection failures caused by some tests
in tcwg-regression
- added job to check our gcc-7 toolchain when a component is updated
* Benchmarking:
- troubleshooting systems configs
- at last, first run on aarch64 triggered via jenkins
* Snaphots
- backports & reviews
* GCC:
- reported a few regressions upstream
* misc (conf-calls, meetings, emails, ....)
== Next ==
* benchmarking
== Progress ==
* Remove environment variables [TCWG-1114] [1/10]
- Committed
* [ARM GlobalISel] TableGen ISel for ADD/SUB [TCWG-1119] [5/10]
- Committed a change to the legalizer so that we widen narrow
operations (since we only have patterns for the 32-bit versions)
- Committed support for G_ANYEXT, which is introduced by the
legalizer while widening things and which we need to handle in the
rest of the pipeline
- Have a patch in upstream review fixing a TableGen bug
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [2/10]
- Ran the test-suite and self-host on AArch64 for GlobalISel -O0
- Committed a tiny fix for a test-suite application that was failing
because GlobalISel doesn't lower fabs to hardware operations, so we
had to link with -lm
* Misc [2/10]
- Buildbots (reverted stuff), meetings, mailing lists
- Helped organize another LLVM social in Stockholm; we got really
good feedback so far
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
* Probably wrap up TCWG-1074, we're really close to making the switch
# Progress #
* GDB 8.0 release. TCWG-1050, [1/10]
Nothing new. Make sure Linaro GCC 7 release can pick up GDB 8.
* SVE GDB. TCWG-1040, [6/10]
** Finish sve gdb target description doc, and send it to Alan.
The work needed in GDB side becomes more and more clear, however,
it is still unclear in GDBserver side.
** Post my patches about unit test to value/register conversion
gdbarch hooks.
** Post my RFCs to make GDB target descriptions more flexible.
* Misc, [3/10]
** Learn C++ template.
** Some patches review upstream.
# Plan #
* Upstream my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
* Back to the work on handling function pointer assignment in thumb
mode. TCWG-333.
--
Yao Qi
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* Release Automation:
- 6.3 2017.05 RC1: Done
- Preparing Linaro GCC 7 snapshot and RC
* Backport for 2017.05 source snapshots
* Reviews...
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Make 2017.05 snapshots (6 and 7)
o Continue release automation
Progress:
- Re-implemented range thunks based on recent upstream changes and
sent for review. No comments as yet.
This is likely to be an ongoing conversation with upstream that won't
take all my time up so I've been looking at some additional stuff
outside of range thunks.
- Looked at PR28647 in llvm-mc, preventing openssl from being compiled
with clang. Investigated to the point where I know what we should do
next to fix. Next steps will be implementation.
- Looked into a problem reported internally in ARM in gold's erratum
--fix-cortex-a53-843419 on a large program using LTO. The patch is not
being applied correctly leading to segfaults at run-time. This is
likely to take some time to pin down as simple attempts to reproduce
have failed. There is an upstream PR reporting a similar set of
symptoms that looks like it could be the same thing but there is no
useful information or investigation in it:
https://sourceware.org/bugzilla/show_bug.cgi?id=21062
- Looked into lld PR32924, someone asking for RWPI support in lld,
someone at least is keen to get embedded systems support into lld.
Plans:
- Continue looking into above PRs
== Progress ==
* Monday off [2/10]
* [ARM GlobalISel] Use TableGen for inst selector [TCWG-1037] [1/10]
- Committed upstream
* Remove environment variables [TCWG-1114] [1/10]
- Almost ready to send another patch for review
* Lund Linux Conference [6/10]
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
* Monday off. [2/10]
# Progress #
*GDB 8.0 release, TCWG-1050. [2/10]
** Intel btrace python api patches are pushed in, and all intel
specific stuff are removed from the python apis before release,
Phew!
** GDBserver arm-linux software single step. More issues are found,
can't catch 8.0 release.
** 8.0 release candidate is created.
* SVE, TCWG-1040, [5/10]
** All my regcache class-fy patches are committed. Unblock some
Alan's patches.
** One patch review.
** Post preparatory patches for my value/register conversion unit
test patches.
** Think about how to change GDB target descriptions for SVE, and
write them down. Turns out these problems are not specific to
SVE, they are already there but SVE make them worse that we should
fix. Ongoing.
* Upstream review, [1/10]
** Review one kernel-awareness patch.
** Review OpenRISC GDB patches.
# Plan #
* Finish the doc about GDB target description changes for SVE, and
send it to Alan.
* Upstream my patches about unit test to value/register conversion
gdbarch hooks.
* Upstream my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
--
Yao Qi
== This Week ==
* TCWG-1005 (4/10)
- Made some improvements to analysis, which increased candidates for
malloc functions in gcc source.
- Patch review from Kugan
* PR78736 (2/10)
- Submitted upstream for review
* PR80613 (2/10)
- Submitted patch but was rejected by Richard
- "Fixed" the bug by partially reverting the commit that caused it.
* Validation (1/10)
- Committed patch to tcwg-buildapp for adding python source.
* Misc (1/10)
- Meetings
== Next Week ==
- TCWG-1005, GCC bugs, validation
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.05-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources)
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05-rc1/
(binaries)
http://snapshots.linaro.org/components/toolchain/binaries/6.3-2017.05-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and Aarch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.3-2017.05-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro-local/linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.05-rc1)
==================================================
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03 and Linaro GCC
6.3-2017.04.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
# Progress #
* TCWG-1050, GDB 8.0 release. [4/10]
** Fix the new fails about the size of wchar_t on aarch64, by setting
it to 4 in default. Patch is pushed to master and 8.0 branch.
** Intel btrace python api patches are ready to commit. No idea why
he doesn't push yet.
* TCWG-1040, Review SVE patches. [4/10]
** Review some SVE GDB patches, and approved part of them. Leave the
controversial part there. Some of them are blocked by my Class-fy
regcache patches.
** Class-fy regcache. Patches are approved. Will push them in later.
Then, I'll update my unit test to value/register conversion gdbarch
hooks, and post them next week.
** GDB target description change, the preparation for adding more
hardware features, like PAUTH and SVE, and their arbitrary
combinations.
GDB side changes are done, and take i386-linux as an example to
demonstrate the the benefit of the changes.
* Misc, [2/10]
** Rebase my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
** Explain the GDB behavior to Linaro kernel guy who is working on
single-step in kgdb.
** Read some paper on dynamic slicing, and think about how to do it on
GDB for aarch64/arm.
# Plan #
* Holiday on Monday.
* Review kernel-awareness patches,
* Upstream my patches about unit test to value/register conversion
gdbarch hooks.
* Post my GDB target description change as an RFC, collect comments,
and think about the changes in GDBserver side (which is harder).
--
Yao Qi
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* Release Automation:
- 5.4 2017.05 RC1: Done
- 6.3 2017.05 RC1: still on-going
- Re-worked publication part of the process
* Debug Binutils instablities
* Reviews, backport, ...
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Complete 6.3 RC1
o Make Linaro GCC 7 RC
o Continue release automation
== Progress ==
* [ARM GlobalISel] Support div [TCWG-1103] [1/10]
- Committed upstream
* [ARM GlobalISel] Fix fallback path [TCWG-1110] [2/10]
- Fixed and committed another issue
* [ARM GlobalISel] Fix loading i<32 from the stack [TCWG-1065] [2/10]
- Committed upstream
* Remove environment variables [TCWG-1114] [1/10]
- Committed a first patch towards fixing this
* Misc [4/10]
- Meetings, mailing lists, code reviews
- Minor GlobalISel cleanups
- Put up a cron job on llvm-tk1-test-02 to track GlobalSel
TableGen'erated code for ARM and AArch64
== Plan ==
* Out of office on Monday
* [ARM GlobalISel] Use TableGen for inst selector [TCWG-1037]
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Maybe finish TCWG-1114
