=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [9/10]
-- Submitted AArch64 hardware breakpoint patch for review.
-- Updates after upstream comments.
-- Added Arm hardware breakpoint support code.
-- Testing and debugging of Arm code on android arm device.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Write breakpoint command based test-cases.
-- Write RSP packets based test-cases.
-- Submit patch for review after edits and upgrades.
GDB Kernel Awareness
-- Background study and understand existing patches
== Progress ==
[TCWG-617] Upstreamed a patch to make copy relocations use synthetic
sections. This allows us to remove the output section relative dynamic
relocation which is important for range extension Thunks
Did some design work for range extension Thunks.
Did some refactoring to merge PLT and IFunc PLT at maintainers request
[BUD17]
Researched my forthcoming Connect presentation and wrote about 3/5 of the slides
== Plan ==
Finish Connect presentation early next week as I'll be on holiday the
week before Connect.
Start implementing range extension Thunks.
== Progress ==
* [ARM GlobalISel] Add support for fp arguments [TCWG-1029] [5/10]
- Committed support for single precision hard float and soft-fp ABIs
- Work in progress on supporting double precision
* Misc [5/10]
- Meetings, mailing lists, code reviews
- Reverted / fixed a few patches that broke the buildbots
- Tested and uploaded binaries for release candidate 2 on AArch64
== Plan ==
* More GlobalISel
Hi All,
I am working on log10/qsort benchmarks on ARM64 (ARMv8) processor,
I want to check if we have experience with these benchmarks.
Actually i am looking for a compiler version which gives best results with
these benchmarks and specific compiler optimization (in my case is see O3
gives best numbers) ?
I have tried GCC-4.9 and GCC-6.2 with log10 benchmark and my observations
are:
1) With gcc 4.9 - 140 us
2) With GCC 6.2 - 150 us
My compilation flags are "-O3 -ftree-vectorize -funroll-all-loops --param
max-inline-insns-auto=550 --param case-values-threshold=30
-falign-functions=32 -ftracer"
So it seems like gcc-6.2 is better, am i missing something, should i use
some better compiler flags?
Thanks
-Bharat
~ Progress ~
* AArch64 OpenOCD. [6/10]
Solder and desolder the JTAG joint on HiKey. Tried different JTAG
options, but still can't get OpenOCD working.
* Patches review. [3/10]
** ILP32 GDB. Help cavium to reduce fails from 500 to 70.
GDB patch is OK, but there are still some regressions on ilp32
vs. lp64 on aarch64. Steve is still investigating on them.
** SVE GDB. Remove MAX_REGISTER_SIZE. Look people tend to agree
the way removing MAX_REGISTER_SIZE. Looking forward to Alan's
patches :)
** Kernel awareness debugging. Reviewed the cover letter of IBM's
patches. Want to share the common kernel debugging part between
IBM and Linaro.
* Schengen visa. [1/10] Fill in more in application form. Document
preparation.
~ Plan ~
* Kernel awareness debugging. Continue reviewing IBM's patches, and
figure out how to share the code.
* Go to London for visa application on Friday.
--
Yao Qi
== Progress ==
o Linaro GCC/Validation (7/10)
* GCC 4.9 2017.01:
- prepared final release
* GCC 5.4 2017.01:
- sources and binaries ready to publish
* GCC 6.3 2017.02:
- Cherry-picked bug fix into release branch
- ready for RC2
* Lot of release notes iterations and discussions
* Backports reviews
* Tree reassociation: on-going
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Releases...
o Tree reassociation
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [9/10]
-- Wrote multi-threaded implementation of hardware breakpoints.
-- Added thread specific handlers to create hardware breakpoints.
-- Basic multi-threaded test application works after some fixes and debugging.
-- Committed fix for LLDB AArch64 android gcc build failure
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Write LLDB testsuite test cases for hardware breakpoints
-- Code clean-up and first version patch submission
-- Start work on Arm register context changes for hardware breakpoints.
== This Week ==
* TCWG-1006 (2/10)
- Created prototype patch for propagating returns_nonnull along the
same lines as malloc.
* TCWG-1010 (2/10)
- Continuing to work on prototype for bitwise dce
* ICE with __builtin_abs with -fgimple (2/10)
- Posted patch upstream
* Sick leave (2/10)
* Misc (2/10)
- Setting up docker on tcwg-ex40-01
- Meetings
== Next Week ==
- TCWG-1010, TCWG-548
The Linaro Binary Toolchain
============================
The Linaro GCC 6.3-2017.02-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc1/http://snapshots.linaro.org/components/toolchain/binaries/6.3-2017.02-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.3-2017.02-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (linaro_binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 7.12 (gdb-7.12-branch)
https://lists.gnu.org/archive/html/info-gnu/2016-10/msg00007.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for GCC 6 (as of Linaro GCC 6.3-2017.02-rc1)
==================================================
* The mingw toolchains are now archived using the rsync -L option in
order to avoid problems with Windows extractors and symbolic links.
https://review.linaro.org/#/c/16415/
This resolves the following user bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
* The soft-float targeted toolchains have now been configured to
generate code using -mfloat-abi=soft.
This makes arm-linux-gnueabi and armeb-linux-gnueabi toolchains use
the "soft" FP ABI instead of "softfp".
Historically, TCWG's toolchains provided both "soft" and "softfp"
multilibs, but when switching from crosstool-ng to cbuildv2/abe (which
support a single multilib) "softfp" multilib was choosen. Using
"-mfloat-abi=soft" is a better choice for a gnueabi toolchain, since
it doesn't require cores to have a floating-point unit.
This change should not break compatibility for toolchain users since
the ABI will stay the same. The compiler and glibc libraries will not
refernce FP instructions.
* Removed .la files from binary toolchain archive as these files break
autotools builds.
https://bugs.linaro.org/show_bug.cgi?id=2764
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M.
* The Linaro GCC 6.2-2016.12 snapshot added various AArch64 bugfixes and
optimizations.
* Backported glibc patch to simplify static malloc interposition [BZ
#20432] to correct user identified issue.
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 022bd2995640626d9efb6a839884c5e1c7c5e133
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:11:50 2016 +0200
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit 5357441171f2409fb759112bc6a00d3e672374d9
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:09:51 2016 +0200
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit f194ff4d5e1e304ac2a8d438d7abcbffd2dba757
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 14:05:23 2016 +0200
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit bda499cb9d2b97075f74df9bfb38b23ff4d12ac2
Author: Christophe Lyon <christophe.lyon(a)linaro.org>
Date: Wed Oct 19 13:59:52 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, and Linaro GCC 6.3-2017.01.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
T: +1-612-424-1861
The Linaro Binary Toolchain
============================
The Linaro GCC 4.9-2017.01-rc1 Release-Candidate is now available.
This is a courtesy toolchain. The Linaro GCC 4.9 toolchain is officially
out of maintenance. This release is being provided in order to merge in
the last FSF GCC 4.9 branch changes into the Linaro GCC 4.9 release.
Notice: All Linaro GCC 4.9 series toolchain users should migrate to the
latest version of the Linaro GCC 4 toolchain in order to mitigate
potential security exposure to CVE-2015-7547. See the NEWS section
below for details.
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2017.01-rc1/http://snapshots.linaro.org/components/toolchain/binaries/4.9-2017.01-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 4.9-2017.01-rc1
FSF eglibc 2.19 (linaro_eglibc-2_19)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.24 (linaro_binutils-2_24-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro toolchain package git branches are hosted at:
https://git.linaro.org/toolchain
NEWS for GCC 4.9 (as of Linaro GCC 4.9-2017.01-rc1)
==================================================
* The soft-float targeted toolchains have switched to -mfloat-abi=soft
from -mfloat-abi=softfp.
This makes arm-linux-gnueabi and armeb-linux-gnueabi toolchains use
“soft” FP ABI instead of “softfp”.
Historically, TCWG’s toolchains provided both “soft” and “softfp”
multilibs, but when switching from crosstool-ng to cbuildv2/abe (which
support a single multilib) “softfp” multilib was choosen. Using
“-mfloat-abi=soft” is a better choice for a gnueabi toolchain, since
it doesn’t require cores to have a floating-point unit.
This change should not break compatibility for toolchain users since
the ABI will stay the same. The compiler and glibc libraries will not
refernce FP instructions.
* Removed .la files from binary installation as these files break
autotools builds.
https://bugs.linaro.org/show_bug.cgi?id=2764
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 830M to 480M for
aarch64-linux-gnu target with the gcc-4.9-branch.
* The armv8l-linux-gnueabihf targetted toolchain is now built using
--with-mode=thumb (like all of the other cross toolchains) rather than
the default which is ARM mode.
* Applied fix for CVE-2015-7545 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
Linaro eglibc 2.19 (linaro_eglibc-2_19).
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* See the following Linaro GCC snapshot:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/4.9-2015.10/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Director - Linaro Core Technology and Tools
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
o Teaching activity (4/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 2017.01:
- prepared source and binaries for RC1
- release notes to be finalized for publication
* GCC 5.4 2017.01
- Rebuilt binaries for the release
- Release notes almost completed
* Reviews
* Back to tree reassociation
o Misc (1/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 release
o Backports review
o Tree reassociation
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [6/10]
-- Fixed hardware breakpoints routines in LLDB AArch64 register context.
-- Code tweaks in NativeProcessLinux/NativeThreadLinux/ProcessGDBRemote
-- Hardware breakpoint working with single threaded applications
-- Submitted a fix for LLDB AArch64 android gcc build failure
-- Wrote single and multi threaded test applications for test hardware
breakpoints.
Monitor LLDB buildbot for minimum down time. [TCWG-712] [2/10]
-- Investigate random test failures on Arm and add them to flakey tests.
-- Buildbot down due to UPS failure
-- Got UPS fixed. Restart builders and testers.
Miscellaneous Activities [2/10]
-- Meetings, Emails etc.
-- Hungary visa passport collection
-- Background study about GDB Linux Kernel awareness
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Continue work on hardware breakpoint register context routines Arm/AArch64
-- Find a way to install hardware breakpoints on multiple threads.
# Progress #
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly.
Done. All patches are committed to mainline. [3/10]
* Patch reviews, a lot, [5/10]
** Hold one of ILP32 BFD patch because it may affect aarch64 GDB,
Reviewed ILP32 GDB patch, and convince them not to add new target
descriptions for ILP32, to make our life easier in the future.
Otherwise, we need two copies of target description for each new
hardware feature, such as v8.3, SVE, etc.
** Try to hold one disassembler options patch, which affects ARM and
GDB. Gave some comments on the interface design, but looks I am
late.
** Finish the review on DW_OP_implicit_value. Met some grey area in
DWARF spec.
* Atomicity of concurrent modification on ptrace. [1/10]
It is unclear weather debugging can modify memory for one thread while
other threads are running. After the discussions with some kernel guy,
PTRACE_POKETEXT is atomic, but GDB use it in a non-atomic way when
writing 2-byte aligned 32-bit thumb-2 instruction. Suggested a
workaround upstreams.
* Misc, meeting [1/10]
# Plan #
* ILP32 patch review.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
- LLD now uses synthetic sections for Thunks.
ARM Thunks now have symbols and mapping symbols.
As a side-effect we can now create local symbols in synthetic sections
so I've added them to the ARM PLT sections.
[Misc]
- Wrote 3 lines of lld 4.0 release notes for ARM
- Some upstream patch review in rtdyld and ilp32 support in the assembler
- Presented my personal Linaro objectives to the TCWG leads.
Plans for next week:
- Complete Fosdem presentation, will be leaving early Friday to catch
the Eurostar
- Respond to any post commit review comments on Thunks
- Start work on range extension thunks, the previous commits to use
synthetic sections were pre-requisites to range extension thunks, but
added little new user-visible functionality.
Planned absences:
- Fosdem 2017 will need to leave early on Friday 4th Feb
- Holiday 21st Feb to 1st March
- Linaro Connect 6th to 10th March Euro LLVM 27-28 March (Linaro's
request and cost-code)
== Progress ==
* National holiday on Tuesday [2/10]
* [AArch64] Investigate PR30225 [TCWG-1021] [2/10]
- This was a bug related to the code alignment factor for the debug frame
- Decided it was not a correctness issue and the size savings for
using a different factor are probably not noticeable in practice, so I
closed the bug
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] [1/10]
- Committed all 3 patches upstream, reworked the third one a bit
* [ARM GlobalISel] Add support for pointers [TCWG-1028] [1/10]
- Started working on a patch
* Misc [4/10]
- Mailing list, code reviews, meetings
- Buildbots: reverted 2 sets of patches, noticed an issue with some
buildbots (which Renato ended up investigating)
- FOSDEM slides
== Plan ==
* [ARM GlobalISel] Add support for pointers [TCWG-1028]
=== This Week ===
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [4/10]
-- Capture tests leaving behind runaway processes, found 3 so far.
-- Capture random failures and mark them flakey.
ARM/AArch64 hardware breakpoints [TCWG-717] [5/10]
-- Code review and prepared debug environment
-- Looked into Android Arm64 build failure with debug info.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Fix hardware breakpoints routines in LLDB AArch64 register context.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Keep and eye on tests marked flakey or any new random failures.
o Teaching activity (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 snapshot:
- completed snapshot process
- waiting for linaro bug #1118 status before
releasing or re-spinning the snapshot.
https://bugs.linaro.org/show_bug.cgi?id=1118
* Made an published GCC 5.4 RC2, preparing the release
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 snapshot and binaries
o GCC 5.4 release
== This Week ==
* TCWG-1005 (malloc attr propagation) (4/10)
- Extended for pointer comparisons
- Patch review from Kugan
- Removed some cruft from the patch
* TCWG-1010 (bitwise dce propagation) (4/10)
- Started working on prototype
* Misc (2/10)
- Looked at Wheader-guard
- Building chromium with gcc
- Meetings
== Next Week ==
- TCWG-1005, TCWG-1010
~ Progress ~
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly. [3/10]
It is a blocker to 7.12.1 release. Fixed it in 7.12 branch.
Address comments and manage reviewer's expectations on the
patches for mainline.
* Approved two Alan's SVE GDB preparatory patches. [1/10]
* Reviewed Dave Martin's SVE user space VL control API. [1/10]
Can't figure out a case that debugger or debugger user wants to change VL.
* Review DWARF patch in big endian on DW_OP_implicit_value. [2/10]
Played with the patch, and use part of it in existing gdb tests.
Found other GDB bugs, and fixed them. Some readings on DWARF 5.
Will post my patches next week and continue reviewing the DWARF patch.
* Booked Hungary visa appointment.
* Training. [3/10]
~ Plan ~
* TCWG-984, GDB aborts if there is an error in disassembly.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
Started process of upstreaming the conversion of Thunks to SyntheticSections.
- Patch 1 of 3 committed, move Thunk Creation later in the link step.
- Patch 2 of 3 add support for local symbol creation in upstream review
- Patch 3 of 3 waiting for patch 2
Made a patch to output mapping symbols in PLT to test local symbol
creation. Not recommending this for inclusion in lld yet, but have
included as a way of testing 2.
Responded to comment on implementation and overall Thunks proposal.
Plans for next week:
Yet more range extension work, hope to get patches 2 and 3 above committed.
== Progress ==
* Out of office Mon-Wed [6/10]
* [ARM] Use AddDefaultPred everywhere [TCWG-987]
- Committed upstream
* LLVM AArch64 4.0.0 [ TCWG-1008] [1/10]
- Ran the tests for rc1, everything went smoothly
* [AArch64] Investigate PR30225 [TCWG-1021] [1/10]
- Someone noticed that llvm-mc is using a different code/data
alignment factor for the call frame information than gas, trying to
figure out if that would actually confuse a debugger
* Misc [2/10]
- Mailing lists, code reviews, meetings etc