The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.10 snapshot of both Linaro GCC 5 and Linaro GCC 6 source
packages.
Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.1+svn241214 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.11
stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.2+svn241214
* Backport of [Bugfix] PR libgcc/77519: Correct libgcc complex
multiply excess precision handling
* Backport of [Bugfix] PR target/63250: Enable HCmode multiply and
divide (mulhc3/divhc3)
* Backport of [AArch32/AArch64] Add qdf24xx base tuning support
* Backport of [AArch32] [ARMv8.2] 1/17 Add ARMv8.2-A command line
option and profile
* Backport of [AArch32] [ARMv8.2] 2/17 [testsuite] Add a selector for
ARM FP16 alternative format support.
* Backport of [AArch32] [ARMv8.2] 3/17 [testsuite] Add ARM support for
ARMv8.2-A with FP16 arithmetic instructions
* Backport of [AArch32] [ARMv8.2] 4/17 Define feature macros for FP16
* Backport of [AArch32] [ARMv8.2] 5/17 Enable HI mode moves for
floating point values
* Backport of [AArch32] [ARMv8.2] 6/17 Add data processing intrinsics
for float16_t
* Backport of [AArch32] [ARMv8.2] 7/17 Add FP16 data movement instructions
* Backport of [AArch32] [ARMv8.2] 8/17 Add VFP FP16 arithmetic instructions
* Backport of [AArch32] [ARMv8.2] 9/17 Add NEON FP16 arithmetic instructions
* Backport of [AArch32] [ARMv8.2] 10/17 Refactor support code for NEON builtins
* Backport of [AArch32] [ARMv8.2] 11/17 Add builtins for VFP FP16 intrinsics
* Backport of [AArch32] [ARMv8.2] 12/17 Add builtins for NEON FP16 intrinsics
* Backport of [AArch32] [ARMv8.2] 13/17 Add VFP FP16 instrinsics
* Backport of [AArch32] [ARMv8.2] 14/17 Add NEON FP16 instrinsics
* Backport of [AArch32] [ARMv8.2] 15/17 Add tests for ARMv8.2-A FP16 support
* Backport of [AArch32] [ARMv8.2] 16/17 Add tests for VFP FP16 ACLE instrinsics
* Backport of [AArch32] [ARMv8.2] 17/17 Add tests for NEON FP16 ACLE intrinsics
* Backport of [AArch32] [ARMv8.2] Delete one redundant word in
target-supports.exp comment
* Backport of [AArch32] [ARMv8.2] Enable mov[hsd]i_movw tests on ARM
and big endian
* Backport of [AArch32] [ARMv8.2] Fix invalid instructions generated
for data movement.
* Backport of [AArch32] [ARMv8.2] Fix invalid instructions generated
for data movement.
* Backport of [AArch32] [ARMv8.2] Fix new constraints and attributes
of SI/HI data movement patterns
* Backport of [AArch32] [ARMv8-M] Add support for ARMv8-M
* Backport of [AArch32] [ARMv8-M] Add support for CB(N)Z and (U|S)DIV
to ARMv8-M Baseline
* Backport of [AArch32] [ARMv8-M] Add support for MOVT/MOVW to ARMv8-M Baseline
* Backport of [AArch32] [ARMv8-M] Check CLZ availability with ISA
support and architecture level macros
* Backport of [AArch32] [ARMv8-M] Enable atomics for ARMv8-M Mainline
* Backport of [AArch32] [ARMv8-M] Factor out MOVW/MOVT availability
and desirability checks
* Backport of [AArch32] [ARMv8-M] Fix indentation of FL_FOR_ARCH*
definition after adding support for ARMv8-M
* Backport of [AArch32] [ARMv8-M] Fix pr42574.c selector syntax error
* Backport of [AArch32] [ARMv8-M] Fix Thumb-1 only == ARMv6-M &
Thumb-2 only == ARMv7-M assumptions
* Backport of [AArch32] Fix RTL checking failure in Thumb mode
* Backport of [AArch64] Add __artificial__ attribute to Aarch64 NEON intrinsics
* Backport of [AArch64] Add missing attributes to arm_neon.h
* Backport of [AArch64] Add more NEON intrinsics vmaxnm_f64,
vminnm_f64, vmax_f64, vmin_f64
* Backport of [AArch64] Add tunning of ldpw for THunderX
* Backport of [AArch64] Fix __builtin_aarch64_fmindf
* Backport of [AArch64] [ARMv8.2] 1/4 ARMv8.2-A FP16 testsuite selector
* Backport of [AArch64] [ARMv8.2] 2/4 ARMv8.2-A testsuite for new data
movement intrinsics
* Backport of [AArch64] [ARMv8.2] 3/4 ARMv8.2-A testsuite for new
vector intrinsics
* Backport of [AArch64] [ARMv8.2] 4/4 ARMv8.2-A testsuite for new
scalar intrinsics
* Backport of [Misc] Allow simple register subregs in noce_convert_multiple_sets
* Backport of [Misc] Fix native_encode_real for HFmode constants
* Backport of [Misc] Modify extend_mask to extend bits based on signop
* Backport of [Testsuite] [AArch32] Fix prototype in vst1Q_laneu64-1.c
* Backport of [Testsuite] [AArch32] neon-testgen.ml removal
* Backport of [Cleanup] Fix typo in comment in tree-ssa-strlen.c
Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn241215 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.11
maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2016.10/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.4+svn241215
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
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* Interested in commercial support? inquire at "Linaro support":
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[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
Hi all.
I've incorrectly reported a build failure in the support system.
<https://support.linaro.org/hc/en-us/requests/1876>
-But I'm posting a copy to this list, in order to follow Victor's advice.
I've suggested a couple of changes, which makes ABE a little more compatible.
Though I can still not build the toolchain on my PowerBook G4, I think that my two modifications might ease building on Intel based Macs and perhaps other architectures in addition.
In short:
* Use getconf instead of /proc/cpuinfo (you're already using getconf in configure.ac).
* By default use twice as many cores for -jN as usual. (If you have 2 cores, use -j4)
* Change the architecture from 'Power Macintosh' (which contains an offending space) to 'powerpc'.
...And here's "configure.ac.patch":
---8<-----8<-----8<-----
diff --git a/configure.ac b/configure.ac
index 1bf3593..8cc4986 100644
--- a/configure.ac
+++ b/configure.ac
@@ -49,9 +49,10 @@ AC_SUBST(DBPASSWD)
DBHOST=${dbhost}
AC_SUBST(DBHOST)
-CPUS="`grep -c proces /proc/cpuinfo`"
+
+let CPUS=2*`getconf _NPROCESSORS_ONLN`
AC_SUBST(CPUS)
-CORES="`grep cores /proc/cpuinfo | tail -1 | cut -d ' ' -f 3`"
+#CORES="`grep cores /proc/cpuinfo | tail -1 | cut -d ' ' -f 3`"
AC_SUBST(CORES)
LIBC="`getconf GNU_LIBC_VERSION`"
AC_SUBST(LIBC)
@@ -59,6 +60,7 @@ KERNEL="`uname -r`"
AC_SUBST(KERNEL)
BUILDHOST="`${srcdir}/config.guess`"
BUILD_ARCH="`uname -m`"
+[[ "`uname -s`" == "Darwin" ]] && BUILD_ARCH="`uname -p`"
AC_SUBST(BUILD_ARCH)
AC_SUBST(BUILDHOST)
HOSTNAME="`uname -n`"
--->8----->8----->8-----
Apart from that, I'd like to report a successful build on Cubieboard2 running Armbian.
I built for the aarch64 architecture, and I'm currently attempting to build Armbian for beelink GT1 using the new shiny Linaro toolchain. :)
...and what a pleasure, there's no fan-noise when building on the Cubieboard2!
Love
Jens
Just been trying to build the Linaro toolchain from source on RHEL 6.5. The ABE configure script fails to detect the packaging system on RHEL as it looks like RPM will only be detected if it's running on a Fedora system. This patch will instead detect RPM if the rpm binary is available (and it's not Debian/Ubuntu), like the test for Arch/pacman.
diff --git a/configure b/configure
index 42f787e..52ddd42 100755
--- a/configure
+++ b/configure
@@ -3639,7 +3639,6 @@ fi
# Figure out which packaging system is in use. Since it's possible to
# install both on a system.
-rpm="`uname -a | grep -ic '\.fc[0-9].\.'`"
deb="`uname -a | grep -ic 'ubuntu'`"
deb=$(($deb + `uname -a | grep -ic 'debian'`))
@@ -3672,7 +3671,9 @@ $as_echo "yes" >&6; }
### RPM Packages ###
else
-if test ${rpm} -eq 1; then
+rpm="`which rpm 2> /dev/null`"
+result=$?
+if test ${result} -eq 0; then
packages="${packages} ncurses-devel python-devel"
for i in ${packages}; do
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $i is installed" >
Regards,
Scott.
Hi Christophe,
Here are the commits, in order, that Adhemerval did to support 48-bit
VMA on AArch64.
r275792: [asan] Enable 48-bit VMA support on aarch64
r277137: tsan: Enable 48-bit VMA support on aarch64
r279752: msan: Enable 48-bit VMA support on aarch64
r279753: dfsan: Enable 48-bit VMA support on aarch64
Currently, all sanitiser tests pass on Ubuntu Xenial on the LLVM side.
cheers,
--renato
== Progress ==
LTO/IPA
- Committed ipa-vrp and early-vrp improvements
- Patches for propagation of nonnull and optimization are accepted;
Will commit after testing (once again)
- Noticed some improvements but full benchmarking not yet done
- Setting up the benchmarking infrastructure
== Next ==
- Commit pending patches
- Start LTO benchmarking and analysis
== Progress ==
o Linaro GCC/Validation (7/10)
- Completed backports for monthly snapshots (dependency tracking).
- Prepared branch merges for branches 5 and 6
- ABE reviews
- New jenkins job to compare toolchains
(goal is to use it for development and to refactor current jobs).
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Release 2016.10 snapshots
o On Vacation from Thu 20th to Tue. 24th.
== This Week ==
* TCWG-72 (3/10)
- Committed patch to remove optab functions for [us]divmod_optab after
Bernd's approval.
- My assumption that __udivmoddi4 is generically available is perhaps
wrong, call to __udivmoddi4
generates undefined reference error on aarch64-linux-gnu. To be
safe, I dropped generating call
to __udivmoddi4.
- Patch posted upstream
* TCWG-834 / PR71636 (1/10):
- Patch posted upstream.
* Misc (2/10)
- PR35503: Changes to C++FE approved by Jason, waiting for approval to
C, C-family changes.
- Posted patch upstream to add reverse keyword to genmatch
- Posted patch for abe bug 1439
- Meetings
* Public Holidays (4/10)
== Next Week ==
- TCWG-72, TCWG-665, TCWG-319
- Add support to tcwg-buildapp for SPEC2000 and SPEC2006.
== Progress ==
* Test GlobalISel on AArch64 Linux [TCWG-825]
- Got the existing tests to work on Linux - luckily this only required
changes to the tests and not to GlobalISel itself; committed these changes
upstream
- Ran the test-suite with GlobalISel and with the fallback to the old DAG
ISel enabled; only 57 object files can be compiled with GlobalISel only,
the others need the fallback to the old ISel; also, there are crashes in
over 500 of the tests
* Rewrite llvm-projs in Python [TCWG-833]
- Rewrote the core functionality of the script and added tests
- Still have to implement the command line interface
* Handle special cases in AArch64InstrInfo::GetInstSizeInBytes [TCWG-757]
- Committed upstream
* [AArch64] CMP + label arithmetic not supported [TCWG-710]
- Committed upstream
* Misc
- Upstream code review
- Linaro annual performance review
- Had a quick look at a hanging check-all in one of the AArch64
buildbots; I identified the hanging test as one of the TSAN tests, but I
didn't manage to reproduce the issue locally (since the tests run in
parallel, it's possible that there's a subtle interaction between them);
I've seen other buildbots (PowerPC) similarly hanging every now and then,
but I'm not sure it's the same issue; will keep an eye on it though.
== Plan ==
* 2 weeks off
# Progress #
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode. [4/10]
Finish the patch, tested it on arm and ppc64. Post patches for
review.
* TCWG-556, aarch32 GDB buildbot slave. In progress. [1/10]
Sergio needs to adjust buildbot setting to customize my buildslave.
* TCWG-547, [2/10]
Ping the patch series, and commit some obvious ones.
* Misc, [3/10]
** Ask two people about using OpenOCD with AArch64 board.
** Review kernel patch to fix kernel limitation of byte address select.
Patches look good, but GDB needs to detect that such limitation is
removed.
** Read "C++ Primer". Need more knowledge on C++.
# Plan #
* Other thing on OpenOCD,
* TCWG-167, TCWG-416,
--
Yao Qi
* 3 days off
* Connect week
== Progress ==
* Validation
- patch reviews (jenkins jobs, abe)
* GCC
- reported a few regressions on trunk, helped validating fixes
- ran benchmarks with "deprecated IT blocks" patch.
A few regressions, need to reproduce on other HW
* Binutils
- fixed https://sourceware.org/bugzilla/show_bug.cgi?id=20608
"Relocation truncated to fit: R_ARM_THM_JUMP24 for relocation to PLT entry"
- requested backport approval for branches 2.26 and 2.27, but
no answer so far
* misc (conf-calls, meetings, emails, ....)
== Next ==
* (try to) handle backlog of GCC trunk regressions
* ABE patches reviews and bug fixes
* backports/reviews
* GCC: run benchmarks on other HW
o Two days off post-connect (4/10)
== Progress ==
o Linaro GCC/Validation (3/10)
- Restart work on 4.9.4 branch merge.
- Restart backport activity.
- Investigate binary release size issue (Lin. bug #2544)
o Misc (3/10)
* Various meetings and discussions.
* Reviewing release tools branch
== Plan ==
o Continue on-going tasks (backports, 4.9.4 merge, release tools)
o ABE bugzillas
== This Week ==
* TCWG-807 (2/10)
- Upstream patch iterations with Honza and Martin.
- Committed to trunk as r240898.
* TCWG-779 (1/10)
- Changed %Z specifier to take int*, unsigned len args instead of vec<int>
for easier format checking.
- Committed diagnostic.c and diagnostic-core.h changes.
- Waiting for approval for other parts of the patch.
* Misc (1/10)
- Committed patch to fix typo in bits propagation
- Committed patch for freeing m_vr and bits in ipcp_transform_function
* Holidays (6/10)
== Next Week ==
- Abe bug 1439
- Extend tcwg-buildapp to include SPEC2000
- Address reviews for TCWG-779
- Look at checked exceptions nothrow propagation.
- TCWG-319
== Activity ==
- AFDS and AFDS review comments
LLD:
- Have nudged the ARM exceptions story in lld along a bit, I've had
one patch accepted, but not the most important one.
- Updated the Linaro TCWG jira issues post Connect
- Worked on static linking and ifunc support. I have managed to get
ifunc working for dynamic linking and static linking working for an
old ARM only sysroot. The latest Linaro linux-gnueabi-hf sadly
segfaults in __libc_init_first -> __ctype_init, with what looks like
stack corruption of the return address. I at least have a good idea of
what needs to be done to make static linking work.
Other LLVM:
Some upstream review comments for ILP32 support and others.
== Plans ==
On holiday all week. Will attempt to continue upstreaming lld work
that I already have patches and tests for.
# Progress #
* TCWG-333, Fix gdb.base/func-ptrs.exp fails in thumb mode.
[3/10] Recall some discussions on it in GNU Cauldron, and
dig into GDB source. Unfortunately, GDB decides to track
function address rather than function pointer in 2001, which
makes harder to fix it. Still thinking about it.
* TCWG-556, aarch32 GDB buildbot slave. [2/10]
Build GDB and test cases in arm on an aarch64 machine. There are
1000+ test fails, but not triaged yet. Discussed upstream on how to
set up buildbot slave with special configuration option and test
board file. Ongoing.
* TCWG-685, GDB 7.12 release, and patches review. [1/10].
All blocking issues are gone. 7.12 should be released soon.
* Clean up arm xml files. Done. [3/10]
* Misc, meetings. [1/10]
# Plan #
* TCWG-333, TCWG-556.
* As 7.12 goes out, ping my pending patches on TCWG-518, and TCWG-547
--
Yao Qi
== Progress ==
* [Lab] ASAN test fails with glibc 2.23 [TCWG-811]
- Recommitted upstream after discussing with Adhemerval at Connect
(thanks, Adhemerval)
- The bot is now upstream
* Add worktree module to tcwg-release-tools [TCWG-783]
- In review. Trying to use it in our llvm-projs helper script
* Investigate buildbot failure on clang-native-arm-lnt [TCWG-832]
- Found and reverted the offending patch
- Ran a pre-commit test on the second version of the patch
* [Lab] Xenial Stage1 test failure: std::length_error [TCWG-821]
- Couldn't use gdb on this, so I had to manually find the call that
throws the exception; the code seems to be doing the right thing, and
in addition selfhosting works, so we're suspecting either some
undefined behaviour or a bug in the g++ toolchain on the bot
- Neither ubsan nor clang-tidy had much to complain about the code,
so this will require more investigation
* Misc
- Upstream code reviews, meetings etc
== Plan ==
* [Lab] Xenial Stage1 test failure: std::length_error [TCWG-821]
* [ARM] Switch from itineraries to schedule models [TCWG-824]
== Progress ==
* [Lab] ASAN test fails with glibc 2.23 [TCWG-811] [4/10]
- This issue is keeping us from moving one of the TK1 bots into production
- Committed a patch upstream, but it broke on an x86_64 bot when
compiling with -m32
- I tracked the problem to the wrong glibc function being used when
-fsanitize=address is provided on the command line
- Reported the problem on the mailing list
* Add worktree module to tcwg-release-tools [TCWG-783] [4/10]
- Made good progress on this, should be ready for review soon
* Misc [2/10]
- Code reviews, preparing for Connect
== Activity ==
Exceptions.
Another attempt at ARM exceptions support. I did get some more fine
grained comments back which have been addressed, but no approval to
commit yet.
Some follow up over whether ld -r support for merging output sections
is necessary, answer seems to be yes as kernel modules depend on it.
I've volunteered to post a simpler patch without ld -r support as this
is a very niche use case. Not had any feedback yet so will just post
it next week.
TLS
Fixed TLS support in lld so that it does not attempt to follow lld's
generic relaxation model, which can't be implemented in ARM. Still
some work to do for static linking.
== Next Week ==
Out of office at Linaro Connect in Las Vegas
== Planned Absences ==
Holiday 10th to 14th October
* Two days off [4/10]
# Progress #
* TCWG-685, GDB 7.12 release. [2/10]
Patch "keep RES0 bits in CPSR" is pushed into mainline and 7.12.
Find a GDBserver bug, and open PR 20627. It is target independent,
but may block the release. :(
* TCWG-518, Range stepping in ARM. [3/10]
Regression test is done. Find some other issues exposed by my
patches, and fix them. Need to post patches upstream for review.
* Misc [1/10]
Close gdbserver in mi_gdb_exit. The bug breaks the aarch64 multi-arch
testing. Patch is pushed in.
File expense for GNU Cauldron travel.
# Plan #
* Linaro Connect.
--
Yao Qi
Hello,
I'm using Linaro GCC 4.9-2015.01-3 for AArch64, and trying to disable the
generation of guarded instructions. More specifically, I'd like not to see
instructions such as 'cset', 'csinc', 'ccmp', 'fccmp', etc.
So far, it seemed that the flag '-fno-if-conversion2' could do the job, but
I still see those instructions in my disassembled program functions (I
guess that it may not be possible to remove them from standard libs).
My command line:
aarch64-linux-gnu-gcc -static -march=armv8-a -O3 -fno-strict-aliasing
-fno-if-conversion2
I also tried '-fno-if-conversion' and both '-fno-if-conversion
-fno-if-conversion2' without success.
Regards,
--
Fernando A. Endo, Post-doc
INRIA Rennes-Bretagne Atlantique
France
o Travel from Cauldron (2/10)
o One day off (2/10)
== Progress ==
o Linaro GCC/Validation (7/10)
- Started backports for 2016.10
- Investigating 4.9.4 branch marge validation issues
- Extended validation monitoring, tried to reproduce an OOM issue.
o Misc (3/10)
* Various meetings and discussions.
* Connect preparation
== Plan ==
o Tuesday off
o Continue on-going tasks and travel to LAS16
== Progress ==
* Validation
- patch reviews (Jenkins jobs, abe)
* GCC
- reported a few regressions on trunk
- looked at making reporting scripts more robust
at handling DejaGnu errors that could otherwise
be un-noticed
* Binutils
- backported a fix from trunk to linaro-2.27 branch, to close bug
2518 (linker SEGV)
- investigating https://sourceware.org/bugzilla/show_bug.cgi?id=20608
"Relocation truncated to fit: R_ARM_THM_JUMP24 for relocation to PLT entry"
* misc (conf-calls, meetings, emails, ....)
- Connect preparation
== Next ==
- monitor GCC trunk regressions
- release scripts/abe
- backports/reviews
- Binutils bug 20608
== Progress ==
* Validation
- patch reviews (Jenkins jobs, abe)
- helped on release infra/scripts
* GNU Cauldron
- useful discussion with several maintainers
* GCC
- progress on PR 67591 (ARM v8 Thumb IT blocks deprecated)
First patch posted, I will need benchmark results.
* misc (conf-calls, meetings, emails, ....)
== Progress ==
- Connect slides
- Return jump function - working on prototype
- Revised and posted early-vrp
- Revised and posted patch for PR72835
== Next ==
- Work on IPA/LTO improvements
- Wrap-up connect slides
- Follow up on pending patches
