Hi Everyone,
I'm having trouble with ARMv8/Aarch64. One is an early Mustang server
board (without CRC or Crypto), and the other is a LeMaker HiKey (with
CRC and Crypto). Both run Linaro:
apm-mustang: $ cat /proc/cpuinfo
Features : fp asimd evtstrm
And:
hikey: $ cat /proc/cpuinfo
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
According to the GCC folks, we can get better code generation with
-mfpu=neon-fp-armv8
(http://gcc.gnu.org/ml/gcc-help/2016-05/msg00058.html and
https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html). However, it
results in:
$ g++ -DDEBUG -g3 -O0 -mfpu=neon-fp-armv8 -fPIC -pipe -c cryptlib.cpp
g++: error: unrecognized command line option ‘-mfpu=neon-fp-armv8’
GNUmakefile:753: recipe for target 'cryptlib.o' failed
It looks like -mfpu=neon-fp-armv8 is a GCC 4.9 feature
(http://gcc.gnu.org/gcc-4.9/changes.html), and Linaro supplies GCC
4.9.2:
$ g++ --version
g++ (Debian/Linaro 4.9.2-10) 4.9.2
Copyright (C) 2014 Free Software Foundation, Inc.
I'm wonder why the option is not being consumed by GCC. Are there any
ideas what I should be doing differently?
Thanks in advance.
Jeff
* On holiday [6/20]
# Progress #
* TCWG-655, Workaround ARM linux kernel ptrace bug. [2/20]
After the discussion, patch is posted. Pedro is on holiday, so the
patch is pending there for review.
* TCWG-518, ARM range stepping patches. [3/20]
The last "to-be-approved" patch is posted. Pending for review.
* TCWG-333, Thumb mode function pointer assignment in GDB. [2/20]
Working on a patch to handle both ARM/thumb and PPC64.
* TCWG-179, TLS variables can't be resolved in aarch64 GDB. [4/20]
GCC doesn't produce DW_AT_location
for TLS variable, because target hook TARGET_ASM_OUTPUT_DWARF_DTPREL
isn't defined for AArch64. Thanks to Jiong and Szabolcs's help, pick
up knowledge on TLS descriptor and TLS modes quickly. Still need to
figure out how to describe the location of TLS variable in debug info
if they are unknown in compilation/link time.
* Fix gdb.gdb/*.exp and gdb.mi/mi-reverse.exp test fails. [1/20]
* Upstreams patch review. [1/20]
* LAS16, sort out the invitation letter for US visa. [1/20]
# Plan #
* TCWG-333, TCWG-518, TCWG-655 and TCWG-179
* US visa application.
--
Yao
The Linaro Toolchain Working Group (TCWG) is pleased to announce the
2016.07 snapshot of Linaro GCC 6 source packages.
Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.1+svn238201 and
includes performance improvements and bug fixes backported from
mainline GCC. This snapshot contents will be part of the 2016.08
stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.1+svn238201
Subscribe to the important Linaro mailing lists and join our IRC
channels to stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Interested in commercial support? inquire at "Linaro support":
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[1]. Source package snapshots are defined when the compiler is only
put through unit-testing and full validation is not performed.
[2]. Stable source package releases are defined as releases where the
full Linaro Toolchain validation plan is executed.
Hi Linaro Members,
while I am cross compiling the wpa supplicant with toolchain gcc-linaro-4.9-2015.05-x86_64_arm-linux-gnueabihf for hostapd and nl80211 mode enabled in menuconfig I am getting linker message ld:cannot find -lnl -3 (libnl) .I tried to locate the libnl libraries but they are not built in.could you please let me know how to enabled libnl in the toolchain.
Thanks
Best Regards --
Best Regards,
Rohit Kamat
CallSend SMSCall from mobileAdd to SkypeYou'll need Skype CreditFree via Skype
== Progress ==
* ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623]
- Committed all 3 patches upstream
* ARM: Different ABI functions based on optimization level [TCWG-669]
- Patch in upstream review, had to rework it a bit
* PR26038 - inline assembly assertion building ARM linux kernel [TCWG-590]
- Patch in upstream review
* Refactor SelectionDAGBuilder::visitInlineAsm [TCWG-643]
- In progress (trying to break it up into a few helper functions)
* Misc
- TCWG Sprint prep (slides etc)
== Plan ==
* TCWG Sprint
* Commit TCWG-669 and address any review comments on TCWG-590
== Progress ==
TCWG-653 ARM/Thumb interworking veneers
Committed upstream after several review rounds and at least one set of
build bot failures in systems/compilers we don't have set up.
TCWG-612 ARM TLS support in LLD
Have an implementation and most of the tests. Should be ok to upstream
next week.
Found that llvm-mc doesn't implement .word sym(tlsldo). Have a simple
fix that I'll need to upstream before I can test local-dynamic.
== Plan ==
11 - 15th July TCWG Sprint
== Absences ==
25th July - 20th August Sabbatical
The Linaro Binary Toolchain
============================
The Linaro GCC 5.3-2016.05-rc2 Release-Candidate is now available.
Notice: All Linaro GCC 5 series toolchain users should migrate to the
latest version of the Linaro GCC 5 toolchain in order to mitigate
potential security exposure to CVE-2015-7547. See the NEWS section
below for details.
Download release-candidate packages from:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.05-rc2/http://snapshots.linaro.org/components/toolchain/binaries/5.3-2016.05-rc2/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 5.3-2016.05-rc2
Linaro glibc 2.21 (linaro/2.21)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.25 (linaro_binutils-2_25-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for Linaro GCC 5.3-2016.05-rc2
====================================
* Increment binutils release date to 2016_02 to reflect the most recent
commit:
commit ef90a4718f535cbe6345b4e7168baea7b1972abf
Author: Matthew Wahab <matthew.wahab(a)arm.com>
Date: Tue Jan 12 16:35:30 2016 +0000
[ARM] Support ARMv8.2 RAS extension.
* Baremetal sysroot names now contain 'newlib' rather than 'glibc'.
* Manifests now contain relative paths rather than absolute paths.
* Now generating proper manifest files.
* Fixed pi requeue support in glibc 2.21 while allowing the existing
2.21 minimum kernel default setting. This was checked into the
linaro/2.21/master branch.
commit a68cafa11c500d8a49a3014c43c5152859d037ae
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
commit 6e5cb616b5b442ce8b2664ad673c0acf42a490ac
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
commit 9ac61c0047295696cbcdbc26bdc174c7bd25a3c8
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Backported support into GCC for Cortex-A32, Cortex-A35, and Cortex-R8.
* Applied fix for CVE-2015-7547 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
glibc 2.21.
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* ARMv8.1 Instruction Support - ARMv8.1 instructions support was checked
into GCC and binutils. It has been backported into Linaro GCC 5.3
and Linaro binutils 2.25.
* Backported -Bsymbolic-functions into Linaro binutils 2.25.
* Performance related backports from Linaro GCC 5.2-2015.11, Linaro GCC
5.2-2015.12, and Linaro GCC 5.3-2016.01-1, Linaro GCC 5.3-2016.02,
Linaro GCC 5.3-2016.03, and Linaro GCC 5.3-2016.04 have been included.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.2-2015.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.01-1/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.02http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.03http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.04
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Linaro Toolchain Engineering Manager
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
Hi Everyone,
I have a test script from help that repeatedly builds and runs a
library under different configurations. The script includes multiple
Asan tests.
The Asan tests are producing some findings under ARM32 as shown below.
Other platforms do not include Asan findings. In addition, Valgrind
does nt produce any findings.
The test program is always built with at least -g2, and sometimes
built with -g3. However, I am not seeing the symbolication. According
to the GCC folks, asan_symbolize is not required for GCC because it
uses libbacktrace. Also see
http://bugzilla.redhat.com/show_bug.cgi?id=1250844.
Why am I lacking symbolization, and how do I achieve it?
**********
AddressSanitizer: stack-buffer-overflow on address 0xbec57b18 at pc
0x38c651 bp 0xbec579e0 sp 0xbec579e4
AddressSanitizer: stack-buffer-overflow on address 0xbedbae9c at pc
0x6553f bp 0xbedbae68 sp 0xbedbae6c
AddressSanitizer: stack-buffer-overflow on address 0xbea67b18 at pc
0x38cbc5 bp 0xbea679e0 sp 0xbea679e4
AddressSanitizer: stack-buffer-overflow on address 0xbef0fe9c at pc
0x66117 bp 0xbef0fe68 sp 0xbef0fe6c
**********
$ uname -a
Linux cubietruck 3.4.39 #35 SMP PREEMPT Tue Sep 15 17:17:33 CST 2015
armv7l armv7l armv7l GNU/Linux
$ g++ --version
g++ (Ubuntu/Linaro 4.8.2-19ubuntu1) 4.8.2
Copyright (C) 2013 Free Software Foundation, Inc.
# Progress #
* TCWG-655, Workaround ARM linux kernel ptrace bug on setting VFP
registers. [2/10]
Think about different approaches to workaround the kernel bug, but
can't work unfortunately. Propose an approach that workaround it in
gdb testing by setting affinity if the kernel is known broken.
People agree on this.
* TCWG-333, Thumb mode function pointer assignment in GDB. [3/10]
It is broken when you assign a function to a function pointer in
thumb mode in GDB. My original attempt is to skip the test, because
it is difficult to do what MIPS does nowadays. After some
discussions, I realize it is a GDB bug, and we should fix it.
Fortunately it is broken on ppc64 as well because of function
descriptor :)
* TCWG-518, ARM range stepping patches. [2/10]
V3 are reviewed, but I misunderstood one comments to V2. I'll update
patches, retest and post them.
* ARM linux kernel raises SIGILL for unknown syscall number, while GDB
expects kernel returns -ENOSYS. [2/10]
The behaviour is different from other arch. The patch in GDB side is
committed, but still need to kernel people why ARM kernel behaves
this way.
* Misc [1/10]
# Plan #
* All above,
* Off on Thur and Fri.
--
Yao
o One day off (2/10)
== Progress ==
o Extended Validation (3/10)
- Benchmarking job babysitting.
- Looked at Dejagnu issue (pid killing, resurrected an old patch)
o Upstream GCC (3/10)
- __sync bultin fix for ARMv8.1:
Careful read of the doc shows that there is no issue with the
current implementation (no need to add an extra DMB, acq/rel
semantic is sufficient in this case)
- AArch64 and ARM backend cleanup w/r to reload remaining hooks
Analysis and validation on-going
o Misc (2/10)
* Various meetings and discussions.
== Plan ==
o Continue on-going tasks
== This Week ==
* LTO (6/10)
a) TCWG-548 (2/10)
- Tweaked algorithm, which shows some improvements in reducing external
references
b) TCWG-666 (4/10)
- Had a look at bitwise-ccp
- WIP prototype patch
* Benchmarking (1/10)
- Got results for linaro-gcc-6 for coremark-pro for arm-linux-gnueabihf
* Sick Leave (2/10)
* Misc (1/10)
- Pinged for reviewing patches for TCWG-665 and TCWG-72
- Meetings
== Next Week ==
- Address upstream reviews for TCWG-665
- TCWG-666: Continue with prototype patch.
- TCWG-548: Submit upstream for feedback.
- Benchmarking: Get results for coremark-pro for aarch64-linux-gnu.
== Progress ==
TCWG-653 ARM/Thumb interworking veneers
Have completed an implementation, now in upstream review. Had initial
set of comments and posted an update. Likely to take several
iterations before commit
TCWG-612 ARM TLS support in LLD
Made a start. Looks to be more straightforward the interworking
thunks, should just be grunt-work to get done.
Updated lld slides on llvm sprint presentation.
== Plan ==
TCWG-653 and TCWG-612.
== Progress ==
* ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623] [4/10]
- Committed another patch upstream, 3 more in review
* ARM: Different ABI functions based on optimization level [TCWG-669] [3/10]
- Make sure we're ABI-compliant at -O0
- Patch in upstream review, need to fix a few things
* List of active environments with llvm-env [TCWG-640] [1/10]
- Committed internally
* Refactor SelectionDAGBuilder::visitInlineAsm [TCWG-643] [1/10]
- In progress (trying to break it up into a few helper functions)
* PR26038 - inline assembly assertion building ARM linux kernel
[TCWG-590] [1/10]
- Started investigating
== Plan ==
* Address any review comments for TCWG-623 and TCWG-669
* Submit patches for TCWG-643 and TCWG-590
Hi Andrew,
On 27 June 2016 at 19:32, Pinski, Andrew <Andrew.Pinski(a)cavium.com> wrote:
>> No gain expected in implementing an Ifunc'ed version of the library.
>
> How did you prove that? What hardware did you run this on to prove it?
> Also have you thought at least doing an ifunc version for 128bit atomics?
up to 64bits, the calls to the libatomic routines are inlined and
armv8.1 CAS and load-operate version are used when the application is
build for armv8.1 architecture. For 128bits, a call to the lib is
made which uses the same LL/SC implementation with or without LSE
support, as CAS and load-operate instruction don't support this data
size.
I don't have armv8.1 hardware and made the analysis on the generated
assembler. Do you have use case on your side where an ifunc version
can be useful ? I'm not aware of an algorithm which can replace
effectively LL/SC implementation with shorter CAS, do you have any
pointers ? Maybe CASP can be used in some cases, I'll investigate it.
Thanks
Yvan
> Thanks,
> Andrew
>
> -----Original Message-----
> From: linaro-toolchain [mailto:linaro-toolchain-bounces@lists.linaro.org] On Behalf Of Yvan Roux
> Sent: Monday, June 27, 2016 1:40 AM
> To: Linaro Toolchain Mailman List <linaro-toolchain(a)lists.linaro.org>
> Subject: [ACTIVITY] Week 25
>
> == Progress ==
> o Extended Validation (1/10)
> - Benchmarking job babysitting.
>
> o Upstream GCC (4/10)
> - ARMv8.1 libatomic: Analysis completed.
> No gain expected in implementing an Ifunc'ed version of the library.
> - Working on __sync buitlins potential fix.
>
> o Misc (5/10)
> * Various meetings and discussions.
> * Internal appraisal
>
> == Plan ==
> o Continue on-going tasks (__sync, benchmarking) _______________________________________________
> linaro-toolchain mailing list
> linaro-toolchain(a)lists.linaro.org
> https://lists.linaro.org/mailman/listinfo/linaro-toolchain
== Progress ==
o Extended Validation (1/10)
- Benchmarking job babysitting.
o Upstream GCC (4/10)
- ARMv8.1 libatomic: Analysis completed.
No gain expected in implementing an Ifunc'ed version of the library.
- Working on __sync buitlins potential fix.
o Misc (5/10)
* Various meetings and discussions.
* Internal appraisal
== Plan ==
o Continue on-going tasks (__sync, benchmarking)
# Progress #
* TCWG-333, ISA bit treatment in ARM thumb mode.
Got some comments from Maciej (MIPS) and need to address them.
* TCWG-518, ARM range stepping patches. [2/10]
Combine the path of "proceed" and "resume" so that we only change one
place instead of two to support range stepping. Patches are being
tested.
* TCWG-655, Workaround ARM linux kernel ptrace bug... [2/10]
by pining both program and debugger on the same core in the affected
test cases.
* Off on Wed to Fri. [6/10]
# Plan #
* Continue things above,
--
Yao
== This Week ==
* LTO (8/10)
a) TCWG-558 (2/10)
- found a way to detect if stmt is inside a loop
- addressed issue with -ffat-lto-objects
- patch posted upstream, waiting for review.
b) ipa-vrp (3/10)
- Prototype patch for propagating value ranges
inter-procedurally (accidental overlap with Kugan's patches)
- Experimented and reviewed Kugan's patch.
c) TCWG-548 (2/10)
- Wrote a pass to gather stats on external references.
- Measurements with SPEC2000 with and without prototype patch
d) Had a look at pointer alignment propagation within ipa-cp pass (1/10)
* Benchmarking (1/10)
- Obtained results for linaro-gcc-5, fsf-gcc-6 for coremark-pro for
arm-linux-gnueabihf target.
- Submitted job 112 for bkk16-buildfarm-benchmark, status shows SUCCESS, but it
appears no tcwg-benchmark job references build #112.
* Misc (1/10)
- Meetings
== Next Week ==
- Continue with TCWG-548 and ipa-vrp
- Ping patches in upstream reviews
== Progress ==
* Out of office on Monday and Tuesday [4/10]
* ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623] [4/10]
- First patch committed upstream (6 features / properties)
- Another patch in upstream review (5 features / properties)
- Working on another series of patches
* Use member initializers in ARMSubtarget [TCWG-659] [1/10]
- Trivial refactoring suggested during code review for TCWG-623
- Committed upstream
* Unbreak the selfhost bots [TCWG-661] [1/10]
- Currently bisecting the issue affecting
clang-cmake-thumbv7-full-sh (in progress)
- Tried bisecting one of the issues affecting
clang-cmake-armv7-selfhost and clang-cmake-armv7-selfhost-neon, but
the test board died in the process; Renato is trying to reproduce on
one of his boards
* Remove exit-on-error flag from CodeGen tests [TCWG-604]
- Finally committed upstream
== Plan ==
* ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623]
* Unbreak the selfhost bots [TCWG-661]
== Progress ==
* TCWG-653 Add interworking thunks to LLD
Investigated and reported upstream bug in existing implementation.
This has been fixed by reverting the change that introduced it. Got
some feedback about whether I would need to strictly follow existing
Thunk implementation.
Implemented an alternative thunk mechanism that should generalise to
supporting range extension and interworking thunks. It is passing the
existing lld regression tests.
== Plans ==
Finish off support for and add tests for ARM/Thumb interwork.
Tidy up and submit upstream.
== Progress ==
* Validation
- experimenting backport-multijob
- noticed dejagnu problems when trying to kill processes that timed out
- abe and jenkins configs patches / reviews
* Backports/snapshots
- restarted a few validations, to try to recover from disk full issues
* GCC
- neon-testgen.ml removal patch sent upstream
- PR 67591 (ARM v8 Thumb IT blocks deprecated)
- followup on vect.exp's check_vect() support for old arm cores.
- neon-fp16 tests consistency patch posted
- a couple of regressions flagged on trunk
* cortex-strings
- updated aarch64/strlen
* Support
* misc (conf-calls, meetings, emails, ....)
== Next ==
* Validation:
- patch reviews
- look at xenial, docker builders
* Backports
- restart the ones that failed due to disk space issues
* GCC
- monitor trunk regressions
- fix "check_vect" guard in gcc.dg/vect tests
- pr 67591
- advsimd tests
== Progress ==
o Extended Validation (1/10)
- Benchmarking job babysitting.
o Linaro GCC (5/10)
- Merged FSF GCtC 6 branch
- Reviewed backports (very tedious because of infra issues)
- Released June snapshots (5.4 and 6.1)
o Upstream GCC (2/10)
- ARMv8.1 libatomic: Reading and code analysis.
o Misc (2/10)
* Various meetings and discussions.
== Plan ==
o Continue on-going tasks (libatomic, benchamrking)
# Progress #
* TCWG-333, ISA bit treatment in ARM thumb mode. [2/10]
Post a patch to skip the test for thumb mode. Finish the prototype
which shows many issues that I can't overcome. Convince myself that
we should skip the test rather than support that in GDB.
* TCWG-518, ARM range stepping patches. [3/10].
11 of 12 patches are approved, and some of them are already
committed. Need to address one comment that merge to execution paths
into one, which requires some big changes in GDBserver for linux.
* TCWG-651, Support 'catch syscall' in remote for aarch64 and arm.[3/10]
My patches are posted upstream.
* TCWG-556, aarch64 gdb buildbot. [1/10]
They are online.
http://gdb-build.sergiodj.net/builders/Ubuntu-AArch64-m64/http://gdb-build.sergiodj.net/builders/Ubuntu-AArch64-native-gdbserver-m64
* TCWG-654, Build both cross/native arm/aarch64 gcc 5.4.1 to replace
the gcc in my gdb tests. Ongoing. [1/10]
# Plan #
* Follow up all of them above,
* Holiday from Wed - Fri.
--
Yao
== Progress ==
1 day public holidays
IPA VRP
- Implemented a version of early VRP.
- Verified with simple test cases.
- Some test cases are failing in regression testing, looking into it.
- Some design decisions need to be firmed up with the upstream
discussions.
== Plan ==
- Follow upon remaining upstream patches
- IPA VRP
